From owner-freebsd-arm@FreeBSD.ORG Sun Jun 30 00:47:19 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id F1003835 for ; Sun, 30 Jun 2013 00:47:19 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id A8B631BAE for ; Sun, 30 Jun 2013 00:47:19 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1Ut5nJ-0004bD-NU for freebsd-arm@freebsd.org; Sat, 29 Jun 2013 17:47:11 -0700 From: Oleksandr Tymoshenko Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Subject: FreeBSD/armv6 in QEMU Message-Id: <4B041486-F21A-49FE-8BCE-0B6AEF3DA525@bluezbox.com> Date: Sat, 29 Jun 2013 17:46:51 -0700 To: "freebsd-arm@freebsd.org" Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: Hello, I fixed several bugs in versatilepb support for FreeBSD but there is one change in QEMU that requires users' attention. Apparently PCI IRQ routing logic in VersatilePB QEMU emulation was not the same as real harwdare's. They fixed it in QEMU 1.5 and added the way to fall back to previous behaviour. So we could either fix logic and break all pre-1.5 QEMU versions or keep old logic and run on older version out of the box and on 1.5 with some additional configuration. After some thoughts I decided to go with latter. So if you use QEMU 1.5 just add this option to command line: -global versatile_pci.broken-irq-mapping=1 [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 Jun 2013 00:47:20 -0000 Hello, I fixed several bugs in versatilepb support for FreeBSD but there is one change in QEMU that requires users' attention. Apparently PCI IRQ routing logic in VersatilePB QEMU emulation was not the same as real harwdare's. They fixed it in QEMU 1.5 and added the way to fall back to previous behaviour. So we could either fix logic and break all pre-1.5 QEMU versions or keep old logic and run on older version out of the box and on 1.5 with some additional configuration. After some thoughts I decided to go with latter. So if you use QEMU 1.5 just add this option to command line: -global versatile_pci.broken-irq-mapping=1 Previous version should just work with latest HEAD (I tested QEMU 1.3) From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 01:53:29 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id D9265C51 for ; Mon, 1 Jul 2013 01:53:29 +0000 (UTC) (envelope-from ronald-freebsd8@klop.yi.org) Received: from cpsmtpb-ews05.kpnxchange.com (cpsmtpb-ews05.kpnxchange.com [213.75.39.8]) by mx1.freebsd.org (Postfix) with ESMTP id 7A4D515D9 for ; Mon, 1 Jul 2013 01:53:29 +0000 (UTC) Received: from cpsps-ews28.kpnxchange.com ([10.94.84.194]) by cpsmtpb-ews05.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Mon, 1 Jul 2013 03:52:18 +0200 Received: from CPSMTPM-TLF101.kpnxchange.com ([195.121.3.4]) by cpsps-ews28.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Mon, 1 Jul 2013 03:52:18 +0200 Received: from sjakie.klop.ws ([212.182.167.131]) by CPSMTPM-TLF101.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Mon, 1 Jul 2013 03:52:18 +0200 Received: from 212-182-167-131.ip.telfort.nl (localhost [127.0.0.1]) by sjakie.klop.ws (Postfix) with ESMTP id 59DFBFD70 for ; Mon, 1 Jul 2013 03:52:17 +0200 (CEST) Content-Type: text/plain; charset=us-ascii; format=flowed; delsp=yes To: freebsd-arm@freebsd.org Date: Mon, 01 Jul 2013 03:52:15 +0200 Subject: 10-current sheevaplug boot fails MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: "Ronald Klop" Message-ID: User-Agent: Opera Mail/12.15 (FreeBSD) X-OriginalArrivalTime: 01 Jul 2013 01:52:18.0949 (UTC) FILETIME=[9EAAC350:01CE75FD] X-RcptDomain: freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 01:53:29 -0000 Hi, If I try a recent 10-current I get this panic: ## Starting application at 0x00900000 ... KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2013 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #1: Sun Jun 30 22:43:04 CEST 2013 root@mailjail.klop.ws:/usr/obj/arm.arm/usr/src/sys/SHEEVAPLUG arm FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 WARNING: WITNESS option enabled, expect reduced performance. WARNING: DIAGNOSTIC option enabled, expect reduced performance. panic: lock "vm map (user)" 0xc0fca050 already initialized KDB: enter: panic It was also mentioned here: http://freebsd.1045724.n5.nabble.com/A-booting-r251793-kernel-panics-on-RPi-td5820296.html http://www.mail-archive.com/svn-src-head@freebsd.org/msg33905.html The revert of r251709 (as mentioned in one of the e-mails above) gives a conflict with too many differences for me to fix. But if I update to r251708 (one before the culprit) I get some LORs followed by this panic later in the boot proces: usbus0: 480Mbps High Speed USB v2.0 Fatal kernel mode data abort: 'Alignment Fault 1' trapframe: 0xde7f6c68 FSR=00000001, FAR=de7f6ce4, spsr=60000093 r0 =000306e7, r1 =ffffffff, r2 =0000001c, r3 =000306e7 r4 =de7f6cdc, r5 =de7f6ce4, r6 =c38b5960, r7 =c0cfa150 r8 =798ee230, r9 =00000015, r10=00000001, r11=de7f6cd4 r12=c0bea544, ssp=de7f6cb4, slr=c0c0afec, pc =c0a71cac [ thread pid 14 tid 100028 ] Stopped at binuptime+0x70: und 0xe1c500d0 Is it currently possible to boot 10-CURRENT on a Sheevaplug? NB: I'm booting from usb-stick. Ronald. From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 08:14:59 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 0B24E85B for ; Mon, 1 Jul 2013 08:14:59 +0000 (UTC) (envelope-from jordan.hubbard@gmail.com) Received: from mail-pb0-x232.google.com (mail-pb0-x232.google.com [IPv6:2607:f8b0:400e:c01::232]) by mx1.freebsd.org (Postfix) with ESMTP id DA23315E1 for ; Mon, 1 Jul 2013 08:14:58 +0000 (UTC) Received: by mail-pb0-f50.google.com with SMTP id wz7so4556345pbc.9 for ; Mon, 01 Jul 2013 01:14:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=content-type:mime-version:subject:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer; bh=qnApWY9Do0USw8miL2YLjo66CNXU3MjOM9b9th8cMto=; b=TgNZYXU95YXWGM+RyhoCRfsqetyEYAMVnIDU+RtQeoGKVYcuN8PXMl/LHI2KeGzY8+ ZnH30Z5s8TXhxB8LWpmg2xlvU0qugLL9xpZfzup3wgH57TcINYNu4r0cl6uyaIGU8W5u o/QZqx/QsqaQEzcqcHhvhLrTUypma0o+Zvnfj/ACqHjpTDeB/3EgEC+U4B//MtT5sz86 aAvq9p5xpi/eA4TcSwzPrEWZC3hQSIdAbcJiogjZMwFid7XB+YYZhOTOotF/8NkVjQqi e/nb1eixvr4oxuhdYI6RZ9ccLW5HwZ61mQuFS4/w2wy+TftmmvewpwP7g3Vbj0ef5Cvb E4Gg== X-Received: by 10.68.200.104 with SMTP id jr8mr22836128pbc.43.1372666498679; Mon, 01 Jul 2013 01:14:58 -0700 (PDT) Received: from [10.20.30.11] (75-101-82-48.static.sonic.net. [75.101.82.48]) by mx.google.com with ESMTPSA id ue9sm22686384pab.7.2013.07.01.01.14.57 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Jul 2013 01:14:58 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 7.0 \(1783\)) Subject: Re: Raspberry pi not ready to self-host yet? From: Jordan Hubbard In-Reply-To: <20130627215424.GA2441@night.db.net> Date: Mon, 1 Jul 2013 01:14:25 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> To: Diane Bruce X-Mailer: Apple Mail (2.1783) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 08:14:59 -0000 Well, I managed to build and install an RPI-B kernel on the PI itself = last night using gcc as the compiler, but it doesn't boot. I get the = dreaded "kernel boot args: (null)" and then a hang before even getting = into the device probes. - Jordan From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 08:28:05 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 02ADE611 for ; Mon, 1 Jul 2013 08:28:05 +0000 (UTC) (envelope-from manudferreiro@gmail.com) Received: from mail-ob0-x22d.google.com (mail-ob0-x22d.google.com [IPv6:2607:f8b0:4003:c01::22d]) by mx1.freebsd.org (Postfix) with ESMTP id CADA716FB for ; Mon, 1 Jul 2013 08:28:04 +0000 (UTC) Received: by mail-ob0-f173.google.com with SMTP id wc20so3980186obb.32 for ; Mon, 01 Jul 2013 01:28:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=W68OyFNLaEjROWkN7kf3SYXxioHer9FUfT8GSn9HgD0=; b=qJupwOm8pkjlf5iqP7efKq0nKuVrlawJzgAlJD4zI8yZZUu3vqVehBtWYWze805ku0 hE4eh9jBVscwFh/IkbYwnt/bK8xjpdSpgE8Lb8JzTsQp3sro82tp72pB9iAnQXMjSnfc h2WAD8iE0jWqBg0odez8EIAhDuus068s1grt7fSEd54kGGfsUeK275tCZFZFy4IgPIZi R+b7mSfA9OblFai8LHHoawDHharmcpSz0j+o7lE7ekEiaPM0pG2RKtxfQqCxh4LrqRXD xyjeLoDfmvl/Vsa2wakHHMrbHvGDWdvcBBHqq5k5iEgdOHhWgwapJuGku7JUroTdmAZX 2cLA== MIME-Version: 1.0 X-Received: by 10.182.142.104 with SMTP id rv8mr10549660obb.3.1372667284452; Mon, 01 Jul 2013 01:28:04 -0700 (PDT) Received: by 10.60.80.39 with HTTP; Mon, 1 Jul 2013 01:28:04 -0700 (PDT) Date: Mon, 1 Jul 2013 05:28:04 -0300 Message-ID: Subject: Ethernet support for cubieboard From: Manu Diaz Ferreiro To: freebsd-arm@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 08:28:05 -0000 Hello! I wish know if exist support ethernet for cubieboard Thanks! Manu From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 08:34:31 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 7BC8489D for ; Mon, 1 Jul 2013 08:34:31 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id 33C4A17BB for ; Mon, 1 Jul 2013 08:34:31 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1UtZYv-0002ai-VR; Mon, 01 Jul 2013 01:34:19 -0700 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) Subject: Re: Raspberry pi not ready to self-host yet? From: Oleksandr Tymoshenko In-Reply-To: <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> Date: Mon, 1 Jul 2013 01:33:59 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> To: Jordan Hubbard X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: On 2013-07-01, at 1:14 AM, Jordan Hubbard wrote: > Well, I managed to build and install an RPI-B kernel on the PI itself last night using gcc as the compiler, but it doesn't boot. I get the dreaded "kernel boot args: (null)" and then a hang before even getting into the device probes. [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 08:34:31 -0000 On 2013-07-01, at 1:14 AM, Jordan Hubbard = wrote: > Well, I managed to build and install an RPI-B kernel on the PI itself = last night using gcc as the compiler, but it doesn't boot. I get the = dreaded "kernel boot args: (null)" and then a hang before even getting = into the device probes. It crashes due to INVARIANTS options in kernel config. I'm going to look into this problem some time next week unless someone beats me to = it.=20 Just disable them for now.=20 The issue with empty console is that if there is "device sc" in kernel config syscons becomes default console. And if crash happens before frame buffer driver is initialize no output from kernel appears anywhere. Add set boot_multicons=3D"YES" to /boot/loader.rc or remove syscons-related stuff from kernel config.=20 From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 08:40:24 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 042A91E9 for ; Mon, 1 Jul 2013 08:40:24 +0000 (UTC) (envelope-from manudferreiro@gmail.com) Received: from mail-gh0-x22c.google.com (mail-gh0-x22c.google.com [IPv6:2607:f8b0:4002:c05::22c]) by mx1.freebsd.org (Postfix) with ESMTP id C18FA18DE for ; Mon, 1 Jul 2013 08:40:23 +0000 (UTC) Received: by mail-gh0-f172.google.com with SMTP id r18so1920338ghr.31 for ; Mon, 01 Jul 2013 01:40:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:subject:references :in-reply-to:content-type:content-transfer-encoding; bh=V1D/zKcj/TYadTsJFtt9dNnreiZM+33MDmHYGHBffXA=; b=rEPercrFsZw6gggG+JQ0y2PFsLya17l74SLxdwfLjWtMGXoc4odK/AJWB8qSa7e6pn MNBwfettrCG2NtPPfuuuT8npkFTSKkz8VXhhXbNhw4kjlvXEqxIBVD3A9ojPBlMuJ3+b WFZq8xZNs6H6iutoXTE4ac4RUjJN9qNyeHoLlxNJcTsu3TbmJQoMaYoHtpvVB+T8XC8B kE0SBbAd3tr9LX1j0HEE/noI4s1zEiOIGgnCqf8Q+3q/Oao1Qf2nyo+psPdSYQVl6LGJ 5oFcdl745IAJH2OdN0AV4bPugANVld4pMI8i3067ZvKBylTSWqsOUpo+lCvfadX/ZFKp dWyw== X-Received: by 10.236.60.137 with SMTP id u9mr363776yhc.195.1372668023317; Mon, 01 Jul 2013 01:40:23 -0700 (PDT) Received: from [192.168.0.147] (host44.186-108-120.telecom.net.ar. [186.108.120.44]) by mx.google.com with ESMTPSA id d91sm31915701yhq.16.2013.07.01.01.40.21 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Jul 2013 01:40:22 -0700 (PDT) Message-ID: <51D14074.6080101@gmail.com> Date: Mon, 01 Jul 2013 05:40:20 -0300 From: Manuel Diaz Ferreiro User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: Re: 10-current sheevaplug boot fails References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 08:40:24 -0000 Try adding: printf("%s: frame=%p\n", __func__, frame); just before the !INKERNEL(frame) check in sys/arm/arm/stack_machdep.c. From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 08:41:31 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 77783247 for ; Mon, 1 Jul 2013 08:41:31 +0000 (UTC) (envelope-from manudferreiro@gmail.com) Received: from mail-ye0-x22b.google.com (mail-ye0-x22b.google.com [IPv6:2607:f8b0:4002:c04::22b]) by mx1.freebsd.org (Postfix) with ESMTP id 40E1218F8 for ; Mon, 1 Jul 2013 08:41:31 +0000 (UTC) Received: by mail-ye0-f171.google.com with SMTP id q14so1112007yen.30 for ; Mon, 01 Jul 2013 01:41:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:subject:references :in-reply-to:content-type:content-transfer-encoding; bh=OoVzV1JWAKZgzRfJ2zqMUmmqezjePEH0eDzA4G0eYME=; b=ciKZbyXXPtcH7yZKESkgmgk52y9JjoyOBdZUYyoY1tA8zm2PS0L0B4r7W17fVFjDhM fLd3oCTzkfXxUMUGcbBIEvlmDhKiWpaqDpfUVU8xgCIlJ+zxjZxRBTS7oo7sCSgZb3gp GlXhU2lOjrtE07n7J1SCYMYxJpm9qjacJYx4zNBRJ9GDZbg9mYOHlud8tcC0mtV/6zla KOsk4HAEhCGuZy32H+Bv859kqzPPp/XZ3Wuk0+k7Qvh7tpE1mVM6+bMFEMaMtplBwS4x aIujKz2DNzadeOuv1w/ONeALt3bIVfM2IOdN1Xtk5Ff7SrfJhdyPA7ihcR4qg2Qq/Epl PaQQ== X-Received: by 10.236.65.193 with SMTP id f41mr7071928yhd.16.1372668090851; Mon, 01 Jul 2013 01:41:30 -0700 (PDT) Received: from [192.168.0.147] (host44.186-108-120.telecom.net.ar. [186.108.120.44]) by mx.google.com with ESMTPSA id 66sm16585242yhe.20.2013.07.01.01.41.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Jul 2013 01:41:30 -0700 (PDT) Message-ID: <51D140B8.4030508@gmail.com> Date: Mon, 01 Jul 2013 05:41:28 -0300 From: Manuel Diaz Ferreiro User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: Re: Raspberry pi not ready to self-host yet? References: <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> In-Reply-To: <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 08:41:31 -0000 Hello, you view this output trought for ethernet or serial port? From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 11:06:43 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id E70EA5E9 for ; Mon, 1 Jul 2013 11:06:43 +0000 (UTC) (envelope-from owner-bugmaster@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:1900:2254:206c::16:87]) by mx1.freebsd.org (Postfix) with ESMTP id BFFC410CF for ; Mon, 1 Jul 2013 11:06:43 +0000 (UTC) Received: from freefall.freebsd.org (localhost [127.0.0.1]) by freefall.freebsd.org (8.14.7/8.14.7) with ESMTP id r61B6h7Z085707 for ; Mon, 1 Jul 2013 11:06:43 GMT (envelope-from owner-bugmaster@FreeBSD.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.7/8.14.7/Submit) id r61B6hoG085705 for freebsd-arm@FreeBSD.org; Mon, 1 Jul 2013 11:06:43 GMT (envelope-from owner-bugmaster@FreeBSD.org) Date: Mon, 1 Jul 2013 11:06:43 GMT Message-Id: <201307011106.r61B6hoG085705@freefall.freebsd.org> X-Authentication-Warning: freefall.freebsd.org: gnats set sender to owner-bugmaster@FreeBSD.org using -f From: FreeBSD bugmaster To: freebsd-arm@FreeBSD.org Subject: Current problem reports assigned to freebsd-arm@FreeBSD.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 11:06:44 -0000 Note: to view an individual PR, use: http://www.freebsd.org/cgi/query-pr.cgi?pr=(number). The following is a listing of current problems submitted by FreeBSD users. These represent problem reports covering all versions including experimental development code and obsolete releases. S Tracker Resp. Description -------------------------------------------------------------------------------- o arm/180080 arm Unmapped buffers on ARMv7 big-RAM boards o arm/179688 arm [patch] [rpi] serial console eats some characters at m o arm/179561 arm Compilation issue for lighttpd on raspberry pi o arm/179532 arm wireless networking on ARM o arm/178495 arm buildworld fail on arm/raspberry pi o arm/177687 arm gdb gets installed but does not know the EABI version o arm/177686 arm assertion failed in ld-elf.so.1 when invoking telnet w o arm/177685 arm [kernel] [patch] Correct return type and usage of at91 o arm/177538 arm tunefs(8) and mount(8) can not access a newfs(8)'d fil o arm/176424 arm Compiler warning, TARGET_ARCH=armv6, make MALLOC_PRODU o arm/175803 arm building xdev for arm failing o arm/175605 arm please fix build binutils-2.23.1 in raspberry pi o arm/174461 arm [patch] Fix off-by-one in arm9/arm10 cache maintenance o arm/173617 arm Dreamplug exhibits eSATA file corruption using network o kern/171096 arm [arm][xscale][ixp]Allow 16bit access on PCI bus o arm/166256 arm build fail in pmap.c o arm/162159 arm [panic] USB errors leading to panic on DockStar 9.0-RC o arm/161110 arm /usr/src/sys/arm/include/signal.h is bad o arm/161044 arm devel/icu does not build on arm o arm/158950 arm arm/sheevaplug fails fsx when mmap operations are enab o arm/155894 arm [patch] Enable at91 booting from SDHC (high capacity) p arm/155214 arm [patch] MMC/SD IO slow on Atmel ARM with modern large o arm/154227 arm [geli] using GELI leads to panic on ARM o arm/153380 arm Panic / translation fault with wlan on ARM o arm/150581 arm [irq] Unknown error generates IRQ address decoding err o arm/134368 arm [new driver] [patch] nslu2_led driver for the LEDs on p arm/134338 arm [patch] Lock GPIO accesses on ixp425 27 problems total. From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 11:42:32 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id DE279C61 for ; Mon, 1 Jul 2013 11:42:32 +0000 (UTC) (envelope-from ganbold@gmail.com) Received: from mail-ie0-x22a.google.com (mail-ie0-x22a.google.com [IPv6:2607:f8b0:4001:c03::22a]) by mx1.freebsd.org (Postfix) with ESMTP id B1B53160D for ; Mon, 1 Jul 2013 11:42:32 +0000 (UTC) Received: by mail-ie0-f170.google.com with SMTP id e11so9084666iej.1 for ; Mon, 01 Jul 2013 04:42:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=M59YPHbjxiiqDmngjdnZzCh0d2g056GhhTaEbSHzOP0=; b=E79qzBo3HtTT3fArRrtmYuwG5zwHkWAMDv3W52SVH+K35J/tEAyY9A3wnBhV/eggEv H+7a2Fqg5Mf+lG0gYFFZ5VtjAJ7BbdfMRUIIDm5Mtqm7zg6fyLXJLy14yEv/XngRj5dA rMmWm7hfmTiqd+z00fRlrgwdaY6rnRxkULVq5kraA9bZb6GlHPrv1/Qr1rWSe2iwYxAl WWLPe/xjCcrJPY1lxGQ2doJM8vtIwveJt669hF/pJzh0uJQO0o1u5RFxf17+vHxfhPMP Ui4Z8E4QQqbheqnhOtedyzf/NwmOhvzLUnLvm9gyilQ2FkeQ0dfgmQATku2dmelneaEs mNlA== MIME-Version: 1.0 X-Received: by 10.50.32.70 with SMTP id g6mr15086456igi.2.1372678952370; Mon, 01 Jul 2013 04:42:32 -0700 (PDT) Received: by 10.64.235.239 with HTTP; Mon, 1 Jul 2013 04:42:32 -0700 (PDT) In-Reply-To: References: Date: Mon, 1 Jul 2013 19:42:32 +0800 Message-ID: Subject: Re: Booting kernel on Cubieboard/Mele a_1000 (Allwiner A10) From: Ganbold Tsagaankhuu To: Mariano Lescano Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: "freebsd-arm@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 11:42:32 -0000 On Sat, Jun 29, 2013 at 4:54 AM, Mariano Lescano wrote: > Thanks for that information, FreeBSD is now running in the Cubieboard and > mele_a1000 boards using ubldr and mounting the root filesystem from USB > stick. We will try to patch to get mmc support. > Anyone knows about ethernet and gpu support?? > There is no support for gpu, as for ethernet driver sometime ago the work has started by me, but it is not usable and hasn't finished yet. Ganbold > Thanks > > > 2013/6/27 Alexander Fedorov > > > Hi! > > Freebsd doesn't support Allwinner A10 MMC controller. > > > > You should use USB stick for the root filesystem. > > > > P.S. > > I have an initial version of the driver for MMC, but it does not > > support DMA, so the IO is very slow. I tested it with my Hackberry > > board. > > If you're interested, see the patch in attachment and configuration > > files. Also, I will publish the code on github in a few days. > > > > 2013/6/27 Mariano Lescano : > > > Hi > > > We have the kernel booting using ubldr. At the point to mount the root > > > filesystem we get this message: > > > > > > ====================================================== > > > > > > Trying to mount root from ufs:/dev/mmcsd0s2a [rw,noatime]... > > > stack_capture: frame=0xdcacfa3c > > > stack_capture: frame=0 > > > stack_capture: frame=0xdcacf85c > > > stack_capture: frame=0xc30feda4 > > > stack_capture: frame=0 > > > mountroot: waiting for device /dev/mmcsd0s2a ... > > > Mounting from ufs:/dev/mmcsd0s2a failed with error 19. > > > Trying to mount root from ufs:/dev/da0s2a []... > > > mountroot: waiting for device /dev/da0s2a ... > > > Mounting from ufs:/dev/da0s2a failed with error 19. > > > > > > Loader variables: > > > vfs.root.mountfrom=ufs:/dev/mmcsd0s2a > > > vfs.root.mountfrom.options=rw,noatime > > > > > > Manual root filesystem specification: > > > : [options] > > > Mount using filesystem > > > and with the specified (optional) option list. > > > > > > eg. ufs:/dev/da0s1a > > > zfs:tank > > > cd9660:/dev/acd0 ro > > > (which is equivalent to: mount -t cd9660 -o ro /dev/acd0 /) > > > > > > ? List valid disk boot devices > > > . Yield 1 second (for background tasks) > > > Abort manual input > > > > > > mountroot> ? > > > > > > List of GEOM managed disk devices: > > > > > > > > > mountroot> > > > > > > ======================================================== > > > > > > We can see that List of GEOM managed disk devices is empty > > > > > > What could be the problem? > > > Any suggestions? > > > > > > Thanks > > > _______________________________________________ > > > freebsd-arm@freebsd.org mailing list > > > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > > > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > > > > > > -- > *Lescano Mariano - UNC* > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 17:18:30 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7E27A82A for ; Mon, 1 Jul 2013 17:18:30 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from mail.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id B51E316FB for ; Mon, 1 Jul 2013 17:18:27 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by mail.wynn.com (8.14.3/8.12.6) with ESMTP id r61HIExI001055; Mon, 1 Jul 2013 13:18:14 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Mon, 1 Jul 2013 13:18:14 -0400 From: Brett Wynkoop To: Jordan Hubbard Subject: Re: Raspberry pi not ready to self-host yet? Message-ID: <20130701131814.50b92578@ivory.wynn.com> In-Reply-To: <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 17:18:30 -0000 Greeting- At least you made some progress Jordan. I have not had much time to play with my Pi the last few days, but I did discover my kernel build problem was caused by a malfunction in SVNUP. Seems it is happy to remove files, but not grab new ones. I need to get to the bottom of that as I do not want to build full SVN on the PI. -Brett -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 I would never invade the United States. There would be a gun behind every blade of grass. --Isoroku Yamamoto From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 17:26:53 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 2AFE7B37 for ; Mon, 1 Jul 2013 17:26:53 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-yh0-f43.google.com (mail-yh0-f43.google.com [209.85.213.43]) by mx1.freebsd.org (Postfix) with ESMTP id E2F061756 for ; Mon, 1 Jul 2013 17:26:52 +0000 (UTC) Received: by mail-yh0-f43.google.com with SMTP id b12so2622519yha.2 for ; Mon, 01 Jul 2013 10:26:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=1mT64lLQFZ+QMgyRl2Wwef8ELf6De7bRnXrYSb/kgPs=; b=Gl8MDJYCxu0yLT5BbTOFQAiCZObkd3BzNTAla2JB5D/uaoJ3T9c+lsqX2wxMjMROO8 4H58cD+1ByL2Y2BR2utLVzxwt1yZAEMkLjEFCCohFQ+K//nytTMF9wX3wLC73qs3WPjG qc3wY0J1IUvBNUQwJ26n1E1nxKgpLrBcQWwyvkBqBkbAjyKRCNb3jb9oF6Z9DybgVV69 rMHL2jx/euHK6UNhjjNGryjvC70flhiS1PKDfRRs2fbblMKEAM35w5mGO2KqoPCji91w qO7+o0qznOE49hET3RDkfscDFJCnXBBogRrETBorxivIviAJg/wpoK7W5FXsZqoysoL2 wgxw== X-Received: by 10.236.140.77 with SMTP id d53mr12858693yhj.83.1372699605923; Mon, 01 Jul 2013 10:26:45 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id 66sm19061856yhe.20.2013.07.01.10.26.43 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Jul 2013 10:26:44 -0700 (PDT) Sender: Warner Losh Subject: Re: Raspberry pi not ready to self-host yet? Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> Date: Mon, 1 Jul 2013 11:26:41 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <3B13E6CD-0681-45F4-86AD-5B7E86A1750B@bsdimp.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> To: Oleksandr Tymoshenko X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQk0HY9sNcw8O9yYJNcuXpvXgGUcQS6dMhJAG42ct9RHOBzNkHWgCt01nkNUhyCAxVoX/vi9 Cc: freebsd-arm@freebsd.org, Jordan Hubbard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 17:26:53 -0000 On Jul 1, 2013, at 2:33 AM, Oleksandr Tymoshenko wrote: >=20 > On 2013-07-01, at 1:14 AM, Jordan Hubbard = wrote: >=20 >> Well, I managed to build and install an RPI-B kernel on the PI itself = last night using gcc as the compiler, but it doesn't boot. I get the = dreaded "kernel boot args: (null)" and then a hang before even getting = into the device probes. >=20 > It crashes due to INVARIANTS options in kernel config. I'm going to > look into this problem some time next week unless someone beats me to = it.=20 > Just disable them for now.=20 >=20 > The issue with empty console is that if there is "device sc" in > kernel config syscons becomes default console. And if crash happens > before frame buffer driver is initialize no output from kernel appears > anywhere. Add set boot_multicons=3D"YES" to /boot/loader.rc or remove > syscons-related stuff from kernel config.=20 I've long wondered why we don't make this the default. The number of = systems with a free serial port is huge, and the number with some = hardware on it are small enough to be manageable by turning it off. If = not globally, at least for arm. Warner From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 19:27:30 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 1EAB24EC for ; Mon, 1 Jul 2013 19:27:30 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from nibbler.fubar.geek.nz (nibbler.fubar.geek.nz [199.48.134.198]) by mx1.freebsd.org (Postfix) with ESMTP id 01D891D4B for ; Mon, 1 Jul 2013 19:27:29 +0000 (UTC) Received: from bender.Home (97e76fc9.skybroadband.com [151.231.111.201]) by nibbler.fubar.geek.nz (Postfix) with ESMTPSA id 0AF255E1D5; Mon, 1 Jul 2013 19:27:22 +0000 (UTC) Date: Mon, 1 Jul 2013 20:27:16 +0100 From: Andrew Turner To: Oleksandr Tymoshenko Subject: Re: Raspberry pi not ready to self-host yet? Message-ID: <20130701202716.264a5ac9@bender.Home> In-Reply-To: <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, Jordan Hubbard , Jeff Roberson X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 19:27:30 -0000 On Mon, 1 Jul 2013 01:33:59 -0700 Oleksandr Tymoshenko wrote: > > On 2013-07-01, at 1:14 AM, Jordan Hubbard > wrote: > > > Well, I managed to build and install an RPI-B kernel on the PI > > itself last night using gcc as the compiler, but it doesn't boot. > > I get the dreaded "kernel boot args: (null)" and then a hang before > > even getting into the device probes. > > It crashes due to INVARIANTS options in kernel config. I'm going to > look into this problem some time next week unless someone beats me > to it. Just disable them for now. There are two panics: 1. In vm_map_zinit() the sx lock fails to initialise because it thinks it is already initialised. This is because the bit to check this has been set in uma_startup() by the line: slab->us_flags = UMA_SLAB_BOOT; This is only a problem with INVARIANTS because the location of us_flags changes when it is enabled, and in this case the slab is reused as the memory allocated without zeroing it out first. 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where the cache appears to not be set to write-back. Attempting this is not guaranteed to work. I haven't looked into this fully to see if this is correct, but from the panic I was seeing this appears to be the case. I have been talking to Jeff Roberson on panic 1. As I'm nit sure if my assessment of panic 2 is correct I haven't looked at how to fix it. Andrew From owner-freebsd-arm@FreeBSD.ORG Mon Jul 1 22:16:33 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 46282D9C for ; Mon, 1 Jul 2013 22:16:33 +0000 (UTC) (envelope-from ronald-freebsd8@klop.yi.org) Received: from cpsmtpb-ews08.kpnxchange.com (cpsmtpb-ews08.kpnxchange.com [213.75.39.13]) by mx1.freebsd.org (Postfix) with ESMTP id B3C491685 for ; Mon, 1 Jul 2013 22:16:32 +0000 (UTC) Received: from cpsps-ews14.kpnxchange.com ([10.94.84.181]) by cpsmtpb-ews08.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Tue, 2 Jul 2013 00:15:21 +0200 Received: from CPSMTPM-TLF103.kpnxchange.com ([195.121.3.6]) by cpsps-ews14.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Tue, 2 Jul 2013 00:15:21 +0200 Received: from sjakie.klop.ws ([212.182.167.131]) by CPSMTPM-TLF103.kpnxchange.com with Microsoft SMTPSVC(7.5.7601.17514); Tue, 2 Jul 2013 00:15:19 +0200 Received: from 212-182-167-131.ip.telfort.nl (localhost [127.0.0.1]) by sjakie.klop.ws (Postfix) with ESMTP id 62994FE16; Tue, 2 Jul 2013 00:15:19 +0200 (CEST) Content-Type: text/plain; charset=us-ascii; format=flowed; delsp=yes To: freebsd-arm@freebsd.org, "Manuel Diaz Ferreiro" Subject: Re: 10-current sheevaplug boot fails References: <51D14074.6080101@gmail.com> Date: Tue, 02 Jul 2013 00:15:19 +0200 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: "Ronald Klop" Message-ID: In-Reply-To: <51D14074.6080101@gmail.com> User-Agent: Opera Mail/12.15 (FreeBSD) X-OriginalArrivalTime: 01 Jul 2013 22:15:19.0694 (UTC) FILETIME=[78FFDAE0:01CE76A8] X-RcptDomain: freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Jul 2013 22:16:33 -0000 On Mon, 01 Jul 2013 10:40:20 +0200, Manuel Diaz Ferreiro wrote: > Try adding: > > printf("%s: frame=%p\n", __func__, frame); > just before the !INKERNEL(frame) check > in sys/arm/arm/stack_machdep.c. Thanks for your answer. I don't see a !INKERNEL check in that file. Only a 'while (INKERNEL(frame))' check. I put it above the 'if !def EABI && !def clang' statement. Without INVARIANTS/DIAGNOSTICS/etc. it boots until this: usbus0: EHCI version 1.0 usbus0: set host controller mode usbus0 on ehci0 cryptosoft0: Timecounters tick every 1.000 msec ipfw2 initialized, divert loadable, nat loadable, default to accept, logging disabled usbus0: 480Mbps High Speed USB v2.0 Fatal kernel mode data abort: 'Alignment Fault 1' trapframe: 0xde21cb90 FSR=00000001, FAR=de21cc0c, spsr=60000093 r0 =0002ceac, r1 =ffffffff, r2 =0000001c, r3 =0002ceac r4 =de21cc04, r5 =de21cc0c, r6 =00000000, r7 =c0cab4c0 r8 =798ee230, r9 =00000015, r10=00000001, r11=de21cbfc r12=c0bb2370, ssp=de21cbdc, slr=c0bd1b18, pc =c0a62a1c [ thread pid 12 tid 100006 ] Stopped at binuptime+0x70: und 0xe1c500d0 db> With INVARIANTS it gives this: ## Starting application at 0x00900000 ... KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2013 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #8: Tue Jul 2 00:09:03 CEST 2013 root@mailjail.klop.ws:/usr/obj/arm.arm/usr/src/sys/SHEEVAPLUG arm FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 WARNING: WITNESS option enabled, expect reduced performance. WARNING: DIAGNOSTIC option enabled, expect reduced performance. panic: lock "vm map (user)" 0xc0fca050 already initialized KDB: enter: panic So no sign of the added printf with the frame pointer. This was tested at a just svn updated 10-CURRENT using EABI and clang. These are the defaults, aren't they? Any ideas? Ronald. From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 00:57:34 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id A78DC7A6; Tue, 2 Jul 2013 00:57:34 +0000 (UTC) (envelope-from hiren.panchasara@gmail.com) Received: from mail-ea0-x229.google.com (mail-ea0-x229.google.com [IPv6:2a00:1450:4013:c01::229]) by mx1.freebsd.org (Postfix) with ESMTP id 14C981BCB; Tue, 2 Jul 2013 00:57:33 +0000 (UTC) Received: by mail-ea0-f169.google.com with SMTP id h15so2449116eak.28 for ; Mon, 01 Jul 2013 17:57:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=ik6UevDXX+Oq8EqqkAUWJMEU6ZSEh6ocNmiRVQxAaW4=; b=jmYuzDHDougbMTtWGrBnHJpUHQ9UHUHKFxkNwarHl0okfq6AbODzjh1tGfEGefloko Dk8S/GY59YpLw4C/b8x403lyl/qDjzBsr0WQkJbn2LNuw4Wz42b/BFiDQDYVcpgIv8ig sRLUSCw2CLtT1K/BiVYhiI8fPxA2pCIJaRuUAOlP4CsUPSQeFMbg0hd4TPXIR5S+4epW 6FW1/r1ebj74klMadLqtLAK+T2TpoXdK+6iwYrWkNPR+PgF4NwjWYxLNYU8V2gehSTi4 r7bweJAOpRdR+RFXmHHqdml4uUanny0tEyIPQgeQ/NXw2jkcD1HMEByDlHQHH9yIubDK ohVw== MIME-Version: 1.0 X-Received: by 10.14.48.77 with SMTP id u53mr23094306eeb.154.1372726652812; Mon, 01 Jul 2013 17:57:32 -0700 (PDT) Received: by 10.14.119.203 with HTTP; Mon, 1 Jul 2013 17:57:32 -0700 (PDT) In-Reply-To: References: <51C4A067.7010203@semihalf.com> <20130623065706.GV91021@kib.kiev.ua> <20130623083220.GA41511@mail.bsdpad.com> <20130623143248.GA91021@kib.kiev.ua> <20130623144346.GA69378@mail.bsdpad.com> <20130623161617.GC91021@kib.kiev.ua> <20130623164425.GA77339@mail.bsdpad.com> <20130623165040.GD91021@kib.kiev.ua> <20130623170507.GA79364@mail.bsdpad.com> Date: Mon, 1 Jul 2013 17:57:32 -0700 Message-ID: Subject: Re: Kernel build fails on ARM: Cannot fork: Cannot allocate memory From: hiren panchasara To: Jeff Roberson Content-Type: text/plain; charset=UTF-8 Cc: Konstantin Belousov , freebsd-current , freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 00:57:34 -0000 On Mon, Jun 24, 2013 at 8:23 PM, Jeff Roberson wrote: > > Would any of the arm users be interested in testing a larger patch that > changes the way the kernel allocations KVA? It also has some UMA code that > lessens kernel memory utilization. > > http://people.freebsd.org/~jeff/vmem.diff > > Any reports would be helpful. Is there any ETA on getting stack tracing > fixed? I suspect the pmap recursion encountered with Kostik's patch exist > in the current kernel. The other changes in this patch my fix that as well. I know mine is not a failed case but I still went ahead and gave your diffs a whirl. I have pretty much working beaglebone black running 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r252049M: Applied your patch and rebuilt the kernel. Everything seem sane right now. For reference: root@beaglebone:~ # cc -v FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 Target: armv6-unknown-freebsd10.0 Thread model: posix root@beaglebone:~ # df -k Filesystem 1024-blocks Used Avail Capacity Mounted on /dev/mmcsd0s2a 13129204 6459024 5619844 53% / devfs 1 1 0 100% /dev /dev/mmcsd0s1 2020 660 1359 33% /boot/msdos /dev/md0 29340 24 26972 0% /tmp /dev/md1 14492 64 13272 0% /var/log /dev/md2 4508 8 4140 0% /var/tmp root@beaglebone:~ # root@beaglebone:~ # sysctl hw.physmem hw.physmem: 536870912 root@beaglebone:~ # dmesg | less KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2013 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #0: Wed Jun 26 09:51:05 UTC 2013 root@beaglebone:/usr/obj/usr/src/sys/BEAGLEBONE arm FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 WARNING: WITNESS option enabled, expect reduced performance. CPU: Cortex A8-r3 rev 2 (Cortex-A core) Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext WB disabled EABT branch prediction enabled LoUU:2 LoC:2 LoUIS:1 Cache level 1: 32KB/64B 4-way data cache WT WB Read-Alloc 32KB/64B 4-way instruction cache Read-Alloc Cache level 2: 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc real memory = 536870912 (512 MB) avail memory = 511758336 (488 MB) Texas Instruments AM3358 Processor, Revision ES1.1 Anything in particular you want me to test other than, it seems to be working fine for me? Thanks, Hiren > > Thanks, > Jeff > > _______________________________________________ > freebsd-current@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-current > To unsubscribe, send any mail to "freebsd-current-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 04:28:19 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 282605BE for ; Tue, 2 Jul 2013 04:28:19 +0000 (UTC) (envelope-from tim@kientzle.com) Received: from monday.kientzle.com (99-115-135-74.uvs.sntcca.sbcglobal.net [99.115.135.74]) by mx1.freebsd.org (Postfix) with ESMTP id 05AF21368 for ; Tue, 2 Jul 2013 04:28:18 +0000 (UTC) Received: (from root@localhost) by monday.kientzle.com (8.14.4/8.14.4) id r624SA8k079972; Tue, 2 Jul 2013 04:28:10 GMT (envelope-from tim@kientzle.com) Received: from [192.168.2.123] (CiscoE3000 [192.168.1.65]) by kientzle.com with SMTP id ubcuev67uvct84jj2jikqgpjys; Tue, 02 Jul 2013 04:28:09 +0000 (UTC) (envelope-from tim@kientzle.com) Subject: Re: Raspberry pi not ready to self-host yet? Mime-Version: 1.0 (Apple Message framework v1283) Content-Type: text/plain; charset=windows-1252 From: Tim Kientzle In-Reply-To: <20130701131814.50b92578@ivory.wynn.com> Date: Mon, 1 Jul 2013 21:28:08 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <20130701131814.50b92578@ivory.wynn.com> To: Brett Wynkoop X-Mailer: Apple Mail (2.1283) Cc: freebsd-arm@freebsd.org, Jordan Hubbard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 04:28:19 -0000 On Jul 1, 2013, at 10:18 AM, Brett Wynkoop wrote: > Greeting- >=20 > At least you made some progress Jordan. I have not had much time to > play with my Pi the last few days, but I did discover my kernel build > problem was caused by a malfunction in SVNUP. Seems it is happy to > remove files, but not grab new ones. I need to get to the bottom of > that as I do not want to build full SVN on the PI. svnlite now builds on armv6. So if you can get a fresh source tree, you can build and install svnlite to help you get a fresh source tree. Hmmm=85. :) Tim From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 04:48:26 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 9AA33AED; Tue, 2 Jul 2013 04:48:26 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id 1D05715BD; Tue, 2 Jul 2013 04:48:25 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1UtsVp-000FRk-TP; Mon, 01 Jul 2013 21:48:24 -0700 Content-Type: text/plain; charset=iso-8859-1 Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) Subject: Re: Beaglebone USB driver (Mentor Graphics OTG) From: Oleksandr Tymoshenko In-Reply-To: <51CBDFEA.7050203@bitfrost.no> Date: Mon, 1 Jul 2013 21:48:03 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <51608AA4.2020804@bluezbox.com> <51611A7B.2010105@bitfrost.no> <0927BB4C-6917-408D-B102-AB98F72314B6@bluezbox.com> <51CBDFEA.7050203@bitfrost.no> To: Hans Petter Selasky X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: On 2013-06-26, at 11:47 PM, Hans Petter Selasky wrote: > On 06/27/13 02:53, Oleksandr Tymoshenko wrote: >> >> On 2013-04-07, at 12:04 AM, Hans Petter Selasky wrote: >> >>> On 04/06/13 22:50, Oleksandr Tymoshenko wrote: >>>> Hello, >>>> >>>> This is first iteration of Host Mode support for Mentor Graphics >>>> OTG USB controller. I tested it by building kernel with USB memory >>>> stick mounted as /usr/obj, resulting kernel was bootable and worked fine. >>>> I reused some ideas (mostly for channel-management) from >>>> DWT OTG driver. >>>> >>>> Some pieces are still missing: >>>> - Support for SPLIT transactions, I don not have high speed hub >>>> right now to test it, but implementing it should be really >>>> straighforward. >>>> - Isochronous transfers. I do not have hardware to test this. Does >>>> anybody have any suggestion about simple use case? >>>> - Control Data OUT transaction >>>> - Wrapper for atmel HW has not ben synced with new core logic requirements >>>> yet >>>> >>>> Please review and test. I tested it only with gcc-built kernel/world. >>>> Now when >>>> first iteration is finished I'm going to update all my boards to new >>>> world order >>>> (clang/EABI) and re-test this stuff. >>>> >>>> Patch: >>>> http://people.freebsd.org/~gonzo/arm/patches/beaglebone-musb.diff >>> >>> Hi, >>> >>> Looks like you've got the grasp of the USB controller stuff :-) >>> >>> Some comments: >>> >>> 1) Use DPRINTFN(-1, ...) instead of printf() for all printf() that are not part of boot dmesg. >>> >>> + break; >>> + default: >>> + td->transfer_type = 0; >>> + printf("Invalid USB speed: %d\n", speed); >>> + break; >>> + } >>> >>> >>> 2) You should implement if HOST mode, support for SUSPEND and RESUME. See EHCI driver. Basically what you need is: >>> >>> a) USB transfers are stopped/paused. I know there is a hack you need if the host transfer cancel hangs, and that is to write a dummy device address and wait for the USB transfer to error out after 250 us max. >>> >>> b) switch on USB suspend signalling. >>> >>> >>> At resume: >>> >>> c) do resume [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP 0.0 URIBL_BLOCKED ADMINISTRATOR NOTICE: The query to URIBL was blocked. See http://wiki.apache.org/spamassassin/DnsBlocklists#dnsbl-block for more information. [URIs: totalphase.com] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: arm@freebsd.org, usb@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 04:48:26 -0000 On 2013-06-26, at 11:47 PM, Hans Petter Selasky wrote: > On 06/27/13 02:53, Oleksandr Tymoshenko wrote: >>=20 >> On 2013-04-07, at 12:04 AM, Hans Petter Selasky = wrote: >>=20 >>> On 04/06/13 22:50, Oleksandr Tymoshenko wrote: >>>> Hello, >>>>=20 >>>> This is first iteration of Host Mode support for Mentor Graphics >>>> OTG USB controller. I tested it by building kernel with USB memory >>>> stick mounted as /usr/obj, resulting kernel was bootable and worked = fine. >>>> I reused some ideas (mostly for channel-management) from >>>> DWT OTG driver. >>>>=20 >>>> Some pieces are still missing: >>>> - Support for SPLIT transactions, I don not have high speed hub >>>> right now to test it, but implementing it should be really >>>> straighforward. >>>> - Isochronous transfers. I do not have hardware to test this. Does >>>> anybody have any suggestion about simple use case? >>>> - Control Data OUT transaction >>>> - Wrapper for atmel HW has not ben synced with new core logic = requirements >>>> yet >>>>=20 >>>> Please review and test. I tested it only with gcc-built = kernel/world. >>>> Now when >>>> first iteration is finished I'm going to update all my boards to = new >>>> world order >>>> (clang/EABI) and re-test this stuff. >>>>=20 >>>> Patch: >>>> http://people.freebsd.org/~gonzo/arm/patches/beaglebone-musb.diff >>>=20 >>> Hi, >>>=20 >>> Looks like you've got the grasp of the USB controller stuff :-) >>>=20 >>> Some comments: >>>=20 >>> 1) Use DPRINTFN(-1, ...) instead of printf() for all printf() that = are not part of boot dmesg. >>>=20 >>> + break; >>> + default: >>> + td->transfer_type =3D 0; >>> + printf("Invalid USB speed: %d\n", = speed); >>> + break; >>> + } >>>=20 >>>=20 >>> 2) You should implement if HOST mode, support for SUSPEND and = RESUME. See EHCI driver. Basically what you need is: >>>=20 >>> a) USB transfers are stopped/paused. I know there is a hack you need = if the host transfer cancel hangs, and that is to write a dummy device = address and wait for the USB transfer to error out after 250 us max. >>>=20 >>> b) switch on USB suspend signalling. >>>=20 >>>=20 >>> At resume: >>>=20 >>> c) do resume signalling, similar to EHCI/UHCI I think. >>>=20 >>> d) switch on channel tokens. >>>=20 >>> case UHF_PORT_SUSPEND: >>> + if (sc->sc_mode =3D=3D MUSB2_HOST_MODE) >>> + printf("TODO: Set UHF_PORT_SUSPEND\n"); >>> + break; >>>=20 >>>=20 >>>=20 >>> 3) Make sure that channels are not generating tokens if they are = aborted / cancelled / timedout. This can not be verified using a USB = mass storage device. Verify this by connecting a USB serial adapter. Try = to open/close /dev/cuaU0. Make sure it does not loose any bytes and that = channel cancel does not hang forever. >>=20 >>=20 >=20 > Hi, >=20 >> Thanks for review. Took me quite some time to get back >> to the driver but here is updated version that addresses some >> of the issues you've mentioned: >> = http://people.freebsd.org/~gonzo/arm/patches/beaglebone-usb-20130626.diff >>=20 >> It fixes several bugs, adds proper SPLIT transactions support and >> suspend/resume signalling. I tested it with urtwn-based WiFi chip, >> mass storage device, USB keyboard connected directly and using >> high-speed hub. >>=20 >> Suspend/resume is not 100% complete though. I can use USB serial >> port adapter if it's suspended/resumed unconnected. But it stuck if I = do >> the test while connected. Is it the right way to test it? >=20 > Which suspend you mean system/resume suspend or USB suspend/resume? I was talking about USB suspend/resume. I do not thin we have working=20 suspend/resume for ARM yet so I don't have reliable way to test it. >=20 > You should implement a musb_set_hw_power_sleep() too. This handles = system going into suspend. You should probably reset that adapter at = this point. >=20 > static void > musb_set_hw_power_sleep(struct usb_bus *bus, uint32_t state) > { > struct ehci_softc *sc =3D EHCI_BUS2SC(bus); >=20 > switch (state) { > case USB_HW_POWER_SUSPEND: > case USB_HW_POWER_SHUTDOWN: > ehci_suspend(sc); > break; > case USB_HW_POWER_RESUME: > ehci_resume(sc); > break; > default: > break; > } > } >=20 > If the musb requires that you stop tokens before going in and out of = suspend, you need to add functions like this: >=20 >=20 > ehci_device_resume/ehci_device_suspend >=20 >>=20 >> On the related note: can somebody suggest budget USB protocol = analyzer >> with support for high-speed bus? >>=20 >=20 > http://www.totalphase.com/products/beagle_usb480/ >=20 > There are more, but I don't have the list right now. >=20 > You can probably just remove this check. We don't support LOW speed in = device mode. >=20 > - > - if ((udev->speed !=3D USB_SPEED_FULL) && > - (udev->speed !=3D USB_SPEED_HIGH)) { > - /* not supported */ > - return; > + if (sc->sc_mode !=3D MUSB2_HOST_MODE) { > + if ((udev->speed !=3D USB_SPEED_FULL) && > + (udev->speed !=3D USB_SPEED_HIGH)) { > + /* not supported */ > + return; > + } > } Removed > The musbotg_channel_free function is not sufficient! You need to = program a non-existing device address like 127 and wait for 2 ms I = recommend. The ABORT bits don't work with this controller last time I = tried them! You can verify this by loading and unloading the wireless = driver. I guess that IN tokens don't stop when you unload the driver. = You will see this using an USB analyzer. >=20 > +#define MUSB2_MAX_DEVICES (USB_MAX_DEVICES - 1) >=20 > +static void=09 > +musbotg_channel_free(struct musbotg_softc *sc, struct musbotg_td *td) > +{ > + > + DPRINTFN(1, "ep_no=3D%d\n", td->channel); > + > + if (sc->sc_mode =3D=3D MUSB2_DEVICE_MODE) > + return; > + > + if (td =3D=3D NULL) > + return; > + if (td->channel =3D=3D -1) > + return; > + > + musbotg_ep_int_set(sc, td->channel, 0); > + sc->sc_channel_mask &=3D ~(1 << td->channel); > + td->channel =3D -1; >=20 > /* force transfer failure */ > MUSB2_WRITE_1(sc, MUSB2_REG_RXFADDR(0), 127); > XXX channel should not be re-used until after 2*125us. Can probably = use ticks for this! >=20 > +} >=20 > The 2ms can be done asynchronosly by implementing this function. See = EHCI driver. >=20 > static void > musbotg_get_dma_delay(struct usb_device *udev, uint32_t *pus) > { >=20 > if (host_mode) > *pus =3D 2000; /* microseconds */ > else > *pus =3D 0; > } Writing 127 to FADDR breaks driver. It can't even attach device = properly.=20 I do not completely understand the scenario behind this requirement. My=20= recollection is: when we cancel IN transaction somehow we should ensure=20= that function that currently handles it does not stuck forever. =46rom = what=20 I see it's just impossible. There is internal NAK timer that fails the = transaction once it reached configured value (or 3 by default AFAIR). Isn't it = enough? I tried unloading active uwrtn driver - it unloads with some delay but = as=20 far as I can see from logs delay is not due to USB internal transactions = code it must be upper layer.=20 Could you, please, elaborate on the matter? Here is updated version of the patch:=20 = http://people.freebsd.org/~gonzo/arm/patches/beaglebone-usb-20130701.diff Besides cosmetic fixes I also synced = dev/usb/controller/musb_otg_atmelarm.c to the latest changes of core logic: added required wrappers and some=20 initializations.=20 I do not longer have access to USB analyzer so my debugging abilities is somewhat limited now.=20= From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 06:17:25 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id A76A6E2F for ; Tue, 2 Jul 2013 06:17:25 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id 2F4AC189D for ; Tue, 2 Jul 2013 06:17:24 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1Utttv-000GRd-Ow; Mon, 01 Jul 2013 23:17:22 -0700 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) Subject: Re: Raspberry pi not ready to self-host yet? From: Oleksandr Tymoshenko In-Reply-To: <20130701202716.264a5ac9@bender.Home> Date: Mon, 1 Jul 2013 23:17:00 -0700 Content-Transfer-Encoding: 7bit Message-Id: <27399D4B-8CEF-427B-9201-A47564F7DF50@bluezbox.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> <20130701202716.264a5ac9@bender.Home> To: Andrew Turner X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: On 2013-07-01, at 12:27 PM, Andrew Turner wrote: > On Mon, 1 Jul 2013 01:33:59 -0700 > Oleksandr Tymoshenko wrote: > >> >> On 2013-07-01, at 1:14 AM, Jordan Hubbard >> wrote: >> >>> Well, I managed to build and install an RPI-B kernel on the PI >>> itself last night using gcc as the compiler, but it doesn't boot. >>> I get the dreaded "kernel boot args: (null)" and then a hang before >>> even getting into the device probes. >> >> It crashes due to INVARIANTS options in kernel config. I'm going to >> look into this problem some time next week unless someone beats me >> to it. Just disable them for now. > > There are two panics: > 1. In vm_map_zinit() the sx lock fails to initialise because it thinks > it is already initialised. This is because the bit to check this has > been set in uma_startup() by the line: > slab->us_flags = UMA_SLAB_BOOT; > This is only a problem with INVARIANTS because the location of > us_flags changes when it is enabled, and in this case the slab is > reused as the memory allocated without zeroing it out first. > 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where the > cache appears to not be set to write-back. Attempting this is not > guaranteed to work. I haven't looked into this fully to see if this > is correct, but from the panic I was seeing this appears to be the > case. > > I have been talking to Jeff Roberson on panic 1. As I'm nit sure if my > assessment of panic 2 is correct I haven't looked at how to fix it. [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP 0.0 URIBL_BLOCKED ADMINISTRATOR NOTICE: The query to URIBL was blocked. See http://wiki.apache.org/spamassassin/DnsBlocklists#dnsbl-block for more information. [URIs: fubar.geek.nz] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: freebsd-arm@freebsd.org, Jordan Hubbard , Jeff Roberson X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 06:17:25 -0000 On 2013-07-01, at 12:27 PM, Andrew Turner wrote: > On Mon, 1 Jul 2013 01:33:59 -0700 > Oleksandr Tymoshenko wrote: > >> >> On 2013-07-01, at 1:14 AM, Jordan Hubbard >> wrote: >> >>> Well, I managed to build and install an RPI-B kernel on the PI >>> itself last night using gcc as the compiler, but it doesn't boot. >>> I get the dreaded "kernel boot args: (null)" and then a hang before >>> even getting into the device probes. >> >> It crashes due to INVARIANTS options in kernel config. I'm going to >> look into this problem some time next week unless someone beats me >> to it. Just disable them for now. > > There are two panics: > 1. In vm_map_zinit() the sx lock fails to initialise because it thinks > it is already initialised. This is because the bit to check this has > been set in uma_startup() by the line: > slab->us_flags = UMA_SLAB_BOOT; > This is only a problem with INVARIANTS because the location of > us_flags changes when it is enabled, and in this case the slab is > reused as the memory allocated without zeroing it out first. > 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where the > cache appears to not be set to write-back. Attempting this is not > guaranteed to work. I haven't looked into this fully to see if this > is correct, but from the panic I was seeing this appears to be the > case. > > I have been talking to Jeff Roberson on panic 1. As I'm nit sure if my > assessment of panic 2 is correct I haven't looked at how to fix it. My analysis so far: busdma_bufalloc_create takes alloc/free functions as an arguments and sets it as an allocator for newly created uma zone. AFAIU uma zone uses this function to allocate slab structures as well was actual memory areas. The allocator function used used for "coherent" busdma bufalloc allocates non-cached (write-back) memory. So when debug code tries atomic access to uma_slab_t fields it generates exception. Using different allocators for service structures and work memory might be a solution but I do not know enough about VM internals to know if it's plausible solution. From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 06:52:53 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 6BF4875A for ; Tue, 2 Jul 2013 06:52:53 +0000 (UTC) (envelope-from jroberson@jroberson.net) Received: from mail-pd0-f177.google.com (mail-pd0-f177.google.com [209.85.192.177]) by mx1.freebsd.org (Postfix) with ESMTP id 4166619C5 for ; Tue, 2 Jul 2013 06:52:52 +0000 (UTC) Received: by mail-pd0-f177.google.com with SMTP id p10so3281302pdj.36 for ; Mon, 01 Jul 2013 23:52:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:x-x-sender:to:cc:subject:in-reply-to:message-id :references:user-agent:mime-version:content-type:x-gm-message-state; bh=g9OkvtViPKQUD/A3DESVS2HcdAf9Dc3ajv9thoPD18w=; b=Jwu/IJDfeu2hftjBOQnZyR0RZUqCrTW4d93nUmz2GCYcnhG5ljOeuf1JfzLOzGBu74 NQHVpg9fcJl9sJAAqaQ+4VCiu5ZdYBFqWejZtd4rL+N7YfFGQlc0oVX42OJp9m16OFIC pxbq5eYJTQl4LMh5th0Fwj+f515d0cqkcnQXElPSjXWn3/SHsSMPF1QpjtTJYNHy1UUY giXl9NL6+VK9TCYJ5cBJHgzFhlsqfP7+67XoH5CIGzo8UxI9dyGREmdmCwUKaQZAESJ9 lK8lyK0YIMDxV9lXCvukc3NJn701nq1zeVxzZplPKpPXvjy8ldwwLe29Qb3e1WjlxBMe 7Bzg== X-Received: by 10.68.196.231 with SMTP id ip7mr27333533pbc.61.1372747972739; Mon, 01 Jul 2013 23:52:52 -0700 (PDT) Received: from rrcs-66-91-135-210.west.biz.rr.com (rrcs-66-91-135-210.west.biz.rr.com. [66.91.135.210]) by mx.google.com with ESMTPSA id ib9sm25940739pbc.43.2013.07.01.23.52.49 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 01 Jul 2013 23:52:51 -0700 (PDT) Date: Mon, 1 Jul 2013 20:54:34 -1000 (HST) From: Jeff Roberson X-X-Sender: jroberson@desktop To: Oleksandr Tymoshenko Subject: Re: Raspberry pi not ready to self-host yet? In-Reply-To: <27399D4B-8CEF-427B-9201-A47564F7DF50@bluezbox.com> Message-ID: References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> <20130701202716.264a5ac9@bender.Home> <27399D4B-8CEF-427B-9201-A47564F7DF50@bluezbox.com> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Gm-Message-State: ALoCoQk6eUBFfZwlu9N+OoFAQyIXkgUB6Lh+p1l2VwDZLP1oqu3as+CprZm2G29GcIJdbZaJCQHP Cc: freebsd-arm@freebsd.org, Jordan Hubbard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 06:52:53 -0000 On Mon, 1 Jul 2013, Oleksandr Tymoshenko wrote: > > On 2013-07-01, at 12:27 PM, Andrew Turner wrote: > >> On Mon, 1 Jul 2013 01:33:59 -0700 >> Oleksandr Tymoshenko wrote: >> >>> >>> On 2013-07-01, at 1:14 AM, Jordan Hubbard >>> wrote: >>> >>>> Well, I managed to build and install an RPI-B kernel on the PI >>>> itself last night using gcc as the compiler, but it doesn't boot. >>>> I get the dreaded "kernel boot args: (null)" and then a hang before >>>> even getting into the device probes. >>> >>> It crashes due to INVARIANTS options in kernel config. I'm going to >>> look into this problem some time next week unless someone beats me >>> to it. Just disable them for now. >> >> There are two panics: >> 1. In vm_map_zinit() the sx lock fails to initialise because it thinks >> it is already initialised. This is because the bit to check this has >> been set in uma_startup() by the line: >> slab->us_flags = UMA_SLAB_BOOT; >> This is only a problem with INVARIANTS because the location of >> us_flags changes when it is enabled, and in this case the slab is >> reused as the memory allocated without zeroing it out first. Zones must zero or otherwise intialize the contents prior to use. We don't guarantee zero'd pages to all kernel memory consumers. >> 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where the >> cache appears to not be set to write-back. Attempting this is not >> guaranteed to work. I haven't looked into this fully to see if this >> is correct, but from the panic I was seeing this appears to be the >> case. >> >> I have been talking to Jeff Roberson on panic 1. As I'm nit sure if my >> assessment of panic 2 is correct I haven't looked at how to fix it. > > My analysis so far: > busdma_bufalloc_create takes alloc/free functions as an arguments > and sets it as an allocator for newly created uma zone. AFAIU uma > zone uses this function to allocate slab structures as well was > actual memory areas. The allocator function used used for "coherent" > busdma bufalloc allocates non-cached (write-back) memory. So > when debug code tries atomic access to uma_slab_t fields > it generates exception. Using different allocators for service > structures and work memory might be a solution but I do not know > enough about VM internals to know if it's plausible solution. > Set the zone to OFFPAGE if INVARIANTS is set and it will resolve this issue. This will force the slab structure into a separate allocation. Thanks, Jeff From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 07:14:46 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id C47D69F1 for ; Tue, 2 Jul 2013 07:14:46 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id 46A8A1A44 for ; Tue, 2 Jul 2013 07:14:46 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1UtunQ-000GzJ-Tf; Tue, 02 Jul 2013 00:14:43 -0700 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) Subject: Re: Raspberry pi not ready to self-host yet? From: Oleksandr Tymoshenko In-Reply-To: Date: Tue, 2 Jul 2013 00:14:22 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <3E3F5195-514D-44BF-BA98-B821981D1149@bluezbox.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> <20130701202716.264a5ac9@bender.Home> <27399D4B-8CEF-427B-9201-A47564F7DF50@bluezbox.com> To: Jeff Roberson X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: On 2013-07-01, at 11:54 PM, Jeff Roberson wrote: > On Mon, 1 Jul 2013, Oleksandr Tymoshenko wrote: > >> >> On 2013-07-01, at 12:27 PM, Andrew Turner wrote: >> >>> On Mon, 1 Jul 2013 01:33:59 -0700 >>> Oleksandr Tymoshenko wrote: >>> >>>> >>>> On 2013-07-01, at 1:14 AM, Jordan Hubbard >>>> wrote: >>>> >>>>> Well, I managed to build and install an RPI-B kernel on the PI >>>>> itself last night using gcc as the compiler, but it doesn't boot. >>>>> I get the dreaded "kernel boot args: (null)" and then a hang before >>>>> even getting into the device probes. >>>> >>>> It crashes due to INVARIANTS options in kernel config. I'm going to >>>> look into this problem some time next week unless someone beats me >>>> to it. Just disable them for now. >>> >>> There are two panics: >>> 1. In vm_map_zinit() the sx lock fails to initialise because it thinks >>> it is already initialised. This is because the bit to check this has >>> been set in uma_startup() by the line: >>> slab->us_flags = UMA_SLAB_BOOT; >>> This is only a problem with INVARIANTS because the location of >>> us_flags changes when it is enabled, and in this case the slab is >>> reused as the memory allocated without zeroing it out first. > > Zones must zero or otherwise intialize the contents prior to use. We don't guarantee zero'd pages to all kernel memory consumers. > > >>> 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where the >>> cache appears to not be set to write-back. Attempting this is not >>> guaranteed to work. I haven't looked into this fully to see if this >>> is correct, but from the panic I was seeing this appears to be the >>> case. >>> >>> I have been talking to Jeff Roberson on panic 1. As I'm nit sure if my >>> assessment of panic 2 is correct I haven't looked at how to fix it. >> >> My analysis so far: >> busdma_bufalloc_create takes alloc/free functions as an arguments >> and sets it as an allocator for newly created uma zone. AFAIU uma >> zone uses this function to allocate slab structures as well was [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 URIBL_BLOCKED ADMINISTRATOR NOTICE: The query to URIBL was blocked. See http://wiki.apache.org/spamassassin/DnsBlocklists#dnsbl-block for more information. [URIs: bluezbox.com] -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: freebsd-arm@freebsd.org, Jordan Hubbard X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 07:14:46 -0000 On 2013-07-01, at 11:54 PM, Jeff Roberson = wrote: > On Mon, 1 Jul 2013, Oleksandr Tymoshenko wrote: >=20 >>=20 >> On 2013-07-01, at 12:27 PM, Andrew Turner = wrote: >>=20 >>> On Mon, 1 Jul 2013 01:33:59 -0700 >>> Oleksandr Tymoshenko wrote: >>>=20 >>>>=20 >>>> On 2013-07-01, at 1:14 AM, Jordan Hubbard = >>>> wrote: >>>>=20 >>>>> Well, I managed to build and install an RPI-B kernel on the PI >>>>> itself last night using gcc as the compiler, but it doesn't boot. >>>>> I get the dreaded "kernel boot args: (null)" and then a hang = before >>>>> even getting into the device probes. >>>>=20 >>>> It crashes due to INVARIANTS options in kernel config. I'm going to >>>> look into this problem some time next week unless someone beats me >>>> to it. Just disable them for now. >>>=20 >>> There are two panics: >>> 1. In vm_map_zinit() the sx lock fails to initialise because it = thinks >>> it is already initialised. This is because the bit to check this = has >>> been set in uma_startup() by the line: >>> slab->us_flags =3D UMA_SLAB_BOOT; >>> This is only a problem with INVARIANTS because the location of >>> us_flags changes when it is enabled, and in this case the slab is >>> reused as the memory allocated without zeroing it out first. >=20 > Zones must zero or otherwise intialize the contents prior to use. We = don't guarantee zero'd pages to all kernel memory consumers. >=20 >=20 >>> 2. uma_dbg_alloc/uma_dbg_free use atomic operations on memory where = the >>> cache appears to not be set to write-back. Attempting this is not >>> guaranteed to work. I haven't looked into this fully to see if this >>> is correct, but from the panic I was seeing this appears to be the >>> case. >>>=20 >>> I have been talking to Jeff Roberson on panic 1. As I'm nit sure if = my >>> assessment of panic 2 is correct I haven't looked at how to fix it. >>=20 >> My analysis so far: >> busdma_bufalloc_create takes alloc/free functions as an arguments >> and sets it as an allocator for newly created uma zone. AFAIU uma >> zone uses this function to allocate slab structures as well was >> actual memory areas. The allocator function used used for "coherent" >> busdma bufalloc allocates non-cached (write-back) memory. So >> when debug code tries atomic access to uma_slab_t fields >> it generates exception. Using different allocators for service >> structures and work memory might be a solution but I do not know >> enough about VM internals to know if it's plausible solution. >>=20 >=20 > Set the zone to OFFPAGE if INVARIANTS is set and it will resolve this = issue. This will force the slab structure into a separate allocation. Thanks Jeff. It did help.=20 This patch fixed second panic for me:=20 = http://people.freebsd.org/~gonzo/arm/patches/armv6-invariants-panic-fix.di= ff =20 Of there are no objections I'll commit it tomorrow.=20= From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 09:09:06 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id D84074C0 for ; Tue, 2 Jul 2013 09:09:06 +0000 (UTC) (envelope-from alie@affle.com) Received: from mail-qc0-f170.google.com (mail-qc0-f170.google.com [209.85.216.170]) by mx1.freebsd.org (Postfix) with ESMTP id 990961EAB for ; Tue, 2 Jul 2013 09:09:06 +0000 (UTC) Received: by mail-qc0-f170.google.com with SMTP id s1so3523214qcw.15 for ; Tue, 02 Jul 2013 02:09:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:x-gm-message-state; bh=u8iV0o/APoetQ+MuGv6wHxMl792UrSLuXxhLoooB2II=; b=cfSyiS8K17RxgyLEDe52Ofwb+SzLwEu4jynxawgTw6ReurKluyGnFjvSdVCI8Nzpx/ quOID2eRw3gBXs1q5OE4+tH2fRC0XRWfMOPT0a+85x2mNFWZkeIE1QS4fJZHYC0sEGpF gKwg/si3hkeg+SulDmmWJEyvoghphaR58FhZ6QYW1veQF4pEJIpIcha3eeWU8X5Mhvn4 owlaQaBicUYrj5NUNWPpMBWd6ZYyfGFx5tNhJoS0t0v7ysvD2bqFWgLgfJ2eOKDwyFFJ TYhDncMrqGlRVQ+0SjxCpYqD+/f0NboZ3VMfFoUNxry4lshJvis1Jm57PzZHAerutrr1 qXOQ== MIME-Version: 1.0 X-Received: by 10.224.59.200 with SMTP id m8mr37821466qah.43.1372756140024; Tue, 02 Jul 2013 02:09:00 -0700 (PDT) Received: by 10.49.84.168 with HTTP; Tue, 2 Jul 2013 02:08:59 -0700 (PDT) In-Reply-To: <20130610181256.GC81276@funkthat.com> References: <20130605084224.67c84c15@bender.Home> <51B5D6B4.6060902@gmx.de> <20130610181256.GC81276@funkthat.com> Date: Tue, 2 Jul 2013 17:08:59 +0800 Message-ID: Subject: Re: Unable to build 10-CURRENT for Raspi From: Alie Tan To: Jason Birch , Marco Hafke , freebsd-arm X-Gm-Message-State: ALoCoQnJWoq+ussh+dLjOqa12Qlm2o+oamgCSGx0d2dlyGv3mQxqgGTmWaCQYADKPiI4qcVmUnm+ Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 09:09:06 -0000 Another compilation issue below if we compile FreeBSD10-CURRENT with GCC 4.2.1 ===> gnu/lib/libregex (all) cc -O -pipe -D__attribute_warn_unused_result__="" -DHAVE_CONFIG_H -I/usr/src/gnu/lib/libregex -I/usr/src/gnu/lib/libregex/../../../contrib/libgnuregex -std=gnu99 -c gnuregex.c -o gnuregex.o In file included from gnuregex.c:87: /usr/src/gnu/lib/libregex/regex_internal.c: In function 're_string_construct_common': /usr/src/gnu/lib/libregex/regex_internal.c:189: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:189: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regex_internal.c: In function 'build_wcs_buffer': /usr/src/gnu/lib/libregex/regex_internal.c:237: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:244: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:262: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:263: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c: In function 'build_wcs_upper_buffer': /usr/src/gnu/lib/libregex/regex_internal.c:299: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:377: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:384: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:468: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:469: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c: In function 'build_upper_buffer': /usr/src/gnu/lib/libregex/regex_internal.c:543: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:544: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c: In function 're_string_translate_buffer': /usr/src/gnu/lib/libregex/regex_internal.c:566: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c: In function 're_string_reconstruct': /usr/src/gnu/lib/libregex/regex_internal.c:666: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:670: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:711: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:712: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regex_internal.c:745: error: 're_string_t' has no member named 'trans' In file included from gnuregex.c:88: /usr/src/gnu/lib/libregex/regcomp.c: At top level: /usr/src/gnu/lib/libregex/regcomp.c:122: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regcomp.c:137: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regcomp.c: In function 'parse_expression': /usr/src/gnu/lib/libregex/regcomp.c:2413: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regcomp.c:2422: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regcomp.c: In function 'parse_bracket_exp': /usr/src/gnu/lib/libregex/regcomp.c:3259: error: 're_string_t' has no member named 'trans' /usr/src/gnu/lib/libregex/regcomp.c: In function 'build_charclass': /usr/src/gnu/lib/libregex/regcomp.c:3555: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regcomp.c: In function 'build_charclass_op': /usr/src/gnu/lib/libregex/regcomp.c:3630: error: duplicate 'unsigned' In file included from gnuregex.c:89: /usr/src/gnu/lib/libregex/regexec.c: In function 're_search_internal': /usr/src/gnu/lib/libregex/regexec.c:617: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regexec.c:617: error: duplicate 'unsigned' /usr/src/gnu/lib/libregex/regexec.c: In function 'extend_buffers': /usr/src/gnu/lib/libregex/regexec.c:4098: error: 're_string_t' has no member named 'trans' *** Error code 1 Stop. make: stopped in /usr/src/gnu/lib/libregex *** Error code 1 Stop. make: stopped in /usr/src/gnu/lib *** Error code 1 Stop. make: stopped in /usr/src *** Error code 1 Stop. make: stopped in /usr/src *** Error code 1 Stop. make: stopped in /usr/src *** [buildworld] Error code 1 Stop in /usr/src. On Tue, Jun 11, 2013 at 2:12 AM, John-Mark Gurney wrote: > Jason Birch wrote this message on Tue, Jun 11, 2013 at 00:09 +1000: > > > I'm currently building for BeagleBone using r251352 (June 3rd), and > > > everything seems okay so far. > > > > > > > Actually, looks like that's crapping out for an unrelated reason. May be > my > > environment or may be that revision, but it might be safest to roll with > > r251213 instead :) > > r251604 fixed the build... > > -- > John-Mark Gurney Voice: +1 415 225 5579 > > "All that I will do, has been done, All that I have, has not." > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 15:08:46 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 0EC8AF7E; Tue, 2 Jul 2013 15:08:46 +0000 (UTC) (envelope-from kibab@olymp.kibab.com) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id CBB1112E0; Tue, 2 Jul 2013 15:08:44 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com BF7443F47B DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372777145; bh=cVzM71wchXy0Ff2wBfWPGUrfaZAIKn5hYNchkKYWG0k=; h=Date:From:To:Cc:Subject; b=Xbv3MWK8/PecZoCUqH8c6P41pwp1WZtUjcSSffpglTiWKqn5n3UrTOdr81Hh4RS6f wQ6ctfvRJVHictphUzQH3JE5vFdEO8RZsk2zIYhYavWqEUL+fhylTz51CXkTZUL9tH QXJ27Fa35BwghRIKyToJ1tFLVcGYsCgdnheovM+4= Date: Tue, 2 Jul 2013 16:59:05 +0200 From: Ilya Bakulin To: freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org Subject: [PATCH] SDIO support for Globalscale Dreamplug Message-ID: <20130702145905.GA1847@olymp.kibab.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Cc: mav@FreeBSD.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 15:08:46 -0000 Hi list, I'm currently developing a SDIO driver for the Globalscale Dreamplug. I have taken SDIO patch for Marvell SoC from [1]. After that I have written some SDIO-related code in sys/dev/mmc/mmc.c, using OpenBSD SDIO code and the patch from Ben Gray ([2]) as a starting point. I have taken Warner's wish to have SDIO code in MMC bus into account, so there is no extra layer of abstraction in my code, SDIO devices will attach directly to MMC bus. This makes possible to implement combo cards support in the future, although I don't support them in my code atm. What is already implemented: * SDIO card detection; * CIS reading, both common CIS and individual functions' CIS; * Function enable. My questions, need answers before I can move further: * Where should I store information retrieved from the CIS? As far as I understand, I should use mmc_ivars structure for that. But in SDIO case the relationship between MMC bus and SDIO card is 1:1, and storing the information about the card in mmc_softc sounds like a good idea -- then I can pass only mmc_softc structure to all functions that need to work with the attached SDIO card. * Should I add any methods to the existing interface files? * Are there any devices on the market that use SDIO interface and which chipsets are supported in FreeBSD? Any Atheros devices? Adrian, what do you think? I have only Dreamplug with Marvell SDIO-based WLAN chip, that doesn't have an opensource driver even for Linux... [1] http://people.freebsd.org/~raj/misc/mv_sdio.c [2] http://lists.freebsd.org/pipermail/freebsd-arm/2012-June/003543.html diff --git a/sys/arm/conf/KIBAB-DPLUG b/sys/arm/conf/KIBAB-DPLUG new file mode 100644 index 0000000..033d398 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG @@ -0,0 +1,171 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG + +include "../mv/kirkwood/std.db88f6xxx" + +makeoptions FDT_DTS_FILE=dreamplug-1001.dts + +makeoptions MODULES_OVERRIDE="" + +options SOC_MV_KIRKWOOD + +options SCHED_4BSD #4BSD scheduler +options INET #InterNETworking +options INET6 #IPv6 communications protocols +options SOFTUPDATES +options CD9660 #ISO 9660 filesystem +options FFS #Berkeley Fast Filesystem +options MSDOSFS #MS DOS File System (FAT, FAT32) +options NULLFS #NULL filesystem +options TMPFS #Efficient memory filesystem +options SYSVSHM #SYSV-style shared memory +options SYSVMSG #SYSV-style message queues +options SYSVSEM #SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions +options GEOM_ELI # Disk encryption. +options GEOM_LABEL # Providers labelization. +options GEOM_PART_GPT # GPT partitioning + +# Flattened Device Tree +device fdt +options FDT +options FDT_DTB_STATIC + +# Misc pseudo devices +device bpf #Required for DHCP +device faith #IPv6-to-IPv4 relaying (translation) +device firmware #firmware(9) required for USB wlan +device gif #IPv6 and IPv4 tunneling +device loop #Network loopback +device md #Memory/malloc disk +device pty #BSD-style compatibility pseudo ttys +device random #Entropy device +device tun #Packet tunnel. +device ether #Required for all ethernet devices +device vlan #802.1Q VLAN support +device wlan #802.11 WLAN support + +# cam support for umass and ahci +device scbus +device pass +device da +device cd + +# Serial ports +device uart + +# Networking +device mge # Marvell Gigabit Ethernet controller +device mii +device e1000phy + +# USB +options USB_HOST_ALIGN=32 # Align DMA to cacheline +#options USB_DEBUG # Compile in USB debug support +device usb # Basic usb support +device ehci # USB host controller +device umass # Mass storage +device uhid # Human-interface devices +device rum # Ralink Technology RT2501USB wireless NICs + +# I2C (TWSI) +device iic +device iicbus + +# SATA +device mvs +device ahci + +# SDIO +device mv_sdio +device mmcsd +device mmc + +# Sound +device sound +device snd_uaudio + +#crypto +device cesa # Marvell security engine +device crypto +device cryptodev + +# IPSec +device enc +options IPSEC +options IPSEC_NAT_T +options TCP_SIGNATURE #include support for RFC 2385 + +#PF +device pf +device pflog +device pfsync + +# ALTQ, required for PF +options ALTQ # Basic ALTQ support +options ALTQ_CBQ # Class Based Queueing +options ALTQ_RED # Random Early Detection +options ALTQ_RIO # RED In/Out +options ALTQ_HFSC # Hierarchical Packet Scheduler +options ALTQ_CDNR # Traffic conditioner +options ALTQ_PRIQ # Priority Queueing +options ALTQ_NOPCC # Required if the TSC is unusable +#options ALTQ_DEBUG + +# Debugging +makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +options DDB +options KDB +options DIAGNOSTIC +options INVARIANTS #Enable calls of extra sanity checking +options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB + +# Enable these options for nfs root configured via BOOTP. +options NFSCL #Network Filesystem Client +options NFSLOCKD #Network Lock Manager +options NFS_ROOT #NFS usable as /, requires NFSCLIENT +options BOOTP +options BOOTP_NFSROOT +#options BOOTP_NFSV3 +options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1s1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" + +# To use this configuration with the (rare) model 1001N (nand flash), +# create a kernel config file that looks like this: +# +# include DREAMPLUG-1001 +# nomakeoptions FDT_DTS_FILE +# makeoptions FDT_DTS_FILE=dreamplug-1001N.dts +# device nand diff --git a/sys/arm/conf/KIBAB-DPLUG-NODBG b/sys/arm/conf/KIBAB-DPLUG-NODBG new file mode 100644 index 0000000..cbced4a --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-NODBG @@ -0,0 +1,43 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG-NODBG + +include KIBAB-DPLUG + +# Do not compile FDT in kernel +nomakeoptions FDT_DTS_FILE +nooptions FDT_DTB_STATIC + +# Debugging +nomakeoptions DEBUG +nooptions BREAK_TO_DEBUGGER +nooptions ALT_BREAK_TO_DEBUGGER +nooptions DDB +nooptions KDB +nooptions DIAGNOSTIC +nooptions INVARIANTS #Enable calls of extra sanity checking +nooptions INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB diff --git a/sys/arm/conf/KIBAB-DPLUG-PROD b/sys/arm/conf/KIBAB-DPLUG-PROD new file mode 100644 index 0000000..bae61a4 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-PROD @@ -0,0 +1,33 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + + +include KIBAB-DPLUG-NODBG + +ident KIBAB-DPLUG-PROD + +nooptions NFS_ROOT +nooptions BOOTP +nooptions BOOTP_NFSROOT +nooptions BOOTP_WIRED_TO + diff --git a/sys/arm/mv/files.mv b/sys/arm/mv/files.mv index 116356d..88c0b98 100644 --- a/sys/arm/mv/files.mv +++ b/sys/arm/mv/files.mv @@ -32,6 +32,7 @@ arm/mv/mv_sata.c optional ata | atamvsata arm/mv/mv_ts.c standard arm/mv/timer.c standard arm/mv/twsi.c optional iicbus +arm/mv/mv_sdio.c optional mv_sdio dev/cesa/cesa.c optional cesa dev/mge/if_mge.c optional mge diff --git a/sys/arm/mv/mv_sdio.c b/sys/arm/mv/mv_sdio.c new file mode 100644 index 0000000..73faf08 --- /dev/null +++ b/sys/arm/mv/mv_sdio.c @@ -0,0 +1,1670 @@ +/*- + * Copyright (c) 2009 Semihalf, Rafal Czubak + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Driver for Marvell Integrated SDIO Host Controller. + * Works stable in DMA mode. PIO mode has problems with large data transfers + * (timeouts). + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "mmcbr_if.h" + +#include "mv_sdio.h" + +/* Minimum DMA segment size. */ +#define MV_SDIO_DMA_SEGMENT_SIZE 4096 + +/* Transferred block size. */ +#define MV_SDIO_BLOCK_SIZE 512 + +/* Maximum number of blocks the controller can handle. */ +#define MV_SDIO_BLOCKS_MAX 65535 + +/* Halfword bit masks used for command response extraction. */ +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ +#define MV_SDIO_RSP48_BM16 0xffff /* 16 bits */ + +/* SDIO aggregated command interrupts */ +#define MV_SDIO_IRQS_CMD (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_UNEXPECTED_RSP) +#define MV_SDIO_EIRQS_CMD (MV_SDIO_EIRQ_CMD_TMO | MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_CMD_STARTBIT | MV_SDIO_EIRQ_RSP_TBIT) + +/* SDIO aggregated data interrupts */ +#define MV_SDIO_IRQS_DATA (MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_TX_EMPTY | \ + MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_AUTOCMD12) +#define MV_SDIO_EIRQS_DATA (MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | MV_SDIO_EIRQ_XFER_SIZE | \ + MV_SDIO_EIRQ_CRC_ENDBIT | MV_SDIO_EIRQ_CRC_STARTBIT | \ + MV_SDIO_EIRQ_CRC_STAT) + +/* + * Timing configuration. + */ + +/* SDIO controller base clock frequency. */ +#define MV_SDIO_F_BASE 100000000 /* 200 MHz */ + +/* Maximum SD clock frequency. */ +#define MV_SDIO_F_MAX (MV_SDIO_F_BASE / 2) /* 50 MHz */ + +/* Maximum timeout value. */ +#define MV_SDIO_TMO_MAX 0xf + +/* Reset delay in microseconds. */ +#define MV_SDIO_RESET_DELAY 10000 /* 10 ms */ + +/* Empty FIFO polling delay. */ +#define MV_SDIO_FIFO_EMPTY_DELAY 1000 /* 1 ms */ + +/* Delays between operations on multiple blocks. */ +#define MV_SDIO_RD_DELAY 50 /*50*/ /* Read access time. */ +#define MV_SDIO_WR_DELAY 10 /*10*/ /* Write access time. */ + +/* Maximum clock divider value. */ +#define MV_SDIO_CLK_DIV_MAX 0x7ff + +struct mv_sdio_softc { + device_t sc_dev; + device_t sc_child; + + bus_space_handle_t sc_bsh; + bus_space_tag_t sc_bst; + + int sc_use_dma; + bus_dma_tag_t sc_dmatag; + bus_dmamap_t sc_dmamap; + uint8_t *sc_dmamem; + bus_addr_t sc_physaddr; + int sc_mapped; + size_t sc_dma_size; + + struct resource *sc_mem_res; + int sc_mem_rid; + + struct resource *sc_irq_res; + int sc_irq_rid; + void *sc_ihl; + + struct resource *sc_cd_irq_res; + int sc_cd_irq_rid; + void *sc_cd_ihl; + + uint32_t sc_irq_mask; + uint32_t sc_eirq_mask; + + struct task sc_card_task; + struct callout sc_card_callout; + + struct mtx sc_mtx; + + int sc_bus_busy; + int sc_card_present; + struct mmc_host sc_host; + struct mmc_request *sc_req; + struct mmc_command *sc_curcmd; + + uint32_t sc_data_offset; +}; + +/* Read/write data from/to registers.*/ +static uint32_t MV_SDIO_RD4(struct mv_sdio_softc *, bus_size_t); +static void MV_SDIO_WR4(struct mv_sdio_softc *, bus_size_t, uint32_t); + +static int mv_sdio_probe(device_t); +static int mv_sdio_attach(device_t); + +static int mv_sdio_read_ivar(device_t, device_t, int, uintptr_t *); +static int mv_sdio_write_ivar(device_t, device_t, int, uintptr_t); + +static int mv_sdio_update_ios(device_t, device_t); +static int mv_sdio_request(device_t, device_t, struct mmc_request *); +static int mv_sdio_get_ro(device_t, device_t); +static int mv_sdio_acquire_host(device_t, device_t); +static int mv_sdio_release_host(device_t, device_t); + +/* Finalizes active MMC request. */ +static void mv_sdio_finalize_request(struct mv_sdio_softc *); + +/* Initializes controller's registers. */ +static void mv_sdio_init(device_t); + +/* Initializes host structure. */ +static void mv_sdio_init_host(struct mv_sdio_softc *); + +/* Used to add and handle sysctls. */ +static void mv_sdio_add_sysctls(struct mv_sdio_softc *); +static int mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS); + +/* DMA initialization and cleanup functions. */ +static int mv_sdio_dma_init(struct mv_sdio_softc *); +static void mv_sdio_dma_finish(struct mv_sdio_softc *); + +/* DMA map load callback. */ +static void mv_sdio_getaddr(void *, bus_dma_segment_t *, int, int); + +/* Prepare command/data before transaction. */ +static int mv_sdio_start_command(struct mv_sdio_softc *, struct + mmc_command *); +static int mv_sdio_start_data(struct mv_sdio_softc *, struct mmc_data *); + +/* Finish command after transaction. */ +static void mv_sdio_finish_command(struct mv_sdio_softc *); + +/* Response handling. */ +static void mv_sdio_handle_136bit_resp(struct mv_sdio_softc *); +static void mv_sdio_handle_48bit_resp(struct mv_sdio_softc *, + struct mmc_command *); + +/* Interrupt handler and interrupt helper functions. */ +static void mv_sdio_intr(void *); +static void mv_sdio_cmd_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_data_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_disable_intr(struct mv_sdio_softc *); + +/* Used after card detect interrupt has been handled. */ +static void mv_sdio_card_task(void *, int); + +/* Read/write data from FIFO in PIO mode. */ +static uint32_t mv_sdio_read_fifo(struct mv_sdio_softc *); +static void mv_sdio_write_fifo(struct mv_sdio_softc *, uint32_t); + +/* + * PIO mode handling. + * + * Inspired by sdhci(4) driver routines. + */ +static void mv_sdio_transfer_pio(struct mv_sdio_softc *); +static void mv_sdio_read_block_pio(struct mv_sdio_softc *); +static void mv_sdio_write_block_pio(struct mv_sdio_softc *); + + +static device_method_t mv_sdio_methods[] = { + /* device_if */ + DEVMETHOD(device_probe, mv_sdio_probe), + DEVMETHOD(device_attach, mv_sdio_attach), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, mv_sdio_read_ivar), + DEVMETHOD(bus_write_ivar, mv_sdio_write_ivar), + + /* mmcbr_if */ + DEVMETHOD(mmcbr_update_ios, mv_sdio_update_ios), + DEVMETHOD(mmcbr_request, mv_sdio_request), + DEVMETHOD(mmcbr_get_ro, mv_sdio_get_ro), + DEVMETHOD(mmcbr_acquire_host, mv_sdio_acquire_host), + DEVMETHOD(mmcbr_release_host, mv_sdio_release_host), + + {0, 0}, +}; + +static driver_t mv_sdio_driver = { + "sdio", + mv_sdio_methods, + sizeof(struct mv_sdio_softc), +}; +static devclass_t mv_sdio_devclass; + +DRIVER_MODULE( sdio, simplebus, mv_sdio_driver, mv_sdio_devclass, 0, 0); + + +static __inline uint32_t +MV_SDIO_RD4(struct mv_sdio_softc *sc, bus_size_t off) +{ + + return (bus_read_4(sc->sc_mem_res, off)); +} + +static __inline void +MV_SDIO_WR4(struct mv_sdio_softc *sc, bus_size_t off, uint32_t val) +{ + + bus_write_4(sc->sc_mem_res, off, val); +} + +static int platform_sdio_slot_signal( int signal ) +{ + switch( signal ) + { + case MV_SDIO_SIG_CD: + { + return -1; + break; + } + case MV_SDIO_SIG_WP: + return 0; + break; + default: + return -1; + break; + } + + return 0; +} + +static int +mv_sdio_probe(device_t dev) +{ + uint32_t device, revision; + + if (!ofw_bus_is_compatible(dev, "mrvl,sdio")) + return (ENXIO); + + + soc_id(&device, &revision); + + switch (device) { + case MV_DEV_88F6281: + break; + default: + return (ENXIO); + } + + device_set_desc(dev, "Marvell Integrated SDIO Host Controller"); + + return (BUS_PROBE_SPECIFIC); +} + +static int +mv_sdio_attach(device_t dev) +{ + struct mv_sdio_softc *sc; + int task_initialized = 0; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); + + /* Allocate memory and interrupt resources. */ + sc->sc_mem_rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + + if (sc->sc_mem_res == NULL) { + device_printf(dev, "Could not allocate memory!\n"); + goto fail; + } + + sc->sc_irq_rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + + if (sc->sc_irq_res == NULL) { + device_printf(dev, "Could not allocate IRQ!\n"); + goto fail; + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + + /* Initialize host controller's registers. */ + mv_sdio_init(dev); + + /* Try to setup DMA. */ + sc->sc_mapped = 0; /* No DMA buffer is mapped. */ + sc->sc_use_dma = 1; /* DMA mode is preferred to PIO mode. */ + + if (mv_sdio_dma_init(sc) < 0) { + device_printf(dev, "Falling back to PIO mode.\n"); + sc->sc_use_dma = 0; + } + + /* Add sysctls. */ + mv_sdio_add_sysctls(sc); + + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) { + /* Check if card is present in the slot. */ + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) == 1) + sc->sc_card_present = 1; + } + + TASK_INIT(&sc->sc_card_task, 0, mv_sdio_card_task, sc); + callout_init(&sc->sc_card_callout, 1); + task_initialized = 1; + + /* Setup interrupt. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | + INTR_MPSAFE, NULL, mv_sdio_intr, sc, &sc->sc_ihl) != 0) { + device_printf(dev, "Could not setup interrupt!\n"); + goto fail; + } + + /* Host can be acquired. */ + sc->sc_bus_busy = 0; + + /* + * Attach MMC bus only if the card is in the slot or card detect is + * not supported on the platform. + */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) == -1) || + sc->sc_card_present) { + sc->sc_child = device_add_child(dev, "mmc", -1); + + if (sc->sc_child == NULL) { + device_printf(dev, "Could not add MMC bus!\n"); + goto fail; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + } + + return (bus_generic_attach(dev)); + +fail: + mv_sdio_dma_finish(sc); + if (task_initialized) { + callout_drain(&sc->sc_card_callout); + taskqueue_drain(taskqueue_swi, &sc->sc_card_task); + } + if (sc->sc_ihl != NULL) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_ihl); + if (sc->sc_cd_ihl != NULL) + bus_teardown_intr(dev, sc->sc_cd_irq_res, sc->sc_cd_ihl); + if (sc->sc_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_irq_res); + if (sc->sc_cd_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_cd_irq_rid, + sc->sc_cd_irq_res); + if (sc->sc_mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, + sc->sc_mem_res); + mtx_destroy(&sc->sc_mtx); + return (ENXIO); +} + +static int +mv_sdio_update_ios(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + struct mmc_ios *ios; + uint32_t xfer, clk_div, host_cr; + + sc = device_get_softc(brdev); + host = device_get_ivars(reqdev); + ios = &host->ios; + + mtx_lock(&sc->sc_mtx); + + if (ios->power_mode == power_off) + /* Re-initialize the controller. */ + mv_sdio_init(brdev); + + xfer = MV_SDIO_RD4(sc, MV_SDIO_XFER); + + if (ios->clock == 0) { + /* Disable clock. */ + xfer |= MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + /* Set maximum clock divider. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + } else { + /* + * Calculate and set clock divider. + * Clock rate value is: + * clock = MV_SDIO_F_BASE / (clk_div + 1) + * Thus we calculate the divider value as: + * clk_div = (MV_SDIO_F_BASE / clock) - 1 + */ + clk_div = (MV_SDIO_F_BASE / ios->clock) - 1; + if (clk_div > MV_SDIO_CLK_DIV_MAX) + clk_div = MV_SDIO_CLK_DIV_MAX; + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, clk_div); + + /* Enable clock. */ + xfer &= ~MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + } + + host_cr = MV_SDIO_RD4(sc, MV_SDIO_HOST_CR); + + /* Set card type. */ + if (host->mode == mode_mmc) + host_cr |= MV_SDIO_HOST_CR_MMC; /* MMC card. */ + else + host_cr &= ~MV_SDIO_HOST_CR_MMC; /* SD card. */ + + /* Set bus width. */ + if (ios->bus_width == bus_width_4) + host_cr |= MV_SDIO_HOST_CR_4BIT; /* 4-bit bus width */ + else + host_cr &= ~MV_SDIO_HOST_CR_4BIT; /* 1-bit bus width */ + + /* Set high/normal speed mode. */ +#if 0 /* Some cards have problems with the highspeed-mode + * Not selecting High-Speed mode enables all cards to work + */ + + if ((ios->timing == bus_timing_hs ) && ( 1 == 0 ) ) + host_cr |= MV_SDIO_HOST_CR_HIGHSPEED; + else +#endif + host_cr &= ~MV_SDIO_HOST_CR_HIGHSPEED; + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static int +mv_sdio_request(device_t brdev, device_t reqdev, struct mmc_request *req) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = EBUSY; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_req != NULL) { + mtx_unlock(&sc->sc_mtx); + return (rv); + } + + sc->sc_req = req; +/* + device_printf(sc->sc_dev, "cmd %d (hw state 0x%04x)\n", + req->cmd->opcode , MV_SDIO_RD4( sc, MV_SDIO_HOST_SR ) ); +*/ + rv = mv_sdio_start_command(sc, req->cmd); + + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_get_ro(device_t brdev, device_t reqdev) +{ + int rv; + + /* Check if card is read only. */ + rv = platform_sdio_slot_signal(MV_SDIO_SIG_WP); + + /* + * Assume that card is not write protected, when platform doesn't + * support WP signal. + */ + if (rv < 0) + rv = 0; + + return (rv); +} + +static int +mv_sdio_acquire_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = 0; + + mtx_lock(&sc->sc_mtx); + while (sc->sc_bus_busy) + rv = mtx_sleep(sc, &sc->sc_mtx, PZERO, "sdioah", 0); + sc->sc_bus_busy++; + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_release_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + + sc = device_get_softc(brdev); + + mtx_lock(&sc->sc_mtx); + sc->sc_bus_busy--; + wakeup(sc); + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_finalize_request(struct mv_sdio_softc *sc) +{ + struct mmc_request *req; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + if (req) { + /* Finalize active request. */ + /*device_printf(sc->sc_dev, "Finalize request %i\n",req->cmd->opcode);*/ + sc->sc_req = NULL; + sc->sc_curcmd = NULL; + req->done(req); + + + } else + device_printf(sc->sc_dev, "No active request to finalize!\n"); +} + +static void +mv_sdio_init(device_t dev) +{ + struct mv_sdio_softc *sc; + uint32_t host_cr; + + sc = device_get_softc(dev); + + /* Disable interrupts. */ + sc->sc_irq_mask = 0; + sc->sc_eirq_mask = 0; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Clear interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, MV_SDIO_EIRQ_ALL); + + /* Enable interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR_EN, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR_EN, MV_SDIO_EIRQ_ALL); + + /* Initialize Host Control Register. */ + host_cr = (MV_SDIO_HOST_CR_PUSHPULL | MV_SDIO_HOST_CR_BE | + MV_SDIO_HOST_CR_TMOVAL(MV_SDIO_TMO_MAX) | MV_SDIO_HOST_CR_TMO); + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + /* Stop clock and reset Transfer Mode Register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, MV_SDIO_XFER_STOP_CLK); + + /* Set maximum clock divider value. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + + /* Reset status, state machine and FIFOs synchronously. */ + MV_SDIO_WR4(sc, MV_SDIO_SW_RESET, MV_SDIO_SW_RESET_ALL); + DELAY(MV_SDIO_RESET_DELAY); +} + +static void +mv_sdio_init_host(struct mv_sdio_softc *sc) +{ + struct mmc_host *host; + + host = &sc->sc_host; + + /* Clear host structure. */ + bzero(host, sizeof(struct mmc_host)); + + /* Calculate minimum and maximum operating frequencies. */ + host->f_min = MV_SDIO_F_BASE / (MV_SDIO_CLK_DIV_MAX + 1); + host->f_max = MV_SDIO_F_MAX; + + /* Set operation conditions (voltage). */ + host->host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + + /* Set additional host controller capabilities. */ + host->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED; +} + +static void +mv_sdio_add_sysctls(struct mv_sdio_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid_list *children; + struct sysctl_oid *tree; + + ctx = device_get_sysctl_ctx(sc->sc_dev); + children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); + tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "params", + CTLFLAG_RD, 0, "Driver parameters"); + children = SYSCTL_CHILDREN(tree); + + SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "use_dma", + CTLTYPE_UINT | CTLFLAG_RW, sc, 0, mv_sdio_sysctl_use_dma, + "I", "Use DMA for data transfers (0-1)"); +} + +/* + * This sysctl allows switching between DMA and PIO modes for data transfers: + * + * dev.mv_sdio..params.use_dma + * + * Values: + * + * - 1 sets DMA mode + * - 0 sets PIO mode + * + * Driver uses DMA mode by default. + */ +static int +mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS) +{ + struct mv_sdio_softc *sc; + uint32_t use_dma; + int error; + + sc = (struct mv_sdio_softc *)arg1; + + use_dma = sc->sc_use_dma; + + error = sysctl_handle_int(oidp, &use_dma, 0, req); + if (error != 0 || req->newptr == NULL) + return (error); + + if (use_dma > 1) + return (EINVAL); + + mtx_lock(&sc->sc_mtx); + + /* Check if requested mode is already being used. */ + if (sc->sc_use_dma == use_dma) { + mtx_unlock(&sc->sc_mtx); + return (EPERM); + } + + if (!(sc->sc_mapped)) { + device_printf(sc->sc_dev, "DMA not initialized!\n"); + mtx_unlock(&sc->sc_mtx); + return (ENOMEM); + } + + /* Set new mode. */ + sc->sc_use_dma = use_dma; + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + + if (error != 0) + return; + + /* Get first segment's physical address. */ + *(bus_addr_t *)arg = segs->ds_addr; +} + +static int +mv_sdio_dma_init(struct mv_sdio_softc *sc) +{ + device_t dev; + bus_size_t dmabuf_size; + + dev = sc->sc_dev; + dmabuf_size = MAXPHYS; + + /* Create DMA tag. */ + if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ + MV_SDIO_DMA_SEGMENT_SIZE, 0, /* alignment, boundary */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filtfunc, filtfuncarg */ + MAXPHYS, 1, /* maxsize, nsegments */ + MAXPHYS, BUS_DMA_ALLOCNOW, /* maxsegsz, flags */ + NULL, NULL, /* lockfunc, lockfuncarg */ + &sc->sc_dmatag) != 0) { + device_printf(dev, "Could not create DMA tag!\n"); + return (-1); + } + + /* Allocate DMA memory. */ + if (bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_dmamem, + BUS_DMA_NOWAIT, &sc->sc_dmamap) != 0) { + device_printf(dev, "Could not allocate DMA memory!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + + /* Find the biggest available DMA buffer size. */ + while (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap, + (void *)sc->sc_dmamem, dmabuf_size, mv_sdio_getaddr, + &sc->sc_physaddr, 0) != 0) { + dmabuf_size >>= 1; + if (dmabuf_size < MV_SDIO_BLOCK_SIZE) { + device_printf(dev, "Could not load DMA map!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + } + + sc->sc_mapped++; + sc->sc_dma_size = dmabuf_size; + + return (0); +} + +static void +mv_sdio_dma_finish(struct mv_sdio_softc *sc) +{ + + /* Free DMA resources. */ + if (sc->sc_mapped) { + bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap); + sc->sc_mapped--; + } + if (sc->sc_dmamem != NULL) + bus_dmamem_free(sc->sc_dmatag, sc->sc_dmamem, sc->sc_dmamap); + if (sc->sc_dmamap != NULL) + bus_dmamap_destroy(sc->sc_dmatag, sc->sc_dmamap); + if (sc->sc_dmatag != NULL) + bus_dma_tag_destroy(sc->sc_dmatag); +} + +static int +mv_sdio_start_command(struct mv_sdio_softc *sc, struct mmc_command *cmd) +{ + struct mmc_request *req; + uint32_t cmdreg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + sc->sc_curcmd = cmd; + + cmd->error = MMC_ERR_NONE; + + /* Check if card is in the slot. */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) && + (sc->sc_card_present == 0)) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Check if clock is enabled. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_STOP_CLK) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Write command argument. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGL, cmd->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGH, cmd->arg >> 16); + + /* Determine response type. */ + if (cmd->flags & MMC_RSP_136) + cmdreg = MV_SDIO_CMD_RSP_136; + else if (cmd->flags & MMC_RSP_BUSY) + cmdreg = MV_SDIO_CMD_RSP_48_BUSY; + else if (cmd->flags & MMC_RSP_PRESENT) + cmdreg = MV_SDIO_CMD_RSP_48; + else { + /* No response. */ + cmdreg = MV_SDIO_CMD_RSP_NONE; + /* Enable host to detect unexpected response. */ + cmdreg |= MV_SDIO_CMD_UNEXPECTED_RSP; + sc->sc_irq_mask |= MV_SDIO_CMD_UNEXPECTED_RSP; + } + + /* Check command checksum if needed. */ + if (cmd->flags & MMC_RSP_CRC) + cmdreg |= MV_SDIO_CMD_CRC7; + /* Check command opcode if needed. */ + if (cmd->flags & MMC_RSP_OPCODE) + cmdreg |= MV_SDIO_CMD_INDEX_CHECK; + + /* Set commannd opcode. */ + cmdreg |= MV_SDIO_CMD_INDEX(cmd->opcode); + + /* Setup interrupts. */ + sc->sc_irq_mask = MV_SDIO_IRQ_CMD; + sc->sc_eirq_mask = MV_SDIO_EIRQ_ALL; + + /* Prepare data transfer. */ + if (cmd->data) { + cmdreg |= (MV_SDIO_CMD_DATA_PRESENT | MV_SDIO_CMD_DATA_CRC16); + if (mv_sdio_start_data(sc, cmd->data) < 0) { + cmd->error = MMC_ERR_FAILED; + printf("mv_sdio_start_data() failed!\n"); + mv_sdio_finalize_request(sc); + return (-1); + } + } + + /* Write command register. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD, cmdreg); + + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, ~MV_SDIO_IRQ_CARD_EVENT /*MV_SDIO_IRQ_ALL*/); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, 0xffff /*MV_SDIO_EIRQ_ALL*/); + + /* Update interrupt/error interrupt enable registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Do not complete request, interrupt handler will do this. */ + return (0); +} + +static void +mv_sdio_finish_command(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + struct mmc_data *data; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + data = cmd->data; + + /* Get response. */ + if (cmd->flags & MMC_RSP_PRESENT) { + if(cmd->flags & MMC_RSP_136) + /* 136-bit response. */ + mv_sdio_handle_136bit_resp(sc); + else + /* 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, NULL); + } + + if (data) { + /* + * Disable command complete interrupt. It has already been + * handled. + */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_CMD; + + /* Enable XFER interrupt. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_XFER; + + /* Check which data interrupts we need to activate. */ + if (sc->sc_use_dma) + /* DMA transaction. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_DMA; + else if (data->flags & MMC_DATA_READ) + /* Read transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_RX_FULL; + else + /* Write transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_TX_EMPTY; + + /* Check if Auto-CMD12 interrupt will be needed. */ + if (sc->sc_req->stop) + sc->sc_irq_mask |= MV_SDIO_IRQ_AUTOCMD12; + + /* Update interrupt enable register. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + /* We're done. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static int +mv_sdio_start_data(struct mv_sdio_softc *sc, struct mmc_data *data) +{ + struct mmc_command *stop; + uint32_t autocmd12reg, xfer, host_sr; + size_t blk_size, blk_count; + int retries; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + /* + * No transfer can be started when FIFO_EMPTY bit in MV_SDIO_HOST_SR + * is not set. This bit is sometimes not set instantly after XFER + * interrupt has been asserted. + */ + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + + retries = 10; + while (!(host_sr & MV_SDIO_HOST_SR_FIFO_EMPTY)) { + if (retries == 0) + return (-1); + retries--; + DELAY(MV_SDIO_FIFO_EMPTY_DELAY); + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + } + + /* Clear data offset. */ + sc->sc_data_offset = 0; + + /* + * Set block size. It can be less than or equal to MV_SDIO_BLOCK_SIZE + * bytes. + */ + blk_size = (data->len < MV_SDIO_BLOCK_SIZE) ? data->len : + MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_SIZE, blk_size); + + /* Set block count. */ + blk_count = (data->len + MV_SDIO_BLOCK_SIZE - 1) / MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_COUNT, blk_count); + + /* We want to initiate transfer by software. */ + xfer = MV_SDIO_XFER_SW_WR_EN; + + if (sc->sc_use_dma) { + /* Synchronize before DMA transfer. */ + if (data->flags & MMC_DATA_READ) + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREREAD); + else { + memcpy(sc->sc_dmamem, data->data, data->len); + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREWRITE); + } + + /* Write DMA buffer address register. */ + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRL, sc->sc_physaddr & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRH, sc->sc_physaddr >> 16); + } else + /* Set PIO transfer mode. */ + xfer |= MV_SDIO_XFER_PIO; + + /* + * Prepare Auto-CMD12. This command is automatically sent to the card + * by the host controller to stop multiple-block data transaction. + */ + if (sc->sc_req->stop) { + stop = sc->sc_req->stop; + + /* Set Auto-CMD12 argument. */ + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGL, stop->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGH, stop->arg >> 16); + + /* Set Auto-CMD12 opcode. */ + autocmd12reg = MV_SDIO_AUTOCMD12_INDEX(stop->opcode); + + /* Check busy signal if needed. */ + if (stop->flags & MMC_RSP_BUSY) + autocmd12reg |= MV_SDIO_AUTOCMD12_BUSY_CHECK; + /* Check Auto-CMD12 index. */ + if (stop->flags & MMC_RSP_OPCODE) + autocmd12reg |= MV_SDIO_AUTOCMD12_INDEX_CHECK; + + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12, autocmd12reg); + + xfer |= MV_SDIO_XFER_AUTOCMD12; + } + + /* Change data direction. */ + if (data->flags & MMC_DATA_READ) + xfer |= MV_SDIO_XFER_TO_HOST; + + /* Write transfer mode register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + return (0); +} + +static void +mv_sdio_handle_136bit_resp(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + uint32_t resp[8]; + uint32_t base, extra; + int i, j, off; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + + /* Collect raw response from the controller. */ + for (i = 0; i < 8; i++) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + + /* Response passed to MMC bus is shifted by one byte. */ + extra = 0; + for (i = 0, j = 7; i < 4; i++, j -= 2) { + off = (i ? 0 : 2); + base = resp[j] | (resp[j - 1] << (16 - off)); + cmd->resp[3 - i] = (base << (6 + off)) + extra; + extra = base >> (26 - off); + } +} + +static void +mv_sdio_handle_48bit_resp(struct mv_sdio_softc *sc, struct mmc_command *stop) +{ + struct mmc_command *cmd; + uint32_t resp[3], word; + uint8_t *rp; + int i; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (stop == NULL) + cmd = sc->sc_curcmd; + else + cmd = stop; + + /* Collect raw response from the controller. */ + for (i = 0; i < 3; i++) { + if (stop == NULL) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + else + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_AUTOCMD12_RSP(i)); + } + + /* Clear MMC bus response buffer. */ + bzero(&cmd->resp[0], 4 * sizeof(uint32_t)); + + /* + * Fill MMC bus response buffer. + */ + + rp = (uint8_t *)&cmd->resp[0]; + + /* Response bits [45:14] */ + word = (resp[1] & MV_SDIO_RSP48_BM16) | + ((resp[0] & MV_SDIO_RSP48_BM16) << 16); + + /* Response bits [15:14] and [13:8] */ + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | + ((word & MV_SDIO_RSP48_BM2) << 6); + + /* Response bits [15:14] are already included. */ + word >>= 2; + + /* Response bits [45:16] */ + memcpy(rp, &word, sizeof(uint32_t)); +} + +static void +mv_sdio_intr(void *arg) +{ + struct mv_sdio_softc *sc; + uint32_t irq_stat, eirq_stat; + + sc = (struct mv_sdio_softc *)arg; +#if 0 + device_printf(sc->sc_dev,"intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n", + MV_SDIO_RD4( sc, MV_SDIO_IRQ_SR ) , + MV_SDIO_RD4( sc, MV_SDIO_IRQ_EN ), + MV_SDIO_RD4( sc, MV_SDIO_HOST_SR )); +#endif + + + mtx_lock(&sc->sc_mtx); + + + + irq_stat = MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & sc->sc_irq_mask; + eirq_stat = MV_SDIO_RD4(sc, MV_SDIO_EIRQ_SR) & sc->sc_eirq_mask; + + /* + * In case of error interrupt, interrupt cause will be identified by + * checking bits in error interrupt status register. + */ + irq_stat &= ~MV_SDIO_IRQ_ERR; + + /* Handle command interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_CMD) || + (eirq_stat & MV_SDIO_EIRQS_CMD)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_cmd_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_CMD; + eirq_stat &= ~MV_SDIO_EIRQS_CMD; + } + + /* Handle data interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_DATA) || + (eirq_stat & MV_SDIO_EIRQS_DATA)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_data_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_DATA; + eirq_stat &= ~MV_SDIO_EIRQS_DATA; + } + + /* Handle unexpected interrupts. */ + if (irq_stat) { + device_printf(sc->sc_dev, "Unexpected interrupt(s)! " + "IRQ SR = 0x%08x\n", irq_stat); + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + } + if (eirq_stat) { + device_printf(sc->sc_dev, "Unexpected error interrupt(s)! " + "EIRQ SR = 0x%08x\n", eirq_stat); + /* Clear error interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + } + + mtx_unlock(&sc->sc_mtx); +} + +static void +mv_sdio_cmd_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got command interrupt, but there " + "is no active command!\n"); + return; + } + + /* Handle unexpected response error. */ + if (irq & MV_SDIO_IRQ_UNEXPECTED_RSP) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Unexpected response!\n"); + } + + /* Handle errors. */ + if (eirq & MV_SDIO_EIRQ_CMD_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Error - command %d timeout!\n", + sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_CMD_CRC7) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "checksum!\n", sc->sc_curcmd->opcode); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Command %d error!\n", + sc->sc_curcmd->opcode); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + if (irq & MV_SDIO_IRQ_CMD) + mv_sdio_finish_command(sc); +} + +static void +mv_sdio_data_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + struct mmc_command *stop; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active command.\n"); + return; + } + if ((!sc->sc_curcmd->data) && ((sc->sc_curcmd->flags & + MMC_RSP_BUSY) == 0)) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active data transaction.n\n"); + sc->sc_curcmd->error = MMC_ERR_FAILED; + return; + } + + /* Handle errors. */ + if(eirq & MV_SDIO_EIRQ_DATA_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Data %s timeout!\n", + (sc->sc_curcmd->data->flags & MMC_DATA_READ) ? "read" : + "write"); + } else if (eirq & (MV_SDIO_EIRQ_DATA_CRC16 | + MV_SDIO_EIRQ_DATA_ENDBIT)) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Bad data checksum!\n"); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Data error!: 0x%04X \n", + eirq); + + if( 0 != ( eirq & MV_SDIO_EIRQ_CRC_STAT ) ) + { + device_printf(sc->sc_dev, "MV_SDIO_EIRQ_CRC_STAT\n"); + } + } + + /* Handle Auto-CMD12 error. */ + if (eirq & MV_SDIO_EIRQ_AUTOCMD12) { + sc->sc_req->stop->error = MMC_ERR_FAILED; + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Auto-CMD12 error!\n"); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + /* Handle PIO interrupt. */ + if (irq & (MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_RX_FULL)) + mv_sdio_transfer_pio(sc); + + /* Handle DMA interrupt. */ + if (irq & (MV_SDIO_IRQ_DMA)) { + /* Synchronize DMA buffer. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_TO_HOST) { + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTWRITE); + memcpy(sc->sc_curcmd->data->data, sc->sc_dmamem, + sc->sc_curcmd->data->len); + } else + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTREAD); + + /* Disable DMA interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_DMA; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Handle Auto-CMD12 interrupt. */ + if (irq & (MV_SDIO_IRQ_AUTOCMD12)) { + stop = sc->sc_req->stop; + /* Get 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, stop); + + /* Disable Auto-CMD12 interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_AUTOCMD12; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Transfer finished. Disable interrupts and finalize request. */ + if (irq & (MV_SDIO_IRQ_XFER)) { + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static void +mv_sdio_disable_intr(struct mv_sdio_softc *sc) +{ + + /* Disable interrupts that were enabled. */ + sc->sc_irq_mask &= ~(sc->sc_irq_mask); + sc->sc_eirq_mask &= ~(sc->sc_eirq_mask); + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); +} + +static void +mv_sdio_card_task(void *arg, int pending) +{ + struct mv_sdio_softc *sc; + + int device_probe_and_attach_ret_val = 0; + + sc = (struct mv_sdio_softc *)arg; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_card_present) { + if (sc->sc_child) { + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host controller's registers. */ + mv_sdio_init(sc->sc_dev); + + sc->sc_child = device_add_child(sc->sc_dev, "mmc", -1); + if (sc->sc_child == NULL) { + device_printf(sc->sc_dev, "Could not add MMC bus!\n"); + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + + mtx_unlock(&sc->sc_mtx); + + device_probe_and_attach_ret_val = device_probe_and_attach(sc->sc_child); + + if( 0 != device_probe_and_attach_ret_val ) { + device_printf(sc->sc_dev, "MMC bus failed on probe " + "and attach! %i\n",device_probe_and_attach_ret_val); + device_delete_child(sc->sc_dev, sc->sc_child); + sc->sc_child = NULL; + } + } else { + if (sc->sc_child == NULL) { + mtx_unlock(&sc->sc_mtx); + return; + } + + mtx_unlock(&sc->sc_mtx); + if (device_delete_child(sc->sc_dev, sc->sc_child) != 0) { + device_printf(sc->sc_dev, "Could not delete MMC " + "bus!\n"); + } + sc->sc_child = NULL; + } +} + +static uint32_t +mv_sdio_read_fifo(struct mv_sdio_softc *sc) +{ + uint32_t data; + device_printf(sc->sc_dev, "This is not tested, yet MV_SDIO_FIFO not ensured\n "); + + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data = MV_SDIO_RD4(sc, MV_SDIO_FIFO); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data |= (MV_SDIO_RD4(sc, MV_SDIO_FIFO) << 16); + return data; +} + +static void +mv_sdio_write_fifo(struct mv_sdio_softc *sc, uint32_t val) +{ + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val & 0xffff); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val >> 16); +} + +static void +mv_sdio_transfer_pio(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + + cmd = sc->sc_curcmd; + + if (cmd->data->flags & MMC_DATA_READ) { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_RX_FULL) { + mv_sdio_read_block_pio(sc); + /* + * Assert delay after each block transfer to meet read + * access timing constraint. + */ + DELAY(MV_SDIO_RD_DELAY); + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks read in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_RX_FULL; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_TX_EMPTY) { + mv_sdio_write_block_pio(sc); + /* Wait while card is programming the memory. */ + while ((MV_SDIO_RD4(sc, MV_SDIO_HOST_SR) & + MV_SDIO_HOST_SR_CARD_BUSY)); + /* + * Assert delay after each block transfer to meet + * write access timing constraint. + */ + DELAY(MV_SDIO_WR_DELAY); + + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks written in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_TX_EMPTY; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } +} + +static void +mv_sdio_read_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + buffer[0] = data; + buffer[1] = (data >> 8); + buffer[2] = (data >> 16); + buffer[3] = (data >> 24); + buffer += 4; + left -= 4; + } + } else { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + *((uint32_t *)buffer) = data; + buffer += 4; + left -= 4; + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = mv_sdio_read_fifo(sc); + while (left > 0) { + *(buffer++) = data; + data >>= 8; + left--; + } + } +} + +static void +mv_sdio_write_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data = 0; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = buffer[0] + + (buffer[1] << 8) + + (buffer[2] << 16) + + (buffer[3] << 24); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } else { + while (left > 3) { + data = *((uint32_t *)buffer); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = 0; + while (left > 0) { + data <<= 8; + data += *(buffer++); + left--; + } + mv_sdio_write_fifo(sc, data); + } +} + +static int +mv_sdio_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + + sc = device_get_softc(dev); + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + *(int *)result = host->ios.bus_mode; + break; + case MMCBR_IVAR_BUS_WIDTH: + *(int *)result = host->ios.bus_width; + break; + case MMCBR_IVAR_CHIP_SELECT: + *(int *)result = host->ios.chip_select; + break; + case MMCBR_IVAR_CLOCK: + *(int *)result = host->ios.clock; + break; + case MMCBR_IVAR_F_MIN: + *(int *)result = host->f_min; + break; + case MMCBR_IVAR_F_MAX: + *(int *)result = host->f_max; + break; + case MMCBR_IVAR_HOST_OCR: + *(int *)result = host->host_ocr; + break; + case MMCBR_IVAR_MODE: + *(int *)result = host->mode; + break; + case MMCBR_IVAR_OCR: + *(int *)result = host->ocr; + break; + case MMCBR_IVAR_POWER_MODE: + *(int *)result = host->ios.power_mode; + break; + case MMCBR_IVAR_VDD: + *(int *)result = host->ios.vdd; + break; + case MMCBR_IVAR_CAPS: + *(int *)result = host->caps; + break; + case MMCBR_IVAR_TIMING: + *(int *)result = host->ios.timing; + break; + case MMCBR_IVAR_MAX_DATA: + mtx_lock(&sc->sc_mtx); + /* Return maximum number of blocks the driver can handle. */ + if (sc->sc_use_dma) + *(int *)result = (sc->sc_dma_size / + MV_SDIO_BLOCK_SIZE); + else + *(int *)result = MV_SDIO_BLOCKS_MAX; + mtx_unlock(&sc->sc_mtx); + break; + default: + return (EINVAL); + } + + return (0); +} + +static int +mv_sdio_write_ivar(device_t dev, device_t child, int index, uintptr_t value) +{ + struct mmc_host *host; + + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + host->ios.bus_mode = value; + break; + case MMCBR_IVAR_BUS_WIDTH: + host->ios.bus_width = value; + break; + case MMCBR_IVAR_CHIP_SELECT: + host->ios.chip_select = value; + break; + case MMCBR_IVAR_CLOCK: + host->ios.clock = value; + break; + case MMCBR_IVAR_MODE: + host->mode = value; + break; + case MMCBR_IVAR_OCR: + host->ocr = value; + break; + case MMCBR_IVAR_POWER_MODE: + host->ios.power_mode = value; + break; + case MMCBR_IVAR_VDD: + host->ios.vdd = value; + break; + case MMCBR_IVAR_TIMING: + host->ios.timing = value; + break; + case MMCBR_IVAR_CAPS: + case MMCBR_IVAR_HOST_OCR: + case MMCBR_IVAR_F_MIN: + case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: + default: + /* Instance variable not writable. */ + return (EINVAL); + } + + return (0); +} + diff --git a/sys/arm/mv/mv_sdio.h b/sys/arm/mv/mv_sdio.h new file mode 100644 index 0000000..b54b59d --- /dev/null +++ b/sys/arm/mv/mv_sdio.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _MVSDMMC_INCLUDE +#define _MVSDMMC_INCLUDE + + +#define MVSDMMC_DMA_SIZE 65536 + + + +/* + * The base MMC clock rate + */ + +#define MVSDMMC_CLOCKRATE_MIN 100000 +#define MVSDMMC_CLOCKRATE_MAX 50000000 + +#define MVSDMMC_BASE_FAST_CLOCK 200000000 + + +/* + * SDIO register + */ + +#define MV_SDIO_DMA_ADDRL 0x000 +#define MV_SDIO_DMA_ADDRH 0x004 +#define MV_SDIO_BLK_SIZE 0x008 +#define MV_SDIO_BLK_COUNT 0x00c +#define MV_SDIO_CMD 0x01c +#define MV_SDIO_CMD_ARGL 0x010 +#define MV_SDIO_CMD_ARGH 0x014 +#define MV_SDIO_XFER 0x018 +#define MV_SDIO_HOST_SR 0x048 +#define MV_SDIO_HOST_CR 0x050 +#define MV_SDIO_SW_RESET 0x05c +#define MV_SDIO_IRQ_SR 0x060 +#define MV_SDIO_EIRQ_SR 0x064 +#define MV_SDIO_IRQ_SR_EN 0x068 +#define MV_SDIO_EIRQ_SR_EN 0x06c +#define MV_SDIO_IRQ_EN 0x070 +#define MV_SDIO_EIRQ_EN 0x074 +#define MV_SDIO_AUTOCMD12_ARGL 0x084 +#define MV_SDIO_AUTOCMD12_ARGH 0x088 +#define MV_SDIO_AUTOCMD12 0x08c +#define MV_SDIO_CLK_DIV 0x128 +#define MV_SDIO_FIFO 0xa2100 /* FIXME!!! */ + +#define MV_SDIO_RSP(i) (0x020 + ((i)<<2)) +#define MV_SDIO_AUTOCMD12_RSP(i) (0x090 + ((i)<<2)) + +/* + * SDIO Status-Register + */ +#define MV_SDIO_HOST_SR_CARD_BUSY (1<<1) +#define MV_SDIO_HOST_SR_FIFO_EMPTY (1<<13) + + + +/* + * SDIO_CMD + */ +#define MV_SDIO_CMD_RSP_NONE (0 << 0) +#define MV_SDIO_CMD_RSP_136 (1 << 0) +#define MV_SDIO_CMD_RSP_48 (2 << 0) +#define MV_SDIO_CMD_RSP_48_BUSY (3 << 0) +#define MV_SDIO_CMD_DATA_CRC16 (1<<2) +#define MV_SDIO_CMD_CRC7 (1<<3) +#define MV_SDIO_CMD_INDEX_CHECK (1<<4) +#define MV_SDIO_CMD_DATA_PRESENT (1<<5) +#define MV_SDIO_CMD_UNEXPECTED_RSP (1<<7) +#define MV_SDIO_CMD_INDEX(x) ( (x) << 8 ) + + +/* + * SDIO_XFER_MODE + */ +#define MV_SDIO_XFER_STOP_CLK (1 << 5) +#define MV_SDIO_XFER_TO_HOST (1 << 4) +#define MV_SDIO_XFER_PIO (1 << 3) +#define MV_SDIO_XFER_AUTOCMD12 (1 << 2) +#define MV_SDIO_XFER_SW_WR_EN (1 << 1) + +/* + * SDIO_HOST_CTRL + */ +#define MV_SDIO_HOST_CR_PUSHPULL (1 << 0) +#define MV_SDIO_HOST_CR_MMC (3 << 1) +#define MV_SDIO_HOST_CR_BE (1 << 3) +#define MV_SDIO_HOST_CR_4BIT (1 << 9) +#define MV_SDIO_HOST_CR_HIGHSPEED (1 << 10) + +#define MV_SDIO_HOST_CR_TMOVAL(x) ((x) << 11) +#define MV_SDIO_HOST_CR_TMO ( 1 << 15 ) + +/* + * NORmal status bits + */ + + +#define MV_SDIO_IRQ_ERR (1<<15) +#define MV_SDIO_IRQ_UNEXPECTED_RSP (1<<14) +#define MV_SDIO_IRQ_AUTOCMD12 (1<<13) +#define MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN (1<<12) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL (1<<11) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED (1<<10) +#define MV_SDIO_IRQ_READ_WAIT (1<<9) +#define MV_SDIO_IRQ_CARD_EVENT (1<<8) +#define MV_SDIO_IRQ_RX_FULL (1<<5) +#define MV_SDIO_IRQ_TX_EMPTY (1<<4) +#define MV_SDIO_IRQ_DMA (1<<3) +#define MV_SDIO_IRQ_BLOCK_GAP (1<<2) +#define MV_SDIO_IRQ_XFER (1<<1) +#define MV_SDIO_IRQ_CMD (1<<0) + +#define MV_SDIO_IRQ_ALL (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_BLOCK_GAP | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_CARD_EVENT | MV_SDIO_IRQ_READ_WAIT | MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED | MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL | MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN | MV_SDIO_IRQ_AUTOCMD12 | MV_SDIO_IRQ_UNEXPECTED_RSP | MV_SDIO_IRQ_ERR ) + +//#define MV_SDIO_IRQ_SR + + +/* + * ERR status bits + */ +#define MV_SDIO_EIRQ_CRC_STAT (1<<14) +#define MV_SDIO_EIRQ_CRC_STARTBIT (1<<13) +#define MV_SDIO_EIRQ_CRC_ENDBIT (1<<12) +#define MV_SDIO_EIRQ_RSP_TBIT (1<<11) +#define MV_SDIO_EIRQ_XFER_SIZE (1<<10) +#define MV_SDIO_EIRQ_CMD_STARTBIT (1<<9) +#define MV_SDIO_EIRQ_AUTOCMD12 (1<<8) +#define MV_SDIO_EIRQ_DATA_ENDBIT (1<<6) +#define MV_SDIO_EIRQ_DATA_CRC16 (1<<5) +#define MV_SDIO_EIRQ_DATA_TMO (1<<4) +#define MV_SDIO_EIRQ_CMD_INDEX (1<<3) +#define MV_SDIO_EIRQ_CMD_ENDBIT (1<<2) +#define MV_SDIO_EIRQ_CMD_CRC7 (1<<1) +#define MV_SDIO_EIRQ_CMD_TMO (1<<0) + +#define MV_SDIO_EIRQ_ALL (MV_SDIO_EIRQ_CMD_TMO | \ + MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | \ + MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | \ + MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | \ + MV_SDIO_EIRQ_CMD_STARTBIT |\ + MV_SDIO_EIRQ_XFER_SIZE |\ + MV_SDIO_EIRQ_RSP_TBIT |\ + MV_SDIO_EIRQ_CRC_ENDBIT |\ + MV_SDIO_EIRQ_CRC_STARTBIT |\ + MV_SDIO_EIRQ_CRC_STAT) + +/* AUTOCMD12 register values */ +#define MV_SDIO_AUTOCMD12_BUSY_CHECK (1<<0) +#define MV_SDIO_AUTOCMD12_INDEX_CHECK (1<<1) +#define MV_SDIO_AUTOCMD12_INDEX(x) (x<<8) + +/* Software reset register */ +#define MV_SDIO_SW_RESET_ALL (1<<8) + +/* */ +#define MV_SDIO_SIG_CD 1 +#define MV_SDIO_SIG_WP 2 + +#endif /* _MVSDMMC_INCLUDE */ + diff --git a/sys/boot/uboot/common/main.c b/sys/boot/uboot/common/main.c index 82c86b2..0a5b368 100644 --- a/sys/boot/uboot/common/main.c +++ b/sys/boot/uboot/common/main.c @@ -122,6 +122,7 @@ main(void) struct api_signature *sig = NULL; int i; struct open_file f; + char *ub_currdev; if (!api_search_sig(&sig)) return (-1); @@ -166,6 +167,7 @@ main(void) printf("(%s, %s)\n", bootprog_maker, bootprog_date); meminfo(); + ub_currdev = ub_env_get("currdev"); /* * March through the device switch probing for things. */ @@ -198,8 +200,13 @@ main(void) if (devsw[i] == NULL) panic("No boot device found!"); - env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), - uboot_setcurrdev, env_nounset); + if (ub_currdev) { + env_setenv("currdev", EV_VOLATILE, ub_currdev, + uboot_setcurrdev, env_nounset); + } else { + env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), + uboot_setcurrdev, env_nounset); + } env_setenv("loaddev", EV_VOLATILE, uboot_fmtdev(&currdev), env_noset, env_nounset); diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index f101e65..6fcfb32 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -67,6 +67,8 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include + #include "mmcbr_if.h" #include "mmcbus_if.h" @@ -96,11 +98,13 @@ struct mmc_ivars { u_char read_only; /* True when the device is read-only */ u_char bus_width; /* Bus width to use */ u_char timing; /* Bus timing support */ + uint8_t mem_present; /* Is memory present */ u_char high_cap; /* High Capacity card (block addressed) */ uint32_t sec_count; /* Card capacity in 512byte blocks */ uint32_t tran_speed; /* Max speed in normal mode */ uint32_t hs_tran_speed; /* Max speed in high speed mode */ uint32_t erase_sector; /* Card native erase sector size */ + uint8_t sdio_numfunc; /* Number of IO functions */ char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ }; @@ -159,10 +163,15 @@ static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, int size); static int mmc_highest_voltage(uint32_t ocr); static void mmc_idle_cards(struct mmc_softc *sc); +static int mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn); +static int mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, + uint32_t adr, uint8_t *data); static void mmc_ms_delay(int ms); static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); static void mmc_power_down(struct mmc_softc *sc); static void mmc_power_up(struct mmc_softc *sc); +static int mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, + uint8_t *nfunc, uint8_t *mem_present); static void mmc_rescan_cards(struct mmc_softc *sc); static void mmc_scan(struct mmc_softc *sc); static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, @@ -470,6 +479,7 @@ mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, return (0); } +/* CMD0 */ static void mmc_idle_cards(struct mmc_softc *sc) { @@ -494,6 +504,7 @@ mmc_idle_cards(struct mmc_softc *sc) mmc_ms_delay(1); } +/* CMD41 -> CMD55 */ static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -521,6 +532,7 @@ mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD1 */ static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -548,6 +560,7 @@ mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD8 */ static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) { @@ -600,6 +613,7 @@ mmc_power_down(struct mmc_softc *sc) mmcbr_update_ios(dev); } +/* CMD7 */ static int mmc_select_card(struct mmc_softc *sc, uint16_t rca) { @@ -1042,6 +1056,7 @@ mmc_app_decode_sd_status(uint32_t *raw_sd_status, sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); } +/* CMD2 */ static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) { @@ -1162,6 +1177,7 @@ mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) return (err); } +/* CMD3 */ static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) { @@ -1177,6 +1193,7 @@ mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) return (err); } +/* CMD13 */ static int mmc_send_status(struct mmc_softc *sc, uint16_t rca, uint32_t *status) { @@ -1223,6 +1240,291 @@ mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) ivar->read_only ? ", read-only" : ""); } +static int +mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn) +{ + int err, i; + uint8_t funcs; + + /* XXX Check if function number is valid */ + + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_FN_READY, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error reading SDIO func ready %d\n", err); + return (err); + } + funcs |= 1 << fn; + err = mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_FN_ENABLE, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error writing SDIO func enable %d\n", err); + return (err); + } + + funcs = 0; + for(i=0; i < 10; i++) { + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_FN_READY, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error reading SDIO func ready %d\n", err); + return (err); + } + + if (funcs & (1 << fn)) + return 0; + pause("mmc_io_func_enable", 100); + } + + device_printf(sc->dev, "Cannot enable function %d!\n", fn); + return 1; +} + +static int +mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *data) +{ + struct mmc_command cmd; + int err; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = SD_IO_RW_DIRECT; + cmd.arg = SD_IO_RW_FUNC(fn) | SD_IO_RW_ADR(adr); + if (wr) + cmd.arg |= SD_IO_RW_WR | SD_IO_RW_RAW | SD_IO_RW_DAT(*data); + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.data = NULL; + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + /* Just for information... */ + if (R5_IO_CURRENT_STATE(cmd.resp[0]) != 1) + printf("!!! SDIO state %d\n", R5_IO_CURRENT_STATE(cmd.resp[0])); + + *data = (uint8_t) (cmd.resp[0] & 0xff); + return (MMC_ERR_NONE); +} + +/* CMD52 */ +static uint8_t +mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr) +{ + int err; + uint8_t val = 0; + + err = mmc_io_rw_direct(sc, 0, fn, adr, &val); + if (err) { + device_printf(sc->dev, "Err reading FN %d addr 0x%08X: %d", + fn, adr, err); + return (0xff); + } + return val; +} + +/* + * Parse Card Information Structure of the SDIO card. + * Both Function 0 CIS and Function 1-7 CIS are supported. + */ +static int +mmc_io_parse_cis(struct mmc_softc *sc, uint8_t func, uint32_t cisptr) +{ + /* + * XXX Need a structure to store all information that we get from CIS! + * But where to place it after that?.. + */ + uint32_t tmp; + + uint8_t tuple_id, tuple_len, func_id; + uint32_t addr, maninfo_p; + uint16_t manufacturer, product; + uint16_t fn0_blksize; + uint8_t max_tran_speed; + uint8_t cis1_major, cis1_minor; + char *cis1_info[4]; + + int start, i, ch, count; + char cis1_info_buf[256]; + + cis1_info[0] = NULL; + cis1_info[1] = NULL; + cis1_info[2] = NULL; + cis1_info[3] = NULL; + memset(cis1_info_buf, 0, 256); + + tmp = 0; + addr = cisptr; + + /* + * XXX Some parts of this code are taken + * from sys/dev/pccard/pccard_cis.c. + * Need to think about making it more abstract. + */ + do { + tuple_id = mmc_io_read_1(sc, 0, addr++); + if (tuple_id == SD_IO_CISTPL_END) + break; + tuple_len = mmc_io_read_1(sc, 0, addr++); + if (tuple_len == 0 && tuple_id != 0x00) { + device_printf(sc->dev, + "Parse error: 0-length tuple %02X\n", tuple_id); + break; + } + + switch (tuple_id) { + case SD_IO_CISTPL_VERS_1: + maninfo_p = addr; + + cis1_major = mmc_io_read_1(sc, 0, maninfo_p); + cis1_minor = mmc_io_read_1(sc, 0, maninfo_p + 1); + + for (count = 0, start = 0, i = 0; + (count < 4) && ((i + 4) < 256); i++) { + ch = mmc_io_read_1(sc, 0, maninfo_p + 2 + i); + if (ch == 0xff) + break; + cis1_info_buf[i] = ch; + if (ch == 0) { + cis1_info[count] = + cis1_info_buf + start; + start = i + 1; + count++; + } + } + + device_printf(sc->dev, "*** Info[0]: %s\n", cis1_info[0]); + device_printf(sc->dev, "*** Info[1]: %s\n", cis1_info[1]); + device_printf(sc->dev, "*** Info[2]: %s\n", cis1_info[2]); + device_printf(sc->dev, "*** Info[3]: %s\n", cis1_info[3]); + break; + + case SD_IO_CISTPL_MANFID: + if (tuple_len < 4) { + device_printf(sc->dev, "MANFID is too short\n"); + break; + } + manufacturer = mmc_io_read_1(sc, 0, addr); + manufacturer |= mmc_io_read_1(sc, 0, addr + 1) << 8; + + product = mmc_io_read_1(sc, 0, addr + 2); + product |= mmc_io_read_1(sc, 0, addr + 3) << 8; + + device_printf(sc->dev, + "*** Vendor %04X, product %04X\n", + manufacturer, product); + + break; + + case SD_IO_CISTPL_FUNCID: + /* Function ID for SDIO devices is always 0x0C */ + if (tuple_len < 1) { + device_printf(sc->dev, "FUNCID is too short\n"); + break; + } + func_id = mmc_io_read_1(sc, 0, addr); + if (func_id != 0x0C) + device_printf(sc->dev, "func_id non-std: %d\n", func_id); + break; + + case SD_IO_CISTPL_FUNCE: + if (tuple_len < 4) { + device_printf(sc->dev, "FUNCE is too short\n"); + break; + } + uint8_t ext_data_type = mmc_io_read_1(sc, 0, addr); + device_printf(sc->dev, "*** Function ext type %d\n", + ext_data_type); + + if (func == 0) { + if (ext_data_type != 0x0) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + fn0_blksize = mmc_io_read_1(sc, 0, addr + 1); + fn0_blksize |= mmc_io_read_1(sc, 0, addr + 2) << 8; + + max_tran_speed = mmc_io_read_1(sc, 0, addr + 3); + uint8_t max_tran_rate = max_tran_speed & 0x3; + uint8_t timecode = (max_tran_speed >> 3) & 0xF; + + device_printf(sc->dev, + "*** Max tran rate %d, timecode %d\n", + max_tran_rate, timecode); + } else { + /* + * XXX Do we need any information from FUNCE + * for non-0 functions? + */ + device_printf(sc->dev, + "I don't know how to parse FUNCE\n"); + } + + break; + + default: + device_printf(sc->dev, + "*** Skipping tuple ID %02X len %02X\n", + tuple_id, tuple_len); + break; + } + + addr += tuple_len; + tmp++; + } while (tuple_id != SD_IO_CISTPL_END && tmp < 10); + + return 0; +} + +/* + * Parse Card Common Control Register of the SDIO card + */ +static int +mmc_io_parse_cccr(struct mmc_softc *sc) +{ + uint32_t cisptr = 0; + + cisptr = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR); + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in CCCR: %08X\n", cisptr); + return (-1); + } + + return mmc_io_parse_cis(sc, 0, cisptr); +} + +/* + * Parse Function Basic Register of the given function + */ +static int +mmc_io_parse_fbr(struct mmc_softc *sc, uint8_t func) +{ + uint32_t fbr_addr, cisptr; + + fbr_addr = SD_IO_FBR_START * func + 0x9; + cisptr = mmc_io_read_1(sc, 0, fbr_addr); + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in FBR: %08X\n", cisptr); + return (-1); + } + + return mmc_io_parse_cis(sc, func, cisptr); +} + static void mmc_discover_cards(struct mmc_softc *sc) { @@ -1233,11 +1535,48 @@ mmc_discover_cards(struct mmc_softc *sc) device_t child; uint16_t rca = 2; u_char switch_res[64]; + uint8_t nfunc, mem_present; if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing cards\n"); while (1) { - err = mmc_all_send_cid(sc, raw_cid); + /* + * Probe SDIO first, because SDIO cards don't have + * a CID register and won't respond to the CMD2 + */ + mmc_idle_cards(sc); + err = mmc_probe_sdio(sc, 0, NULL, &nfunc, &mem_present); + if (err != MMC_ERR_NONE && err != MMC_ERR_TIMEOUT) { + device_printf(sc->dev, "Error probing SDIO %d\n", err); + break; + } + + /* The card answered OK -> SDIO */ + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "Detected SDIO card\n"); + ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, + M_WAITOK | M_ZERO); + mmc_send_relative_addr(sc, &resp); /* CMD3 */ + ivar->rca = resp >> 16; + err = mmc_select_card(sc, ivar->rca); /* CMD7 */ + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error selecting SDIO %d\n", err); + break; + } + + device_printf(sc->dev, "Get card info\n"); + mmc_io_parse_cccr(sc); + for(i=1; i <= nfunc; i++) { + device_printf(sc->dev, + "Get info for function %d\n", i); + mmc_io_parse_fbr(sc, i); + mmc_io_func_enable(sc, i); + } + if (!mem_present) + return; + } + + err = mmc_all_send_cid(sc, raw_cid); /* Command 2 */ if (err == MMC_ERR_TIMEOUT) break; if (err != MMC_ERR_NONE) { @@ -1491,9 +1830,49 @@ mmc_delete_cards(struct mmc_softc *sc) return (0); } +/* CMD 5 */ +static int +mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, uint8_t *nfunc, uint8_t *mem_present) { + struct mmc_command cmd; + int err = MMC_ERR_NONE, i; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = IO_SEND_OP_COND; + cmd.arg = 0; + cmd.flags = MMC_RSP_R4; + cmd.data = NULL; + + for (i = 0; i < 1000; i++) { + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err != MMC_ERR_NONE) + break; + if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || + (ocr & MMC_OCR_VOLTAGE) == 0) + break; + err = MMC_ERR_TIMEOUT; + mmc_ms_delay(10); + } + + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "No timeout: OCR %08X, here are the values:\n", cmd.resp[0]); + if (rocr) + *rocr = cmd.resp[0]; + if (nfunc) + *nfunc = cmd.resp[0] >> 28 & 0x7; + if (mem_present) + *mem_present = cmd.resp[0] >> 27 & 0x1; + + device_printf(sc->dev, "NF: %d\n", cmd.resp[0] >> 28 & 0x7); + device_printf(sc->dev, "MEM: %d\n", cmd.resp[0] >> 27 & 0x1); + } + + return (err); +} + static void mmc_go_discovery(struct mmc_softc *sc) { + uint8_t nfunc, mem_present; uint32_t ocr; device_t dev; int err; @@ -1509,17 +1888,24 @@ mmc_go_discovery(struct mmc_softc *sc) if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing bus\n"); mmc_idle_cards(sc); - err = mmc_send_if_cond(sc, 1); + err = mmc_send_if_cond(sc, 1); /* SD_SEND_IF_COND = 8 */ if ((bootverbose || mmc_debug) && err == 0) device_printf(sc->dev, "SD 2.0 interface conditions: OK\n"); - if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_probe_sdio(sc, 0, &ocr, &nfunc, &mem_present) == MMC_ERR_NONE) { + device_printf(dev, "SDIO probe OK (OCR: 0x%08x, %d functions, memory: %d)\n", ocr, nfunc, mem_present); + if (nfunc > 0 && mem_present) { + device_printf(sc->dev, "SDIO combo cards are not supported yet"); + return; + } + } else + if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* retry 55 -> then 41 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "SD probe: failed\n"); /* * Failed, try MMC */ mmcbr_set_mode(dev, mode_mmc); - if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* command 1 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "MMC probe: failed\n"); ocr = 0; /* Failed both, powerdown. */ @@ -1553,9 +1939,11 @@ mmc_go_discovery(struct mmc_softc *sc) * Reselect the cards after we've idled them above. */ if (mmcbr_get_mode(dev) == mode_sd) { - err = mmc_send_if_cond(sc, 1); - mmc_send_app_op_cond(sc, - (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + if (mem_present) { + err = mmc_send_if_cond(sc, 1); /* CMD 8 */ + mmc_send_app_op_cond(sc, /* 41 -> 55 */ + (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + } } else mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); mmc_discover_cards(sc); @@ -1637,7 +2025,7 @@ mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) return (EINVAL); case MMC_IVAR_DSR_IMP: *result = ivar->csd.dsr_imp; - break; + break; case MMC_IVAR_MEDIA_SIZE: *result = ivar->sec_count; break; @@ -1735,3 +2123,4 @@ DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_bcm, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_fdt, mmc_driver, mmc_devclass, NULL, NULL); +DRIVER_MODULE(mmc, sdio, mmc_driver, mmc_devclass, NULL, NULL); diff --git a/sys/dev/mmc/mmcioreg.h b/sys/dev/mmc/mmcioreg.h new file mode 100644 index 0000000..840a863 --- /dev/null +++ b/sys/dev/mmc/mmcioreg.h @@ -0,0 +1,95 @@ +/* $OpenBSD: sdmmc_ioreg.h,v 1.4 2007/06/02 01:48:37 uwe Exp $ */ +/* $FreeBSD$ */ + +/* + * Copyright (c) 2006 Uwe Stuehler + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SDMMC_IOREG_H +#define _SDMMC_IOREG_H + +/* SDIO commands */ /* response type */ +#define SD_IO_SEND_OP_COND 5 /* R4 */ +#define SD_IO_RW_DIRECT 52 /* R5 */ +#define SD_IO_RW_EXTENDED 53 /* R5? */ + +/* CMD52 arguments */ +#define SD_ARG_CMD52_READ (0<<31) +#define SD_ARG_CMD52_WRITE (1<<31) +#define SD_ARG_CMD52_FUNC_SHIFT 28 +#define SD_ARG_CMD52_FUNC_MASK 0x7 +#define SD_ARG_CMD52_EXCHANGE (1<<27) +#define SD_ARG_CMD52_REG_SHIFT 9 +#define SD_ARG_CMD52_REG_MASK 0x1ffff +#define SD_ARG_CMD52_DATA_SHIFT 0 +#define SD_ARG_CMD52_DATA_MASK 0xff +#define SD_R5_DATA(resp) ((resp)[0] & 0xff) + +/* CMD53 arguments */ +#define SD_ARG_CMD53_READ (0<<31) +#define SD_ARG_CMD53_WRITE (1<<31) +#define SD_ARG_CMD53_FUNC_SHIFT 28 +#define SD_ARG_CMD53_FUNC_MASK 0x7 +#define SD_ARG_CMD53_BLOCK_MODE (1<<27) +#define SD_ARG_CMD53_INCREMENT (1<<26) +#define SD_ARG_CMD53_REG_SHIFT 9 +#define SD_ARG_CMD53_REG_MASK 0x1ffff +#define SD_ARG_CMD53_LENGTH_SHIFT 0 +#define SD_ARG_CMD53_LENGTH_MASK 0x1ff +#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */ + +/* 48-bit response decoding (32 bits w/o CRC) */ +#define MMC_R4(resp) ((resp)[0]) +#define MMC_R5(resp) ((resp)[0]) + +/* SD R4 response (IO OCR) */ +#define SD_IO_OCR_MEM_READY (1<<31) +#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3) +/* XXX big fat memory present "flag" because we don't know better */ +#define SD_IO_OCR_MEM_PRESENT (0xf<<24) +#define SD_IO_OCR_MASK 0x00fffff0 + +/* Card Common Control Registers (CCCR) */ +#define SD_IO_CCCR_START 0x00000 +#define SD_IO_CCCR_SIZE 0x100 +#define SD_IO_CCCR_FN_ENABLE 0x02 +#define SD_IO_CCCR_FN_READY 0x03 +#define SD_IO_CCCR_INT_ENABLE 0x04 +#define SD_IO_CCCR_CTL 0x06 +#define CCCR_CTL_RES (1<<3) +#define SD_IO_CCCR_BUS_WIDTH 0x07 +#define CCCR_BUS_WIDTH_4 (1<<1) +#define CCCR_BUS_WIDTH_1 (1<<0) +#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ + +/* Function Basic Registers (FBR) */ +#define SD_IO_FBR_START 0x00100 +#define SD_IO_FBR_SIZE 0x00700 + +/* Card Information Structure (CIS) */ +#define SD_IO_CIS_START 0x01000 +#define SD_IO_CIS_SIZE 0x17000 + +/* CIS tuple codes (based on PC Card 16) */ +#define SD_IO_CISTPL_VERS_1 0x15 +#define SD_IO_CISTPL_MANFID 0x20 +#define SD_IO_CISTPL_FUNCID 0x21 +#define SD_IO_CISTPL_FUNCE 0x22 +#define SD_IO_CISTPL_END 0xff + +/* CISTPL_FUNCID codes */ +/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */ +/* #define SDMMC_FUNCTION_WLAN 0x0c */ +#endif diff --git a/sys/dev/mmc/mmcreg.h b/sys/dev/mmc/mmcreg.h index f454ddb..4b65d91 100644 --- a/sys/dev/mmc/mmcreg.h +++ b/sys/dev/mmc/mmcreg.h @@ -85,6 +85,8 @@ struct mmc_command { #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY) #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP(x) ((x) & MMC_RSP_MASK) @@ -151,6 +153,30 @@ struct mmc_command { #define R1_STATE_PRG 7 #define R1_STATE_DIS 8 +/* + * R5 responses + * + * Types (per SD 2.0 standard) + *e : error bit + *s : status bit + *r : detected and set for the actual command response + *x : Detected and set during command execution. The host can get + * the status by issuing a command with R1 response. + * + * Clear Condition (per SD 2.0 standard) + *a : according to the card current state. + *b : always related to the previous command. reception of a valid + * command will clear it (with a delay of one command). + *c : clear by read + */ +#define R5_COM_CRC_ERROR (1u << 15)/* er, b */ +#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */ +#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */ +#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12) +#define R5_ERROR (1u << 11)/* erx, c */ +#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */ +#define R5_OUT_OF_RANGE (1u << 8)/* er, c */ + struct mmc_data { size_t len; /* size of the data */ size_t xfer_len; @@ -181,7 +207,7 @@ struct mmc_request { #define MMC_SET_RELATIVE_ADDR 3 #define SD_SEND_RELATIVE_ADDR 3 #define MMC_SET_DSR 4 - /* reserved: 5 */ +#define IO_SEND_OP_COND 5 #define MMC_SWITCH_FUNC 6 #define MMC_SWITCH_FUNC_CMDS 0 #define MMC_SWITCH_FUNC_SET 1 @@ -335,6 +361,20 @@ struct mmc_request { #define SD_MAX_HS 50000000 +/* + * SDIO Direct & Extended I/O + */ +#define SD_IO_RW_WR (1u << 31) +#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28) +#define SD_IO_RW_RAW (1u << 27) +#define SD_IO_RW_INCR (1u << 26) +#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9) +#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0) +#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0) + +#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0) +#define SD_IOE_RW_BLK (1u << 27) + /* OCR bits */ /* From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 17:10:31 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 69C1FC0E; Tue, 2 Jul 2013 17:10:31 +0000 (UTC) (envelope-from mavbsd@gmail.com) Received: from mail-bk0-x233.google.com (mail-bk0-x233.google.com [IPv6:2a00:1450:4008:c01::233]) by mx1.freebsd.org (Postfix) with ESMTP id 9DB761AC6; Tue, 2 Jul 2013 17:10:30 +0000 (UTC) Received: by mail-bk0-f51.google.com with SMTP id ji1so2462051bkc.24 for ; Tue, 02 Jul 2013 10:10:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=N8FbfpAnhPiIzSiLA+du3iexRP16dXdjqDozpzVkXBg=; b=vuQiKR9sryh2VhVAK5LoCQMFP3hHy/8s5K2CrbzRRF4mK1WmKuVhCOhnDFWtD8C6Of q4zug7Lmzd77J8W5WSZnrnW3J9A+ggfm6NchkI2uAFzjKyQZ0H8rX6/zrFojLqgWp74c l3IDS06f/xmgDXYqPF/DR6csRcomFKuAiYzJNPG28M8qDT6gWjgOG1NlIcF/Q0RQopNn X1f4tlnF8rQ4u/coJbE/qTTL2nZgKp2USYjSbn3jpvS0YQyNaCFdD3tmRab+cklWBYrb +C4/vjnkQeBmd/wbTRSsqs6yTlDUzw9anc48njPz3yCmtXt5RzKNZODUgTuZPwmmcmiH t+Jg== X-Received: by 10.205.3.5 with SMTP id nw5mr4099615bkb.137.1372785029596; Tue, 02 Jul 2013 10:10:29 -0700 (PDT) Received: from mavbook.mavhome.dp.ua (mavhome.mavhome.dp.ua. [213.227.240.37]) by mx.google.com with ESMTPSA id de17sm11798840bkb.5.2013.07.02.10.10.27 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 10:10:28 -0700 (PDT) Sender: Alexander Motin Message-ID: <51D3097A.8010601@FreeBSD.org> Date: Tue, 02 Jul 2013 20:10:18 +0300 From: Alexander Motin User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130616 Thunderbird/17.0.6 MIME-Version: 1.0 To: Ilya Bakulin Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> In-Reply-To: <20130702145905.GA1847@olymp.kibab.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 17:10:31 -0000 On 02.07.2013 17:59, Ilya Bakulin wrote: > Hi list, > I'm currently developing a SDIO driver for the Globalscale Dreamplug. > I have taken SDIO patch for Marvell SoC from [1]. > After that I have written some SDIO-related code in sys/dev/mmc/mmc.c, > using OpenBSD SDIO code and the patch from Ben Gray ([2]) as a starting point. > > I have taken Warner's wish to have SDIO code in MMC bus into account, so there > is no extra layer of abstraction in my code, SDIO devices will attach directly > to MMC bus. This makes possible to implement combo cards support in the future, > although I don't support them in my code atm. > > What is already implemented: > * SDIO card detection; > * CIS reading, both common CIS and individual functions' CIS; > * Function enable. > > My questions, need answers before I can move further: > * Where should I store information retrieved from the CIS? > As far as I understand, I should use mmc_ivars structure for that. > But in SDIO case the relationship between MMC bus and SDIO card is 1:1, > and storing the information about the card in mmc_softc sounds like > a good idea -- then I can pass only mmc_softc structure to all functions > that need to work with the attached SDIO card. I think SD world is a terrible mess by itself. I would like to not add more. Functions that suppose card access should take card-specific structure or device as an argument, not a bus ones. > * Should I add any methods to the existing interface files? > > * Are there any devices on the market that use SDIO interface and which > chipsets are supported in FreeBSD? Any Atheros devices? > Adrian, what do you think? > I have only Dreamplug with Marvell SDIO-based WLAN chip, that doesn't have > an opensource driver even for Linux... Recently I've bought EyeFi card hoping it is combined SD+SDIO, but seems like card's WiFi part is completely autonomous and controlled via file access on storage and not really SDIO. I would try to look for SDIO Bluetooth card. I think such ones still could be found on eBay, and I think there are some specifications for that. Though I've never looked inside. > [1] http://people.freebsd.org/~raj/misc/mv_sdio.c > [2] http://lists.freebsd.org/pipermail/freebsd-arm/2012-June/003543.html -- Alexander Motin From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 18:20:17 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 1EF7E834; Tue, 2 Jul 2013 18:20:17 +0000 (UTC) (envelope-from jkwilborn@gmail.com) Received: from mail-pa0-x232.google.com (mail-pa0-x232.google.com [IPv6:2607:f8b0:400e:c03::232]) by mx1.freebsd.org (Postfix) with ESMTP id E738A1E1A; Tue, 2 Jul 2013 18:20:16 +0000 (UTC) Received: by mail-pa0-f50.google.com with SMTP id fb1so6617124pad.9 for ; Tue, 02 Jul 2013 11:20:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=I0VFtTJUMWqpgs8ozlGGkL53SsP2EcVSjEgXhyKOGj0=; b=gY2A/eYFyp627TQxZhv9+r/yljGaGUk+geRfJW+w/30HLdTFOVQ2bUH8aUqQadl2YG wp4wB/2KtnpXnRWHQYLw+/kesvqiZh3+v8VcTc0ouqrCuqGdli9tfktMrVbsXdNdhjV1 swzIeCFwMqLYCbNXlWfY9Ad2ksteR5rf0CoIVHyg5CdFTWtp/F8YmtFmpYQoi8r3Fm24 PeEl+P+E+jiaCktvOMfAE7iqCpC73ohdt0uXQj8cjOQaWQa/uwwlAhQTejzVovkBAjA2 HUMoRcpkOothrI9NLCpa3kuuInIyfyDnx419yNAPrgAlbLWX3uEFQoANjdwFy9TNTv3a QEhw== MIME-Version: 1.0 X-Received: by 10.68.50.69 with SMTP id a5mr30575816pbo.122.1372789216736; Tue, 02 Jul 2013 11:20:16 -0700 (PDT) Received: by 10.66.26.241 with HTTP; Tue, 2 Jul 2013 11:20:16 -0700 (PDT) In-Reply-To: <51D3097A.8010601@FreeBSD.org> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> Date: Tue, 2 Jul 2013 11:20:16 -0700 Message-ID: Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug From: Jack Wilborn To: Alexander Motin Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: freebsd-arm@freebsd.org, Ilya Bakulin , freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 18:20:17 -0000 Nice, how do we include this code in our builds? How is it invoked? Main question is that are these structures in an area that is protected so that only root can modify them? I don't know enough about about SD cards to know if they are alike in the communications to them. I'd like to see more about this and see it in the test bed to give you more feedback. Having taught C for 15 years, I'm ok with reading and understanding the code, but to make it usable is the bottom line. Nice work, I'm sure it would be an asset to all of us. I'm a little groggy about this so if I missed anything, please overlook it. I like it! Jack On Tue, Jul 2, 2013 at 10:10 AM, Alexander Motin wrote: > On 02.07.2013 17:59, Ilya Bakulin wrote: > >> Hi list, >> I'm currently developing a SDIO driver for the Globalscale Dreamplug. >> I have taken SDIO patch for Marvell SoC from [1]. >> After that I have written some SDIO-related code in sys/dev/mmc/mmc.c, >> using OpenBSD SDIO code and the patch from Ben Gray ([2]) as a starting >> point. >> >> I have taken Warner's wish to have SDIO code in MMC bus into account, so >> there >> is no extra layer of abstraction in my code, SDIO devices will attach >> directly >> to MMC bus. This makes possible to implement combo cards support in the >> future, >> although I don't support them in my code atm. >> >> What is already implemented: >> * SDIO card detection; >> * CIS reading, both common CIS and individual functions' CIS; >> * Function enable. >> >> My questions, need answers before I can move further: >> * Where should I store information retrieved from the CIS? >> As far as I understand, I should use mmc_ivars structure for that. >> But in SDIO case the relationship between MMC bus and SDIO card is >> 1:1, >> and storing the information about the card in mmc_softc sounds like >> a good idea -- then I can pass only mmc_softc structure to all >> functions >> that need to work with the attached SDIO card. >> > > I think SD world is a terrible mess by itself. I would like to not add > more. Functions that suppose card access should take card-specific > structure or device as an argument, not a bus ones. > > > * Should I add any methods to the existing interface files? >> >> * Are there any devices on the market that use SDIO interface and which >> chipsets are supported in FreeBSD? Any Atheros devices? >> Adrian, what do you think? >> I have only Dreamplug with Marvell SDIO-based WLAN chip, that doesn't >> have >> an opensource driver even for Linux... >> > > Recently I've bought EyeFi card hoping it is combined SD+SDIO, but seems > like card's WiFi part is completely autonomous and controlled via file > access on storage and not really SDIO. > > I would try to look for SDIO Bluetooth card. I think such ones still could > be found on eBay, and I think there are some specifications for that. > Though I've never looked inside. > > > [1] http://people.freebsd.org/~**raj/misc/mv_sdio.c >> [2] http://lists.freebsd.org/**pipermail/freebsd-arm/2012-** >> June/003543.html >> > > -- > Alexander Motin > > ______________________________**_________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/**mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@**freebsd.org > " > From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 19:21:20 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 8E3FF6D8; Tue, 2 Jul 2013 19:21:20 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id 51C761077; Tue, 2 Jul 2013 19:21:18 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 4CE773F43F DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372792877; bh=9LbXBPNxU1btKkfp/3sQcPdHqVZI9dX3li/NPeOfpjo=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=bOZEJMOf7PTkEj+gVreJP0eyvRkipe+S0/givNffd5+CUy0qDQy3U7g6G4liXhf/i 6/pZgeJzUDI7tPJRV0lRSyy8QNiF5sEMLJx6TinrLOsqI+cadnPUQ6AG4hReY7nAFh vc+SyB8FX+EEJ9ujLyD6nf/QU+uyDHTe5DYuayEY= Message-ID: <51D3282C.1090701@bakulin.de> Date: Tue, 02 Jul 2013 21:21:16 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Alexander Motin Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> In-Reply-To: <51D3097A.8010601@FreeBSD.org> X-Enigmail-Version: 1.5.1 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 19:21:20 -0000 On 02.07.13 19:10, Alexander Motin wrote: > I think SD world is a terrible mess by itself. I would like to not add > more. Functions that suppose card access should take card-specific > structure or device as an argument, not a bus ones. The problem is that there is a SDIO card which has up to 7 functions, but it itself has some characteristics that are available at function 0. If we add, say, sdio0 device and store this information there, we end up with the hierarchy suggested by Ben Gray a year ago. The SD-specific functions like CSD/CSR operations are also in the mmc.c and considered to be the bus code... Or am I missing something obvious here? > I would try to look for SDIO Bluetooth card. I think such ones still > could be found on eBay, and I think there are some specifications for > that. Though I've never looked inside. The SDIO card found in the Dreamplug has three functions, one of them is Bluetooth. Will try to find some docs / Linux code for that... -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 19:32:49 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id C413EE77 for ; Tue, 2 Jul 2013 19:32:49 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-oa0-f50.google.com (mail-oa0-f50.google.com [209.85.219.50]) by mx1.freebsd.org (Postfix) with ESMTP id 8E81E10F7 for ; Tue, 2 Jul 2013 19:32:49 +0000 (UTC) Received: by mail-oa0-f50.google.com with SMTP id k7so7028496oag.9 for ; Tue, 02 Jul 2013 12:32:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=WJX8nY5FtAUh8XSZVqZRdqmIVL8hRc4NBjKrJ/A0OaQ=; b=FqBB5x/ewprpHWk9DJfXveIO24CMBcb21vKQgenogVJ6jpE1p+7JNyYgUxWLVKElAM FCHsc9NM1ur6fiYuy+bQiHXtx5qW0uZcr5dXiu1/38cmfPFeCwMmgHI1b9B4Tj+bD5mB SJeOj0CbCzR+9JWYq9N7OZjKXLpo5DQoZMu1doTeUWcyRmt0IirNL08q0pslpUX9WbvT 6JK/6a9xlGQk6/MqGw5yAicQYFDEBNvK7UvJX7LLfiUl24igoPfjfw4Lx245YpN8v7ol Mei+mQqRiRYqs3iY/rx/ukGHY1W+X4OOBc+p6SHjdfY6rcMaal5GYAwuy5u1eagovT7C suZg== X-Received: by 10.60.54.39 with SMTP id g7mr12329487oep.18.1372793562794; Tue, 02 Jul 2013 12:32:42 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id z2sm6163821obi.3.2013.07.02.12.32.41 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 12:32:41 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Tue, 2 Jul 2013 13:32:37 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <67798E6A-3B0E-4C2F-AD0F-7D3FF3B0A127@bsdimp.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> To: Jack Wilborn X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQmdMMA1j1D/zu6Ju2cOaGSncoWHq87f/ZCsHwBpGw090YUzqSYzo+9E4O870LFSRbdHZbQh Cc: Alexander Motin , Ilya Bakulin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 19:32:49 -0000 On Jul 2, 2013, at 12:20 PM, Jack Wilborn wrote: > Nice, how do we include this code in our builds? Apply the patches and build a kernel. > How is it invoked? Boot the kernel with a supported SDIO card. > Main > question is that are these structures in an area that is protected so = that > only root can modify them? All this is kernel-level code. > I don't know enough about about SD cards to know if they are alike in = the > communications to them. They are quite similar. SDIO cards are basically SD cards that also have = non-block-sized transfers and interrupt signaling. > I'd like to see more about this and see it in the > test bed to give you more feedback. Having taught C for 15 years, I'm = ok > with reading and understanding the code, but to make it usable is the > bottom line. Nice work, I'm sure it would be an asset to all of us. >=20 > I'm a little groggy about this so if I missed anything, please = overlook > it. I like it! >=20 > Jack >=20 >=20 > On Tue, Jul 2, 2013 at 10:10 AM, Alexander Motin = wrote: >=20 >> On 02.07.2013 17:59, Ilya Bakulin wrote: >>=20 >>> Hi list, >>> I'm currently developing a SDIO driver for the Globalscale = Dreamplug. >>> I have taken SDIO patch for Marvell SoC from [1]. >>> After that I have written some SDIO-related code in = sys/dev/mmc/mmc.c, >>> using OpenBSD SDIO code and the patch from Ben Gray ([2]) as a = starting >>> point. >>>=20 >>> I have taken Warner's wish to have SDIO code in MMC bus into = account, so >>> there >>> is no extra layer of abstraction in my code, SDIO devices will = attach >>> directly >>> to MMC bus. This makes possible to implement combo cards support in = the >>> future, >>> although I don't support them in my code atm. >>>=20 >>> What is already implemented: >>> * SDIO card detection; >>> * CIS reading, both common CIS and individual functions' CIS; >>> * Function enable. >>>=20 >>> My questions, need answers before I can move further: >>> * Where should I store information retrieved from the CIS? The PC Card bus, which also has a CIS, stores it in the slot that it has = for a card. In PC Card land, the CIS is shared between multiple devices, = so we divide things up accordingly. >>> As far as I understand, I should use mmc_ivars structure for = that. >>> But in SDIO case the relationship between MMC bus and SDIO card = is >>> 1:1, >>> and storing the information about the card in mmc_softc sounds = like >>> a good idea -- then I can pass only mmc_softc structure to all >>> functions >>> that need to work with the attached SDIO card. That's quite similar to how we do it for PC Card and CardBus. >> I think SD world is a terrible mess by itself. I would like to not = add >> more. Functions that suppose card access should take card-specific >> structure or device as an argument, not a bus ones. How is it a mess? >> * Should I add any methods to the existing interface files? >>>=20 >>> * Are there any devices on the market that use SDIO interface and = which >>> chipsets are supported in FreeBSD? Any Atheros devices? >>> Adrian, what do you think? >>> I have only Dreamplug with Marvell SDIO-based WLAN chip, that = doesn't >>> have >>> an opensource driver even for Linux... >>>=20 >>=20 >> Recently I've bought EyeFi card hoping it is combined SD+SDIO, but = seems >> like card's WiFi part is completely autonomous and controlled via = file >> access on storage and not really SDIO. Older versions of the card are SDIO. I have one, somewhere. I'll send it = along if I can find it, if you'd like. >> I would try to look for SDIO Bluetooth card. I think such ones still = could >> be found on eBay, and I think there are some specifications for that. >> Though I've never looked inside. There's a standard SDIO Bluetooth interface, so this would be a good = place to start. Warner >> [1] = http://people.freebsd.org/~**raj/misc/mv_sdio.c >>> [2] http://lists.freebsd.org/**pipermail/freebsd-arm/2012-** >>> = June/003543.html >>>=20 >>=20 >> -- >> Alexander Motin >>=20 >> ______________________________**_________________ >> freebsd-arm@freebsd.org mailing list >> = http://lists.freebsd.org/**mailman/listinfo/freebsd-arm >> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@**freebsd.org >> " >>=20 > _______________________________________________ > freebsd-embedded@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-embedded > To unsubscribe, send any mail to = "freebsd-embedded-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 19:34:42 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 12109192 for ; Tue, 2 Jul 2013 19:34:42 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-oa0-f51.google.com (mail-oa0-f51.google.com [209.85.219.51]) by mx1.freebsd.org (Postfix) with ESMTP id D2724110B for ; Tue, 2 Jul 2013 19:34:41 +0000 (UTC) Received: by mail-oa0-f51.google.com with SMTP id i4so6812995oah.24 for ; Tue, 02 Jul 2013 12:34:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=jHnLEivTa4P2sL7H+sO7zbu56z0j64Agl37Klu1lQq0=; b=Ru0Kp5YnbsM9oBDGHisALOFjHVS1CNCKPGHFW3dtfvRSlarQ3H8hvVI4lgn3Fzb5I8 MTHChfOpsPm1cP5cBQtUoyJRKfl/f8qvwPvC0bRW0lzgTgn+a9ZYK0lz2yEeY5Miv6Eo LaLIPAWxdEtmyMYfumJpR3ti5s7rcRPiWr/JPLeQ7hvTW2jv6xvCEOq8UD0fVZeWpQu3 nLhtr5i6DkEDUvnK4VXBQUtQfhzM/y53fblo50gGclsTrZrTWSvIp10AmOYZi9ykdax/ HoY4GD4Ssm0CDvjj6MaDs5A2iGaT1aSau2G/XYQUPFeSDM/XcANAPxeC6jfIxYtTuXzq DN1g== X-Received: by 10.182.61.73 with SMTP id n9mr13897130obr.86.1372793681296; Tue, 02 Jul 2013 12:34:41 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id rs4sm6174374obc.10.2013.07.02.12.34.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 12:34:40 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <51D3282C.1090701@bakulin.de> Date: Tue, 2 Jul 2013 13:34:37 -0600 Content-Transfer-Encoding: 7bit Message-Id: References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> To: Ilya Bakulin X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQk/Td++M6lPXBcVlbe8WkrBNApSdM9Fuu39khZIKlhPLryGgoT/f5mm5v5AFFmrPg3GLw2N Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 19:34:42 -0000 On Jul 2, 2013, at 1:21 PM, Ilya Bakulin wrote: > On 02.07.13 19:10, Alexander Motin wrote: >> I think SD world is a terrible mess by itself. I would like to not add >> more. Functions that suppose card access should take card-specific >> structure or device as an argument, not a bus ones. > The problem is that there is a SDIO card which has up to 7 functions, > but it itself has some characteristics that are available at function 0. > If we add, say, sdio0 device and store this information there, we end up > with > the hierarchy suggested by Ben Gray a year ago. Yea, and I didn't like that at all. It violates the FreeBSD device model. > The SD-specific functions like CSD/CSR operations are also in the mmc.c > and considered to be the bus code... All this code is for device enumeration, which belongs in the bus layer. > Or am I missing something obvious here? > >> I would try to look for SDIO Bluetooth card. I think such ones still >> could be found on eBay, and I think there are some specifications for >> that. Though I've never looked inside. > > The SDIO card found in the Dreamplug has three functions, one of them is > Bluetooth. > Will try to find some docs / Linux code for that... I'll see if I can dig mine up as well. This sounds like a fun project.. I'll review the actual code here in a bit. Warner From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 19:45:39 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 1A990B90; Tue, 2 Jul 2013 19:45:39 +0000 (UTC) (envelope-from mavbsd@gmail.com) Received: from mail-ee0-x229.google.com (mail-ee0-x229.google.com [IPv6:2a00:1450:4013:c00::229]) by mx1.freebsd.org (Postfix) with ESMTP id 7DAAA11CF; Tue, 2 Jul 2013 19:45:38 +0000 (UTC) Received: by mail-ee0-f41.google.com with SMTP id d17so2995643eek.28 for ; Tue, 02 Jul 2013 12:45:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; bh=cglrxEA9Gr2Hefy+5nD/JHGy4hL7t7RS0FlY+960278=; b=x24VgAQoPHlaEGTfydqzCx0P2A+GyMrZ439Q48ompBCgMEL6fjErBT2G3RJSpgWxDP g5wGPbHPOws6at3y4+bITWDZFRHy/E9I/Y6CF9rcAfQI5N9tO9crkilxKf53lBOQG6GA 8+jhGbHOQHQKIA8LqGvQwejIlXR+OVAO57crl5hB/BvkiZYSd7GMxy1XWNk0aj3noVWU P0FWGoBC9NI3JHX9oby2LXKkm/sh1l9DOdYvtsn/EtNya4L5s4GL05Xcpy59PqKhaxZF sa0sbYmGA9Qx6+Ny+IEE/uhdCkw9F+Nwm3LuYC1Li9oTXHMGwL/2EWG7cFgdmYnyJ5ZG 88hg== X-Received: by 10.14.101.13 with SMTP id a13mr27838555eeg.86.1372794337495; Tue, 02 Jul 2013 12:45:37 -0700 (PDT) Received: from mavbook.mavhome.dp.ua (mavhome.mavhome.dp.ua. [213.227.240.37]) by mx.google.com with ESMTPSA id m1sm38763742eex.17.2013.07.02.12.45.35 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 12:45:36 -0700 (PDT) Sender: Alexander Motin Message-ID: <51D32DDD.7030400@FreeBSD.org> Date: Tue, 02 Jul 2013 22:45:33 +0300 From: Alexander Motin User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130616 Thunderbird/17.0.6 MIME-Version: 1.0 To: Ilya Bakulin Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> In-Reply-To: <51D3282C.1090701@bakulin.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 19:45:39 -0000 On 02.07.2013 22:21, Ilya Bakulin wrote: > On 02.07.13 19:10, Alexander Motin wrote: >> I think SD world is a terrible mess by itself. I would like to not add >> more. Functions that suppose card access should take card-specific >> structure or device as an argument, not a bus ones. > The problem is that there is a SDIO card which has up to 7 functions, > but it itself has some characteristics that are available at function 0. > If we add, say, sdio0 device and store this information there, we end up > with > the hierarchy suggested by Ben Gray a year ago. > The SD-specific functions like CSD/CSR operations are also in the mmc.c > and considered to be the bus code... > > Or am I missing something obvious here? That is why I am telling it is a big mess. I don't remember SDIO initialization sequence now, but as I can see, for SD cards CSD includes information about speed, while SCR includes information about bus width, that are probably parts that should be negotiated by the bus, not specific peripheral driver. >> I would try to look for SDIO Bluetooth card. I think such ones still >> could be found on eBay, and I think there are some specifications for >> that. Though I've never looked inside. > > The SDIO card found in the Dreamplug has three functions, one of them is > Bluetooth. > Will try to find some docs / Linux code for that... https://www.sdcard.org/downloads/pls/simplified_specs/ -- "SDIO Bluetooth Type A Simplified Specification". And for some money it should probably possible to get full one, if needed. -- Alexander Motin From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 20:09:48 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id B014CFBE; Tue, 2 Jul 2013 20:09:48 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id 71AA812B7; Tue, 2 Jul 2013 20:09:47 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 5921F3F480 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372795786; bh=vwhkoA1keqN8F3agTW1fmCMSrODtNkEzU+qdgVJtGEM=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=ozw9/Bvo2WxtQfm7QpJphLpqbDI6QXm4OoUVKqtHStRNows6TyvI2iLq21LwN6Ve0 KUKQAjxuq4cUWtUxO+/HhEjlNfbg3oaVgXeK3fLM99F/9Y1pIq/WL7syeSSaDGqR6L RQszz5T4AcCtjoX+8GzTaJKqpRjJZ0w4KlDTDl20= Message-ID: <51D3338A.1010304@bakulin.de> Date: Tue, 02 Jul 2013 22:09:46 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> In-Reply-To: X-Enigmail-Version: 1.5.1 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 20:09:48 -0000 On 02.07.13 21:34, Warner Losh wrote: > > On Jul 2, 2013, at 1:21 PM, Ilya Bakulin wrote: >> The SDIO card found in the Dreamplug has three functions, one of them is >> Bluetooth. >> Will try to find some docs / Linux code for that... > > I'll see if I can dig mine up as well. This sounds like a fun project.. > Seems like Marvell Bluetooth is not a standard one. The support code for it in the Linux kernel is [1], while generic driver is [2]. Marvell uses a loadable firmware to bring the module to life. The firmware seems to be shared between Wi-Fi and Bluetooth module. Implementing firmware upload seems to be implementable using our standard firmware(9) interface, so I will need to embed the firmware into the kernel. I cannot use loadable modules because I boot my kernel via NFS. Of course, Bluetooth support can be implemented only when the SDIO infrastructure is ready, so this is the highest priority for me atm :-) [1] https://github.com/torvalds/linux/blob/master/drivers/bluetooth/btmrvl_sdio.c [2] https://github.com/torvalds/linux/blob/master/drivers/bluetooth/btsdio.c -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 20:11:18 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id F31601BA for ; Tue, 2 Jul 2013 20:11:17 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from nibbler.fubar.geek.nz (nibbler.fubar.geek.nz [199.48.134.198]) by mx1.freebsd.org (Postfix) with ESMTP id D9D5512D5 for ; Tue, 2 Jul 2013 20:11:17 +0000 (UTC) Received: from bender.Home (97e76fc9.skybroadband.com [151.231.111.201]) by nibbler.fubar.geek.nz (Postfix) with ESMTPSA id A31635E1D5 for ; Tue, 2 Jul 2013 20:11:10 +0000 (UTC) Date: Tue, 2 Jul 2013 21:11:03 +0100 From: Andrew Turner To: freebsd-arm@freebsd.org Subject: HEADS UP: Changing the default ABI to EABI Message-ID: <20130702211103.332e8854@bender.Home> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="MP_/vF.E=3.t7Ccdzmce+llYkO/" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 20:11:18 -0000 --MP_/vF.E=3.t7Ccdzmce+llYkO/ Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Disposition: inline Hello, I'm planning on changing the default ARM ABI to the ARM EABI. I believe all the known issues have been fixed, however I would like to know if there are any outstanding problems. I have attached the patch I would like to commit. If there are no major objections I'm planning on committing this in around a week. Andrew --MP_/vF.E=3.t7Ccdzmce+llYkO/ Content-Type: text/x-patch Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=enable_eabi.diff Index: tools/build/options/WITHOUT_ARM_EABI =================================================================== --- tools/build/options/WITHOUT_ARM_EABI (revision 252514) +++ tools/build/options/WITHOUT_ARM_EABI (working copy) @@ -1,2 +1,2 @@ .\" $FreeBSD$ -Set the ARM ABI to EABI. +Set the ARM ABI to OABI. Index: tools/build/options/WITH_ARM_EABI =================================================================== --- tools/build/options/WITH_ARM_EABI (revision 252514) +++ tools/build/options/WITH_ARM_EABI (working copy) @@ -1,2 +0,0 @@ -.\" $FreeBSD$ -Set the ARM ABI to EABI. Index: share/mk/bsd.own.mk =================================================================== --- share/mk/bsd.own.mk (revision 252514) +++ share/mk/bsd.own.mk (working copy) @@ -245,6 +245,7 @@ ACPI \ AMD \ APM \ + ARM_EABI \ ASSERT_DEBUG \ AT \ ATF \ @@ -363,7 +364,6 @@ ZONEINFO __DEFAULT_NO_OPTIONS = \ - ARM_EABI \ BSD_PATCH \ BIND_IDN \ BIND_LARGE_FILE \ Index: UPDATING =================================================================== --- UPDATING (revision 252514) +++ UPDATING (working copy) @@ -31,6 +31,16 @@ disable the most expensive debugging functionality run "ln -s 'abort:false,junk:false' /etc/malloc.conf".) +2013xxxx: + The default ARM ABI has changed to the ARM EABI. The old ABI is + incompatible with the ARM EABI and all programs and modules will + need to be rebuilt to work with a new kernel. + + To keep using the old ABI ensure the WITHOUT_ARM_EABI knob is set. + + NOTE: Support for the old ABI will be removed in the future and + users are advised to upgrade. + 20130629: Fix targets that run multiple make's to use && rather than ; so that subsequent steps depend on success of previous. --MP_/vF.E=3.t7Ccdzmce+llYkO/-- From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 21:02:56 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 459E43A0 for ; Tue, 2 Jul 2013 21:02:56 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-qa0-x232.google.com (mail-qa0-x232.google.com [IPv6:2607:f8b0:400d:c00::232]) by mx1.freebsd.org (Postfix) with ESMTP id 0E0E316E8 for ; Tue, 2 Jul 2013 21:02:55 +0000 (UTC) Received: by mail-qa0-f50.google.com with SMTP id l18so3148830qak.16 for ; Tue, 02 Jul 2013 14:02:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=WwaSTOQomlkMVEnbWrU+fshs95aJ1lKFiXIFDPiay0Y=; b=RtdcYSqrQssCwX1ezHggZ3FemYTx+EumffBKUNGUXY0knx0ZY3LAc6zCuZ9aPKMuCE Cpgf36Q7Xerv369OyG968QUGSn6CPL0oFeSwrW3W5tC+p2QZVOBeE6IipqH3U+M/sI1C 6Rfw36c4uAo1K7b8E8EuPfFKGAZ/dKdbvjManbYYX/3evBcTYDjL0fzDyJKqh4BJFC18 E1dQQgsddWD1qvEJNqt48qT5SB85KvSlIoTAmAEt78aGLytJVriydk1uQGFcgYbDBwV0 bovFDRu4DxHsxphUKNF+c8VNx3pWyt8i0zjtyT/hwysWDCBSHSTtE0gpgwssTYJh2Vo4 Aa6A== MIME-Version: 1.0 X-Received: by 10.224.147.145 with SMTP id l17mr42193107qav.3.1372798975508; Tue, 02 Jul 2013 14:02:55 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.224.52.71 with HTTP; Tue, 2 Jul 2013 14:02:55 -0700 (PDT) In-Reply-To: <20130702211103.332e8854@bender.Home> References: <20130702211103.332e8854@bender.Home> Date: Tue, 2 Jul 2013 14:02:55 -0700 X-Google-Sender-Auth: N6q3NtMCFLGW1NA0eXk2P7l2ZNE Message-ID: Subject: Re: HEADS UP: Changing the default ABI to EABI From: Adrian Chadd To: Andrew Turner Content-Type: text/plain; charset=ISO-8859-1 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 21:02:56 -0000 Does stack trace and remote kgdb work? -adrian On 2 July 2013 13:11, Andrew Turner wrote: > Hello, > > I'm planning on changing the default ARM ABI to the ARM EABI. I believe > all the known issues have been fixed, however I would like to know if > there are any outstanding problems. > > I have attached the patch I would like to commit. If there are no major > objections I'm planning on committing this in around a week. > > Andrew > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 21:29:58 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 30586848; Tue, 2 Jul 2013 21:29:58 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from nibbler.fubar.geek.nz (nibbler.fubar.geek.nz [199.48.134.198]) by mx1.freebsd.org (Postfix) with ESMTP id 1764317EB; Tue, 2 Jul 2013 21:29:57 +0000 (UTC) Received: from bender.Home (97e76fc9.skybroadband.com [151.231.111.201]) by nibbler.fubar.geek.nz (Postfix) with ESMTPSA id AD6665E1D5; Tue, 2 Jul 2013 21:29:56 +0000 (UTC) Date: Tue, 2 Jul 2013 22:29:49 +0100 From: Andrew Turner To: Adrian Chadd Subject: Re: HEADS UP: Changing the default ABI to EABI Message-ID: <20130702222949.23384344@bender.Home> In-Reply-To: References: <20130702211103.332e8854@bender.Home> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 21:29:58 -0000 On Tue, 2 Jul 2013 14:02:55 -0700 Adrian Chadd wrote: > Does stack trace and remote kgdb work? > Stack unwinding works in a debug kernel. I have never used remote kgdb or ARM as I would normally use JTAG to do the equivalent so I do not know the status. Andrew From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 22:18:40 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id EEDBC21E; Tue, 2 Jul 2013 22:18:40 +0000 (UTC) (envelope-from kibab@olymp.kibab.com) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id B9A911996; Tue, 2 Jul 2013 22:18:39 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com BE2543F47B DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372803517; bh=Iv0nerWML0jQUS5DQ3EYBpkST273JQO0pWUACRyvkvk=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=a0U90VYaUK5FPKBGNCx+BsKSGInPB8EU8d+fRYnECOvuZNemqdSOLXQxJ2gCOoP2e jMZa1PAtWc6XbHQBm69UO87Zb0C9U11CttYkdyU4aKzamggym81AVrTCgNf/maoWB0 lMwRrq33pdvqsMLHUGgxs5P+czrcOHy3lhW+uDJ0= Date: Wed, 3 Jul 2013 00:18:37 +0200 From: Ilya Bakulin To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Message-ID: <20130702221837.GA76081@olymp.kibab.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <67798E6A-3B0E-4C2F-AD0F-7D3FF3B0A127@bsdimp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <67798E6A-3B0E-4C2F-AD0F-7D3FF3B0A127@bsdimp.com> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-arm@freebsd.org, Alexander Motin , freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 22:18:41 -0000 On Tue, Jul 02, 2013 at 01:32:37PM -0600, Warner Losh wrote: > >>> * Where should I store information retrieved from the CIS? > > The PC Card bus, which also has a CIS, stores it in the slot that it has for a card. In PC Card land, the CIS is shared between multiple devices, so we divide things up accordingly. [...] > > That's quite similar to how we do it for PC Card and CardBus. OK, I have modified my code to store per-function information in the tail queue. Function #0 is special in SDIO, so I chose to store its info separately. Here is an updated patch. Please don't blame me much :-) diff --git a/sys/arm/conf/KIBAB-DPLUG b/sys/arm/conf/KIBAB-DPLUG new file mode 100644 index 0000000..033d398 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG @@ -0,0 +1,171 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG + +include "../mv/kirkwood/std.db88f6xxx" + +makeoptions FDT_DTS_FILE=dreamplug-1001.dts + +makeoptions MODULES_OVERRIDE="" + +options SOC_MV_KIRKWOOD + +options SCHED_4BSD #4BSD scheduler +options INET #InterNETworking +options INET6 #IPv6 communications protocols +options SOFTUPDATES +options CD9660 #ISO 9660 filesystem +options FFS #Berkeley Fast Filesystem +options MSDOSFS #MS DOS File System (FAT, FAT32) +options NULLFS #NULL filesystem +options TMPFS #Efficient memory filesystem +options SYSVSHM #SYSV-style shared memory +options SYSVMSG #SYSV-style message queues +options SYSVSEM #SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions +options GEOM_ELI # Disk encryption. +options GEOM_LABEL # Providers labelization. +options GEOM_PART_GPT # GPT partitioning + +# Flattened Device Tree +device fdt +options FDT +options FDT_DTB_STATIC + +# Misc pseudo devices +device bpf #Required for DHCP +device faith #IPv6-to-IPv4 relaying (translation) +device firmware #firmware(9) required for USB wlan +device gif #IPv6 and IPv4 tunneling +device loop #Network loopback +device md #Memory/malloc disk +device pty #BSD-style compatibility pseudo ttys +device random #Entropy device +device tun #Packet tunnel. +device ether #Required for all ethernet devices +device vlan #802.1Q VLAN support +device wlan #802.11 WLAN support + +# cam support for umass and ahci +device scbus +device pass +device da +device cd + +# Serial ports +device uart + +# Networking +device mge # Marvell Gigabit Ethernet controller +device mii +device e1000phy + +# USB +options USB_HOST_ALIGN=32 # Align DMA to cacheline +#options USB_DEBUG # Compile in USB debug support +device usb # Basic usb support +device ehci # USB host controller +device umass # Mass storage +device uhid # Human-interface devices +device rum # Ralink Technology RT2501USB wireless NICs + +# I2C (TWSI) +device iic +device iicbus + +# SATA +device mvs +device ahci + +# SDIO +device mv_sdio +device mmcsd +device mmc + +# Sound +device sound +device snd_uaudio + +#crypto +device cesa # Marvell security engine +device crypto +device cryptodev + +# IPSec +device enc +options IPSEC +options IPSEC_NAT_T +options TCP_SIGNATURE #include support for RFC 2385 + +#PF +device pf +device pflog +device pfsync + +# ALTQ, required for PF +options ALTQ # Basic ALTQ support +options ALTQ_CBQ # Class Based Queueing +options ALTQ_RED # Random Early Detection +options ALTQ_RIO # RED In/Out +options ALTQ_HFSC # Hierarchical Packet Scheduler +options ALTQ_CDNR # Traffic conditioner +options ALTQ_PRIQ # Priority Queueing +options ALTQ_NOPCC # Required if the TSC is unusable +#options ALTQ_DEBUG + +# Debugging +makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +options DDB +options KDB +options DIAGNOSTIC +options INVARIANTS #Enable calls of extra sanity checking +options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB + +# Enable these options for nfs root configured via BOOTP. +options NFSCL #Network Filesystem Client +options NFSLOCKD #Network Lock Manager +options NFS_ROOT #NFS usable as /, requires NFSCLIENT +options BOOTP +options BOOTP_NFSROOT +#options BOOTP_NFSV3 +options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1s1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" + +# To use this configuration with the (rare) model 1001N (nand flash), +# create a kernel config file that looks like this: +# +# include DREAMPLUG-1001 +# nomakeoptions FDT_DTS_FILE +# makeoptions FDT_DTS_FILE=dreamplug-1001N.dts +# device nand diff --git a/sys/arm/conf/KIBAB-DPLUG-NODBG b/sys/arm/conf/KIBAB-DPLUG-NODBG new file mode 100644 index 0000000..cbced4a --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-NODBG @@ -0,0 +1,43 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG-NODBG + +include KIBAB-DPLUG + +# Do not compile FDT in kernel +nomakeoptions FDT_DTS_FILE +nooptions FDT_DTB_STATIC + +# Debugging +nomakeoptions DEBUG +nooptions BREAK_TO_DEBUGGER +nooptions ALT_BREAK_TO_DEBUGGER +nooptions DDB +nooptions KDB +nooptions DIAGNOSTIC +nooptions INVARIANTS #Enable calls of extra sanity checking +nooptions INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB diff --git a/sys/arm/conf/KIBAB-DPLUG-PROD b/sys/arm/conf/KIBAB-DPLUG-PROD new file mode 100644 index 0000000..bae61a4 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-PROD @@ -0,0 +1,33 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + + +include KIBAB-DPLUG-NODBG + +ident KIBAB-DPLUG-PROD + +nooptions NFS_ROOT +nooptions BOOTP +nooptions BOOTP_NFSROOT +nooptions BOOTP_WIRED_TO + diff --git a/sys/arm/mv/files.mv b/sys/arm/mv/files.mv index 116356d..88c0b98 100644 --- a/sys/arm/mv/files.mv +++ b/sys/arm/mv/files.mv @@ -32,6 +32,7 @@ arm/mv/mv_sata.c optional ata | atamvsata arm/mv/mv_ts.c standard arm/mv/timer.c standard arm/mv/twsi.c optional iicbus +arm/mv/mv_sdio.c optional mv_sdio dev/cesa/cesa.c optional cesa dev/mge/if_mge.c optional mge diff --git a/sys/arm/mv/mv_sdio.c b/sys/arm/mv/mv_sdio.c new file mode 100644 index 0000000..73faf08 --- /dev/null +++ b/sys/arm/mv/mv_sdio.c @@ -0,0 +1,1670 @@ +/*- + * Copyright (c) 2009 Semihalf, Rafal Czubak + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Driver for Marvell Integrated SDIO Host Controller. + * Works stable in DMA mode. PIO mode has problems with large data transfers + * (timeouts). + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "mmcbr_if.h" + +#include "mv_sdio.h" + +/* Minimum DMA segment size. */ +#define MV_SDIO_DMA_SEGMENT_SIZE 4096 + +/* Transferred block size. */ +#define MV_SDIO_BLOCK_SIZE 512 + +/* Maximum number of blocks the controller can handle. */ +#define MV_SDIO_BLOCKS_MAX 65535 + +/* Halfword bit masks used for command response extraction. */ +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ +#define MV_SDIO_RSP48_BM16 0xffff /* 16 bits */ + +/* SDIO aggregated command interrupts */ +#define MV_SDIO_IRQS_CMD (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_UNEXPECTED_RSP) +#define MV_SDIO_EIRQS_CMD (MV_SDIO_EIRQ_CMD_TMO | MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_CMD_STARTBIT | MV_SDIO_EIRQ_RSP_TBIT) + +/* SDIO aggregated data interrupts */ +#define MV_SDIO_IRQS_DATA (MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_TX_EMPTY | \ + MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_AUTOCMD12) +#define MV_SDIO_EIRQS_DATA (MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | MV_SDIO_EIRQ_XFER_SIZE | \ + MV_SDIO_EIRQ_CRC_ENDBIT | MV_SDIO_EIRQ_CRC_STARTBIT | \ + MV_SDIO_EIRQ_CRC_STAT) + +/* + * Timing configuration. + */ + +/* SDIO controller base clock frequency. */ +#define MV_SDIO_F_BASE 100000000 /* 200 MHz */ + +/* Maximum SD clock frequency. */ +#define MV_SDIO_F_MAX (MV_SDIO_F_BASE / 2) /* 50 MHz */ + +/* Maximum timeout value. */ +#define MV_SDIO_TMO_MAX 0xf + +/* Reset delay in microseconds. */ +#define MV_SDIO_RESET_DELAY 10000 /* 10 ms */ + +/* Empty FIFO polling delay. */ +#define MV_SDIO_FIFO_EMPTY_DELAY 1000 /* 1 ms */ + +/* Delays between operations on multiple blocks. */ +#define MV_SDIO_RD_DELAY 50 /*50*/ /* Read access time. */ +#define MV_SDIO_WR_DELAY 10 /*10*/ /* Write access time. */ + +/* Maximum clock divider value. */ +#define MV_SDIO_CLK_DIV_MAX 0x7ff + +struct mv_sdio_softc { + device_t sc_dev; + device_t sc_child; + + bus_space_handle_t sc_bsh; + bus_space_tag_t sc_bst; + + int sc_use_dma; + bus_dma_tag_t sc_dmatag; + bus_dmamap_t sc_dmamap; + uint8_t *sc_dmamem; + bus_addr_t sc_physaddr; + int sc_mapped; + size_t sc_dma_size; + + struct resource *sc_mem_res; + int sc_mem_rid; + + struct resource *sc_irq_res; + int sc_irq_rid; + void *sc_ihl; + + struct resource *sc_cd_irq_res; + int sc_cd_irq_rid; + void *sc_cd_ihl; + + uint32_t sc_irq_mask; + uint32_t sc_eirq_mask; + + struct task sc_card_task; + struct callout sc_card_callout; + + struct mtx sc_mtx; + + int sc_bus_busy; + int sc_card_present; + struct mmc_host sc_host; + struct mmc_request *sc_req; + struct mmc_command *sc_curcmd; + + uint32_t sc_data_offset; +}; + +/* Read/write data from/to registers.*/ +static uint32_t MV_SDIO_RD4(struct mv_sdio_softc *, bus_size_t); +static void MV_SDIO_WR4(struct mv_sdio_softc *, bus_size_t, uint32_t); + +static int mv_sdio_probe(device_t); +static int mv_sdio_attach(device_t); + +static int mv_sdio_read_ivar(device_t, device_t, int, uintptr_t *); +static int mv_sdio_write_ivar(device_t, device_t, int, uintptr_t); + +static int mv_sdio_update_ios(device_t, device_t); +static int mv_sdio_request(device_t, device_t, struct mmc_request *); +static int mv_sdio_get_ro(device_t, device_t); +static int mv_sdio_acquire_host(device_t, device_t); +static int mv_sdio_release_host(device_t, device_t); + +/* Finalizes active MMC request. */ +static void mv_sdio_finalize_request(struct mv_sdio_softc *); + +/* Initializes controller's registers. */ +static void mv_sdio_init(device_t); + +/* Initializes host structure. */ +static void mv_sdio_init_host(struct mv_sdio_softc *); + +/* Used to add and handle sysctls. */ +static void mv_sdio_add_sysctls(struct mv_sdio_softc *); +static int mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS); + +/* DMA initialization and cleanup functions. */ +static int mv_sdio_dma_init(struct mv_sdio_softc *); +static void mv_sdio_dma_finish(struct mv_sdio_softc *); + +/* DMA map load callback. */ +static void mv_sdio_getaddr(void *, bus_dma_segment_t *, int, int); + +/* Prepare command/data before transaction. */ +static int mv_sdio_start_command(struct mv_sdio_softc *, struct + mmc_command *); +static int mv_sdio_start_data(struct mv_sdio_softc *, struct mmc_data *); + +/* Finish command after transaction. */ +static void mv_sdio_finish_command(struct mv_sdio_softc *); + +/* Response handling. */ +static void mv_sdio_handle_136bit_resp(struct mv_sdio_softc *); +static void mv_sdio_handle_48bit_resp(struct mv_sdio_softc *, + struct mmc_command *); + +/* Interrupt handler and interrupt helper functions. */ +static void mv_sdio_intr(void *); +static void mv_sdio_cmd_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_data_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_disable_intr(struct mv_sdio_softc *); + +/* Used after card detect interrupt has been handled. */ +static void mv_sdio_card_task(void *, int); + +/* Read/write data from FIFO in PIO mode. */ +static uint32_t mv_sdio_read_fifo(struct mv_sdio_softc *); +static void mv_sdio_write_fifo(struct mv_sdio_softc *, uint32_t); + +/* + * PIO mode handling. + * + * Inspired by sdhci(4) driver routines. + */ +static void mv_sdio_transfer_pio(struct mv_sdio_softc *); +static void mv_sdio_read_block_pio(struct mv_sdio_softc *); +static void mv_sdio_write_block_pio(struct mv_sdio_softc *); + + +static device_method_t mv_sdio_methods[] = { + /* device_if */ + DEVMETHOD(device_probe, mv_sdio_probe), + DEVMETHOD(device_attach, mv_sdio_attach), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, mv_sdio_read_ivar), + DEVMETHOD(bus_write_ivar, mv_sdio_write_ivar), + + /* mmcbr_if */ + DEVMETHOD(mmcbr_update_ios, mv_sdio_update_ios), + DEVMETHOD(mmcbr_request, mv_sdio_request), + DEVMETHOD(mmcbr_get_ro, mv_sdio_get_ro), + DEVMETHOD(mmcbr_acquire_host, mv_sdio_acquire_host), + DEVMETHOD(mmcbr_release_host, mv_sdio_release_host), + + {0, 0}, +}; + +static driver_t mv_sdio_driver = { + "sdio", + mv_sdio_methods, + sizeof(struct mv_sdio_softc), +}; +static devclass_t mv_sdio_devclass; + +DRIVER_MODULE( sdio, simplebus, mv_sdio_driver, mv_sdio_devclass, 0, 0); + + +static __inline uint32_t +MV_SDIO_RD4(struct mv_sdio_softc *sc, bus_size_t off) +{ + + return (bus_read_4(sc->sc_mem_res, off)); +} + +static __inline void +MV_SDIO_WR4(struct mv_sdio_softc *sc, bus_size_t off, uint32_t val) +{ + + bus_write_4(sc->sc_mem_res, off, val); +} + +static int platform_sdio_slot_signal( int signal ) +{ + switch( signal ) + { + case MV_SDIO_SIG_CD: + { + return -1; + break; + } + case MV_SDIO_SIG_WP: + return 0; + break; + default: + return -1; + break; + } + + return 0; +} + +static int +mv_sdio_probe(device_t dev) +{ + uint32_t device, revision; + + if (!ofw_bus_is_compatible(dev, "mrvl,sdio")) + return (ENXIO); + + + soc_id(&device, &revision); + + switch (device) { + case MV_DEV_88F6281: + break; + default: + return (ENXIO); + } + + device_set_desc(dev, "Marvell Integrated SDIO Host Controller"); + + return (BUS_PROBE_SPECIFIC); +} + +static int +mv_sdio_attach(device_t dev) +{ + struct mv_sdio_softc *sc; + int task_initialized = 0; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); + + /* Allocate memory and interrupt resources. */ + sc->sc_mem_rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + + if (sc->sc_mem_res == NULL) { + device_printf(dev, "Could not allocate memory!\n"); + goto fail; + } + + sc->sc_irq_rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + + if (sc->sc_irq_res == NULL) { + device_printf(dev, "Could not allocate IRQ!\n"); + goto fail; + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + + /* Initialize host controller's registers. */ + mv_sdio_init(dev); + + /* Try to setup DMA. */ + sc->sc_mapped = 0; /* No DMA buffer is mapped. */ + sc->sc_use_dma = 1; /* DMA mode is preferred to PIO mode. */ + + if (mv_sdio_dma_init(sc) < 0) { + device_printf(dev, "Falling back to PIO mode.\n"); + sc->sc_use_dma = 0; + } + + /* Add sysctls. */ + mv_sdio_add_sysctls(sc); + + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) { + /* Check if card is present in the slot. */ + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) == 1) + sc->sc_card_present = 1; + } + + TASK_INIT(&sc->sc_card_task, 0, mv_sdio_card_task, sc); + callout_init(&sc->sc_card_callout, 1); + task_initialized = 1; + + /* Setup interrupt. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | + INTR_MPSAFE, NULL, mv_sdio_intr, sc, &sc->sc_ihl) != 0) { + device_printf(dev, "Could not setup interrupt!\n"); + goto fail; + } + + /* Host can be acquired. */ + sc->sc_bus_busy = 0; + + /* + * Attach MMC bus only if the card is in the slot or card detect is + * not supported on the platform. + */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) == -1) || + sc->sc_card_present) { + sc->sc_child = device_add_child(dev, "mmc", -1); + + if (sc->sc_child == NULL) { + device_printf(dev, "Could not add MMC bus!\n"); + goto fail; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + } + + return (bus_generic_attach(dev)); + +fail: + mv_sdio_dma_finish(sc); + if (task_initialized) { + callout_drain(&sc->sc_card_callout); + taskqueue_drain(taskqueue_swi, &sc->sc_card_task); + } + if (sc->sc_ihl != NULL) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_ihl); + if (sc->sc_cd_ihl != NULL) + bus_teardown_intr(dev, sc->sc_cd_irq_res, sc->sc_cd_ihl); + if (sc->sc_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_irq_res); + if (sc->sc_cd_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_cd_irq_rid, + sc->sc_cd_irq_res); + if (sc->sc_mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, + sc->sc_mem_res); + mtx_destroy(&sc->sc_mtx); + return (ENXIO); +} + +static int +mv_sdio_update_ios(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + struct mmc_ios *ios; + uint32_t xfer, clk_div, host_cr; + + sc = device_get_softc(brdev); + host = device_get_ivars(reqdev); + ios = &host->ios; + + mtx_lock(&sc->sc_mtx); + + if (ios->power_mode == power_off) + /* Re-initialize the controller. */ + mv_sdio_init(brdev); + + xfer = MV_SDIO_RD4(sc, MV_SDIO_XFER); + + if (ios->clock == 0) { + /* Disable clock. */ + xfer |= MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + /* Set maximum clock divider. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + } else { + /* + * Calculate and set clock divider. + * Clock rate value is: + * clock = MV_SDIO_F_BASE / (clk_div + 1) + * Thus we calculate the divider value as: + * clk_div = (MV_SDIO_F_BASE / clock) - 1 + */ + clk_div = (MV_SDIO_F_BASE / ios->clock) - 1; + if (clk_div > MV_SDIO_CLK_DIV_MAX) + clk_div = MV_SDIO_CLK_DIV_MAX; + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, clk_div); + + /* Enable clock. */ + xfer &= ~MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + } + + host_cr = MV_SDIO_RD4(sc, MV_SDIO_HOST_CR); + + /* Set card type. */ + if (host->mode == mode_mmc) + host_cr |= MV_SDIO_HOST_CR_MMC; /* MMC card. */ + else + host_cr &= ~MV_SDIO_HOST_CR_MMC; /* SD card. */ + + /* Set bus width. */ + if (ios->bus_width == bus_width_4) + host_cr |= MV_SDIO_HOST_CR_4BIT; /* 4-bit bus width */ + else + host_cr &= ~MV_SDIO_HOST_CR_4BIT; /* 1-bit bus width */ + + /* Set high/normal speed mode. */ +#if 0 /* Some cards have problems with the highspeed-mode + * Not selecting High-Speed mode enables all cards to work + */ + + if ((ios->timing == bus_timing_hs ) && ( 1 == 0 ) ) + host_cr |= MV_SDIO_HOST_CR_HIGHSPEED; + else +#endif + host_cr &= ~MV_SDIO_HOST_CR_HIGHSPEED; + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static int +mv_sdio_request(device_t brdev, device_t reqdev, struct mmc_request *req) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = EBUSY; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_req != NULL) { + mtx_unlock(&sc->sc_mtx); + return (rv); + } + + sc->sc_req = req; +/* + device_printf(sc->sc_dev, "cmd %d (hw state 0x%04x)\n", + req->cmd->opcode , MV_SDIO_RD4( sc, MV_SDIO_HOST_SR ) ); +*/ + rv = mv_sdio_start_command(sc, req->cmd); + + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_get_ro(device_t brdev, device_t reqdev) +{ + int rv; + + /* Check if card is read only. */ + rv = platform_sdio_slot_signal(MV_SDIO_SIG_WP); + + /* + * Assume that card is not write protected, when platform doesn't + * support WP signal. + */ + if (rv < 0) + rv = 0; + + return (rv); +} + +static int +mv_sdio_acquire_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = 0; + + mtx_lock(&sc->sc_mtx); + while (sc->sc_bus_busy) + rv = mtx_sleep(sc, &sc->sc_mtx, PZERO, "sdioah", 0); + sc->sc_bus_busy++; + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_release_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + + sc = device_get_softc(brdev); + + mtx_lock(&sc->sc_mtx); + sc->sc_bus_busy--; + wakeup(sc); + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_finalize_request(struct mv_sdio_softc *sc) +{ + struct mmc_request *req; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + if (req) { + /* Finalize active request. */ + /*device_printf(sc->sc_dev, "Finalize request %i\n",req->cmd->opcode);*/ + sc->sc_req = NULL; + sc->sc_curcmd = NULL; + req->done(req); + + + } else + device_printf(sc->sc_dev, "No active request to finalize!\n"); +} + +static void +mv_sdio_init(device_t dev) +{ + struct mv_sdio_softc *sc; + uint32_t host_cr; + + sc = device_get_softc(dev); + + /* Disable interrupts. */ + sc->sc_irq_mask = 0; + sc->sc_eirq_mask = 0; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Clear interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, MV_SDIO_EIRQ_ALL); + + /* Enable interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR_EN, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR_EN, MV_SDIO_EIRQ_ALL); + + /* Initialize Host Control Register. */ + host_cr = (MV_SDIO_HOST_CR_PUSHPULL | MV_SDIO_HOST_CR_BE | + MV_SDIO_HOST_CR_TMOVAL(MV_SDIO_TMO_MAX) | MV_SDIO_HOST_CR_TMO); + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + /* Stop clock and reset Transfer Mode Register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, MV_SDIO_XFER_STOP_CLK); + + /* Set maximum clock divider value. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + + /* Reset status, state machine and FIFOs synchronously. */ + MV_SDIO_WR4(sc, MV_SDIO_SW_RESET, MV_SDIO_SW_RESET_ALL); + DELAY(MV_SDIO_RESET_DELAY); +} + +static void +mv_sdio_init_host(struct mv_sdio_softc *sc) +{ + struct mmc_host *host; + + host = &sc->sc_host; + + /* Clear host structure. */ + bzero(host, sizeof(struct mmc_host)); + + /* Calculate minimum and maximum operating frequencies. */ + host->f_min = MV_SDIO_F_BASE / (MV_SDIO_CLK_DIV_MAX + 1); + host->f_max = MV_SDIO_F_MAX; + + /* Set operation conditions (voltage). */ + host->host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + + /* Set additional host controller capabilities. */ + host->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED; +} + +static void +mv_sdio_add_sysctls(struct mv_sdio_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid_list *children; + struct sysctl_oid *tree; + + ctx = device_get_sysctl_ctx(sc->sc_dev); + children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); + tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "params", + CTLFLAG_RD, 0, "Driver parameters"); + children = SYSCTL_CHILDREN(tree); + + SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "use_dma", + CTLTYPE_UINT | CTLFLAG_RW, sc, 0, mv_sdio_sysctl_use_dma, + "I", "Use DMA for data transfers (0-1)"); +} + +/* + * This sysctl allows switching between DMA and PIO modes for data transfers: + * + * dev.mv_sdio..params.use_dma + * + * Values: + * + * - 1 sets DMA mode + * - 0 sets PIO mode + * + * Driver uses DMA mode by default. + */ +static int +mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS) +{ + struct mv_sdio_softc *sc; + uint32_t use_dma; + int error; + + sc = (struct mv_sdio_softc *)arg1; + + use_dma = sc->sc_use_dma; + + error = sysctl_handle_int(oidp, &use_dma, 0, req); + if (error != 0 || req->newptr == NULL) + return (error); + + if (use_dma > 1) + return (EINVAL); + + mtx_lock(&sc->sc_mtx); + + /* Check if requested mode is already being used. */ + if (sc->sc_use_dma == use_dma) { + mtx_unlock(&sc->sc_mtx); + return (EPERM); + } + + if (!(sc->sc_mapped)) { + device_printf(sc->sc_dev, "DMA not initialized!\n"); + mtx_unlock(&sc->sc_mtx); + return (ENOMEM); + } + + /* Set new mode. */ + sc->sc_use_dma = use_dma; + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + + if (error != 0) + return; + + /* Get first segment's physical address. */ + *(bus_addr_t *)arg = segs->ds_addr; +} + +static int +mv_sdio_dma_init(struct mv_sdio_softc *sc) +{ + device_t dev; + bus_size_t dmabuf_size; + + dev = sc->sc_dev; + dmabuf_size = MAXPHYS; + + /* Create DMA tag. */ + if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ + MV_SDIO_DMA_SEGMENT_SIZE, 0, /* alignment, boundary */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filtfunc, filtfuncarg */ + MAXPHYS, 1, /* maxsize, nsegments */ + MAXPHYS, BUS_DMA_ALLOCNOW, /* maxsegsz, flags */ + NULL, NULL, /* lockfunc, lockfuncarg */ + &sc->sc_dmatag) != 0) { + device_printf(dev, "Could not create DMA tag!\n"); + return (-1); + } + + /* Allocate DMA memory. */ + if (bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_dmamem, + BUS_DMA_NOWAIT, &sc->sc_dmamap) != 0) { + device_printf(dev, "Could not allocate DMA memory!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + + /* Find the biggest available DMA buffer size. */ + while (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap, + (void *)sc->sc_dmamem, dmabuf_size, mv_sdio_getaddr, + &sc->sc_physaddr, 0) != 0) { + dmabuf_size >>= 1; + if (dmabuf_size < MV_SDIO_BLOCK_SIZE) { + device_printf(dev, "Could not load DMA map!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + } + + sc->sc_mapped++; + sc->sc_dma_size = dmabuf_size; + + return (0); +} + +static void +mv_sdio_dma_finish(struct mv_sdio_softc *sc) +{ + + /* Free DMA resources. */ + if (sc->sc_mapped) { + bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap); + sc->sc_mapped--; + } + if (sc->sc_dmamem != NULL) + bus_dmamem_free(sc->sc_dmatag, sc->sc_dmamem, sc->sc_dmamap); + if (sc->sc_dmamap != NULL) + bus_dmamap_destroy(sc->sc_dmatag, sc->sc_dmamap); + if (sc->sc_dmatag != NULL) + bus_dma_tag_destroy(sc->sc_dmatag); +} + +static int +mv_sdio_start_command(struct mv_sdio_softc *sc, struct mmc_command *cmd) +{ + struct mmc_request *req; + uint32_t cmdreg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + sc->sc_curcmd = cmd; + + cmd->error = MMC_ERR_NONE; + + /* Check if card is in the slot. */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) && + (sc->sc_card_present == 0)) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Check if clock is enabled. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_STOP_CLK) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Write command argument. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGL, cmd->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGH, cmd->arg >> 16); + + /* Determine response type. */ + if (cmd->flags & MMC_RSP_136) + cmdreg = MV_SDIO_CMD_RSP_136; + else if (cmd->flags & MMC_RSP_BUSY) + cmdreg = MV_SDIO_CMD_RSP_48_BUSY; + else if (cmd->flags & MMC_RSP_PRESENT) + cmdreg = MV_SDIO_CMD_RSP_48; + else { + /* No response. */ + cmdreg = MV_SDIO_CMD_RSP_NONE; + /* Enable host to detect unexpected response. */ + cmdreg |= MV_SDIO_CMD_UNEXPECTED_RSP; + sc->sc_irq_mask |= MV_SDIO_CMD_UNEXPECTED_RSP; + } + + /* Check command checksum if needed. */ + if (cmd->flags & MMC_RSP_CRC) + cmdreg |= MV_SDIO_CMD_CRC7; + /* Check command opcode if needed. */ + if (cmd->flags & MMC_RSP_OPCODE) + cmdreg |= MV_SDIO_CMD_INDEX_CHECK; + + /* Set commannd opcode. */ + cmdreg |= MV_SDIO_CMD_INDEX(cmd->opcode); + + /* Setup interrupts. */ + sc->sc_irq_mask = MV_SDIO_IRQ_CMD; + sc->sc_eirq_mask = MV_SDIO_EIRQ_ALL; + + /* Prepare data transfer. */ + if (cmd->data) { + cmdreg |= (MV_SDIO_CMD_DATA_PRESENT | MV_SDIO_CMD_DATA_CRC16); + if (mv_sdio_start_data(sc, cmd->data) < 0) { + cmd->error = MMC_ERR_FAILED; + printf("mv_sdio_start_data() failed!\n"); + mv_sdio_finalize_request(sc); + return (-1); + } + } + + /* Write command register. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD, cmdreg); + + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, ~MV_SDIO_IRQ_CARD_EVENT /*MV_SDIO_IRQ_ALL*/); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, 0xffff /*MV_SDIO_EIRQ_ALL*/); + + /* Update interrupt/error interrupt enable registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Do not complete request, interrupt handler will do this. */ + return (0); +} + +static void +mv_sdio_finish_command(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + struct mmc_data *data; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + data = cmd->data; + + /* Get response. */ + if (cmd->flags & MMC_RSP_PRESENT) { + if(cmd->flags & MMC_RSP_136) + /* 136-bit response. */ + mv_sdio_handle_136bit_resp(sc); + else + /* 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, NULL); + } + + if (data) { + /* + * Disable command complete interrupt. It has already been + * handled. + */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_CMD; + + /* Enable XFER interrupt. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_XFER; + + /* Check which data interrupts we need to activate. */ + if (sc->sc_use_dma) + /* DMA transaction. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_DMA; + else if (data->flags & MMC_DATA_READ) + /* Read transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_RX_FULL; + else + /* Write transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_TX_EMPTY; + + /* Check if Auto-CMD12 interrupt will be needed. */ + if (sc->sc_req->stop) + sc->sc_irq_mask |= MV_SDIO_IRQ_AUTOCMD12; + + /* Update interrupt enable register. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + /* We're done. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static int +mv_sdio_start_data(struct mv_sdio_softc *sc, struct mmc_data *data) +{ + struct mmc_command *stop; + uint32_t autocmd12reg, xfer, host_sr; + size_t blk_size, blk_count; + int retries; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + /* + * No transfer can be started when FIFO_EMPTY bit in MV_SDIO_HOST_SR + * is not set. This bit is sometimes not set instantly after XFER + * interrupt has been asserted. + */ + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + + retries = 10; + while (!(host_sr & MV_SDIO_HOST_SR_FIFO_EMPTY)) { + if (retries == 0) + return (-1); + retries--; + DELAY(MV_SDIO_FIFO_EMPTY_DELAY); + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + } + + /* Clear data offset. */ + sc->sc_data_offset = 0; + + /* + * Set block size. It can be less than or equal to MV_SDIO_BLOCK_SIZE + * bytes. + */ + blk_size = (data->len < MV_SDIO_BLOCK_SIZE) ? data->len : + MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_SIZE, blk_size); + + /* Set block count. */ + blk_count = (data->len + MV_SDIO_BLOCK_SIZE - 1) / MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_COUNT, blk_count); + + /* We want to initiate transfer by software. */ + xfer = MV_SDIO_XFER_SW_WR_EN; + + if (sc->sc_use_dma) { + /* Synchronize before DMA transfer. */ + if (data->flags & MMC_DATA_READ) + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREREAD); + else { + memcpy(sc->sc_dmamem, data->data, data->len); + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREWRITE); + } + + /* Write DMA buffer address register. */ + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRL, sc->sc_physaddr & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRH, sc->sc_physaddr >> 16); + } else + /* Set PIO transfer mode. */ + xfer |= MV_SDIO_XFER_PIO; + + /* + * Prepare Auto-CMD12. This command is automatically sent to the card + * by the host controller to stop multiple-block data transaction. + */ + if (sc->sc_req->stop) { + stop = sc->sc_req->stop; + + /* Set Auto-CMD12 argument. */ + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGL, stop->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGH, stop->arg >> 16); + + /* Set Auto-CMD12 opcode. */ + autocmd12reg = MV_SDIO_AUTOCMD12_INDEX(stop->opcode); + + /* Check busy signal if needed. */ + if (stop->flags & MMC_RSP_BUSY) + autocmd12reg |= MV_SDIO_AUTOCMD12_BUSY_CHECK; + /* Check Auto-CMD12 index. */ + if (stop->flags & MMC_RSP_OPCODE) + autocmd12reg |= MV_SDIO_AUTOCMD12_INDEX_CHECK; + + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12, autocmd12reg); + + xfer |= MV_SDIO_XFER_AUTOCMD12; + } + + /* Change data direction. */ + if (data->flags & MMC_DATA_READ) + xfer |= MV_SDIO_XFER_TO_HOST; + + /* Write transfer mode register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + return (0); +} + +static void +mv_sdio_handle_136bit_resp(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + uint32_t resp[8]; + uint32_t base, extra; + int i, j, off; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + + /* Collect raw response from the controller. */ + for (i = 0; i < 8; i++) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + + /* Response passed to MMC bus is shifted by one byte. */ + extra = 0; + for (i = 0, j = 7; i < 4; i++, j -= 2) { + off = (i ? 0 : 2); + base = resp[j] | (resp[j - 1] << (16 - off)); + cmd->resp[3 - i] = (base << (6 + off)) + extra; + extra = base >> (26 - off); + } +} + +static void +mv_sdio_handle_48bit_resp(struct mv_sdio_softc *sc, struct mmc_command *stop) +{ + struct mmc_command *cmd; + uint32_t resp[3], word; + uint8_t *rp; + int i; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (stop == NULL) + cmd = sc->sc_curcmd; + else + cmd = stop; + + /* Collect raw response from the controller. */ + for (i = 0; i < 3; i++) { + if (stop == NULL) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + else + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_AUTOCMD12_RSP(i)); + } + + /* Clear MMC bus response buffer. */ + bzero(&cmd->resp[0], 4 * sizeof(uint32_t)); + + /* + * Fill MMC bus response buffer. + */ + + rp = (uint8_t *)&cmd->resp[0]; + + /* Response bits [45:14] */ + word = (resp[1] & MV_SDIO_RSP48_BM16) | + ((resp[0] & MV_SDIO_RSP48_BM16) << 16); + + /* Response bits [15:14] and [13:8] */ + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | + ((word & MV_SDIO_RSP48_BM2) << 6); + + /* Response bits [15:14] are already included. */ + word >>= 2; + + /* Response bits [45:16] */ + memcpy(rp, &word, sizeof(uint32_t)); +} + +static void +mv_sdio_intr(void *arg) +{ + struct mv_sdio_softc *sc; + uint32_t irq_stat, eirq_stat; + + sc = (struct mv_sdio_softc *)arg; +#if 0 + device_printf(sc->sc_dev,"intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n", + MV_SDIO_RD4( sc, MV_SDIO_IRQ_SR ) , + MV_SDIO_RD4( sc, MV_SDIO_IRQ_EN ), + MV_SDIO_RD4( sc, MV_SDIO_HOST_SR )); +#endif + + + mtx_lock(&sc->sc_mtx); + + + + irq_stat = MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & sc->sc_irq_mask; + eirq_stat = MV_SDIO_RD4(sc, MV_SDIO_EIRQ_SR) & sc->sc_eirq_mask; + + /* + * In case of error interrupt, interrupt cause will be identified by + * checking bits in error interrupt status register. + */ + irq_stat &= ~MV_SDIO_IRQ_ERR; + + /* Handle command interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_CMD) || + (eirq_stat & MV_SDIO_EIRQS_CMD)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_cmd_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_CMD; + eirq_stat &= ~MV_SDIO_EIRQS_CMD; + } + + /* Handle data interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_DATA) || + (eirq_stat & MV_SDIO_EIRQS_DATA)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_data_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_DATA; + eirq_stat &= ~MV_SDIO_EIRQS_DATA; + } + + /* Handle unexpected interrupts. */ + if (irq_stat) { + device_printf(sc->sc_dev, "Unexpected interrupt(s)! " + "IRQ SR = 0x%08x\n", irq_stat); + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + } + if (eirq_stat) { + device_printf(sc->sc_dev, "Unexpected error interrupt(s)! " + "EIRQ SR = 0x%08x\n", eirq_stat); + /* Clear error interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + } + + mtx_unlock(&sc->sc_mtx); +} + +static void +mv_sdio_cmd_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got command interrupt, but there " + "is no active command!\n"); + return; + } + + /* Handle unexpected response error. */ + if (irq & MV_SDIO_IRQ_UNEXPECTED_RSP) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Unexpected response!\n"); + } + + /* Handle errors. */ + if (eirq & MV_SDIO_EIRQ_CMD_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Error - command %d timeout!\n", + sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_CMD_CRC7) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "checksum!\n", sc->sc_curcmd->opcode); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Command %d error!\n", + sc->sc_curcmd->opcode); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + if (irq & MV_SDIO_IRQ_CMD) + mv_sdio_finish_command(sc); +} + +static void +mv_sdio_data_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + struct mmc_command *stop; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active command.\n"); + return; + } + if ((!sc->sc_curcmd->data) && ((sc->sc_curcmd->flags & + MMC_RSP_BUSY) == 0)) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active data transaction.n\n"); + sc->sc_curcmd->error = MMC_ERR_FAILED; + return; + } + + /* Handle errors. */ + if(eirq & MV_SDIO_EIRQ_DATA_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Data %s timeout!\n", + (sc->sc_curcmd->data->flags & MMC_DATA_READ) ? "read" : + "write"); + } else if (eirq & (MV_SDIO_EIRQ_DATA_CRC16 | + MV_SDIO_EIRQ_DATA_ENDBIT)) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Bad data checksum!\n"); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Data error!: 0x%04X \n", + eirq); + + if( 0 != ( eirq & MV_SDIO_EIRQ_CRC_STAT ) ) + { + device_printf(sc->sc_dev, "MV_SDIO_EIRQ_CRC_STAT\n"); + } + } + + /* Handle Auto-CMD12 error. */ + if (eirq & MV_SDIO_EIRQ_AUTOCMD12) { + sc->sc_req->stop->error = MMC_ERR_FAILED; + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Auto-CMD12 error!\n"); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + /* Handle PIO interrupt. */ + if (irq & (MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_RX_FULL)) + mv_sdio_transfer_pio(sc); + + /* Handle DMA interrupt. */ + if (irq & (MV_SDIO_IRQ_DMA)) { + /* Synchronize DMA buffer. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_TO_HOST) { + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTWRITE); + memcpy(sc->sc_curcmd->data->data, sc->sc_dmamem, + sc->sc_curcmd->data->len); + } else + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTREAD); + + /* Disable DMA interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_DMA; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Handle Auto-CMD12 interrupt. */ + if (irq & (MV_SDIO_IRQ_AUTOCMD12)) { + stop = sc->sc_req->stop; + /* Get 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, stop); + + /* Disable Auto-CMD12 interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_AUTOCMD12; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Transfer finished. Disable interrupts and finalize request. */ + if (irq & (MV_SDIO_IRQ_XFER)) { + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static void +mv_sdio_disable_intr(struct mv_sdio_softc *sc) +{ + + /* Disable interrupts that were enabled. */ + sc->sc_irq_mask &= ~(sc->sc_irq_mask); + sc->sc_eirq_mask &= ~(sc->sc_eirq_mask); + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); +} + +static void +mv_sdio_card_task(void *arg, int pending) +{ + struct mv_sdio_softc *sc; + + int device_probe_and_attach_ret_val = 0; + + sc = (struct mv_sdio_softc *)arg; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_card_present) { + if (sc->sc_child) { + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host controller's registers. */ + mv_sdio_init(sc->sc_dev); + + sc->sc_child = device_add_child(sc->sc_dev, "mmc", -1); + if (sc->sc_child == NULL) { + device_printf(sc->sc_dev, "Could not add MMC bus!\n"); + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + + mtx_unlock(&sc->sc_mtx); + + device_probe_and_attach_ret_val = device_probe_and_attach(sc->sc_child); + + if( 0 != device_probe_and_attach_ret_val ) { + device_printf(sc->sc_dev, "MMC bus failed on probe " + "and attach! %i\n",device_probe_and_attach_ret_val); + device_delete_child(sc->sc_dev, sc->sc_child); + sc->sc_child = NULL; + } + } else { + if (sc->sc_child == NULL) { + mtx_unlock(&sc->sc_mtx); + return; + } + + mtx_unlock(&sc->sc_mtx); + if (device_delete_child(sc->sc_dev, sc->sc_child) != 0) { + device_printf(sc->sc_dev, "Could not delete MMC " + "bus!\n"); + } + sc->sc_child = NULL; + } +} + +static uint32_t +mv_sdio_read_fifo(struct mv_sdio_softc *sc) +{ + uint32_t data; + device_printf(sc->sc_dev, "This is not tested, yet MV_SDIO_FIFO not ensured\n "); + + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data = MV_SDIO_RD4(sc, MV_SDIO_FIFO); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data |= (MV_SDIO_RD4(sc, MV_SDIO_FIFO) << 16); + return data; +} + +static void +mv_sdio_write_fifo(struct mv_sdio_softc *sc, uint32_t val) +{ + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val & 0xffff); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val >> 16); +} + +static void +mv_sdio_transfer_pio(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + + cmd = sc->sc_curcmd; + + if (cmd->data->flags & MMC_DATA_READ) { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_RX_FULL) { + mv_sdio_read_block_pio(sc); + /* + * Assert delay after each block transfer to meet read + * access timing constraint. + */ + DELAY(MV_SDIO_RD_DELAY); + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks read in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_RX_FULL; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_TX_EMPTY) { + mv_sdio_write_block_pio(sc); + /* Wait while card is programming the memory. */ + while ((MV_SDIO_RD4(sc, MV_SDIO_HOST_SR) & + MV_SDIO_HOST_SR_CARD_BUSY)); + /* + * Assert delay after each block transfer to meet + * write access timing constraint. + */ + DELAY(MV_SDIO_WR_DELAY); + + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks written in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_TX_EMPTY; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } +} + +static void +mv_sdio_read_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + buffer[0] = data; + buffer[1] = (data >> 8); + buffer[2] = (data >> 16); + buffer[3] = (data >> 24); + buffer += 4; + left -= 4; + } + } else { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + *((uint32_t *)buffer) = data; + buffer += 4; + left -= 4; + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = mv_sdio_read_fifo(sc); + while (left > 0) { + *(buffer++) = data; + data >>= 8; + left--; + } + } +} + +static void +mv_sdio_write_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data = 0; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = buffer[0] + + (buffer[1] << 8) + + (buffer[2] << 16) + + (buffer[3] << 24); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } else { + while (left > 3) { + data = *((uint32_t *)buffer); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = 0; + while (left > 0) { + data <<= 8; + data += *(buffer++); + left--; + } + mv_sdio_write_fifo(sc, data); + } +} + +static int +mv_sdio_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + + sc = device_get_softc(dev); + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + *(int *)result = host->ios.bus_mode; + break; + case MMCBR_IVAR_BUS_WIDTH: + *(int *)result = host->ios.bus_width; + break; + case MMCBR_IVAR_CHIP_SELECT: + *(int *)result = host->ios.chip_select; + break; + case MMCBR_IVAR_CLOCK: + *(int *)result = host->ios.clock; + break; + case MMCBR_IVAR_F_MIN: + *(int *)result = host->f_min; + break; + case MMCBR_IVAR_F_MAX: + *(int *)result = host->f_max; + break; + case MMCBR_IVAR_HOST_OCR: + *(int *)result = host->host_ocr; + break; + case MMCBR_IVAR_MODE: + *(int *)result = host->mode; + break; + case MMCBR_IVAR_OCR: + *(int *)result = host->ocr; + break; + case MMCBR_IVAR_POWER_MODE: + *(int *)result = host->ios.power_mode; + break; + case MMCBR_IVAR_VDD: + *(int *)result = host->ios.vdd; + break; + case MMCBR_IVAR_CAPS: + *(int *)result = host->caps; + break; + case MMCBR_IVAR_TIMING: + *(int *)result = host->ios.timing; + break; + case MMCBR_IVAR_MAX_DATA: + mtx_lock(&sc->sc_mtx); + /* Return maximum number of blocks the driver can handle. */ + if (sc->sc_use_dma) + *(int *)result = (sc->sc_dma_size / + MV_SDIO_BLOCK_SIZE); + else + *(int *)result = MV_SDIO_BLOCKS_MAX; + mtx_unlock(&sc->sc_mtx); + break; + default: + return (EINVAL); + } + + return (0); +} + +static int +mv_sdio_write_ivar(device_t dev, device_t child, int index, uintptr_t value) +{ + struct mmc_host *host; + + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + host->ios.bus_mode = value; + break; + case MMCBR_IVAR_BUS_WIDTH: + host->ios.bus_width = value; + break; + case MMCBR_IVAR_CHIP_SELECT: + host->ios.chip_select = value; + break; + case MMCBR_IVAR_CLOCK: + host->ios.clock = value; + break; + case MMCBR_IVAR_MODE: + host->mode = value; + break; + case MMCBR_IVAR_OCR: + host->ocr = value; + break; + case MMCBR_IVAR_POWER_MODE: + host->ios.power_mode = value; + break; + case MMCBR_IVAR_VDD: + host->ios.vdd = value; + break; + case MMCBR_IVAR_TIMING: + host->ios.timing = value; + break; + case MMCBR_IVAR_CAPS: + case MMCBR_IVAR_HOST_OCR: + case MMCBR_IVAR_F_MIN: + case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: + default: + /* Instance variable not writable. */ + return (EINVAL); + } + + return (0); +} + diff --git a/sys/arm/mv/mv_sdio.h b/sys/arm/mv/mv_sdio.h new file mode 100644 index 0000000..b54b59d --- /dev/null +++ b/sys/arm/mv/mv_sdio.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _MVSDMMC_INCLUDE +#define _MVSDMMC_INCLUDE + + +#define MVSDMMC_DMA_SIZE 65536 + + + +/* + * The base MMC clock rate + */ + +#define MVSDMMC_CLOCKRATE_MIN 100000 +#define MVSDMMC_CLOCKRATE_MAX 50000000 + +#define MVSDMMC_BASE_FAST_CLOCK 200000000 + + +/* + * SDIO register + */ + +#define MV_SDIO_DMA_ADDRL 0x000 +#define MV_SDIO_DMA_ADDRH 0x004 +#define MV_SDIO_BLK_SIZE 0x008 +#define MV_SDIO_BLK_COUNT 0x00c +#define MV_SDIO_CMD 0x01c +#define MV_SDIO_CMD_ARGL 0x010 +#define MV_SDIO_CMD_ARGH 0x014 +#define MV_SDIO_XFER 0x018 +#define MV_SDIO_HOST_SR 0x048 +#define MV_SDIO_HOST_CR 0x050 +#define MV_SDIO_SW_RESET 0x05c +#define MV_SDIO_IRQ_SR 0x060 +#define MV_SDIO_EIRQ_SR 0x064 +#define MV_SDIO_IRQ_SR_EN 0x068 +#define MV_SDIO_EIRQ_SR_EN 0x06c +#define MV_SDIO_IRQ_EN 0x070 +#define MV_SDIO_EIRQ_EN 0x074 +#define MV_SDIO_AUTOCMD12_ARGL 0x084 +#define MV_SDIO_AUTOCMD12_ARGH 0x088 +#define MV_SDIO_AUTOCMD12 0x08c +#define MV_SDIO_CLK_DIV 0x128 +#define MV_SDIO_FIFO 0xa2100 /* FIXME!!! */ + +#define MV_SDIO_RSP(i) (0x020 + ((i)<<2)) +#define MV_SDIO_AUTOCMD12_RSP(i) (0x090 + ((i)<<2)) + +/* + * SDIO Status-Register + */ +#define MV_SDIO_HOST_SR_CARD_BUSY (1<<1) +#define MV_SDIO_HOST_SR_FIFO_EMPTY (1<<13) + + + +/* + * SDIO_CMD + */ +#define MV_SDIO_CMD_RSP_NONE (0 << 0) +#define MV_SDIO_CMD_RSP_136 (1 << 0) +#define MV_SDIO_CMD_RSP_48 (2 << 0) +#define MV_SDIO_CMD_RSP_48_BUSY (3 << 0) +#define MV_SDIO_CMD_DATA_CRC16 (1<<2) +#define MV_SDIO_CMD_CRC7 (1<<3) +#define MV_SDIO_CMD_INDEX_CHECK (1<<4) +#define MV_SDIO_CMD_DATA_PRESENT (1<<5) +#define MV_SDIO_CMD_UNEXPECTED_RSP (1<<7) +#define MV_SDIO_CMD_INDEX(x) ( (x) << 8 ) + + +/* + * SDIO_XFER_MODE + */ +#define MV_SDIO_XFER_STOP_CLK (1 << 5) +#define MV_SDIO_XFER_TO_HOST (1 << 4) +#define MV_SDIO_XFER_PIO (1 << 3) +#define MV_SDIO_XFER_AUTOCMD12 (1 << 2) +#define MV_SDIO_XFER_SW_WR_EN (1 << 1) + +/* + * SDIO_HOST_CTRL + */ +#define MV_SDIO_HOST_CR_PUSHPULL (1 << 0) +#define MV_SDIO_HOST_CR_MMC (3 << 1) +#define MV_SDIO_HOST_CR_BE (1 << 3) +#define MV_SDIO_HOST_CR_4BIT (1 << 9) +#define MV_SDIO_HOST_CR_HIGHSPEED (1 << 10) + +#define MV_SDIO_HOST_CR_TMOVAL(x) ((x) << 11) +#define MV_SDIO_HOST_CR_TMO ( 1 << 15 ) + +/* + * NORmal status bits + */ + + +#define MV_SDIO_IRQ_ERR (1<<15) +#define MV_SDIO_IRQ_UNEXPECTED_RSP (1<<14) +#define MV_SDIO_IRQ_AUTOCMD12 (1<<13) +#define MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN (1<<12) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL (1<<11) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED (1<<10) +#define MV_SDIO_IRQ_READ_WAIT (1<<9) +#define MV_SDIO_IRQ_CARD_EVENT (1<<8) +#define MV_SDIO_IRQ_RX_FULL (1<<5) +#define MV_SDIO_IRQ_TX_EMPTY (1<<4) +#define MV_SDIO_IRQ_DMA (1<<3) +#define MV_SDIO_IRQ_BLOCK_GAP (1<<2) +#define MV_SDIO_IRQ_XFER (1<<1) +#define MV_SDIO_IRQ_CMD (1<<0) + +#define MV_SDIO_IRQ_ALL (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_BLOCK_GAP | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_CARD_EVENT | MV_SDIO_IRQ_READ_WAIT | MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED | MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL | MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN | MV_SDIO_IRQ_AUTOCMD12 | MV_SDIO_IRQ_UNEXPECTED_RSP | MV_SDIO_IRQ_ERR ) + +//#define MV_SDIO_IRQ_SR + + +/* + * ERR status bits + */ +#define MV_SDIO_EIRQ_CRC_STAT (1<<14) +#define MV_SDIO_EIRQ_CRC_STARTBIT (1<<13) +#define MV_SDIO_EIRQ_CRC_ENDBIT (1<<12) +#define MV_SDIO_EIRQ_RSP_TBIT (1<<11) +#define MV_SDIO_EIRQ_XFER_SIZE (1<<10) +#define MV_SDIO_EIRQ_CMD_STARTBIT (1<<9) +#define MV_SDIO_EIRQ_AUTOCMD12 (1<<8) +#define MV_SDIO_EIRQ_DATA_ENDBIT (1<<6) +#define MV_SDIO_EIRQ_DATA_CRC16 (1<<5) +#define MV_SDIO_EIRQ_DATA_TMO (1<<4) +#define MV_SDIO_EIRQ_CMD_INDEX (1<<3) +#define MV_SDIO_EIRQ_CMD_ENDBIT (1<<2) +#define MV_SDIO_EIRQ_CMD_CRC7 (1<<1) +#define MV_SDIO_EIRQ_CMD_TMO (1<<0) + +#define MV_SDIO_EIRQ_ALL (MV_SDIO_EIRQ_CMD_TMO | \ + MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | \ + MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | \ + MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | \ + MV_SDIO_EIRQ_CMD_STARTBIT |\ + MV_SDIO_EIRQ_XFER_SIZE |\ + MV_SDIO_EIRQ_RSP_TBIT |\ + MV_SDIO_EIRQ_CRC_ENDBIT |\ + MV_SDIO_EIRQ_CRC_STARTBIT |\ + MV_SDIO_EIRQ_CRC_STAT) + +/* AUTOCMD12 register values */ +#define MV_SDIO_AUTOCMD12_BUSY_CHECK (1<<0) +#define MV_SDIO_AUTOCMD12_INDEX_CHECK (1<<1) +#define MV_SDIO_AUTOCMD12_INDEX(x) (x<<8) + +/* Software reset register */ +#define MV_SDIO_SW_RESET_ALL (1<<8) + +/* */ +#define MV_SDIO_SIG_CD 1 +#define MV_SDIO_SIG_WP 2 + +#endif /* _MVSDMMC_INCLUDE */ + diff --git a/sys/boot/uboot/common/main.c b/sys/boot/uboot/common/main.c index 82c86b2..0a5b368 100644 --- a/sys/boot/uboot/common/main.c +++ b/sys/boot/uboot/common/main.c @@ -122,6 +122,7 @@ main(void) struct api_signature *sig = NULL; int i; struct open_file f; + char *ub_currdev; if (!api_search_sig(&sig)) return (-1); @@ -166,6 +167,7 @@ main(void) printf("(%s, %s)\n", bootprog_maker, bootprog_date); meminfo(); + ub_currdev = ub_env_get("currdev"); /* * March through the device switch probing for things. */ @@ -198,8 +200,13 @@ main(void) if (devsw[i] == NULL) panic("No boot device found!"); - env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), - uboot_setcurrdev, env_nounset); + if (ub_currdev) { + env_setenv("currdev", EV_VOLATILE, ub_currdev, + uboot_setcurrdev, env_nounset); + } else { + env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), + uboot_setcurrdev, env_nounset); + } env_setenv("loaddev", EV_VOLATILE, uboot_fmtdev(&currdev), env_noset, env_nounset); diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index f101e65..5016828 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -67,15 +67,32 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include + #include "mmcbr_if.h" #include "mmcbus_if.h" +/* CIS structure of SDIO card */ +struct sdio_function { + int number; + uint8_t cis1_major; + uint8_t cis1_minor; + uint16_t manufacturer; + uint16_t product; + uint16_t fn0_blksize; + uint8_t max_tran_speed; + STAILQ_ENTRY(sdio_function) sdiof_list; +}; + struct mmc_softc { device_t dev; struct mtx sc_mtx; struct intr_config_hook config_intrhook; device_t owner; uint32_t last_rca; + uint8_t sdio_nfunc; + struct sdio_function sdio_func0; + STAILQ_HEAD(, sdio_function) sdiof_head; }; /* @@ -96,11 +113,13 @@ struct mmc_ivars { u_char read_only; /* True when the device is read-only */ u_char bus_width; /* Bus width to use */ u_char timing; /* Bus timing support */ + uint8_t mem_present; /* Is memory present */ u_char high_cap; /* High Capacity card (block addressed) */ uint32_t sec_count; /* Card capacity in 512byte blocks */ uint32_t tran_speed; /* Max speed in normal mode */ uint32_t hs_tran_speed; /* Max speed in high speed mode */ uint32_t erase_sector; /* Card native erase sector size */ + uint8_t sdio_numfunc; /* Number of IO functions */ char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ }; @@ -159,10 +178,15 @@ static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, int size); static int mmc_highest_voltage(uint32_t ocr); static void mmc_idle_cards(struct mmc_softc *sc); +static int mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn); +static int mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, + uint32_t adr, uint8_t *data); static void mmc_ms_delay(int ms); static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); static void mmc_power_down(struct mmc_softc *sc); static void mmc_power_up(struct mmc_softc *sc); +static int mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, + uint8_t *nfunc, uint8_t *mem_present); static void mmc_rescan_cards(struct mmc_softc *sc); static void mmc_scan(struct mmc_softc *sc); static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, @@ -220,6 +244,8 @@ mmc_attach(device_t dev) sc->dev = dev; MMC_LOCK_INIT(sc); + STAILQ_INIT(&sc->sdiof_head); + /* We'll probe and attach our children later, but before / mount */ sc->config_intrhook.ich_func = mmc_delayed_attach; sc->config_intrhook.ich_arg = sc; @@ -470,6 +496,7 @@ mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, return (0); } +/* CMD0 */ static void mmc_idle_cards(struct mmc_softc *sc) { @@ -494,6 +521,7 @@ mmc_idle_cards(struct mmc_softc *sc) mmc_ms_delay(1); } +/* CMD41 -> CMD55 */ static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -521,6 +549,7 @@ mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD1 */ static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -548,6 +577,7 @@ mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD8 */ static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) { @@ -600,6 +630,7 @@ mmc_power_down(struct mmc_softc *sc) mmcbr_update_ios(dev); } +/* CMD7 */ static int mmc_select_card(struct mmc_softc *sc, uint16_t rca) { @@ -1042,6 +1073,7 @@ mmc_app_decode_sd_status(uint32_t *raw_sd_status, sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); } +/* CMD2 */ static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) { @@ -1162,6 +1194,7 @@ mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) return (err); } +/* CMD3 */ static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) { @@ -1177,6 +1210,7 @@ mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) return (err); } +/* CMD13 */ static int mmc_send_status(struct mmc_softc *sc, uint16_t rca, uint32_t *status) { @@ -1223,6 +1257,287 @@ mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) ivar->read_only ? ", read-only" : ""); } +static int +mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn) +{ + int err, i; + uint8_t funcs; + + /* XXX Check if function number is valid */ + + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_FN_READY, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error reading SDIO func ready %d\n", err); + return (err); + } + funcs |= 1 << fn; + err = mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_FN_ENABLE, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error writing SDIO func enable %d\n", err); + return (err); + } + + funcs = 0; + for(i=0; i < 10; i++) { + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_FN_READY, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error reading SDIO func ready %d\n", err); + return (err); + } + + if (funcs & (1 << fn)) + return 0; + pause("mmc_io_func_enable", 100); + } + + device_printf(sc->dev, "Cannot enable function %d!\n", fn); + return 1; +} + +static int +mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *data) +{ + struct mmc_command cmd; + int err; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = SD_IO_RW_DIRECT; + cmd.arg = SD_IO_RW_FUNC(fn) | SD_IO_RW_ADR(adr); + if (wr) + cmd.arg |= SD_IO_RW_WR | SD_IO_RW_RAW | SD_IO_RW_DAT(*data); + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.data = NULL; + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + /* Just for information... */ + if (R5_IO_CURRENT_STATE(cmd.resp[0]) != 1) + printf("!!! SDIO state %d\n", R5_IO_CURRENT_STATE(cmd.resp[0])); + + *data = (uint8_t) (cmd.resp[0] & 0xff); + return (MMC_ERR_NONE); +} + +/* CMD52 */ +static uint8_t +mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr) +{ + int err; + uint8_t val = 0; + + err = mmc_io_rw_direct(sc, 0, fn, adr, &val); + if (err) { + device_printf(sc->dev, "Err reading FN %d addr 0x%08X: %d", + fn, adr, err); + return (0xff); + } + return val; +} + +/* + * Parse Card Information Structure of the SDIO card. + * Both Function 0 CIS and Function 1-7 CIS are supported. + */ +static int +mmc_io_parse_cis(struct mmc_softc *sc, uint8_t func, uint32_t cisptr, struct sdio_function *sdio_func) +{ + uint32_t tmp; + + uint8_t tuple_id, tuple_len, func_id; + uint32_t addr, maninfo_p; + + char *cis1_info[4]; + int start, i, ch, count; + char cis1_info_buf[256]; + + sdio_func->number = func; + + cis1_info[0] = NULL; + cis1_info[1] = NULL; + cis1_info[2] = NULL; + cis1_info[3] = NULL; + memset(cis1_info_buf, 0, 256); + + tmp = 0; + addr = cisptr; + + /* + * XXX Some parts of this code are taken + * from sys/dev/pccard/pccard_cis.c. + * Need to think about making it more abstract. + */ + do { + tuple_id = mmc_io_read_1(sc, 0, addr++); + if (tuple_id == SD_IO_CISTPL_END) + break; + tuple_len = mmc_io_read_1(sc, 0, addr++); + if (tuple_len == 0 && tuple_id != 0x00) { + device_printf(sc->dev, + "Parse error: 0-length tuple %02X\n", tuple_id); + break; + } + + switch (tuple_id) { + case SD_IO_CISTPL_VERS_1: + maninfo_p = addr; + + sdio_func->cis1_major = mmc_io_read_1(sc, 0, maninfo_p); + sdio_func->cis1_minor = mmc_io_read_1(sc, 0, maninfo_p + 1); + + for (count = 0, start = 0, i = 0; + (count < 4) && ((i + 4) < 256); i++) { + ch = mmc_io_read_1(sc, 0, maninfo_p + 2 + i); + if (ch == 0xff) + break; + cis1_info_buf[i] = ch; + if (ch == 0) { + cis1_info[count] = + cis1_info_buf + start; + start = i + 1; + count++; + } + } + + /* + * At least on Dreamplug there is only crap + * in these strings... + */ + device_printf(sc->dev, "*** Info[0]: %s\n", cis1_info[0]); + device_printf(sc->dev, "*** Info[1]: %s\n", cis1_info[1]); + device_printf(sc->dev, "*** Info[2]: %s\n", cis1_info[2]); + device_printf(sc->dev, "*** Info[3]: %s\n", cis1_info[3]); + break; + + case SD_IO_CISTPL_MANFID: + if (tuple_len < 4) { + device_printf(sc->dev, "MANFID is too short\n"); + break; + } + sdio_func->manufacturer = mmc_io_read_1(sc, 0, addr); + sdio_func->manufacturer |= mmc_io_read_1(sc, 0, addr + 1) << 8; + + sdio_func->product = mmc_io_read_1(sc, 0, addr + 2); + sdio_func->product |= mmc_io_read_1(sc, 0, addr + 3) << 8; + break; + + case SD_IO_CISTPL_FUNCID: + /* Function ID for SDIO devices is always 0x0C */ + if (tuple_len < 1) { + device_printf(sc->dev, "FUNCID is too short\n"); + break; + } + func_id = mmc_io_read_1(sc, 0, addr); + if (func_id != 0x0C) + device_printf(sc->dev, "func_id non-std: %d\n", func_id); + break; + + case SD_IO_CISTPL_FUNCE: + if (tuple_len < 4) { + device_printf(sc->dev, "FUNCE is too short\n"); + break; + } + uint8_t ext_data_type = mmc_io_read_1(sc, 0, addr); + + if (func == 0) { + if (ext_data_type != 0x0) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + sdio_func->fn0_blksize = mmc_io_read_1(sc, 0, addr + 1); + sdio_func->fn0_blksize |= mmc_io_read_1(sc, 0, addr + 2) << 8; + + sdio_func->max_tran_speed = mmc_io_read_1(sc, 0, addr + 3); + /* XXX Do we need this? If yes, need to store in sdio_func */ + uint8_t max_tran_rate = sdio_func->max_tran_speed & 0x3; + uint8_t timecode = (sdio_func->max_tran_speed >> 3) & 0xF; + + device_printf(sc->dev, + "*** Max tran rate %d, timecode %d\n", + max_tran_rate, timecode); + } else { + /* ext_data_type is 1 here */ + /* + * XXX Do we need any information from FUNCE + * for non-0 functions? + */ + device_printf(sc->dev, + "Not parsing FUNCE for func != 0\n"); + } + + break; + + default: + device_printf(sc->dev, + "*** Skipping tuple ID %02X len %02X\n", + tuple_id, tuple_len); + break; + } + + addr += tuple_len; + tmp++; + } while (tuple_id != SD_IO_CISTPL_END && tmp < 10); + + return 0; +} + +/* + * Parse Card Common Control Register of the SDIO card + */ +static int +mmc_io_parse_cccr(struct mmc_softc *sc) +{ + uint32_t cisptr = 0; + + cisptr = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR); + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in CCCR: %08X\n", cisptr); + return (-1); + } + + return mmc_io_parse_cis(sc, 0, cisptr, &sc->sdio_func0); +} + +/* + * Parse Function Basic Register of the given function + */ +static int +mmc_io_parse_fbr(struct mmc_softc *sc, uint8_t func) +{ + uint32_t fbr_addr, cisptr; + + fbr_addr = SD_IO_FBR_START * func + 0x9; + cisptr = mmc_io_read_1(sc, 0, fbr_addr); + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in FBR: %08X\n", cisptr); + return (-1); + } + + struct sdio_function *f = malloc(sizeof(struct sdio_function), M_DEVBUF, M_WAITOK); + STAILQ_INSERT_TAIL(&sc->sdiof_head, f, sdiof_list); + + return mmc_io_parse_cis(sc, func, cisptr, f); +} + static void mmc_discover_cards(struct mmc_softc *sc) { @@ -1233,11 +1548,59 @@ mmc_discover_cards(struct mmc_softc *sc) device_t child; uint16_t rca = 2; u_char switch_res[64]; + uint8_t nfunc, mem_present; if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing cards\n"); while (1) { - err = mmc_all_send_cid(sc, raw_cid); + /* + * Probe SDIO first, because SDIO cards don't have + * a CID register and won't respond to the CMD2 + */ + mmc_idle_cards(sc); + err = mmc_probe_sdio(sc, 0, NULL, &nfunc, &mem_present); + sc->sdio_nfunc = nfunc; + if (err != MMC_ERR_NONE && err != MMC_ERR_TIMEOUT) { + device_printf(sc->dev, "Error probing SDIO %d\n", err); + break; + } + + /* The card answered OK -> SDIO */ + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "Detected SDIO card\n"); + ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, + M_WAITOK | M_ZERO); + mmc_send_relative_addr(sc, &resp); /* CMD3 */ + ivar->rca = resp >> 16; + err = mmc_select_card(sc, ivar->rca); /* CMD7 */ + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error selecting SDIO %d\n", err); + break; + } + + device_printf(sc->dev, "Get card info\n"); + mmc_io_parse_cccr(sc); + for(i=1; i <= nfunc; i++) { + device_printf(sc->dev, + "Get info for function %d\n", i); + mmc_io_parse_fbr(sc, i); + mmc_io_func_enable(sc, i); + } + + device_printf(sc->dev, "=== Functions ===\n"); + struct sdio_function *f; + + STAILQ_FOREACH(f, &sc->sdiof_head, sdiof_list) + device_printf(sc->dev, + "FN %d, vendor %04X, product %04X\n", + f->number, f->manufacturer, f->product + ); + + if (!mem_present) + return; + } + + err = mmc_all_send_cid(sc, raw_cid); /* Command 2 */ if (err == MMC_ERR_TIMEOUT) break; if (err != MMC_ERR_NONE) { @@ -1491,9 +1854,49 @@ mmc_delete_cards(struct mmc_softc *sc) return (0); } +/* CMD 5 */ +static int +mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, uint8_t *nfunc, uint8_t *mem_present) { + struct mmc_command cmd; + int err = MMC_ERR_NONE, i; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = IO_SEND_OP_COND; + cmd.arg = 0; + cmd.flags = MMC_RSP_R4; + cmd.data = NULL; + + for (i = 0; i < 1000; i++) { + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err != MMC_ERR_NONE) + break; + if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || + (ocr & MMC_OCR_VOLTAGE) == 0) + break; + err = MMC_ERR_TIMEOUT; + mmc_ms_delay(10); + } + + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "No timeout: OCR %08X, here are the values:\n", cmd.resp[0]); + if (rocr) + *rocr = cmd.resp[0]; + if (nfunc) + *nfunc = cmd.resp[0] >> 28 & 0x7; + if (mem_present) + *mem_present = cmd.resp[0] >> 27 & 0x1; + + device_printf(sc->dev, "NF: %d\n", cmd.resp[0] >> 28 & 0x7); + device_printf(sc->dev, "MEM: %d\n", cmd.resp[0] >> 27 & 0x1); + } + + return (err); +} + static void mmc_go_discovery(struct mmc_softc *sc) { + uint8_t nfunc, mem_present; uint32_t ocr; device_t dev; int err; @@ -1509,17 +1912,24 @@ mmc_go_discovery(struct mmc_softc *sc) if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing bus\n"); mmc_idle_cards(sc); - err = mmc_send_if_cond(sc, 1); + err = mmc_send_if_cond(sc, 1); /* SD_SEND_IF_COND = 8 */ if ((bootverbose || mmc_debug) && err == 0) device_printf(sc->dev, "SD 2.0 interface conditions: OK\n"); - if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_probe_sdio(sc, 0, &ocr, &nfunc, &mem_present) == MMC_ERR_NONE) { + device_printf(dev, "SDIO probe OK (OCR: 0x%08x, %d functions, memory: %d)\n", ocr, nfunc, mem_present); + if (nfunc > 0 && mem_present) { + device_printf(sc->dev, "SDIO combo cards are not supported yet"); + return; + } + } else + if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* retry 55 -> then 41 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "SD probe: failed\n"); /* * Failed, try MMC */ mmcbr_set_mode(dev, mode_mmc); - if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* command 1 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "MMC probe: failed\n"); ocr = 0; /* Failed both, powerdown. */ @@ -1553,9 +1963,11 @@ mmc_go_discovery(struct mmc_softc *sc) * Reselect the cards after we've idled them above. */ if (mmcbr_get_mode(dev) == mode_sd) { - err = mmc_send_if_cond(sc, 1); - mmc_send_app_op_cond(sc, - (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + if (mem_present) { + err = mmc_send_if_cond(sc, 1); /* CMD 8 */ + mmc_send_app_op_cond(sc, /* 41 -> 55 */ + (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + } } else mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); mmc_discover_cards(sc); @@ -1637,7 +2049,7 @@ mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) return (EINVAL); case MMC_IVAR_DSR_IMP: *result = ivar->csd.dsr_imp; - break; + break; case MMC_IVAR_MEDIA_SIZE: *result = ivar->sec_count; break; @@ -1735,3 +2147,4 @@ DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_bcm, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_fdt, mmc_driver, mmc_devclass, NULL, NULL); +DRIVER_MODULE(mmc, sdio, mmc_driver, mmc_devclass, NULL, NULL); diff --git a/sys/dev/mmc/mmcioreg.h b/sys/dev/mmc/mmcioreg.h new file mode 100644 index 0000000..840a863 --- /dev/null +++ b/sys/dev/mmc/mmcioreg.h @@ -0,0 +1,95 @@ +/* $OpenBSD: sdmmc_ioreg.h,v 1.4 2007/06/02 01:48:37 uwe Exp $ */ +/* $FreeBSD$ */ + +/* + * Copyright (c) 2006 Uwe Stuehler + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SDMMC_IOREG_H +#define _SDMMC_IOREG_H + +/* SDIO commands */ /* response type */ +#define SD_IO_SEND_OP_COND 5 /* R4 */ +#define SD_IO_RW_DIRECT 52 /* R5 */ +#define SD_IO_RW_EXTENDED 53 /* R5? */ + +/* CMD52 arguments */ +#define SD_ARG_CMD52_READ (0<<31) +#define SD_ARG_CMD52_WRITE (1<<31) +#define SD_ARG_CMD52_FUNC_SHIFT 28 +#define SD_ARG_CMD52_FUNC_MASK 0x7 +#define SD_ARG_CMD52_EXCHANGE (1<<27) +#define SD_ARG_CMD52_REG_SHIFT 9 +#define SD_ARG_CMD52_REG_MASK 0x1ffff +#define SD_ARG_CMD52_DATA_SHIFT 0 +#define SD_ARG_CMD52_DATA_MASK 0xff +#define SD_R5_DATA(resp) ((resp)[0] & 0xff) + +/* CMD53 arguments */ +#define SD_ARG_CMD53_READ (0<<31) +#define SD_ARG_CMD53_WRITE (1<<31) +#define SD_ARG_CMD53_FUNC_SHIFT 28 +#define SD_ARG_CMD53_FUNC_MASK 0x7 +#define SD_ARG_CMD53_BLOCK_MODE (1<<27) +#define SD_ARG_CMD53_INCREMENT (1<<26) +#define SD_ARG_CMD53_REG_SHIFT 9 +#define SD_ARG_CMD53_REG_MASK 0x1ffff +#define SD_ARG_CMD53_LENGTH_SHIFT 0 +#define SD_ARG_CMD53_LENGTH_MASK 0x1ff +#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */ + +/* 48-bit response decoding (32 bits w/o CRC) */ +#define MMC_R4(resp) ((resp)[0]) +#define MMC_R5(resp) ((resp)[0]) + +/* SD R4 response (IO OCR) */ +#define SD_IO_OCR_MEM_READY (1<<31) +#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3) +/* XXX big fat memory present "flag" because we don't know better */ +#define SD_IO_OCR_MEM_PRESENT (0xf<<24) +#define SD_IO_OCR_MASK 0x00fffff0 + +/* Card Common Control Registers (CCCR) */ +#define SD_IO_CCCR_START 0x00000 +#define SD_IO_CCCR_SIZE 0x100 +#define SD_IO_CCCR_FN_ENABLE 0x02 +#define SD_IO_CCCR_FN_READY 0x03 +#define SD_IO_CCCR_INT_ENABLE 0x04 +#define SD_IO_CCCR_CTL 0x06 +#define CCCR_CTL_RES (1<<3) +#define SD_IO_CCCR_BUS_WIDTH 0x07 +#define CCCR_BUS_WIDTH_4 (1<<1) +#define CCCR_BUS_WIDTH_1 (1<<0) +#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ + +/* Function Basic Registers (FBR) */ +#define SD_IO_FBR_START 0x00100 +#define SD_IO_FBR_SIZE 0x00700 + +/* Card Information Structure (CIS) */ +#define SD_IO_CIS_START 0x01000 +#define SD_IO_CIS_SIZE 0x17000 + +/* CIS tuple codes (based on PC Card 16) */ +#define SD_IO_CISTPL_VERS_1 0x15 +#define SD_IO_CISTPL_MANFID 0x20 +#define SD_IO_CISTPL_FUNCID 0x21 +#define SD_IO_CISTPL_FUNCE 0x22 +#define SD_IO_CISTPL_END 0xff + +/* CISTPL_FUNCID codes */ +/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */ +/* #define SDMMC_FUNCTION_WLAN 0x0c */ +#endif diff --git a/sys/dev/mmc/mmcreg.h b/sys/dev/mmc/mmcreg.h index f454ddb..4b65d91 100644 --- a/sys/dev/mmc/mmcreg.h +++ b/sys/dev/mmc/mmcreg.h @@ -85,6 +85,8 @@ struct mmc_command { #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY) #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP(x) ((x) & MMC_RSP_MASK) @@ -151,6 +153,30 @@ struct mmc_command { #define R1_STATE_PRG 7 #define R1_STATE_DIS 8 +/* + * R5 responses + * + * Types (per SD 2.0 standard) + *e : error bit + *s : status bit + *r : detected and set for the actual command response + *x : Detected and set during command execution. The host can get + * the status by issuing a command with R1 response. + * + * Clear Condition (per SD 2.0 standard) + *a : according to the card current state. + *b : always related to the previous command. reception of a valid + * command will clear it (with a delay of one command). + *c : clear by read + */ +#define R5_COM_CRC_ERROR (1u << 15)/* er, b */ +#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */ +#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */ +#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12) +#define R5_ERROR (1u << 11)/* erx, c */ +#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */ +#define R5_OUT_OF_RANGE (1u << 8)/* er, c */ + struct mmc_data { size_t len; /* size of the data */ size_t xfer_len; @@ -181,7 +207,7 @@ struct mmc_request { #define MMC_SET_RELATIVE_ADDR 3 #define SD_SEND_RELATIVE_ADDR 3 #define MMC_SET_DSR 4 - /* reserved: 5 */ +#define IO_SEND_OP_COND 5 #define MMC_SWITCH_FUNC 6 #define MMC_SWITCH_FUNC_CMDS 0 #define MMC_SWITCH_FUNC_SET 1 @@ -335,6 +361,20 @@ struct mmc_request { #define SD_MAX_HS 50000000 +/* + * SDIO Direct & Extended I/O + */ +#define SD_IO_RW_WR (1u << 31) +#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28) +#define SD_IO_RW_RAW (1u << 27) +#define SD_IO_RW_INCR (1u << 26) +#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9) +#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0) +#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0) + +#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0) +#define SD_IOE_RW_BLK (1u << 27) + /* OCR bits */ /* From owner-freebsd-arm@FreeBSD.ORG Tue Jul 2 22:33:28 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 278774E1 for ; Tue, 2 Jul 2013 22:33:28 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-oa0-f53.google.com (mail-oa0-f53.google.com [209.85.219.53]) by mx1.freebsd.org (Postfix) with ESMTP id E8D7D1A0D for ; Tue, 2 Jul 2013 22:33:27 +0000 (UTC) Received: by mail-oa0-f53.google.com with SMTP id k14so7062958oag.40 for ; Tue, 02 Jul 2013 15:33:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=/NicFPFgkYrsuR5+cKwpx+ph1WKNjLeegrz9vfBAk5s=; b=j+i1Penmro88PEraxKdknyIX71iakmp2+2Gr9mCmR0RIo3Ix5qf4SJmY5ET22bHoP/ MjcCWKarMXchj13ng6w9DQT1U8GdaUod9Ln04Iy/+jT/oOto50zPt604pjzJ7ORY0jOr kmc66YYN93kYXpW1w33uGuOoTH2pwX3LRmxaXclpksQ+EpGfB4scIb/SQxKP66Uo+9Aq xw2vQSvbiXfaS2yM5IsR+GYNxfgR6R0bNRIEf0WBDOtvbqOZbeUQ5PTY7vYcjU69vUDq Xn3d6BPv39Z67/jut6FzghJZyvfhbun2NNwtoxCd6fqa9Sz3UoynKiZjfM1C1f4xOOsr ZMDg== X-Received: by 10.60.41.37 with SMTP id c5mr13153563oel.43.1372804407177; Tue, 02 Jul 2013 15:33:27 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id m11sm7961002oer.4.2013.07.02.15.33.25 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 15:33:25 -0700 (PDT) Sender: Warner Losh Subject: Re: HEADS UP: Changing the default ABI to EABI Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <20130702211103.332e8854@bender.Home> Date: Tue, 2 Jul 2013 16:33:23 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <7BBCF927-7619-462E-9E4F-9F3172746BE5@bsdimp.com> References: <20130702211103.332e8854@bender.Home> To: Andrew Turner X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQkZMxaaiXgjiNQ7DDamFo+z9nnlRoiK2nkLNJW/lu1LBLd8n84UypR9HFlY9i17DJsAq+E3 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jul 2013 22:33:28 -0000 On Jul 2, 2013, at 2:11 PM, Andrew Turner wrote: > Hello, >=20 > I'm planning on changing the default ARM ABI to the ARM EABI. I = believe > all the known issues have been fixed, however I would like to know if > there are any outstanding problems. Cool! Does the in-tree gcc support this? What happens if you turn off clang = and try to do this? > I have attached the patch I would like to commit. If there are no = major > objections I'm planning on committing this in around a week. Works for me. Warner From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 01:12:20 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 815F87C8 for ; Wed, 3 Jul 2013 01:12:20 +0000 (UTC) (envelope-from jordan.hubbard@gmail.com) Received: from mail-oa0-x233.google.com (mail-oa0-x233.google.com [IPv6:2607:f8b0:4003:c02::233]) by mx1.freebsd.org (Postfix) with ESMTP id 4A26610B1 for ; Wed, 3 Jul 2013 01:12:20 +0000 (UTC) Received: by mail-oa0-f51.google.com with SMTP id i4so7305588oah.10 for ; Tue, 02 Jul 2013 18:12:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=content-type:mime-version:subject:from:in-reply-to:date:cc :message-id:references:to:x-mailer; bh=PyxxFWvblNnmzTqymwUuvM2kCX13aOK56b/wg4dRNaY=; b=tSRWkgyCwkeV2/5uSaOZ6/KaT2NPndN+JW2zfECylbT1mBHpCXw5CwO40mCXxZMyx0 fE0Ah0OYirYYSEVIvdpkBPkkv6BO/dhnmDSMhDT2cgb7NpuFYF6/YGXDIzHWEUciMwbm GUjYkdbG57LVLPFdbPU9+Wia3I/jFkuhnTqwsgmtVv5S4Tw16BuGiWBKPYJ75LLa5Pc5 4J7XVjVsLGUsyUpa1AEns+2w7M9wZwwkWoaOts+rlvJ3NSAVxGTQU1aoBYu1T0gaWPmV VJIKoCXXwMmYC0VNaOCnYsXqYinhETtTd9TMqolVAXDV+d8u96bwfRlcYFfGqNvYZVyn ZDUg== X-Received: by 10.182.110.226 with SMTP id id2mr14733780obb.95.1372813939927; Tue, 02 Jul 2013 18:12:19 -0700 (PDT) Received: from [10.20.30.70] (230.sub-70-197-3.myvzw.com. [70.197.3.230]) by mx.google.com with ESMTPSA id ps5sm8886171oeb.8.2013.07.02.18.12.18 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Jul 2013 18:12:19 -0700 (PDT) Mime-Version: 1.0 (Mac OS X Mail 6.6 \(1510\)) Subject: Re: Raspberry pi not ready to self-host yet? From: Hubbard Jordan In-Reply-To: <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> Date: Tue, 2 Jul 2013 18:12:17 -0700 Message-Id: <60025368-8500-499C-9748-D1FF29E8DFEF@gmail.com> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> To: Oleksandr Tymoshenko X-Mailer: Apple Mail (2.1510) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 01:12:20 -0000 On Jul 1, 2013, at 1:33 AM, Oleksandr Tymoshenko = wrote: > It crashes due to INVARIANTS options in kernel config. I'm going to > look into this problem some time next week unless someone beats me to = it.=20 > Just disable them for now.=20 Yep, that did the trick! I'm now able to build world / kernel for ARM = on my MacBook Pro* and boot the result on the PI with no problems: FreeBSD pi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r252509M: Tue Jul 2 = 00:57:07 PDT 2013 jkh@whappy:/usr/obj/arm.armv6/usr/src/sys/RPI-B = arm I even have NFS up and running on the PI since adding "options NFSD" to = the RPI-B kernel. Since there are no modules built for ARM (why is = that?) that was kind of my only option. Might be worth adding to the = RPI-B configuration file until such time as that changes! - Jordan * OK, to be more accurate, I actually have FreeBSD-current running under = VMWare Fusion and the Mac's built-in SD card reader assigned to the VM, = which lets me mount it and DESTDIR=3D/sd in order to install the = world/kernel on the SD card. Unfortunately, you can't set DESTDIR to = an NFS mount because the attempts to set the immutable flags blow the = build up. :) From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 01:24:51 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id A3968B16 for ; Wed, 3 Jul 2013 01:24:51 +0000 (UTC) (envelope-from db@db.net) Received: from diana.db.net (diana.db.net [66.113.102.10]) by mx1.freebsd.org (Postfix) with ESMTP id 8B98C1143 for ; Wed, 3 Jul 2013 01:24:51 +0000 (UTC) Received: from night.db.net (localhost [127.0.0.1]) by diana.db.net (Postfix) with ESMTP id 392C92AA4C0; Tue, 2 Jul 2013 19:24:42 -0600 (MDT) Received: by night.db.net (Postfix, from userid 1000) id AD9C61CC1B; Tue, 2 Jul 2013 20:24:36 -0500 (EST) Date: Tue, 2 Jul 2013 20:24:36 -0500 From: Diane Bruce To: Hubbard Jordan Subject: Re: Raspberry pi not ready to self-host yet? Message-ID: <20130703012436.GA37730@night.db.net> References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> <60025368-8500-499C-9748-D1FF29E8DFEF@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <60025368-8500-499C-9748-D1FF29E8DFEF@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 01:24:51 -0000 On Tue, Jul 02, 2013 at 06:12:17PM -0700, Hubbard Jordan wrote: > > On Jul 1, 2013, at 1:33 AM, Oleksandr Tymoshenko wrote: > > > It crashes due to INVARIANTS options in kernel config. I'm going to > > look into this problem some time next week unless someone beats me to it. > > Just disable them for now. > > Yep, that did the trick! I'm now able to build world / kernel for ARM on my MacBook Pro* and boot the result on the PI with no problems: > > FreeBSD pi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r252509M: Tue Jul 2 00:57:07 PDT 2013 jkh@whappy:/usr/obj/arm.armv6/usr/src/sys/RPI-B arm > > I even have NFS up and running on the PI since adding "options NFSD" to the RPI-B kernel. Since there are no modules built for ARM (why is that?) that was kind of my only option. Might be worth adding to the RPI-B configuration file until such time as that changes! > > - Jordan Yay! > > * OK, to be more accurate, I actually have FreeBSD-current running under VMWare Fusion and the Mac's built-in SD card reader assigned to the VM, which lets me mount it and DESTDIR=/sd in order to install the world/kernel on the SD card. Unfortunately, you can't set DESTDIR to an NFS mount because the attempts to set the immutable flags blow the build up. :) > > > - Diane -- - db@FreeBSD.org db@db.net http://www.db.net/~db From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 15:09:46 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id DA86A740 for ; Wed, 3 Jul 2013 15:09:46 +0000 (UTC) (envelope-from pettefar@gmail.com) Received: from mail-lb0-x234.google.com (mail-lb0-x234.google.com [IPv6:2a00:1450:4010:c04::234]) by mx1.freebsd.org (Postfix) with ESMTP id 6519A11BB for ; Wed, 3 Jul 2013 15:09:46 +0000 (UTC) Received: by mail-lb0-f180.google.com with SMTP id o10so322328lbi.11 for ; Wed, 03 Jul 2013 08:09:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:reply-to:sender:from:date:x-google-sender-auth :message-id:subject:to:content-type; bh=uEUw3l3E3cma29UXLTQM3QvJTHDR1z31ftElkhbOoJM=; b=HHVVBb9BlZb1cH4EfoxxlBfrKcQewahfwD/rYDpOAkxo1nfnaNP2SmfHK4nKF6HmFa 5jRIVFTCsx2Hf2zdrorjroqwoAJgo2Bsf8wYllkWgLFi2vhs83q+wQc0vLSAHyoE4GGP pK5hviXDAjpwRFinRrPMzC7NOg4jmoTqw0mPvUVd2zMoG6eR7p9qGutjB1FbN17oSGRf oIqqBKqzUy2ZZvcvI+Egkzzc9N39lTYgdZUWptQo9Bia0uHT4gYo3eetTMngRy/1SI76 G4L2HG/oB4q6N7+06TSrcp1YALMHA76i1cnTEgwK/ZYbNNaWpTcmEFevMi/0MVyDPfYz w6ug== X-Received: by 10.152.115.175 with SMTP id jp15mr731678lab.12.1372864185382; Wed, 03 Jul 2013 08:09:45 -0700 (PDT) MIME-Version: 1.0 Sender: pettefar@gmail.com Received: by 10.112.211.169 with HTTP; Wed, 3 Jul 2013 08:09:15 -0700 (PDT) From: Nick Pettefar Date: Wed, 3 Jul 2013 16:09:15 +0100 X-Google-Sender-Auth: fM-5KCDzz9ZgVU6J5VlHjeRF9IQ Message-ID: Subject: boinc/seti on RPi To: freebsd-arm@freebsd.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: Nick@Pettefar.com List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 15:09:46 -0000 Hi, I am trying to install boinc/seti on my Raspberry Pi running FreeBSD. root@bsdpi:/usr/ports/devel/cmake # uname -a FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun 1 04:12:21 SGT 2013 root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B arm Unfortunately I cannot install cmake, it keeps failing: root@bsdpi:/usr/ports/devel/cmake # make ===> Configuring for cmake-2.8.10.2 ===> FreeBSD 10 autotools fix applied to /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure --------------------------------------------- CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. C compiler on this system is: cc -O -pipe --------------------------------------------- Error when bootstrapping CMake: Cannot find appropriate C++ compiler on this system. Please specify one using environment variable CXX. See cmake_bootstrap.log for compilers attempted. --------------------------------------------- Log of errors: /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.log --------------------------------------------- ===> Script "configure" failed unexpectedly. Please report the problem to kde@FreeBSD.org [maintainer] and attach the "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the output of the failure of your make command. Also, it might be a good idea to provide an overview of all packages installed on your system (e.g. a /usr/local/sbin/pkg-static info -g -Ea). *** Error code 1 Stop. Any ideas anyone? Regards, Nick Pettefar N. Dublin From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 15:14:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id DAD0FC0C for ; Wed, 3 Jul 2013 15:14:04 +0000 (UTC) (envelope-from jkwilborn@gmail.com) Received: from mail-pd0-x230.google.com (mail-pd0-x230.google.com [IPv6:2607:f8b0:400e:c02::230]) by mx1.freebsd.org (Postfix) with ESMTP id B9D1D122B for ; Wed, 3 Jul 2013 15:14:04 +0000 (UTC) Received: by mail-pd0-f176.google.com with SMTP id t12so185515pdi.35 for ; Wed, 03 Jul 2013 08:14:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=o78v2fswb3oWuolsCW1AuozP8ed7Ig7xcB3dltzLmUo=; b=ODEVFm/Az5npKO2gXj7vuRgm+0Nw3K/zuKPQ4qnS7d/esnvURNXAHGNtpjPP5s2N1e N4cOwC42VmfUFkyRucV/qg4bUzpVB7tug2wzkQtlq13VgrWtvkhZiUSeOLykTNPQLRds flu4WNWvI5dduq7DwVipYIjRzfRCzP5Cah3SfSX2+Bj+2GdiT+gZZRNfTUvjHi1xqeVe eGCMO3HvyNQVgeWv/kGeMdp1LVbHZAnnrGDd513ptXrmBPORaKkbB4Y9klZoOBH44me4 BzvkEyPheP9UUak/ZJo4CDKrj27T9wz+ALTyPAHz5ylTzyRYzeuDi2wB14ON933T6IpN p4Dg== MIME-Version: 1.0 X-Received: by 10.68.138.131 with SMTP id qq3mr1398201pbb.10.1372864444497; Wed, 03 Jul 2013 08:14:04 -0700 (PDT) Received: by 10.66.26.241 with HTTP; Wed, 3 Jul 2013 08:14:04 -0700 (PDT) In-Reply-To: References: Date: Wed, 3 Jul 2013 08:14:04 -0700 Message-ID: Subject: Re: boinc/seti on RPi From: Jack Wilborn To: Nick@pettefar.com Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 15:14:04 -0000 Nick, seems pretty obvious error that it can't find something. How did you install it with some type of software control program, like aptitude or apt-get)? It also tells you to report this as a bug, which is time consuming, but sometimes a good step for others. Follow the paths indicated and see if it's there (I'm sure it's not). Then place what it wants there and try again... Hope this helps... Jack On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar wrote: > Hi, I am trying to install boinc/seti on my Raspberry Pi running FreeBSD. > > root@bsdpi:/usr/ports/devel/cmake # uname -a > FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun 1 > 04:12:21 SGT 2013 > root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B > arm > > Unfortunately I cannot install cmake, it keeps failing: > > root@bsdpi:/usr/ports/devel/cmake # make > ===> Configuring for cmake-2.8.10.2 > ===> FreeBSD 10 autotools fix applied to > /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure > --------------------------------------------- > CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. > C compiler on this system is: cc -O -pipe > --------------------------------------------- > Error when bootstrapping CMake: > Cannot find appropriate C++ compiler on this system. > Please specify one using environment variable CXX. > See cmake_bootstrap.log for compilers attempted. > --------------------------------------------- > Log of errors: > > /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.log > --------------------------------------------- > ===> Script "configure" failed unexpectedly. > Please report the problem to kde@FreeBSD.org [maintainer] and attach the > "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the > output > of the failure of your make command. Also, it might be a good idea to > provide > an overview of all packages installed on your system (e.g. a > /usr/local/sbin/pkg-static info -g -Ea). > *** Error code 1 > > Stop. > > Any ideas anyone? > > Regards, > > Nick Pettefar > N. Dublin > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 15:52:31 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 794D2470 for ; Wed, 3 Jul 2013 15:52:31 +0000 (UTC) (envelope-from hiren.panchasara@gmail.com) Received: from mail-ee0-x229.google.com (mail-ee0-x229.google.com [IPv6:2a00:1450:4013:c00::229]) by mx1.freebsd.org (Postfix) with ESMTP id 14E62147C for ; Wed, 3 Jul 2013 15:52:30 +0000 (UTC) Received: by mail-ee0-f41.google.com with SMTP id d17so176662eek.14 for ; Wed, 03 Jul 2013 08:52:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=LK3+/+IDPpmwGJS2TbOFjD2B7ZQMqJoMHxy+mqFj4/o=; b=tVJbsRUFdbJKH54QgxrQnuik8k2p/cuZflrZ8DB7x0ePqsG0E39DHJlvg0WjoKIk/v ov4xknBEX2ifKO0zM+WuOwevdFf+eGBtGV3fNXyEhhggdyNnWVp6SyeizfvAU0mLtlql HrLmdyaDJuKsobOxRGSa5XsRhzriWLOwFuUXsmmWOfCIh9lLKM3a4J+jrPi3YbN+LKEj zKadO4n5Mgfu4xva+dWHFX8i5MIyyKP/BDaUdDF6pk611eHaoc+PTAyt3fLq6Dfu9pJs XduBYsaTipqAHRnhui0SrUcTi0CjZigj83rxwQ33KyfynmGopYUBxwzgRhuADpEV+ztR +sAg== MIME-Version: 1.0 X-Received: by 10.15.42.129 with SMTP id u1mr1729948eev.116.1372866749848; Wed, 03 Jul 2013 08:52:29 -0700 (PDT) Received: by 10.14.119.203 with HTTP; Wed, 3 Jul 2013 08:52:29 -0700 (PDT) In-Reply-To: References: Date: Wed, 3 Jul 2013 08:52:29 -0700 Message-ID: Subject: Re: boinc/seti on RPi From: hiren panchasara To: Nick@pettefar.com Content-Type: text/plain; charset=UTF-8 Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 15:52:31 -0000 On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar wrote: > Hi, I am trying to install boinc/seti on my Raspberry Pi running FreeBSD. > > root@bsdpi:/usr/ports/devel/cmake # uname -a > FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun 1 > 04:12:21 SGT 2013 > root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B > arm > > Unfortunately I cannot install cmake, it keeps failing: Not helping with the error but you can probably grab the prebuild package from http://mirrors.nycbug.org/pub/FreeBSD_ARM/pkg/ to unblock yourself. I see it has cmake there. cheers, Hiren > > root@bsdpi:/usr/ports/devel/cmake # make > ===> Configuring for cmake-2.8.10.2 > ===> FreeBSD 10 autotools fix applied to > /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure > --------------------------------------------- > CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. > C compiler on this system is: cc -O -pipe > --------------------------------------------- > Error when bootstrapping CMake: > Cannot find appropriate C++ compiler on this system. > Please specify one using environment variable CXX. > See cmake_bootstrap.log for compilers attempted. > --------------------------------------------- > Log of errors: > /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.log > --------------------------------------------- > ===> Script "configure" failed unexpectedly. > Please report the problem to kde@FreeBSD.org [maintainer] and attach the > "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the output > of the failure of your make command. Also, it might be a good idea to > provide > an overview of all packages installed on your system (e.g. a > /usr/local/sbin/pkg-static info -g -Ea). > *** Error code 1 > > Stop. > > Any ideas anyone? > > Regards, > > Nick Pettefar > N. Dublin > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 15:55:15 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id F1EC371E for ; Wed, 3 Jul 2013 15:55:15 +0000 (UTC) (envelope-from george@ceetonetechnology.com) Received: from feynman.konjz.org (feynman.konjz.org [64.147.119.39]) by mx1.freebsd.org (Postfix) with ESMTP id E687715E9 for ; Wed, 3 Jul 2013 15:55:14 +0000 (UTC) Received: from 127.0.0.1 (manning1.torservers.net [96.44.189.100]) (authenticated bits=0) by feynman.konjz.org (8.14.7/8.14.4) with ESMTP id r63FswT0080184 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO) for ; Wed, 3 Jul 2013 11:55:07 -0400 (EDT) (envelope-from george@ceetonetechnology.com) Message-ID: <51D4493A.2000800@ceetonetechnology.com> Date: Wed, 03 Jul 2013 11:54:34 -0400 From: George Rosamond MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: Re: boinc/seti on RPi References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Spam-Names: BAYES_00,FSL_HELO_BARE_IP_1,TVD_RCVD_IP,TVD_RCVD_IP4 X-Mail-Provider: KonjZ X-Scanned-By: MIMEDefang 2.73 on 64.147.119.39 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 15:55:16 -0000 hiren panchasara: > On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar wrote: >> Hi, I am trying to install boinc/seti on my Raspberry Pi running FreeBSD. >> >> root@bsdpi:/usr/ports/devel/cmake # uname -a >> FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun 1 >> 04:12:21 SGT 2013 >> root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B >> arm >> >> Unfortunately I cannot install cmake, it keeps failing: > > Not helping with the error but you can probably grab the prebuild > package from http://mirrors.nycbug.org/pub/FreeBSD_ARM/pkg/ to unblock > yourself. > > I see it has cmake there. > I also had errors and grabbed a cmake pkg from someone else. Don't have the error message around still. I grabbed someone else's pkg at that point, and updated to the current version without issue. That is the short history of devel/cmake on the NYC*BUG server :) g From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 17:00:56 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id E86256F5 for ; Wed, 3 Jul 2013 17:00:56 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ie0-f179.google.com (mail-ie0-f179.google.com [209.85.223.179]) by mx1.freebsd.org (Postfix) with ESMTP id B733C1931 for ; Wed, 3 Jul 2013 17:00:56 +0000 (UTC) Received: by mail-ie0-f179.google.com with SMTP id c10so1019440ieb.10 for ; Wed, 03 Jul 2013 10:00:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=TJoLThS86EgoJUQxmIw92XkNyO8IAAPagSei8VsfhA8=; b=cQfo5K4EIoQYpal9hICdRp6mFV+qirTRZuii7GZ4IXeoImoHMaixJSKFQraN0+NWf8 RAZWMUUTCShWx5jZVF7d0gNGFE9XM+Ezh07Pjlz2MVb8K8KuTAYCCnuDlHAkdLsKGdSz AG1fEHD5Obs0d452cXFk/LMwN4UGw2zizVTNlaxl/VVUv3A0bG7YhIaqjEKxXMVADLao FX2Rvnc2xcN7Ovw6GdXw5hrxeEhvaK8HeFCVmazAS98TsCSlFEDd+tl4XtaUkHqkkDKu UIdxqbwTv7St1HRbbKJLwWo6LXZXfUIJWEfScmEWvh5vrnFkzGqj8ry9nPlDlv2Kr+oj MgBw== X-Received: by 10.50.112.69 with SMTP id io5mr1274325igb.27.1372870856173; Wed, 03 Jul 2013 10:00:56 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPSA id ht10sm24604781igb.2.2013.07.03.10.00.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 03 Jul 2013 10:00:55 -0700 (PDT) Sender: Warner Losh Subject: Re: Raspberry pi not ready to self-host yet? Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <60025368-8500-499C-9748-D1FF29E8DFEF@gmail.com> Date: Wed, 3 Jul 2013 11:00:52 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: References: <800732D1-B06A-40AE-AE69-F6170662B2AA@turbofuzz.com> <20130626235542.27844683@ivory.wynn.com> <79CFABCE-156A-44B5-B989-A3607C47B2AF@mail.turbofuzz.com> <20130627013142.5fdb2544@ivory.wynn.com> <20130627111623.137ad2ca@ivory.wynn.com> <20130627215424.GA2441@night.db.net> <463D25BB-88D6-4B2E-A7F2-05A8B0525571@gmail.com> <489E95FC-AF71-483C-BA08-81276B850B7F@bluezbox.com> <60025368-8500-499C-9748-D1FF29E8DFEF@gmail.com> To: Hubbard Jordan X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQnwcwrRFkbCVhJ9VbrvA1njrQL9bkmnI5CqzGI/zMABkGecZrkMvL/5GO4sadLML1AQilgH Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 17:00:57 -0000 On Jul 2, 2013, at 7:12 PM, Hubbard Jordan wrote: >=20 > On Jul 1, 2013, at 1:33 AM, Oleksandr Tymoshenko = wrote: >=20 >> It crashes due to INVARIANTS options in kernel config. I'm going to >> look into this problem some time next week unless someone beats me = to it.=20 >> Just disable them for now.=20 >=20 > Yep, that did the trick! I'm now able to build world / kernel for = ARM on my MacBook Pro* and boot the result on the PI with no problems: >=20 > FreeBSD pi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r252509M: Tue Jul 2 = 00:57:07 PDT 2013 jkh@whappy:/usr/obj/arm.armv6/usr/src/sys/RPI-B = arm >=20 > I even have NFS up and running on the PI since adding "options NFSD" = to the RPI-B kernel. Since there are no modules built for ARM (why is = that?) that was kind of my only option. Might be worth adding to the = RPI-B configuration file until such time as that changes! No reason. Historically, we've been on embedded platforms where you = loaded the kernel and then needed no more modules after that. This has = changed, obviously, but we've been slow to adapt. > - Jordan >=20 > * OK, to be more accurate, I actually have FreeBSD-current running = under VMWare Fusion and the Mac's built-in SD card reader assigned to = the VM, which lets me mount it and DESTDIR=3D/sd in order to install the = world/kernel on the SD card. Unfortunately, you can't set DESTDIR to = an NFS mount because the attempts to set the immutable flags blow the = build up. :) Can't you set NO_FSCGH=3Dt to get around this (hmmm, looks like an = option that's slipped through the cracks of the WITH/WITHOUT change = over). Warner From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 21:04:54 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 622A0DBB for ; Wed, 3 Jul 2013 21:04:54 +0000 (UTC) (envelope-from pettefar@gmail.com) Received: from mail-ee0-x22a.google.com (mail-ee0-x22a.google.com [IPv6:2a00:1450:4013:c00::22a]) by mx1.freebsd.org (Postfix) with ESMTP id EC220184D for ; Wed, 3 Jul 2013 21:04:53 +0000 (UTC) Received: by mail-ee0-f42.google.com with SMTP id c4so360251eek.1 for ; Wed, 03 Jul 2013 14:04:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:content-type:mime-version:subject:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer; bh=o6jEu3KlVwTwDsWtcjoDBOladbevI2gtJGy23Ccs+Cs=; b=IyBnVbk8pfFipplBT8T/1Bm4RAw5Ky3edEOxP6RMY/TOvggl7tAcDiGS94cMoHg5Z8 9ha6geI4Wuuvb+wIMlJxSIesoM7/c55PDA2csHzFz9zdXsumg+1/EqGbqKSS0qMUzyVs VVspYqeyiVvwSFJ1f7wraRr+aUkZwhI/vE/M5zf+jackKjcKElty/LbS+z7AaujgyLkF RZ2RmwhioaNqoFai1fPMyewQ7l8JLEgyQcpU6SIpsRREeKthTqSsRddF086qYnPTYKEx Uah5E2Okp9bI8tl+l0Rbzs4iumiCkuIu0ApyzOVN6NrO8b1dB9jtVkHB7Arae6b6wLEi qcNQ== X-Received: by 10.15.35.129 with SMTP id g1mr3132028eev.2.1372885493133; Wed, 03 Jul 2013 14:04:53 -0700 (PDT) Received: from [10.10.19.31] ([86.43.74.198]) by mx.google.com with ESMTPSA id bj46sm47052919eeb.13.2013.07.03.14.04.51 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 03 Jul 2013 14:04:52 -0700 (PDT) Sender: Nick Pettefar Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: boinc/seti on RPi From: Nick In-Reply-To: Date: Wed, 3 Jul 2013 22:04:50 +0100 Content-Transfer-Encoding: quoted-printable Message-Id: References: To: hiren panchasara X-Mailer: Apple Mail (2.1508) Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 21:04:54 -0000 Thanks, I've just done that and the boinc/seti installation is = progressing. Cheers! Nick On 3 Jul 2013, at 16:52, hiren panchasara = wrote: > On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar = wrote: >> Hi, I am trying to install boinc/seti on my Raspberry Pi running = FreeBSD. >>=20 >> root@bsdpi:/usr/ports/devel/cmake # uname -a >> FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun = 1 >> 04:12:21 SGT 2013 >> root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B >> arm >>=20 >> Unfortunately I cannot install cmake, it keeps failing: >=20 > Not helping with the error but you can probably grab the prebuild > package from http://mirrors.nycbug.org/pub/FreeBSD_ARM/pkg/ to unblock > yourself. >=20 > I see it has cmake there. >=20 > cheers, > Hiren >>=20 >> root@bsdpi:/usr/ports/devel/cmake # make >> =3D=3D=3D> Configuring for cmake-2.8.10.2 >> =3D=3D=3D> FreeBSD 10 autotools fix applied to >> /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure >> --------------------------------------------- >> CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. >> C compiler on this system is: cc -O -pipe >> --------------------------------------------- >> Error when bootstrapping CMake: >> Cannot find appropriate C++ compiler on this system. >> Please specify one using environment variable CXX. >> See cmake_bootstrap.log for compilers attempted. >> --------------------------------------------- >> Log of errors: >> = /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.l= og >> --------------------------------------------- >> =3D=3D=3D> Script "configure" failed unexpectedly. >> Please report the problem to kde@FreeBSD.org [maintainer] and attach = the >> "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the = output >> of the failure of your make command. Also, it might be a good idea to >> provide >> an overview of all packages installed on your system (e.g. a >> /usr/local/sbin/pkg-static info -g -Ea). >> *** Error code 1 >>=20 >> Stop. >>=20 >> Any ideas anyone? >>=20 >> Regards, >>=20 >> Nick Pettefar >> N. Dublin >> _______________________________________________ >> freebsd-arm@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Wed Jul 3 22:20:10 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id B804A1AD; Wed, 3 Jul 2013 22:20:10 +0000 (UTC) (envelope-from kibab@olymp.kibab.com) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id 8425C1BD9; Wed, 3 Jul 2013 22:20:09 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 2DE8D3F484 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372890002; bh=w3eZJjRCPl4TS9PrAmwgmGCeSbyMVSYuDlBh/F1eVuI=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=N90/axBtn75L7W7awehjOEYUyh+kb/5X/5CG9Wt+vkIMY+tI0co8VD5fwRsmFsfSH 516VLM3nZ4OdmKePXhd9mhwAPlq2JAXJwzYxi6XxJPZ6zRvdTRufogMTdLE8qCWjNS HQZXl3wAVF4G948/1q/ehG8Bo6cCIL/SJpc64kE4= Date: Thu, 4 Jul 2013 00:20:02 +0200 From: Ilya Bakulin To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Message-ID: <20130703222002.GA60491@olymp.kibab.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Jul 2013 22:20:10 -0000 On Tue, Jul 02, 2013 at 01:34:37PM -0600, Warner Losh wrote: > > On Jul 2, 2013, at 1:21 PM, Ilya Bakulin wrote: > > If we add, say, sdio0 device and store this information there, we end up > > with > > the hierarchy suggested by Ben Gray a year ago. > > Yea, and I didn't like that at all. It violates the FreeBSD device model. OK, I ended up adding some SDIO-related variables directly to mmc_softc. In my understanding, we should treat the SDIO card not as a separate device, but as an extension to the MMC bridge. In particular, things like bus width, timing information and the number of functions obviously belong to the bridge. I have added support for CMD53 today, which is multi-byte data transfer. Additionally, support for setting bus width and clock speed have been added. Now I can successfully do block reads from the card config space. I have found another interesting problem. When reading CIS information using single-byte read, I receive these strings: 0000 0d 21 32 36 25 2c 2c 00 38 30 32 2e 31 31 20 13 |.!26%,,.802.11 .| 0010 04 09 0f 20 09 04 3a 20 32 30 00 00 bf 20 04 9f |... ..: 20... ..| 0020 02 18 91 21 02 0c 00 00 00 00 00 00 00 00 00 00 |...!............| And when using block read, reading the same address in CCCR gives me the following: 0000 4d 61 72 76 65 6c 6c 00 38 30 32 2e 31 31 20 53 |Marvell.802.11 S| 0010 44 49 4f 20 49 44 3a 20 32 30 00 00 ff 20 04 df |DIO ID: 20... ..| So some bytes lack 0x40... This problem occurs also with other numbers read from the card, for example, vendor ID is read as 0x029F instead of 0x02DF. Once this is fixed, I will try to add the code for attaching child devices. diff --git a/sys/arm/conf/KIBAB-DPLUG b/sys/arm/conf/KIBAB-DPLUG new file mode 100644 index 0000000..033d398 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG @@ -0,0 +1,171 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG + +include "../mv/kirkwood/std.db88f6xxx" + +makeoptions FDT_DTS_FILE=dreamplug-1001.dts + +makeoptions MODULES_OVERRIDE="" + +options SOC_MV_KIRKWOOD + +options SCHED_4BSD #4BSD scheduler +options INET #InterNETworking +options INET6 #IPv6 communications protocols +options SOFTUPDATES +options CD9660 #ISO 9660 filesystem +options FFS #Berkeley Fast Filesystem +options MSDOSFS #MS DOS File System (FAT, FAT32) +options NULLFS #NULL filesystem +options TMPFS #Efficient memory filesystem +options SYSVSHM #SYSV-style shared memory +options SYSVMSG #SYSV-style message queues +options SYSVSEM #SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions +options GEOM_ELI # Disk encryption. +options GEOM_LABEL # Providers labelization. +options GEOM_PART_GPT # GPT partitioning + +# Flattened Device Tree +device fdt +options FDT +options FDT_DTB_STATIC + +# Misc pseudo devices +device bpf #Required for DHCP +device faith #IPv6-to-IPv4 relaying (translation) +device firmware #firmware(9) required for USB wlan +device gif #IPv6 and IPv4 tunneling +device loop #Network loopback +device md #Memory/malloc disk +device pty #BSD-style compatibility pseudo ttys +device random #Entropy device +device tun #Packet tunnel. +device ether #Required for all ethernet devices +device vlan #802.1Q VLAN support +device wlan #802.11 WLAN support + +# cam support for umass and ahci +device scbus +device pass +device da +device cd + +# Serial ports +device uart + +# Networking +device mge # Marvell Gigabit Ethernet controller +device mii +device e1000phy + +# USB +options USB_HOST_ALIGN=32 # Align DMA to cacheline +#options USB_DEBUG # Compile in USB debug support +device usb # Basic usb support +device ehci # USB host controller +device umass # Mass storage +device uhid # Human-interface devices +device rum # Ralink Technology RT2501USB wireless NICs + +# I2C (TWSI) +device iic +device iicbus + +# SATA +device mvs +device ahci + +# SDIO +device mv_sdio +device mmcsd +device mmc + +# Sound +device sound +device snd_uaudio + +#crypto +device cesa # Marvell security engine +device crypto +device cryptodev + +# IPSec +device enc +options IPSEC +options IPSEC_NAT_T +options TCP_SIGNATURE #include support for RFC 2385 + +#PF +device pf +device pflog +device pfsync + +# ALTQ, required for PF +options ALTQ # Basic ALTQ support +options ALTQ_CBQ # Class Based Queueing +options ALTQ_RED # Random Early Detection +options ALTQ_RIO # RED In/Out +options ALTQ_HFSC # Hierarchical Packet Scheduler +options ALTQ_CDNR # Traffic conditioner +options ALTQ_PRIQ # Priority Queueing +options ALTQ_NOPCC # Required if the TSC is unusable +#options ALTQ_DEBUG + +# Debugging +makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +options DDB +options KDB +options DIAGNOSTIC +options INVARIANTS #Enable calls of extra sanity checking +options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB + +# Enable these options for nfs root configured via BOOTP. +options NFSCL #Network Filesystem Client +options NFSLOCKD #Network Lock Manager +options NFS_ROOT #NFS usable as /, requires NFSCLIENT +options BOOTP +options BOOTP_NFSROOT +#options BOOTP_NFSV3 +options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1s1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" + +# To use this configuration with the (rare) model 1001N (nand flash), +# create a kernel config file that looks like this: +# +# include DREAMPLUG-1001 +# nomakeoptions FDT_DTS_FILE +# makeoptions FDT_DTS_FILE=dreamplug-1001N.dts +# device nand diff --git a/sys/arm/conf/KIBAB-DPLUG-NODBG b/sys/arm/conf/KIBAB-DPLUG-NODBG new file mode 100644 index 0000000..cbced4a --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-NODBG @@ -0,0 +1,43 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + +ident KIBAB-DPLUG-NODBG + +include KIBAB-DPLUG + +# Do not compile FDT in kernel +nomakeoptions FDT_DTS_FILE +nooptions FDT_DTB_STATIC + +# Debugging +nomakeoptions DEBUG +nooptions BREAK_TO_DEBUGGER +nooptions ALT_BREAK_TO_DEBUGGER +nooptions DDB +nooptions KDB +nooptions DIAGNOSTIC +nooptions INVARIANTS #Enable calls of extra sanity checking +nooptions INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options WITNESS_KDB diff --git a/sys/arm/conf/KIBAB-DPLUG-PROD b/sys/arm/conf/KIBAB-DPLUG-PROD new file mode 100644 index 0000000..bae61a4 --- /dev/null +++ b/sys/arm/conf/KIBAB-DPLUG-PROD @@ -0,0 +1,33 @@ +# Kernel config for GlobalScale Technologies DreamPlug version 1001. +# +# This is for units that are version 10, revision 01, with NOR SPI flash. +# These units are identified with the number "1001" on the S/N label. +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ +# + + +include KIBAB-DPLUG-NODBG + +ident KIBAB-DPLUG-PROD + +nooptions NFS_ROOT +nooptions BOOTP +nooptions BOOTP_NFSROOT +nooptions BOOTP_WIRED_TO + diff --git a/sys/arm/mv/files.mv b/sys/arm/mv/files.mv index 116356d..88c0b98 100644 --- a/sys/arm/mv/files.mv +++ b/sys/arm/mv/files.mv @@ -32,6 +32,7 @@ arm/mv/mv_sata.c optional ata | atamvsata arm/mv/mv_ts.c standard arm/mv/timer.c standard arm/mv/twsi.c optional iicbus +arm/mv/mv_sdio.c optional mv_sdio dev/cesa/cesa.c optional cesa dev/mge/if_mge.c optional mge diff --git a/sys/arm/mv/mv_sdio.c b/sys/arm/mv/mv_sdio.c new file mode 100644 index 0000000..73faf08 --- /dev/null +++ b/sys/arm/mv/mv_sdio.c @@ -0,0 +1,1670 @@ +/*- + * Copyright (c) 2009 Semihalf, Rafal Czubak + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Driver for Marvell Integrated SDIO Host Controller. + * Works stable in DMA mode. PIO mode has problems with large data transfers + * (timeouts). + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "mmcbr_if.h" + +#include "mv_sdio.h" + +/* Minimum DMA segment size. */ +#define MV_SDIO_DMA_SEGMENT_SIZE 4096 + +/* Transferred block size. */ +#define MV_SDIO_BLOCK_SIZE 512 + +/* Maximum number of blocks the controller can handle. */ +#define MV_SDIO_BLOCKS_MAX 65535 + +/* Halfword bit masks used for command response extraction. */ +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ +#define MV_SDIO_RSP48_BM16 0xffff /* 16 bits */ + +/* SDIO aggregated command interrupts */ +#define MV_SDIO_IRQS_CMD (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_UNEXPECTED_RSP) +#define MV_SDIO_EIRQS_CMD (MV_SDIO_EIRQ_CMD_TMO | MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_CMD_STARTBIT | MV_SDIO_EIRQ_RSP_TBIT) + +/* SDIO aggregated data interrupts */ +#define MV_SDIO_IRQS_DATA (MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_TX_EMPTY | \ + MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_AUTOCMD12) +#define MV_SDIO_EIRQS_DATA (MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | MV_SDIO_EIRQ_XFER_SIZE | \ + MV_SDIO_EIRQ_CRC_ENDBIT | MV_SDIO_EIRQ_CRC_STARTBIT | \ + MV_SDIO_EIRQ_CRC_STAT) + +/* + * Timing configuration. + */ + +/* SDIO controller base clock frequency. */ +#define MV_SDIO_F_BASE 100000000 /* 200 MHz */ + +/* Maximum SD clock frequency. */ +#define MV_SDIO_F_MAX (MV_SDIO_F_BASE / 2) /* 50 MHz */ + +/* Maximum timeout value. */ +#define MV_SDIO_TMO_MAX 0xf + +/* Reset delay in microseconds. */ +#define MV_SDIO_RESET_DELAY 10000 /* 10 ms */ + +/* Empty FIFO polling delay. */ +#define MV_SDIO_FIFO_EMPTY_DELAY 1000 /* 1 ms */ + +/* Delays between operations on multiple blocks. */ +#define MV_SDIO_RD_DELAY 50 /*50*/ /* Read access time. */ +#define MV_SDIO_WR_DELAY 10 /*10*/ /* Write access time. */ + +/* Maximum clock divider value. */ +#define MV_SDIO_CLK_DIV_MAX 0x7ff + +struct mv_sdio_softc { + device_t sc_dev; + device_t sc_child; + + bus_space_handle_t sc_bsh; + bus_space_tag_t sc_bst; + + int sc_use_dma; + bus_dma_tag_t sc_dmatag; + bus_dmamap_t sc_dmamap; + uint8_t *sc_dmamem; + bus_addr_t sc_physaddr; + int sc_mapped; + size_t sc_dma_size; + + struct resource *sc_mem_res; + int sc_mem_rid; + + struct resource *sc_irq_res; + int sc_irq_rid; + void *sc_ihl; + + struct resource *sc_cd_irq_res; + int sc_cd_irq_rid; + void *sc_cd_ihl; + + uint32_t sc_irq_mask; + uint32_t sc_eirq_mask; + + struct task sc_card_task; + struct callout sc_card_callout; + + struct mtx sc_mtx; + + int sc_bus_busy; + int sc_card_present; + struct mmc_host sc_host; + struct mmc_request *sc_req; + struct mmc_command *sc_curcmd; + + uint32_t sc_data_offset; +}; + +/* Read/write data from/to registers.*/ +static uint32_t MV_SDIO_RD4(struct mv_sdio_softc *, bus_size_t); +static void MV_SDIO_WR4(struct mv_sdio_softc *, bus_size_t, uint32_t); + +static int mv_sdio_probe(device_t); +static int mv_sdio_attach(device_t); + +static int mv_sdio_read_ivar(device_t, device_t, int, uintptr_t *); +static int mv_sdio_write_ivar(device_t, device_t, int, uintptr_t); + +static int mv_sdio_update_ios(device_t, device_t); +static int mv_sdio_request(device_t, device_t, struct mmc_request *); +static int mv_sdio_get_ro(device_t, device_t); +static int mv_sdio_acquire_host(device_t, device_t); +static int mv_sdio_release_host(device_t, device_t); + +/* Finalizes active MMC request. */ +static void mv_sdio_finalize_request(struct mv_sdio_softc *); + +/* Initializes controller's registers. */ +static void mv_sdio_init(device_t); + +/* Initializes host structure. */ +static void mv_sdio_init_host(struct mv_sdio_softc *); + +/* Used to add and handle sysctls. */ +static void mv_sdio_add_sysctls(struct mv_sdio_softc *); +static int mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS); + +/* DMA initialization and cleanup functions. */ +static int mv_sdio_dma_init(struct mv_sdio_softc *); +static void mv_sdio_dma_finish(struct mv_sdio_softc *); + +/* DMA map load callback. */ +static void mv_sdio_getaddr(void *, bus_dma_segment_t *, int, int); + +/* Prepare command/data before transaction. */ +static int mv_sdio_start_command(struct mv_sdio_softc *, struct + mmc_command *); +static int mv_sdio_start_data(struct mv_sdio_softc *, struct mmc_data *); + +/* Finish command after transaction. */ +static void mv_sdio_finish_command(struct mv_sdio_softc *); + +/* Response handling. */ +static void mv_sdio_handle_136bit_resp(struct mv_sdio_softc *); +static void mv_sdio_handle_48bit_resp(struct mv_sdio_softc *, + struct mmc_command *); + +/* Interrupt handler and interrupt helper functions. */ +static void mv_sdio_intr(void *); +static void mv_sdio_cmd_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_data_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_disable_intr(struct mv_sdio_softc *); + +/* Used after card detect interrupt has been handled. */ +static void mv_sdio_card_task(void *, int); + +/* Read/write data from FIFO in PIO mode. */ +static uint32_t mv_sdio_read_fifo(struct mv_sdio_softc *); +static void mv_sdio_write_fifo(struct mv_sdio_softc *, uint32_t); + +/* + * PIO mode handling. + * + * Inspired by sdhci(4) driver routines. + */ +static void mv_sdio_transfer_pio(struct mv_sdio_softc *); +static void mv_sdio_read_block_pio(struct mv_sdio_softc *); +static void mv_sdio_write_block_pio(struct mv_sdio_softc *); + + +static device_method_t mv_sdio_methods[] = { + /* device_if */ + DEVMETHOD(device_probe, mv_sdio_probe), + DEVMETHOD(device_attach, mv_sdio_attach), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, mv_sdio_read_ivar), + DEVMETHOD(bus_write_ivar, mv_sdio_write_ivar), + + /* mmcbr_if */ + DEVMETHOD(mmcbr_update_ios, mv_sdio_update_ios), + DEVMETHOD(mmcbr_request, mv_sdio_request), + DEVMETHOD(mmcbr_get_ro, mv_sdio_get_ro), + DEVMETHOD(mmcbr_acquire_host, mv_sdio_acquire_host), + DEVMETHOD(mmcbr_release_host, mv_sdio_release_host), + + {0, 0}, +}; + +static driver_t mv_sdio_driver = { + "sdio", + mv_sdio_methods, + sizeof(struct mv_sdio_softc), +}; +static devclass_t mv_sdio_devclass; + +DRIVER_MODULE( sdio, simplebus, mv_sdio_driver, mv_sdio_devclass, 0, 0); + + +static __inline uint32_t +MV_SDIO_RD4(struct mv_sdio_softc *sc, bus_size_t off) +{ + + return (bus_read_4(sc->sc_mem_res, off)); +} + +static __inline void +MV_SDIO_WR4(struct mv_sdio_softc *sc, bus_size_t off, uint32_t val) +{ + + bus_write_4(sc->sc_mem_res, off, val); +} + +static int platform_sdio_slot_signal( int signal ) +{ + switch( signal ) + { + case MV_SDIO_SIG_CD: + { + return -1; + break; + } + case MV_SDIO_SIG_WP: + return 0; + break; + default: + return -1; + break; + } + + return 0; +} + +static int +mv_sdio_probe(device_t dev) +{ + uint32_t device, revision; + + if (!ofw_bus_is_compatible(dev, "mrvl,sdio")) + return (ENXIO); + + + soc_id(&device, &revision); + + switch (device) { + case MV_DEV_88F6281: + break; + default: + return (ENXIO); + } + + device_set_desc(dev, "Marvell Integrated SDIO Host Controller"); + + return (BUS_PROBE_SPECIFIC); +} + +static int +mv_sdio_attach(device_t dev) +{ + struct mv_sdio_softc *sc; + int task_initialized = 0; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); + + /* Allocate memory and interrupt resources. */ + sc->sc_mem_rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + + if (sc->sc_mem_res == NULL) { + device_printf(dev, "Could not allocate memory!\n"); + goto fail; + } + + sc->sc_irq_rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + + if (sc->sc_irq_res == NULL) { + device_printf(dev, "Could not allocate IRQ!\n"); + goto fail; + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + + /* Initialize host controller's registers. */ + mv_sdio_init(dev); + + /* Try to setup DMA. */ + sc->sc_mapped = 0; /* No DMA buffer is mapped. */ + sc->sc_use_dma = 1; /* DMA mode is preferred to PIO mode. */ + + if (mv_sdio_dma_init(sc) < 0) { + device_printf(dev, "Falling back to PIO mode.\n"); + sc->sc_use_dma = 0; + } + + /* Add sysctls. */ + mv_sdio_add_sysctls(sc); + + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) { + /* Check if card is present in the slot. */ + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) == 1) + sc->sc_card_present = 1; + } + + TASK_INIT(&sc->sc_card_task, 0, mv_sdio_card_task, sc); + callout_init(&sc->sc_card_callout, 1); + task_initialized = 1; + + /* Setup interrupt. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | + INTR_MPSAFE, NULL, mv_sdio_intr, sc, &sc->sc_ihl) != 0) { + device_printf(dev, "Could not setup interrupt!\n"); + goto fail; + } + + /* Host can be acquired. */ + sc->sc_bus_busy = 0; + + /* + * Attach MMC bus only if the card is in the slot or card detect is + * not supported on the platform. + */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) == -1) || + sc->sc_card_present) { + sc->sc_child = device_add_child(dev, "mmc", -1); + + if (sc->sc_child == NULL) { + device_printf(dev, "Could not add MMC bus!\n"); + goto fail; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + } + + return (bus_generic_attach(dev)); + +fail: + mv_sdio_dma_finish(sc); + if (task_initialized) { + callout_drain(&sc->sc_card_callout); + taskqueue_drain(taskqueue_swi, &sc->sc_card_task); + } + if (sc->sc_ihl != NULL) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_ihl); + if (sc->sc_cd_ihl != NULL) + bus_teardown_intr(dev, sc->sc_cd_irq_res, sc->sc_cd_ihl); + if (sc->sc_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_irq_res); + if (sc->sc_cd_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_cd_irq_rid, + sc->sc_cd_irq_res); + if (sc->sc_mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, + sc->sc_mem_res); + mtx_destroy(&sc->sc_mtx); + return (ENXIO); +} + +static int +mv_sdio_update_ios(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + struct mmc_ios *ios; + uint32_t xfer, clk_div, host_cr; + + sc = device_get_softc(brdev); + host = device_get_ivars(reqdev); + ios = &host->ios; + + mtx_lock(&sc->sc_mtx); + + if (ios->power_mode == power_off) + /* Re-initialize the controller. */ + mv_sdio_init(brdev); + + xfer = MV_SDIO_RD4(sc, MV_SDIO_XFER); + + if (ios->clock == 0) { + /* Disable clock. */ + xfer |= MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + /* Set maximum clock divider. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + } else { + /* + * Calculate and set clock divider. + * Clock rate value is: + * clock = MV_SDIO_F_BASE / (clk_div + 1) + * Thus we calculate the divider value as: + * clk_div = (MV_SDIO_F_BASE / clock) - 1 + */ + clk_div = (MV_SDIO_F_BASE / ios->clock) - 1; + if (clk_div > MV_SDIO_CLK_DIV_MAX) + clk_div = MV_SDIO_CLK_DIV_MAX; + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, clk_div); + + /* Enable clock. */ + xfer &= ~MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + } + + host_cr = MV_SDIO_RD4(sc, MV_SDIO_HOST_CR); + + /* Set card type. */ + if (host->mode == mode_mmc) + host_cr |= MV_SDIO_HOST_CR_MMC; /* MMC card. */ + else + host_cr &= ~MV_SDIO_HOST_CR_MMC; /* SD card. */ + + /* Set bus width. */ + if (ios->bus_width == bus_width_4) + host_cr |= MV_SDIO_HOST_CR_4BIT; /* 4-bit bus width */ + else + host_cr &= ~MV_SDIO_HOST_CR_4BIT; /* 1-bit bus width */ + + /* Set high/normal speed mode. */ +#if 0 /* Some cards have problems with the highspeed-mode + * Not selecting High-Speed mode enables all cards to work + */ + + if ((ios->timing == bus_timing_hs ) && ( 1 == 0 ) ) + host_cr |= MV_SDIO_HOST_CR_HIGHSPEED; + else +#endif + host_cr &= ~MV_SDIO_HOST_CR_HIGHSPEED; + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static int +mv_sdio_request(device_t brdev, device_t reqdev, struct mmc_request *req) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = EBUSY; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_req != NULL) { + mtx_unlock(&sc->sc_mtx); + return (rv); + } + + sc->sc_req = req; +/* + device_printf(sc->sc_dev, "cmd %d (hw state 0x%04x)\n", + req->cmd->opcode , MV_SDIO_RD4( sc, MV_SDIO_HOST_SR ) ); +*/ + rv = mv_sdio_start_command(sc, req->cmd); + + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_get_ro(device_t brdev, device_t reqdev) +{ + int rv; + + /* Check if card is read only. */ + rv = platform_sdio_slot_signal(MV_SDIO_SIG_WP); + + /* + * Assume that card is not write protected, when platform doesn't + * support WP signal. + */ + if (rv < 0) + rv = 0; + + return (rv); +} + +static int +mv_sdio_acquire_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = 0; + + mtx_lock(&sc->sc_mtx); + while (sc->sc_bus_busy) + rv = mtx_sleep(sc, &sc->sc_mtx, PZERO, "sdioah", 0); + sc->sc_bus_busy++; + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_release_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + + sc = device_get_softc(brdev); + + mtx_lock(&sc->sc_mtx); + sc->sc_bus_busy--; + wakeup(sc); + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_finalize_request(struct mv_sdio_softc *sc) +{ + struct mmc_request *req; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + if (req) { + /* Finalize active request. */ + /*device_printf(sc->sc_dev, "Finalize request %i\n",req->cmd->opcode);*/ + sc->sc_req = NULL; + sc->sc_curcmd = NULL; + req->done(req); + + + } else + device_printf(sc->sc_dev, "No active request to finalize!\n"); +} + +static void +mv_sdio_init(device_t dev) +{ + struct mv_sdio_softc *sc; + uint32_t host_cr; + + sc = device_get_softc(dev); + + /* Disable interrupts. */ + sc->sc_irq_mask = 0; + sc->sc_eirq_mask = 0; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Clear interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, MV_SDIO_EIRQ_ALL); + + /* Enable interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR_EN, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR_EN, MV_SDIO_EIRQ_ALL); + + /* Initialize Host Control Register. */ + host_cr = (MV_SDIO_HOST_CR_PUSHPULL | MV_SDIO_HOST_CR_BE | + MV_SDIO_HOST_CR_TMOVAL(MV_SDIO_TMO_MAX) | MV_SDIO_HOST_CR_TMO); + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + /* Stop clock and reset Transfer Mode Register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, MV_SDIO_XFER_STOP_CLK); + + /* Set maximum clock divider value. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + + /* Reset status, state machine and FIFOs synchronously. */ + MV_SDIO_WR4(sc, MV_SDIO_SW_RESET, MV_SDIO_SW_RESET_ALL); + DELAY(MV_SDIO_RESET_DELAY); +} + +static void +mv_sdio_init_host(struct mv_sdio_softc *sc) +{ + struct mmc_host *host; + + host = &sc->sc_host; + + /* Clear host structure. */ + bzero(host, sizeof(struct mmc_host)); + + /* Calculate minimum and maximum operating frequencies. */ + host->f_min = MV_SDIO_F_BASE / (MV_SDIO_CLK_DIV_MAX + 1); + host->f_max = MV_SDIO_F_MAX; + + /* Set operation conditions (voltage). */ + host->host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + + /* Set additional host controller capabilities. */ + host->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED; +} + +static void +mv_sdio_add_sysctls(struct mv_sdio_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid_list *children; + struct sysctl_oid *tree; + + ctx = device_get_sysctl_ctx(sc->sc_dev); + children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); + tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "params", + CTLFLAG_RD, 0, "Driver parameters"); + children = SYSCTL_CHILDREN(tree); + + SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "use_dma", + CTLTYPE_UINT | CTLFLAG_RW, sc, 0, mv_sdio_sysctl_use_dma, + "I", "Use DMA for data transfers (0-1)"); +} + +/* + * This sysctl allows switching between DMA and PIO modes for data transfers: + * + * dev.mv_sdio..params.use_dma + * + * Values: + * + * - 1 sets DMA mode + * - 0 sets PIO mode + * + * Driver uses DMA mode by default. + */ +static int +mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS) +{ + struct mv_sdio_softc *sc; + uint32_t use_dma; + int error; + + sc = (struct mv_sdio_softc *)arg1; + + use_dma = sc->sc_use_dma; + + error = sysctl_handle_int(oidp, &use_dma, 0, req); + if (error != 0 || req->newptr == NULL) + return (error); + + if (use_dma > 1) + return (EINVAL); + + mtx_lock(&sc->sc_mtx); + + /* Check if requested mode is already being used. */ + if (sc->sc_use_dma == use_dma) { + mtx_unlock(&sc->sc_mtx); + return (EPERM); + } + + if (!(sc->sc_mapped)) { + device_printf(sc->sc_dev, "DMA not initialized!\n"); + mtx_unlock(&sc->sc_mtx); + return (ENOMEM); + } + + /* Set new mode. */ + sc->sc_use_dma = use_dma; + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + + if (error != 0) + return; + + /* Get first segment's physical address. */ + *(bus_addr_t *)arg = segs->ds_addr; +} + +static int +mv_sdio_dma_init(struct mv_sdio_softc *sc) +{ + device_t dev; + bus_size_t dmabuf_size; + + dev = sc->sc_dev; + dmabuf_size = MAXPHYS; + + /* Create DMA tag. */ + if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ + MV_SDIO_DMA_SEGMENT_SIZE, 0, /* alignment, boundary */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filtfunc, filtfuncarg */ + MAXPHYS, 1, /* maxsize, nsegments */ + MAXPHYS, BUS_DMA_ALLOCNOW, /* maxsegsz, flags */ + NULL, NULL, /* lockfunc, lockfuncarg */ + &sc->sc_dmatag) != 0) { + device_printf(dev, "Could not create DMA tag!\n"); + return (-1); + } + + /* Allocate DMA memory. */ + if (bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_dmamem, + BUS_DMA_NOWAIT, &sc->sc_dmamap) != 0) { + device_printf(dev, "Could not allocate DMA memory!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + + /* Find the biggest available DMA buffer size. */ + while (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap, + (void *)sc->sc_dmamem, dmabuf_size, mv_sdio_getaddr, + &sc->sc_physaddr, 0) != 0) { + dmabuf_size >>= 1; + if (dmabuf_size < MV_SDIO_BLOCK_SIZE) { + device_printf(dev, "Could not load DMA map!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + } + + sc->sc_mapped++; + sc->sc_dma_size = dmabuf_size; + + return (0); +} + +static void +mv_sdio_dma_finish(struct mv_sdio_softc *sc) +{ + + /* Free DMA resources. */ + if (sc->sc_mapped) { + bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap); + sc->sc_mapped--; + } + if (sc->sc_dmamem != NULL) + bus_dmamem_free(sc->sc_dmatag, sc->sc_dmamem, sc->sc_dmamap); + if (sc->sc_dmamap != NULL) + bus_dmamap_destroy(sc->sc_dmatag, sc->sc_dmamap); + if (sc->sc_dmatag != NULL) + bus_dma_tag_destroy(sc->sc_dmatag); +} + +static int +mv_sdio_start_command(struct mv_sdio_softc *sc, struct mmc_command *cmd) +{ + struct mmc_request *req; + uint32_t cmdreg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + sc->sc_curcmd = cmd; + + cmd->error = MMC_ERR_NONE; + + /* Check if card is in the slot. */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) && + (sc->sc_card_present == 0)) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Check if clock is enabled. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_STOP_CLK) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Write command argument. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGL, cmd->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGH, cmd->arg >> 16); + + /* Determine response type. */ + if (cmd->flags & MMC_RSP_136) + cmdreg = MV_SDIO_CMD_RSP_136; + else if (cmd->flags & MMC_RSP_BUSY) + cmdreg = MV_SDIO_CMD_RSP_48_BUSY; + else if (cmd->flags & MMC_RSP_PRESENT) + cmdreg = MV_SDIO_CMD_RSP_48; + else { + /* No response. */ + cmdreg = MV_SDIO_CMD_RSP_NONE; + /* Enable host to detect unexpected response. */ + cmdreg |= MV_SDIO_CMD_UNEXPECTED_RSP; + sc->sc_irq_mask |= MV_SDIO_CMD_UNEXPECTED_RSP; + } + + /* Check command checksum if needed. */ + if (cmd->flags & MMC_RSP_CRC) + cmdreg |= MV_SDIO_CMD_CRC7; + /* Check command opcode if needed. */ + if (cmd->flags & MMC_RSP_OPCODE) + cmdreg |= MV_SDIO_CMD_INDEX_CHECK; + + /* Set commannd opcode. */ + cmdreg |= MV_SDIO_CMD_INDEX(cmd->opcode); + + /* Setup interrupts. */ + sc->sc_irq_mask = MV_SDIO_IRQ_CMD; + sc->sc_eirq_mask = MV_SDIO_EIRQ_ALL; + + /* Prepare data transfer. */ + if (cmd->data) { + cmdreg |= (MV_SDIO_CMD_DATA_PRESENT | MV_SDIO_CMD_DATA_CRC16); + if (mv_sdio_start_data(sc, cmd->data) < 0) { + cmd->error = MMC_ERR_FAILED; + printf("mv_sdio_start_data() failed!\n"); + mv_sdio_finalize_request(sc); + return (-1); + } + } + + /* Write command register. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD, cmdreg); + + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, ~MV_SDIO_IRQ_CARD_EVENT /*MV_SDIO_IRQ_ALL*/); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, 0xffff /*MV_SDIO_EIRQ_ALL*/); + + /* Update interrupt/error interrupt enable registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Do not complete request, interrupt handler will do this. */ + return (0); +} + +static void +mv_sdio_finish_command(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + struct mmc_data *data; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + data = cmd->data; + + /* Get response. */ + if (cmd->flags & MMC_RSP_PRESENT) { + if(cmd->flags & MMC_RSP_136) + /* 136-bit response. */ + mv_sdio_handle_136bit_resp(sc); + else + /* 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, NULL); + } + + if (data) { + /* + * Disable command complete interrupt. It has already been + * handled. + */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_CMD; + + /* Enable XFER interrupt. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_XFER; + + /* Check which data interrupts we need to activate. */ + if (sc->sc_use_dma) + /* DMA transaction. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_DMA; + else if (data->flags & MMC_DATA_READ) + /* Read transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_RX_FULL; + else + /* Write transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_TX_EMPTY; + + /* Check if Auto-CMD12 interrupt will be needed. */ + if (sc->sc_req->stop) + sc->sc_irq_mask |= MV_SDIO_IRQ_AUTOCMD12; + + /* Update interrupt enable register. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + /* We're done. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static int +mv_sdio_start_data(struct mv_sdio_softc *sc, struct mmc_data *data) +{ + struct mmc_command *stop; + uint32_t autocmd12reg, xfer, host_sr; + size_t blk_size, blk_count; + int retries; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + /* + * No transfer can be started when FIFO_EMPTY bit in MV_SDIO_HOST_SR + * is not set. This bit is sometimes not set instantly after XFER + * interrupt has been asserted. + */ + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + + retries = 10; + while (!(host_sr & MV_SDIO_HOST_SR_FIFO_EMPTY)) { + if (retries == 0) + return (-1); + retries--; + DELAY(MV_SDIO_FIFO_EMPTY_DELAY); + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + } + + /* Clear data offset. */ + sc->sc_data_offset = 0; + + /* + * Set block size. It can be less than or equal to MV_SDIO_BLOCK_SIZE + * bytes. + */ + blk_size = (data->len < MV_SDIO_BLOCK_SIZE) ? data->len : + MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_SIZE, blk_size); + + /* Set block count. */ + blk_count = (data->len + MV_SDIO_BLOCK_SIZE - 1) / MV_SDIO_BLOCK_SIZE; + MV_SDIO_WR4(sc, MV_SDIO_BLK_COUNT, blk_count); + + /* We want to initiate transfer by software. */ + xfer = MV_SDIO_XFER_SW_WR_EN; + + if (sc->sc_use_dma) { + /* Synchronize before DMA transfer. */ + if (data->flags & MMC_DATA_READ) + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREREAD); + else { + memcpy(sc->sc_dmamem, data->data, data->len); + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREWRITE); + } + + /* Write DMA buffer address register. */ + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRL, sc->sc_physaddr & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRH, sc->sc_physaddr >> 16); + } else + /* Set PIO transfer mode. */ + xfer |= MV_SDIO_XFER_PIO; + + /* + * Prepare Auto-CMD12. This command is automatically sent to the card + * by the host controller to stop multiple-block data transaction. + */ + if (sc->sc_req->stop) { + stop = sc->sc_req->stop; + + /* Set Auto-CMD12 argument. */ + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGL, stop->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGH, stop->arg >> 16); + + /* Set Auto-CMD12 opcode. */ + autocmd12reg = MV_SDIO_AUTOCMD12_INDEX(stop->opcode); + + /* Check busy signal if needed. */ + if (stop->flags & MMC_RSP_BUSY) + autocmd12reg |= MV_SDIO_AUTOCMD12_BUSY_CHECK; + /* Check Auto-CMD12 index. */ + if (stop->flags & MMC_RSP_OPCODE) + autocmd12reg |= MV_SDIO_AUTOCMD12_INDEX_CHECK; + + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12, autocmd12reg); + + xfer |= MV_SDIO_XFER_AUTOCMD12; + } + + /* Change data direction. */ + if (data->flags & MMC_DATA_READ) + xfer |= MV_SDIO_XFER_TO_HOST; + + /* Write transfer mode register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + return (0); +} + +static void +mv_sdio_handle_136bit_resp(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + uint32_t resp[8]; + uint32_t base, extra; + int i, j, off; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + + /* Collect raw response from the controller. */ + for (i = 0; i < 8; i++) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + + /* Response passed to MMC bus is shifted by one byte. */ + extra = 0; + for (i = 0, j = 7; i < 4; i++, j -= 2) { + off = (i ? 0 : 2); + base = resp[j] | (resp[j - 1] << (16 - off)); + cmd->resp[3 - i] = (base << (6 + off)) + extra; + extra = base >> (26 - off); + } +} + +static void +mv_sdio_handle_48bit_resp(struct mv_sdio_softc *sc, struct mmc_command *stop) +{ + struct mmc_command *cmd; + uint32_t resp[3], word; + uint8_t *rp; + int i; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (stop == NULL) + cmd = sc->sc_curcmd; + else + cmd = stop; + + /* Collect raw response from the controller. */ + for (i = 0; i < 3; i++) { + if (stop == NULL) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + else + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_AUTOCMD12_RSP(i)); + } + + /* Clear MMC bus response buffer. */ + bzero(&cmd->resp[0], 4 * sizeof(uint32_t)); + + /* + * Fill MMC bus response buffer. + */ + + rp = (uint8_t *)&cmd->resp[0]; + + /* Response bits [45:14] */ + word = (resp[1] & MV_SDIO_RSP48_BM16) | + ((resp[0] & MV_SDIO_RSP48_BM16) << 16); + + /* Response bits [15:14] and [13:8] */ + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | + ((word & MV_SDIO_RSP48_BM2) << 6); + + /* Response bits [15:14] are already included. */ + word >>= 2; + + /* Response bits [45:16] */ + memcpy(rp, &word, sizeof(uint32_t)); +} + +static void +mv_sdio_intr(void *arg) +{ + struct mv_sdio_softc *sc; + uint32_t irq_stat, eirq_stat; + + sc = (struct mv_sdio_softc *)arg; +#if 0 + device_printf(sc->sc_dev,"intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n", + MV_SDIO_RD4( sc, MV_SDIO_IRQ_SR ) , + MV_SDIO_RD4( sc, MV_SDIO_IRQ_EN ), + MV_SDIO_RD4( sc, MV_SDIO_HOST_SR )); +#endif + + + mtx_lock(&sc->sc_mtx); + + + + irq_stat = MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & sc->sc_irq_mask; + eirq_stat = MV_SDIO_RD4(sc, MV_SDIO_EIRQ_SR) & sc->sc_eirq_mask; + + /* + * In case of error interrupt, interrupt cause will be identified by + * checking bits in error interrupt status register. + */ + irq_stat &= ~MV_SDIO_IRQ_ERR; + + /* Handle command interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_CMD) || + (eirq_stat & MV_SDIO_EIRQS_CMD)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_cmd_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_CMD; + eirq_stat &= ~MV_SDIO_EIRQS_CMD; + } + + /* Handle data interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_DATA) || + (eirq_stat & MV_SDIO_EIRQS_DATA)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_data_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_DATA; + eirq_stat &= ~MV_SDIO_EIRQS_DATA; + } + + /* Handle unexpected interrupts. */ + if (irq_stat) { + device_printf(sc->sc_dev, "Unexpected interrupt(s)! " + "IRQ SR = 0x%08x\n", irq_stat); + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + } + if (eirq_stat) { + device_printf(sc->sc_dev, "Unexpected error interrupt(s)! " + "EIRQ SR = 0x%08x\n", eirq_stat); + /* Clear error interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + } + + mtx_unlock(&sc->sc_mtx); +} + +static void +mv_sdio_cmd_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got command interrupt, but there " + "is no active command!\n"); + return; + } + + /* Handle unexpected response error. */ + if (irq & MV_SDIO_IRQ_UNEXPECTED_RSP) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Unexpected response!\n"); + } + + /* Handle errors. */ + if (eirq & MV_SDIO_EIRQ_CMD_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Error - command %d timeout!\n", + sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_CMD_CRC7) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "checksum!\n", sc->sc_curcmd->opcode); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Command %d error!\n", + sc->sc_curcmd->opcode); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + if (irq & MV_SDIO_IRQ_CMD) + mv_sdio_finish_command(sc); +} + +static void +mv_sdio_data_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + struct mmc_command *stop; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active command.\n"); + return; + } + if ((!sc->sc_curcmd->data) && ((sc->sc_curcmd->flags & + MMC_RSP_BUSY) == 0)) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active data transaction.n\n"); + sc->sc_curcmd->error = MMC_ERR_FAILED; + return; + } + + /* Handle errors. */ + if(eirq & MV_SDIO_EIRQ_DATA_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Data %s timeout!\n", + (sc->sc_curcmd->data->flags & MMC_DATA_READ) ? "read" : + "write"); + } else if (eirq & (MV_SDIO_EIRQ_DATA_CRC16 | + MV_SDIO_EIRQ_DATA_ENDBIT)) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Bad data checksum!\n"); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Data error!: 0x%04X \n", + eirq); + + if( 0 != ( eirq & MV_SDIO_EIRQ_CRC_STAT ) ) + { + device_printf(sc->sc_dev, "MV_SDIO_EIRQ_CRC_STAT\n"); + } + } + + /* Handle Auto-CMD12 error. */ + if (eirq & MV_SDIO_EIRQ_AUTOCMD12) { + sc->sc_req->stop->error = MMC_ERR_FAILED; + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Auto-CMD12 error!\n"); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + /* Handle PIO interrupt. */ + if (irq & (MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_RX_FULL)) + mv_sdio_transfer_pio(sc); + + /* Handle DMA interrupt. */ + if (irq & (MV_SDIO_IRQ_DMA)) { + /* Synchronize DMA buffer. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_TO_HOST) { + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTWRITE); + memcpy(sc->sc_curcmd->data->data, sc->sc_dmamem, + sc->sc_curcmd->data->len); + } else + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTREAD); + + /* Disable DMA interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_DMA; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Handle Auto-CMD12 interrupt. */ + if (irq & (MV_SDIO_IRQ_AUTOCMD12)) { + stop = sc->sc_req->stop; + /* Get 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, stop); + + /* Disable Auto-CMD12 interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_AUTOCMD12; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Transfer finished. Disable interrupts and finalize request. */ + if (irq & (MV_SDIO_IRQ_XFER)) { + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static void +mv_sdio_disable_intr(struct mv_sdio_softc *sc) +{ + + /* Disable interrupts that were enabled. */ + sc->sc_irq_mask &= ~(sc->sc_irq_mask); + sc->sc_eirq_mask &= ~(sc->sc_eirq_mask); + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); +} + +static void +mv_sdio_card_task(void *arg, int pending) +{ + struct mv_sdio_softc *sc; + + int device_probe_and_attach_ret_val = 0; + + sc = (struct mv_sdio_softc *)arg; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_card_present) { + if (sc->sc_child) { + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host controller's registers. */ + mv_sdio_init(sc->sc_dev); + + sc->sc_child = device_add_child(sc->sc_dev, "mmc", -1); + if (sc->sc_child == NULL) { + device_printf(sc->sc_dev, "Could not add MMC bus!\n"); + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + + mtx_unlock(&sc->sc_mtx); + + device_probe_and_attach_ret_val = device_probe_and_attach(sc->sc_child); + + if( 0 != device_probe_and_attach_ret_val ) { + device_printf(sc->sc_dev, "MMC bus failed on probe " + "and attach! %i\n",device_probe_and_attach_ret_val); + device_delete_child(sc->sc_dev, sc->sc_child); + sc->sc_child = NULL; + } + } else { + if (sc->sc_child == NULL) { + mtx_unlock(&sc->sc_mtx); + return; + } + + mtx_unlock(&sc->sc_mtx); + if (device_delete_child(sc->sc_dev, sc->sc_child) != 0) { + device_printf(sc->sc_dev, "Could not delete MMC " + "bus!\n"); + } + sc->sc_child = NULL; + } +} + +static uint32_t +mv_sdio_read_fifo(struct mv_sdio_softc *sc) +{ + uint32_t data; + device_printf(sc->sc_dev, "This is not tested, yet MV_SDIO_FIFO not ensured\n "); + + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data = MV_SDIO_RD4(sc, MV_SDIO_FIFO); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data |= (MV_SDIO_RD4(sc, MV_SDIO_FIFO) << 16); + return data; +} + +static void +mv_sdio_write_fifo(struct mv_sdio_softc *sc, uint32_t val) +{ + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val & 0xffff); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val >> 16); +} + +static void +mv_sdio_transfer_pio(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + + cmd = sc->sc_curcmd; + + if (cmd->data->flags & MMC_DATA_READ) { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_RX_FULL) { + mv_sdio_read_block_pio(sc); + /* + * Assert delay after each block transfer to meet read + * access timing constraint. + */ + DELAY(MV_SDIO_RD_DELAY); + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks read in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_RX_FULL; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_TX_EMPTY) { + mv_sdio_write_block_pio(sc); + /* Wait while card is programming the memory. */ + while ((MV_SDIO_RD4(sc, MV_SDIO_HOST_SR) & + MV_SDIO_HOST_SR_CARD_BUSY)); + /* + * Assert delay after each block transfer to meet + * write access timing constraint. + */ + DELAY(MV_SDIO_WR_DELAY); + + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks written in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_TX_EMPTY; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } +} + +static void +mv_sdio_read_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + buffer[0] = data; + buffer[1] = (data >> 8); + buffer[2] = (data >> 16); + buffer[3] = (data >> 24); + buffer += 4; + left -= 4; + } + } else { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + *((uint32_t *)buffer) = data; + buffer += 4; + left -= 4; + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = mv_sdio_read_fifo(sc); + while (left > 0) { + *(buffer++) = data; + data >>= 8; + left--; + } + } +} + +static void +mv_sdio_write_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data = 0; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = buffer[0] + + (buffer[1] << 8) + + (buffer[2] << 16) + + (buffer[3] << 24); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } else { + while (left > 3) { + data = *((uint32_t *)buffer); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = 0; + while (left > 0) { + data <<= 8; + data += *(buffer++); + left--; + } + mv_sdio_write_fifo(sc, data); + } +} + +static int +mv_sdio_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + + sc = device_get_softc(dev); + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + *(int *)result = host->ios.bus_mode; + break; + case MMCBR_IVAR_BUS_WIDTH: + *(int *)result = host->ios.bus_width; + break; + case MMCBR_IVAR_CHIP_SELECT: + *(int *)result = host->ios.chip_select; + break; + case MMCBR_IVAR_CLOCK: + *(int *)result = host->ios.clock; + break; + case MMCBR_IVAR_F_MIN: + *(int *)result = host->f_min; + break; + case MMCBR_IVAR_F_MAX: + *(int *)result = host->f_max; + break; + case MMCBR_IVAR_HOST_OCR: + *(int *)result = host->host_ocr; + break; + case MMCBR_IVAR_MODE: + *(int *)result = host->mode; + break; + case MMCBR_IVAR_OCR: + *(int *)result = host->ocr; + break; + case MMCBR_IVAR_POWER_MODE: + *(int *)result = host->ios.power_mode; + break; + case MMCBR_IVAR_VDD: + *(int *)result = host->ios.vdd; + break; + case MMCBR_IVAR_CAPS: + *(int *)result = host->caps; + break; + case MMCBR_IVAR_TIMING: + *(int *)result = host->ios.timing; + break; + case MMCBR_IVAR_MAX_DATA: + mtx_lock(&sc->sc_mtx); + /* Return maximum number of blocks the driver can handle. */ + if (sc->sc_use_dma) + *(int *)result = (sc->sc_dma_size / + MV_SDIO_BLOCK_SIZE); + else + *(int *)result = MV_SDIO_BLOCKS_MAX; + mtx_unlock(&sc->sc_mtx); + break; + default: + return (EINVAL); + } + + return (0); +} + +static int +mv_sdio_write_ivar(device_t dev, device_t child, int index, uintptr_t value) +{ + struct mmc_host *host; + + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + host->ios.bus_mode = value; + break; + case MMCBR_IVAR_BUS_WIDTH: + host->ios.bus_width = value; + break; + case MMCBR_IVAR_CHIP_SELECT: + host->ios.chip_select = value; + break; + case MMCBR_IVAR_CLOCK: + host->ios.clock = value; + break; + case MMCBR_IVAR_MODE: + host->mode = value; + break; + case MMCBR_IVAR_OCR: + host->ocr = value; + break; + case MMCBR_IVAR_POWER_MODE: + host->ios.power_mode = value; + break; + case MMCBR_IVAR_VDD: + host->ios.vdd = value; + break; + case MMCBR_IVAR_TIMING: + host->ios.timing = value; + break; + case MMCBR_IVAR_CAPS: + case MMCBR_IVAR_HOST_OCR: + case MMCBR_IVAR_F_MIN: + case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: + default: + /* Instance variable not writable. */ + return (EINVAL); + } + + return (0); +} + diff --git a/sys/arm/mv/mv_sdio.h b/sys/arm/mv/mv_sdio.h new file mode 100644 index 0000000..b54b59d --- /dev/null +++ b/sys/arm/mv/mv_sdio.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _MVSDMMC_INCLUDE +#define _MVSDMMC_INCLUDE + + +#define MVSDMMC_DMA_SIZE 65536 + + + +/* + * The base MMC clock rate + */ + +#define MVSDMMC_CLOCKRATE_MIN 100000 +#define MVSDMMC_CLOCKRATE_MAX 50000000 + +#define MVSDMMC_BASE_FAST_CLOCK 200000000 + + +/* + * SDIO register + */ + +#define MV_SDIO_DMA_ADDRL 0x000 +#define MV_SDIO_DMA_ADDRH 0x004 +#define MV_SDIO_BLK_SIZE 0x008 +#define MV_SDIO_BLK_COUNT 0x00c +#define MV_SDIO_CMD 0x01c +#define MV_SDIO_CMD_ARGL 0x010 +#define MV_SDIO_CMD_ARGH 0x014 +#define MV_SDIO_XFER 0x018 +#define MV_SDIO_HOST_SR 0x048 +#define MV_SDIO_HOST_CR 0x050 +#define MV_SDIO_SW_RESET 0x05c +#define MV_SDIO_IRQ_SR 0x060 +#define MV_SDIO_EIRQ_SR 0x064 +#define MV_SDIO_IRQ_SR_EN 0x068 +#define MV_SDIO_EIRQ_SR_EN 0x06c +#define MV_SDIO_IRQ_EN 0x070 +#define MV_SDIO_EIRQ_EN 0x074 +#define MV_SDIO_AUTOCMD12_ARGL 0x084 +#define MV_SDIO_AUTOCMD12_ARGH 0x088 +#define MV_SDIO_AUTOCMD12 0x08c +#define MV_SDIO_CLK_DIV 0x128 +#define MV_SDIO_FIFO 0xa2100 /* FIXME!!! */ + +#define MV_SDIO_RSP(i) (0x020 + ((i)<<2)) +#define MV_SDIO_AUTOCMD12_RSP(i) (0x090 + ((i)<<2)) + +/* + * SDIO Status-Register + */ +#define MV_SDIO_HOST_SR_CARD_BUSY (1<<1) +#define MV_SDIO_HOST_SR_FIFO_EMPTY (1<<13) + + + +/* + * SDIO_CMD + */ +#define MV_SDIO_CMD_RSP_NONE (0 << 0) +#define MV_SDIO_CMD_RSP_136 (1 << 0) +#define MV_SDIO_CMD_RSP_48 (2 << 0) +#define MV_SDIO_CMD_RSP_48_BUSY (3 << 0) +#define MV_SDIO_CMD_DATA_CRC16 (1<<2) +#define MV_SDIO_CMD_CRC7 (1<<3) +#define MV_SDIO_CMD_INDEX_CHECK (1<<4) +#define MV_SDIO_CMD_DATA_PRESENT (1<<5) +#define MV_SDIO_CMD_UNEXPECTED_RSP (1<<7) +#define MV_SDIO_CMD_INDEX(x) ( (x) << 8 ) + + +/* + * SDIO_XFER_MODE + */ +#define MV_SDIO_XFER_STOP_CLK (1 << 5) +#define MV_SDIO_XFER_TO_HOST (1 << 4) +#define MV_SDIO_XFER_PIO (1 << 3) +#define MV_SDIO_XFER_AUTOCMD12 (1 << 2) +#define MV_SDIO_XFER_SW_WR_EN (1 << 1) + +/* + * SDIO_HOST_CTRL + */ +#define MV_SDIO_HOST_CR_PUSHPULL (1 << 0) +#define MV_SDIO_HOST_CR_MMC (3 << 1) +#define MV_SDIO_HOST_CR_BE (1 << 3) +#define MV_SDIO_HOST_CR_4BIT (1 << 9) +#define MV_SDIO_HOST_CR_HIGHSPEED (1 << 10) + +#define MV_SDIO_HOST_CR_TMOVAL(x) ((x) << 11) +#define MV_SDIO_HOST_CR_TMO ( 1 << 15 ) + +/* + * NORmal status bits + */ + + +#define MV_SDIO_IRQ_ERR (1<<15) +#define MV_SDIO_IRQ_UNEXPECTED_RSP (1<<14) +#define MV_SDIO_IRQ_AUTOCMD12 (1<<13) +#define MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN (1<<12) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL (1<<11) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED (1<<10) +#define MV_SDIO_IRQ_READ_WAIT (1<<9) +#define MV_SDIO_IRQ_CARD_EVENT (1<<8) +#define MV_SDIO_IRQ_RX_FULL (1<<5) +#define MV_SDIO_IRQ_TX_EMPTY (1<<4) +#define MV_SDIO_IRQ_DMA (1<<3) +#define MV_SDIO_IRQ_BLOCK_GAP (1<<2) +#define MV_SDIO_IRQ_XFER (1<<1) +#define MV_SDIO_IRQ_CMD (1<<0) + +#define MV_SDIO_IRQ_ALL (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_BLOCK_GAP | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_CARD_EVENT | MV_SDIO_IRQ_READ_WAIT | MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED | MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL | MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN | MV_SDIO_IRQ_AUTOCMD12 | MV_SDIO_IRQ_UNEXPECTED_RSP | MV_SDIO_IRQ_ERR ) + +//#define MV_SDIO_IRQ_SR + + +/* + * ERR status bits + */ +#define MV_SDIO_EIRQ_CRC_STAT (1<<14) +#define MV_SDIO_EIRQ_CRC_STARTBIT (1<<13) +#define MV_SDIO_EIRQ_CRC_ENDBIT (1<<12) +#define MV_SDIO_EIRQ_RSP_TBIT (1<<11) +#define MV_SDIO_EIRQ_XFER_SIZE (1<<10) +#define MV_SDIO_EIRQ_CMD_STARTBIT (1<<9) +#define MV_SDIO_EIRQ_AUTOCMD12 (1<<8) +#define MV_SDIO_EIRQ_DATA_ENDBIT (1<<6) +#define MV_SDIO_EIRQ_DATA_CRC16 (1<<5) +#define MV_SDIO_EIRQ_DATA_TMO (1<<4) +#define MV_SDIO_EIRQ_CMD_INDEX (1<<3) +#define MV_SDIO_EIRQ_CMD_ENDBIT (1<<2) +#define MV_SDIO_EIRQ_CMD_CRC7 (1<<1) +#define MV_SDIO_EIRQ_CMD_TMO (1<<0) + +#define MV_SDIO_EIRQ_ALL (MV_SDIO_EIRQ_CMD_TMO | \ + MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | \ + MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | \ + MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | \ + MV_SDIO_EIRQ_CMD_STARTBIT |\ + MV_SDIO_EIRQ_XFER_SIZE |\ + MV_SDIO_EIRQ_RSP_TBIT |\ + MV_SDIO_EIRQ_CRC_ENDBIT |\ + MV_SDIO_EIRQ_CRC_STARTBIT |\ + MV_SDIO_EIRQ_CRC_STAT) + +/* AUTOCMD12 register values */ +#define MV_SDIO_AUTOCMD12_BUSY_CHECK (1<<0) +#define MV_SDIO_AUTOCMD12_INDEX_CHECK (1<<1) +#define MV_SDIO_AUTOCMD12_INDEX(x) (x<<8) + +/* Software reset register */ +#define MV_SDIO_SW_RESET_ALL (1<<8) + +/* */ +#define MV_SDIO_SIG_CD 1 +#define MV_SDIO_SIG_WP 2 + +#endif /* _MVSDMMC_INCLUDE */ + diff --git a/sys/boot/uboot/common/main.c b/sys/boot/uboot/common/main.c index 82c86b2..0a5b368 100644 --- a/sys/boot/uboot/common/main.c +++ b/sys/boot/uboot/common/main.c @@ -122,6 +122,7 @@ main(void) struct api_signature *sig = NULL; int i; struct open_file f; + char *ub_currdev; if (!api_search_sig(&sig)) return (-1); @@ -166,6 +167,7 @@ main(void) printf("(%s, %s)\n", bootprog_maker, bootprog_date); meminfo(); + ub_currdev = ub_env_get("currdev"); /* * March through the device switch probing for things. */ @@ -198,8 +200,13 @@ main(void) if (devsw[i] == NULL) panic("No boot device found!"); - env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), - uboot_setcurrdev, env_nounset); + if (ub_currdev) { + env_setenv("currdev", EV_VOLATILE, ub_currdev, + uboot_setcurrdev, env_nounset); + } else { + env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), + uboot_setcurrdev, env_nounset); + } env_setenv("loaddev", EV_VOLATILE, uboot_fmtdev(&currdev), env_noset, env_nounset); diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index f101e65..53c51de 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -67,15 +67,38 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include + #include "mmcbr_if.h" #include "mmcbus_if.h" +/* CIS structure of SDIO card */ +struct sdio_function { + int number; + uint8_t cis1_major; + uint8_t cis1_minor; + uint16_t manufacturer; + uint16_t product; + uint16_t max_blksize; + uint8_t max_tran_speed; /* only for func0 */ + STAILQ_ENTRY(sdio_function) sdiof_list; +}; + struct mmc_softc { device_t dev; struct mtx sc_mtx; struct intr_config_hook config_intrhook; device_t owner; uint32_t last_rca; + uint32_t __sdio_rca; /* XXX Temp; for testng only */ + uint32_t __sdio_cis1_info; + uint8_t sdio_nfunc; + u_char sdio_bus_width; + uint8_t sdio_support_hs; + u_char sdio_timing; + uint32_t sdio_tran_speed; + struct sdio_function sdio_func0; + STAILQ_HEAD(, sdio_function) sdiof_head; }; /* @@ -102,6 +125,7 @@ struct mmc_ivars { uint32_t hs_tran_speed; /* Max speed in high speed mode */ uint32_t erase_sector; /* Card native erase sector size */ char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ + struct sdio_function *sdiof; }; #define CMD_RETRIES 3 @@ -159,10 +183,16 @@ static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, int size); static int mmc_highest_voltage(uint32_t ocr); static void mmc_idle_cards(struct mmc_softc *sc); +static int mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn); +static uint8_t mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr); +static int mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, + uint32_t adr, uint8_t *data); static void mmc_ms_delay(int ms); static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); static void mmc_power_down(struct mmc_softc *sc); static void mmc_power_up(struct mmc_softc *sc); +static int mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, + uint8_t *nfunc, uint8_t *mem_present); static void mmc_rescan_cards(struct mmc_softc *sc); static void mmc_scan(struct mmc_softc *sc); static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, @@ -220,6 +250,8 @@ mmc_attach(device_t dev) sc->dev = dev; MMC_LOCK_INIT(sc); + STAILQ_INIT(&sc->sdiof_head); + /* We'll probe and attach our children later, but before / mount */ sc->config_intrhook.ich_func = mmc_delayed_attach; sc->config_intrhook.ich_arg = sc; @@ -470,6 +502,7 @@ mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, return (0); } +/* CMD0 */ static void mmc_idle_cards(struct mmc_softc *sc) { @@ -494,6 +527,7 @@ mmc_idle_cards(struct mmc_softc *sc) mmc_ms_delay(1); } +/* CMD41 -> CMD55 */ static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -521,6 +555,7 @@ mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD1 */ static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -548,6 +583,7 @@ mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD8 */ static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) { @@ -600,6 +636,7 @@ mmc_power_down(struct mmc_softc *sc) mmcbr_update_ios(dev); } +/* CMD7 */ static int mmc_select_card(struct mmc_softc *sc, uint16_t rca) { @@ -1042,6 +1079,7 @@ mmc_app_decode_sd_status(uint32_t *raw_sd_status, sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); } +/* CMD2 */ static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) { @@ -1162,6 +1200,7 @@ mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) return (err); } +/* CMD3 */ static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) { @@ -1177,6 +1216,7 @@ mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) return (err); } +/* CMD13 */ static int mmc_send_status(struct mmc_softc *sc, uint16_t rca, uint32_t *status) { @@ -1223,6 +1263,384 @@ mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) ivar->read_only ? ", read-only" : ""); } +/* + * Enables the given function on SDIO card. + */ +static int +mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn) +{ + int err, i; + uint8_t funcs; + + if (fn > sc->sdio_nfunc) { + device_printf(sc->dev, "Invalid function to enable: %d\n", fn); + return (MMC_ERR_INVALID); + } + + funcs = mmc_io_read_1(sc, 0, SD_IO_CCCR_FN_READY); + + funcs |= 1 << fn; + err = mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_FN_ENABLE, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error writing SDIO func enable %d\n", err); + return (err); + } + + funcs = 0; + for(i=0; i < 10; i++) { + funcs = mmc_io_read_1(sc, 0, SD_IO_CCCR_FN_READY); + + if (funcs & (1 << fn)) + return 0; + mmc_ms_delay(10); + } + + device_printf(sc->dev, "Cannot enable function %d!\n", fn); + return (MMC_ERR_FAILED); +} + +/* CMD52 */ +static int +mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *data) +{ + struct mmc_command cmd; + int err; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = SD_IO_RW_DIRECT; + cmd.arg = SD_IO_RW_FUNC(fn) | SD_IO_RW_ADR(adr); + if (wr) + cmd.arg |= SD_IO_RW_WR | SD_IO_RW_RAW | SD_IO_RW_DAT(*data); + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.data = NULL; + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + /* Just for information... */ + if (R5_IO_CURRENT_STATE(cmd.resp[0]) != 1) + printf("!!! SDIO state %d\n", R5_IO_CURRENT_STATE(cmd.resp[0])); + + if (cmd.resp[0] & R5_ERROR) + printf("An error was detected!\n"); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + printf("A CRC error was detected!\n"); + + *data = (uint8_t) (cmd.resp[0] & 0xff); + return (MMC_ERR_NONE); +} + +/* CMD53 */ +static int +mmc_io_rw_extended(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *datap, size_t datalen, uint8_t incr, uint8_t blks) +{ + int err; + struct mmc_command cmd; + struct mmc_data data; + + memset(&cmd, 0, sizeof(cmd)); + memset(&data, 0, sizeof(data)); + memset(datap, 0, datalen); + + cmd.opcode = SD_IO_RW_EXTENDED; + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.arg = SD_IO_RW_FUNC(fn); + cmd.arg |= SD_IO_RW_ADR(adr); + if (blks) + cmd.arg |= SD_IOE_RW_BLK | SD_IOE_RW_LEN(blks); + else + cmd.arg |= SD_IOE_RW_LEN(datalen); + if (wr) + cmd.arg |= SD_IO_RW_WR; + if (incr) + cmd.arg |= SD_IO_RW_INCR; + cmd.data = &data; + + data.data = datap; + data.len = datalen; + data.flags = wr ? MMC_DATA_WRITE : MMC_DATA_READ; + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + return (MMC_ERR_NONE); +} + +static uint8_t +mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr) +{ + int err; + uint8_t val = 0; + + err = mmc_io_rw_direct(sc, 0, fn, adr, &val); + if (err) { + device_printf(sc->dev, "Err reading FN %d addr 0x%08X: %d", + fn, adr, err); + return (0xff); + } + return val; +} + +/* + * Parse Card Information Structure of the SDIO card. + * Both Function 0 CIS and Function 1-7 CIS are supported. + */ +static int +mmc_io_parse_cis(struct mmc_softc *sc, uint8_t func, uint32_t cisptr, struct sdio_function *sdio_func) +{ + uint32_t tmp; + + uint8_t tuple_id, tuple_len, func_id; + uint32_t addr, maninfo_p; + + char *cis1_info[4]; + int start, i, ch, count; + char cis1_info_buf[256]; + + sdio_func->number = func; + + cis1_info[0] = NULL; + cis1_info[1] = NULL; + cis1_info[2] = NULL; + cis1_info[3] = NULL; + memset(cis1_info_buf, 0, 256); + + tmp = 0; + addr = cisptr; + + /* + * XXX Some parts of this code are taken + * from sys/dev/pccard/pccard_cis.c. + * Need to think about making it more abstract. + */ + do { + tuple_id = mmc_io_read_1(sc, 0, addr++); + if (tuple_id == SD_IO_CISTPL_END) + break; + tuple_len = mmc_io_read_1(sc, 0, addr++); + if (tuple_len == 0 && tuple_id != 0x00) { + device_printf(sc->dev, + "Parse error: 0-length tuple %02X\n", tuple_id); + break; + } + + switch (tuple_id) { + case SD_IO_CISTPL_VERS_1: + maninfo_p = addr; + + sdio_func->cis1_major = mmc_io_read_1(sc, 0, maninfo_p); + sdio_func->cis1_minor = mmc_io_read_1(sc, 0, maninfo_p + 1); + + /* + * XXX Temp; use this to test if multi-byte read from + * cis1_info will also return crap + */ + sc->__sdio_cis1_info = maninfo_p + 2; + for (count = 0, start = 0, i = 0; + (count < 4) && ((i + 4) < 256); i++) { + ch = mmc_io_read_1(sc, 0, maninfo_p + 2 + i); + if (ch == 0xff) + break; + cis1_info_buf[i] = ch; + if (ch == 0) { + cis1_info[count] = + cis1_info_buf + start; + start = i + 1; + count++; + } + } + device_printf(sc->dev, "Read using 1-byte read:\n"); + hexdump(cis1_info_buf, 256, NULL, 0); + + device_printf(sc->dev, "*** Info[0]: %s\n", cis1_info[0]); + device_printf(sc->dev, "*** Info[1]: %s\n", cis1_info[1]); + device_printf(sc->dev, "*** Info[2]: %s\n", cis1_info[2]); + device_printf(sc->dev, "*** Info[3]: %s\n", cis1_info[3]); + break; + + case SD_IO_CISTPL_MANFID: + if (tuple_len < 4) { + device_printf(sc->dev, "MANFID is too short\n"); + break; + } + sdio_func->manufacturer = mmc_io_read_1(sc, 0, addr); + sdio_func->manufacturer |= mmc_io_read_1(sc, 0, addr + 1) << 8; + + sdio_func->product = mmc_io_read_1(sc, 0, addr + 2); + sdio_func->product |= mmc_io_read_1(sc, 0, addr + 3) << 8; + break; + + case SD_IO_CISTPL_FUNCID: + /* Function ID for SDIO devices is always 0x0C */ + if (tuple_len < 1) { + device_printf(sc->dev, "FUNCID is too short\n"); + break; + } + func_id = mmc_io_read_1(sc, 0, addr); + if (func_id != 0x0C) + device_printf(sc->dev, "func_id non-std: %d\n", func_id); + break; + + case SD_IO_CISTPL_FUNCE: + if (tuple_len < 4) { + device_printf(sc->dev, "FUNCE is too short\n"); + break; + } + uint8_t ext_data_type = mmc_io_read_1(sc, 0, addr); + + if (func == 0) { + if (ext_data_type != 0x0) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + sdio_func->max_blksize = + mmc_io_read_1(sc, 0, addr + 1); + sdio_func->max_blksize |= + mmc_io_read_1(sc, 0, addr + 2) << 8; + sdio_func->max_tran_speed = + mmc_io_read_1(sc, 0, addr + 3); + uint8_t max_tran_rate = + sdio_func->max_tran_speed & 0x7; + uint8_t timecode = + (sdio_func->max_tran_speed >> 3) & 0xF; + + device_printf(sc->dev, + "*** Max tran speed: %02X (unit %d, time value code %d\n", + sdio_func->max_tran_speed, max_tran_rate, timecode); + } else { + if (ext_data_type != 0x1) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + sdio_func->max_blksize = + mmc_io_read_1(sc, 0, addr + 0x0c); + sdio_func->max_blksize |= + mmc_io_read_1(sc, 0, addr + 0x0d) << 8; + + } + + break; + + default: + device_printf(sc->dev, + "*** Skipping tuple ID %02X len %02X\n", + tuple_id, tuple_len); + break; + } + + addr += tuple_len; + tmp++; + } while (tuple_id != SD_IO_CISTPL_END && tmp < 10); + + return 0; +} + +/* + * Parse Card Common Control Register of the SDIO card + */ +static int +mmc_io_parse_cccr(struct mmc_softc *sc) +{ + uint32_t cisptr = 0; + + cisptr = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR); + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in CCCR: %08X\n", cisptr); + return (-1); + } + + return mmc_io_parse_cis(sc, 0, cisptr, &sc->sdio_func0); +} + +/* + * Parse Function Basic Register of the given function + */ +static int +mmc_io_parse_fbr(struct mmc_softc *sc, uint8_t func) +{ + uint32_t fbr_addr, cisptr; + + fbr_addr = SD_IO_FBR_START * func + 0x9; + cisptr = mmc_io_read_1(sc, 0, fbr_addr); + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in FBR: %08X\n", cisptr); + return (-1); + } + + struct sdio_function *f = malloc(sizeof(struct sdio_function), M_DEVBUF, M_WAITOK); + STAILQ_INSERT_TAIL(&sc->sdiof_head, f, sdiof_list); + + return mmc_io_parse_cis(sc, func, cisptr, f); +} + +static void +mmc_io_get_info(struct mmc_softc *sc) +{ + sc->sdio_bus_width = bus_width_1; + sc->sdio_support_hs = 0; + + uint8_t cardcap = mmc_io_read_1(sc, 0, SD_IO_CCCR_CARDCAP); + uint8_t hs_info = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 0x13); + + /* + * If the card is a full-speed card, it supports 4-bit bus width. + * If it is low-speed, we check 4BLS to determine if it + * supports 4-bit width + */ + if (((cardcap & (1 << 6)) && (cardcap & (1 << 7))) || + ((cardcap & (1 << 6)) == 0)) + sc->sdio_bus_width = bus_width_4; + + sc->sdio_support_hs = hs_info & (1 << 0); +} + +/* Set bus width for SDIO card */ +static int +mmc_io_set_bus_width(struct mmc_softc *sc, int width) +{ + uint8_t busctrl = mmc_io_read_1(sc, 0, SD_IO_CCCR_BUS_WIDTH); + + busctrl |= width == bus_width_4 ? CCCR_BUS_WIDTH_4 : 0; + + if (mmc_debug) + device_printf(sc->dev, "Setting SDIO bus width to %d bits\n", + width == bus_width_4 ? 4 : 1); + + return mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_BUS_WIDTH, &busctrl); +} + static void mmc_discover_cards(struct mmc_softc *sc) { @@ -1233,11 +1651,87 @@ mmc_discover_cards(struct mmc_softc *sc) device_t child; uint16_t rca = 2; u_char switch_res[64]; + uint8_t nfunc, mem_present; if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing cards\n"); while (1) { - err = mmc_all_send_cid(sc, raw_cid); + /* + * Probe SDIO first, because SDIO cards don't have + * a CID register and won't respond to the CMD2 + */ + mmc_idle_cards(sc); + err = mmc_probe_sdio(sc, 0, NULL, &nfunc, &mem_present); + sc->sdio_nfunc = nfunc; + if (err != MMC_ERR_NONE && err != MMC_ERR_TIMEOUT) { + device_printf(sc->dev, "Error probing SDIO %d\n", err); + break; + } + + /* The card answered OK -> SDIO */ + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "Detected SDIO card\n"); + mmc_send_relative_addr(sc, &resp); /* CMD3 */ + uint16_t rca = resp >> 16; + err = mmc_select_card(sc, rca); /* CMD7 */ + sc->__sdio_rca = rca; /* XXX Temp; for testing only */ + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error selecting SDIO %d\n", err); + break; + } + + device_printf(sc->dev, "Get card info\n"); + mmc_io_parse_cccr(sc); + mmc_io_get_info(sc); + for(i=1; i <= nfunc; i++) { + device_printf(sc->dev, + "Get info for function %d\n", i); + mmc_io_parse_fbr(sc, i); + mmc_io_func_enable(sc, i); + } + + device_printf(sc->dev, "=== Functions ===\n"); + struct sdio_function *f; + + STAILQ_FOREACH(f, &sc->sdiof_head, sdiof_list) + device_printf(sc->dev, + "FN %d, vendor %04X, product %04X; blksize %02X\n", + f->number, f->manufacturer, f->product, f->max_blksize); + + /* + * Only set 4-bit width if both the host and the card + * support it. + * The card starts in 1-bit mode by default. + */ + if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA && + sc->sdio_bus_width == bus_width_4) { + mmc_io_set_bus_width(sc, sc->sdio_bus_width); + mmcbr_set_bus_width(sc->dev, sc->sdio_bus_width); + } + + /* Set high speed mode if host and card support it */ + if (mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED && + sc->sdio_support_hs) { + device_printf(sc->dev, "Activating high-speed mode"); + uint8_t hs_info = 1; + err = mmc_io_rw_direct(sc, 1, 0, + SD_IO_CCCR_CISPTR + 0x13, &hs_info); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error setting HS mode%d\n", err); + return; + } + sc->sdio_timing = bus_timing_hs; + sc->sdio_tran_speed = 50 * 1000 * 1000; + } else { + sc->sdio_tran_speed = 25 * 1000 * 1000; + sc->sdio_timing = bus_timing_normal; + } + + if (!mem_present) + return; + } + + err = mmc_all_send_cid(sc, raw_cid); /* Command 2 */ if (err == MMC_ERR_TIMEOUT) break; if (err != MMC_ERR_NONE) { @@ -1491,9 +1985,45 @@ mmc_delete_cards(struct mmc_softc *sc) return (0); } +/* CMD 5 */ +static int +mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, uint8_t *nfunc, uint8_t *mem_present) { + struct mmc_command cmd; + int err = MMC_ERR_NONE, i; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = IO_SEND_OP_COND; + cmd.arg = 0; + cmd.flags = MMC_RSP_R4; + cmd.data = NULL; + + for (i = 0; i < 1000; i++) { + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err != MMC_ERR_NONE) + break; + if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || + (ocr & MMC_OCR_VOLTAGE) == 0) + break; + err = MMC_ERR_TIMEOUT; + mmc_ms_delay(10); + } + + if (err == MMC_ERR_NONE) { + if (rocr) + *rocr = cmd.resp[0]; + if (nfunc) + *nfunc = SD_IO_OCR_NUM_FUNCTIONS(cmd.resp[0]); + if (mem_present) + *mem_present = cmd.resp[0] >> 27 & 0x1; + } + + return (err); +} + static void mmc_go_discovery(struct mmc_softc *sc) { + uint8_t nfunc, mem_present; uint32_t ocr; device_t dev; int err; @@ -1509,17 +2039,24 @@ mmc_go_discovery(struct mmc_softc *sc) if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing bus\n"); mmc_idle_cards(sc); - err = mmc_send_if_cond(sc, 1); + err = mmc_send_if_cond(sc, 1); /* SD_SEND_IF_COND = 8 */ if ((bootverbose || mmc_debug) && err == 0) device_printf(sc->dev, "SD 2.0 interface conditions: OK\n"); - if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_probe_sdio(sc, 0, &ocr, &nfunc, &mem_present) == MMC_ERR_NONE) { + device_printf(dev, "SDIO probe OK (OCR: 0x%08x, %d functions, memory: %d)\n", ocr, nfunc, mem_present); + if (nfunc > 0 && mem_present) { + device_printf(sc->dev, "SDIO combo cards are not supported yet"); + return; + } + } else + if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* retry 55 -> then 41 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "SD probe: failed\n"); /* * Failed, try MMC */ mmcbr_set_mode(dev, mode_mmc); - if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* command 1 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "MMC probe: failed\n"); ocr = 0; /* Failed both, powerdown. */ @@ -1553,9 +2090,11 @@ mmc_go_discovery(struct mmc_softc *sc) * Reselect the cards after we've idled them above. */ if (mmcbr_get_mode(dev) == mode_sd) { - err = mmc_send_if_cond(sc, 1); - mmc_send_app_op_cond(sc, - (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + if (mem_present) { + err = mmc_send_if_cond(sc, 1); /* CMD 8 */ + mmc_send_app_op_cond(sc, /* 41 -> 55 */ + (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + } } else mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); mmc_discover_cards(sc); @@ -1564,6 +2103,24 @@ mmc_go_discovery(struct mmc_softc *sc) mmcbr_set_bus_mode(dev, pushpull); mmcbr_update_ios(dev); mmc_calculate_clock(sc); + + /* XXX TESTING RW_EXTENDED */ + mmc_select_card(sc, sc->__sdio_rca); + + /* Try to do normal CMD52 that should work correctly */ + uint8_t hs_info; + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_CISPTR + 0x13, &hs_info); + if (err) + device_printf(sc->dev, "HS INFO read err %d\n", err); + + /* Now try actual command */ + mmc_debug = 10; + uint8_t data[100]; + err = mmc_io_rw_extended(sc, 0, 0, sc->__sdio_cis1_info, data, 100, 0, 0); + if (err) + device_printf(sc->dev, "Ext read err %d\n", err); + hexdump(data, 100, NULL, 0); + bus_generic_attach(dev); /* mmc_update_children_sysctl(dev);*/ } @@ -1575,7 +2132,7 @@ mmc_calculate_clock(struct mmc_softc *sc) int nkid, i, f_min, f_max; device_t *kids; struct mmc_ivars *ivar; - + f_min = mmcbr_get_f_min(sc->dev); f_max = mmcbr_get_f_max(sc->dev); max_dtr = max_hs_dtr = f_max; @@ -1583,6 +2140,12 @@ mmc_calculate_clock(struct mmc_softc *sc) max_timing = bus_timing_hs; else max_timing = bus_timing_normal; + + if (sc->sdio_timing < max_timing) + max_timing = sc->sdio_timing; + if (sc->sdio_tran_speed < max_dtr) + max_dtr = sc->sdio_tran_speed; + if (device_get_children(sc->dev, &kids, &nkid) != 0) panic("can't get children"); for (i = 0; i < nkid; i++) { @@ -1735,3 +2298,4 @@ DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_bcm, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_fdt, mmc_driver, mmc_devclass, NULL, NULL); +DRIVER_MODULE(mmc, sdio, mmc_driver, mmc_devclass, NULL, NULL); diff --git a/sys/dev/mmc/mmcioreg.h b/sys/dev/mmc/mmcioreg.h new file mode 100644 index 0000000..10e304b --- /dev/null +++ b/sys/dev/mmc/mmcioreg.h @@ -0,0 +1,96 @@ +/* $OpenBSD: sdmmc_ioreg.h,v 1.4 2007/06/02 01:48:37 uwe Exp $ */ +/* $FreeBSD$ */ + +/* + * Copyright (c) 2006 Uwe Stuehler + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SDMMC_IOREG_H +#define _SDMMC_IOREG_H + +/* SDIO commands */ /* response type */ +#define SD_IO_SEND_OP_COND 5 /* R4 */ +#define SD_IO_RW_DIRECT 52 /* R5 */ +#define SD_IO_RW_EXTENDED 53 /* R5? */ + +/* CMD52 arguments */ +#define SD_ARG_CMD52_READ (0<<31) +#define SD_ARG_CMD52_WRITE (1<<31) +#define SD_ARG_CMD52_FUNC_SHIFT 28 +#define SD_ARG_CMD52_FUNC_MASK 0x7 +#define SD_ARG_CMD52_EXCHANGE (1<<27) +#define SD_ARG_CMD52_REG_SHIFT 9 +#define SD_ARG_CMD52_REG_MASK 0x1ffff +#define SD_ARG_CMD52_DATA_SHIFT 0 +#define SD_ARG_CMD52_DATA_MASK 0xff +#define SD_R5_DATA(resp) ((resp)[0] & 0xff) + +/* CMD53 arguments */ +#define SD_ARG_CMD53_READ (0<<31) +#define SD_ARG_CMD53_WRITE (1<<31) +#define SD_ARG_CMD53_FUNC_SHIFT 28 +#define SD_ARG_CMD53_FUNC_MASK 0x7 +#define SD_ARG_CMD53_BLOCK_MODE (1<<27) +#define SD_ARG_CMD53_INCREMENT (1<<26) +#define SD_ARG_CMD53_REG_SHIFT 9 +#define SD_ARG_CMD53_REG_MASK 0x1ffff +#define SD_ARG_CMD53_LENGTH_SHIFT 0 +#define SD_ARG_CMD53_LENGTH_MASK 0x1ff +#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */ + +/* 48-bit response decoding (32 bits w/o CRC) */ +#define MMC_R4(resp) ((resp)[0]) +#define MMC_R5(resp) ((resp)[0]) + +/* SD R4 response (IO OCR) */ +#define SD_IO_OCR_MEM_READY (1<<31) +#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3) +/* XXX big fat memory present "flag" because we don't know better */ +#define SD_IO_OCR_MEM_PRESENT (0xf<<24) +#define SD_IO_OCR_MASK 0x00fffff0 + +/* Card Common Control Registers (CCCR) */ +#define SD_IO_CCCR_START 0x00000 +#define SD_IO_CCCR_SIZE 0x100 +#define SD_IO_CCCR_FN_ENABLE 0x02 +#define SD_IO_CCCR_FN_READY 0x03 +#define SD_IO_CCCR_INT_ENABLE 0x04 +#define SD_IO_CCCR_CTL 0x06 +#define CCCR_CTL_RES (1<<3) +#define SD_IO_CCCR_BUS_WIDTH 0x07 +#define CCCR_BUS_WIDTH_4 (1<<1) +#define CCCR_BUS_WIDTH_1 (1<<0) +#define SD_IO_CCCR_CARDCAP 0x08 +#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ + +/* Function Basic Registers (FBR) */ +#define SD_IO_FBR_START 0x00100 +#define SD_IO_FBR_SIZE 0x00700 + +/* Card Information Structure (CIS) */ +#define SD_IO_CIS_START 0x01000 +#define SD_IO_CIS_SIZE 0x17000 + +/* CIS tuple codes (based on PC Card 16) */ +#define SD_IO_CISTPL_VERS_1 0x15 +#define SD_IO_CISTPL_MANFID 0x20 +#define SD_IO_CISTPL_FUNCID 0x21 +#define SD_IO_CISTPL_FUNCE 0x22 +#define SD_IO_CISTPL_END 0xff + +/* CISTPL_FUNCID codes */ +/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */ +/* #define SDMMC_FUNCTION_WLAN 0x0c */ +#endif diff --git a/sys/dev/mmc/mmcreg.h b/sys/dev/mmc/mmcreg.h index f454ddb..4b65d91 100644 --- a/sys/dev/mmc/mmcreg.h +++ b/sys/dev/mmc/mmcreg.h @@ -85,6 +85,8 @@ struct mmc_command { #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY) #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP(x) ((x) & MMC_RSP_MASK) @@ -151,6 +153,30 @@ struct mmc_command { #define R1_STATE_PRG 7 #define R1_STATE_DIS 8 +/* + * R5 responses + * + * Types (per SD 2.0 standard) + *e : error bit + *s : status bit + *r : detected and set for the actual command response + *x : Detected and set during command execution. The host can get + * the status by issuing a command with R1 response. + * + * Clear Condition (per SD 2.0 standard) + *a : according to the card current state. + *b : always related to the previous command. reception of a valid + * command will clear it (with a delay of one command). + *c : clear by read + */ +#define R5_COM_CRC_ERROR (1u << 15)/* er, b */ +#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */ +#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */ +#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12) +#define R5_ERROR (1u << 11)/* erx, c */ +#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */ +#define R5_OUT_OF_RANGE (1u << 8)/* er, c */ + struct mmc_data { size_t len; /* size of the data */ size_t xfer_len; @@ -181,7 +207,7 @@ struct mmc_request { #define MMC_SET_RELATIVE_ADDR 3 #define SD_SEND_RELATIVE_ADDR 3 #define MMC_SET_DSR 4 - /* reserved: 5 */ +#define IO_SEND_OP_COND 5 #define MMC_SWITCH_FUNC 6 #define MMC_SWITCH_FUNC_CMDS 0 #define MMC_SWITCH_FUNC_SET 1 @@ -335,6 +361,20 @@ struct mmc_request { #define SD_MAX_HS 50000000 +/* + * SDIO Direct & Extended I/O + */ +#define SD_IO_RW_WR (1u << 31) +#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28) +#define SD_IO_RW_RAW (1u << 27) +#define SD_IO_RW_INCR (1u << 26) +#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9) +#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0) +#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0) + +#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0) +#define SD_IOE_RW_BLK (1u << 27) + /* OCR bits */ /* From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 01:29:56 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 7DABD510 for ; Thu, 4 Jul 2013 01:29:56 +0000 (UTC) (envelope-from tim@kientzle.com) Received: from monday.kientzle.com (99-115-135-74.uvs.sntcca.sbcglobal.net [99.115.135.74]) by mx1.freebsd.org (Postfix) with ESMTP id 5F4C5125C for ; Thu, 4 Jul 2013 01:29:55 +0000 (UTC) Received: (from root@localhost) by monday.kientzle.com (8.14.4/8.14.4) id r641TmFN096689; Thu, 4 Jul 2013 01:29:48 GMT (envelope-from tim@kientzle.com) Received: from [192.168.2.123] (CiscoE3000 [192.168.1.65]) by kientzle.com with SMTP id mrg8gxdpca985td73x9i7v6dze; Thu, 04 Jul 2013 01:29:48 +0000 (UTC) (envelope-from tim@kientzle.com) Subject: Re: boinc/seti on RPi Mime-Version: 1.0 (Apple Message framework v1283) Content-Type: text/plain; charset=us-ascii From: Tim Kientzle In-Reply-To: Date: Wed, 3 Jul 2013 18:29:48 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <055E7C87-E018-4673-9D05-84E2AAC7FFB7@kientzle.com> References: To: Nick@Pettefar.com X-Mailer: Apple Mail (2.1283) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 01:29:56 -0000 On Jul 3, 2013, at 8:09 AM, Nick Pettefar wrote: > CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. > C compiler on this system is: cc -O -pipe > --------------------------------------------- > Error when bootstrapping CMake: > Cannot find appropriate C++ compiler on this system. > Please specify one using environment variable CXX. > See cmake_bootstrap.log for compilers attempted. > --------------------------------------------- > Log of errors: > = /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.l= og > --------------------------------------------- And what does cmake_bootstrap.log show? Tim From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 03:42:34 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 2F1C4427 for ; Thu, 4 Jul 2013 03:42:34 +0000 (UTC) (envelope-from toasty@dragondata.com) Received: from mail-ob0-x22c.google.com (mail-ob0-x22c.google.com [IPv6:2607:f8b0:4003:c01::22c]) by mx1.freebsd.org (Postfix) with ESMTP id EBABF1A20 for ; Thu, 4 Jul 2013 03:42:33 +0000 (UTC) Received: by mail-ob0-f172.google.com with SMTP id wo10so1056943obc.17 for ; Wed, 03 Jul 2013 20:42:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dragondata.com; s=google; h=from:content-type:subject:message-id:date:to:mime-version:x-mailer; bh=78NyQQx5hrS1eKbVM8zonYGAEq6L0ViJwXGBzFKH9vc=; b=HusLfW59msS6Zvo5RahzXia6CAcN9n0e5dfZDqGeoL2UwAeN8rjvwVm2q6xqmdDvZ2 ujpAg95lHzg7UbizjQTgOx9jnirEUTQ9HLr1+rhwsi2qKtyTwPSqIQB9z4BFY/7uiW68 6eAKLxtvDj8e3iXp9Leo345EH714Z5cX7Az48= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:content-type:subject:message-id:date:to:mime-version:x-mailer :x-gm-message-state; bh=78NyQQx5hrS1eKbVM8zonYGAEq6L0ViJwXGBzFKH9vc=; b=acouWxh6kFvZW8ApC8hNJ7bUcVzxZz0TKU+bkjcgmsQejlnJBiRfIuKngLB5vNpGZ1 6EhAWvDGQyNrTDqGsXNyi4699w4HICcPDvBblH3lZEZF2z8rYtWQuZDCOTsICBNf/Gov T1D5f5QCCTJQETbVKLXewwVSraHnGkF3LDxqWnBj4Mr18maM0yfLO0pQ6llafWgpc+7U KkZFXEzD4plnzFl8TMIEdi0Kju1pi1xBcwzME8gRn5m7tlJweGu5iS3vVsicTFMflmMI bruYrWAHjfPNpN5YiWV+L1K2AJfJI9agOF71M+ozU245iGdYXGKq90BWzgU03fT5HOKH CVgg== X-Received: by 10.182.165.133 with SMTP id yy5mr3973411obb.89.1372909353201; Wed, 03 Jul 2013 20:42:33 -0700 (PDT) Received: from vpn132.rw1.your.org (vpn132.rw1.your.org. [204.9.51.132]) by mx.google.com with ESMTPSA id tv3sm2212849obb.8.2013.07.03.20.42.31 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 03 Jul 2013 20:42:32 -0700 (PDT) From: Kevin Day Content-Type: multipart/signed; boundary="Apple-Mail=_AF562ECE-FC12-4DE5-AD39-F7C5FF358346"; protocol="application/pkcs7-signature"; micalg=sha1 Subject: armv6 port build/install failures Message-Id: <8F960DA2-D4F7-4938-8801-8B4502CC48F4@dragondata.com> Date: Wed, 3 Jul 2013 22:42:29 -0500 To: "freebsd-ports@freebsd.org" , freebsd-arm@freebsd.org Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) X-Mailer: Apple Mail (2.1508) X-Gm-Message-State: ALoCoQlcmaSs0AX1I4OUn/Av4ugRn+as1ldOs1V4XObEuNdAEnSczbGde3ArHuyNaxNX1Jheat56 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 03:42:34 -0000 --Apple-Mail=_AF562ECE-FC12-4DE5-AD39-F7C5FF358346 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii Posting this here in case anyone is interested in trying to get some = ports to build on armv6. My goal is to build everything, but here's a = start. There looks like some easy low hanging fruit to fix a few of = them. 880 ports were attempted. 844 successful 12 failed 18 skipped due to dependencies on failed ports 7 were ignored due to BROKEN or other intentional bailouts Full logs of the builds are available here: = http://ftpmirror.your.org/pub/FreeBSD-Unofficial-Packages/logs/100armv6-de= fault/2013-06-28_17%3a02%3a03/ Click the checkboxes at the top to see details for which failed, which = will give you links to the build logs. =3D=3D=3D=3D>> Failed ports: devel/boost-libs:build devel/gecode:build = japanese/mecab:build archivers/rar:install www/rubygem-raindrops:install = editors/biew:build databases/memcached:build = databases/mysql55-server:build databases/py-sqlite3:configure = databases/mysql56-server:build www/rubygem-passenger:install = databases/p5-DBD-cego:build Successfully built packages are available for use at = http://ftpmirror.your.org/pub/FreeBSD-Unofficial-Packages/100armv6-default= / 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Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 31DD6C20 for ; Thu, 4 Jul 2013 05:53:45 +0000 (UTC) (envelope-from freebsd_arm@myspectrum.nl) Received: from mail.virtualhost.nl (mail.virtualhost.nl [89.200.201.133]) by mx1.freebsd.org (Postfix) with ESMTP id 826A51F98 for ; Thu, 4 Jul 2013 05:53:43 +0000 (UTC) Received: (qmail 94225 invoked by uid 1141); 4 Jul 2013 07:46:54 +0200 Received: from ip120-12-208-87.adsl2.static.versatel.nl (HELO [10.0.0.15]) (87.208.12.120) (smtp-auth username freebsd_arm@myspectrum.nl, mechanism plain) by mail.virtualhost.nl (qpsmtpd/0.84) with (CAMELLIA256-SHA encrypted) ESMTPSA; Thu, 04 Jul 2013 07:46:54 +0200 Message-ID: <51D50C55.1040300@myspectrum.nl> Date: Thu, 04 Jul 2013 07:47:01 +0200 From: Jeroen Hofstee User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: Ilya Bakulin Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> In-Reply-To: <20130703222002.GA60491@olymp.kibab.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 05:53:45 -0000 Hello Ilya, On 07/04/2013 12:20 AM, Ilya Bakulin wrote: > So some bytes lack 0x40... This problem occurs also with other numbers > read from the card, for example, vendor ID is read as 0x029F instead of 0x02DF. > +/* Halfword bit masks used for command response extraction. */ > +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ > +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ > + /* Response bits [15:14] and [13:8] */ > + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | > + ((word & MV_SDIO_RSP48_BM2) << 6); > + From the looks if it, MV_SDIO_RSP48_BM2 must be 3 instead 2. Regards, Jeroen From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 07:59:12 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 226416FE for ; Thu, 4 Jul 2013 07:59:12 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from nibbler.fubar.geek.nz (nibbler.fubar.geek.nz [199.48.134.198]) by mx1.freebsd.org (Postfix) with ESMTP id 0A7B1147B for ; Thu, 4 Jul 2013 07:59:11 +0000 (UTC) Received: from bender.Home (97e76fc9.skybroadband.com [151.231.111.201]) by nibbler.fubar.geek.nz (Postfix) with ESMTPSA id 464835E1EE; Thu, 4 Jul 2013 07:59:04 +0000 (UTC) Date: Thu, 4 Jul 2013 08:58:56 +0100 From: Andrew Turner To: Warner Losh Subject: Re: HEADS UP: Changing the default ABI to EABI Message-ID: <20130704085856.6d024927@bender.Home> In-Reply-To: <7BBCF927-7619-462E-9E4F-9F3172746BE5@bsdimp.com> References: <20130702211103.332e8854@bender.Home> <7BBCF927-7619-462E-9E4F-9F3172746BE5@bsdimp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 07:59:12 -0000 On Tue, 2 Jul 2013 16:33:23 -0600 Warner Losh wrote: > On Jul 2, 2013, at 2:11 PM, Andrew Turner wrote: > > Hello, > > > > I'm planning on changing the default ARM ABI to the ARM EABI. I > > believe all the known issues have been fixed, however I would like > > to know if there are any outstanding problems. > > Cool! > > Does the in-tree gcc support this? What happens if you turn off clang > and try to do this? It should, however I have not used it in a number of months. Andrew From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 08:26:52 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7B6F336B; Thu, 4 Jul 2013 08:26:52 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id 3E20016EE; Thu, 4 Jul 2013 08:26:51 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com C03B33F47A DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372926410; bh=GGeGsLeMl9ppbB3rw7iKbFguKsL9cKCDnXZ4EYF1W1U=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=krHz8/O50hoPUs7Q/EnO6ZD3SFmS4/BoHZYr682rQ4ejpSi7ygo4sQXXMBaf9Fwp9 1koOO3qd6KA4URmNtCLASjDlZjFvyCl8ufgZ3WgFf6P9L5pFvqbxg0VD2sfkNjx7hW 388dTdaI5KKT7rFJRvcnRnGMndKuXHR9fPTt16rQ= Message-ID: <51D531CB.3060300@bakulin.de> Date: Thu, 04 Jul 2013 10:26:51 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Jeroen Hofstee Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> In-Reply-To: <51D50C55.1040300@myspectrum.nl> X-Enigmail-Version: 1.5.1 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 08:26:52 -0000 Hi Jeroen, On 04.07.13 07:47, Jeroen Hofstee wrote: > From the looks if it, MV_SDIO_RSP48_BM2 must be 3 instead 2. Wonderful, it works now. Thanks for the fix!!! By the way, I keep my changes in the Git repository here: https://github.com/kibab/freebsd/commits/kibab-dplug -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 08:54:38 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id F2E70AA0 for ; Thu, 4 Jul 2013 08:54:37 +0000 (UTC) (envelope-from alie@affle.com) Received: from mail-qe0-f45.google.com (mail-qe0-f45.google.com [209.85.128.45]) by mx1.freebsd.org (Postfix) with ESMTP id BA66F182A for ; Thu, 4 Jul 2013 08:54:37 +0000 (UTC) Received: by mail-qe0-f45.google.com with SMTP id w7so613441qeb.32 for ; Thu, 04 Jul 2013 01:54:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:x-gm-message-state; bh=2An3EndEzpIo29Y4CIl7/b+XWnJoOss170b9dmKn1hc=; b=cIcnf9Rvp7/PY+d3WZ8XZ9ND+watm9pe6XCciux3ZCRyV2qw2PPjXL9/BxVI2nVG6Z X7yqx4uVNsvmEaO7eg4fRjmect+doxbLsahSph0nQyScBf7OXd5HGda98pBpha62IrtC shAhXj0BJ004vO6SO/B6Oe/noEbtsdliXW58VY4Ev+mgQuVDE0ljJ5+pgZ3B2JlnwnIr JXWkFrxc4k81rRbJdxXWbaW6y198IPJcDEaE7x6yPa8VG1Cqg3OvEhdXyLWSo7GC+97b G+YSn7rBSPjYNEJNijAwOvz6/xQX8Lf1eEoAVb4qaUa+Xmmm/+SEoWgF/Cf0IniKghvn lZaA== MIME-Version: 1.0 X-Received: by 10.49.14.161 with SMTP id q1mr4622913qec.50.1372928071549; Thu, 04 Jul 2013 01:54:31 -0700 (PDT) Received: by 10.49.84.168 with HTTP; Thu, 4 Jul 2013 01:54:31 -0700 (PDT) In-Reply-To: <20130704085856.6d024927@bender.Home> References: <20130702211103.332e8854@bender.Home> <7BBCF927-7619-462E-9E4F-9F3172746BE5@bsdimp.com> <20130704085856.6d024927@bender.Home> Date: Thu, 4 Jul 2013 16:54:31 +0800 Message-ID: Subject: Re: HEADS UP: Changing the default ABI to EABI From: Alie Tan To: Andrew Turner X-Gm-Message-State: ALoCoQlEtgDJtTjgWPbgT7bkMKbMPlA20WMi0xS5FlaFDI3murdWVzlkgxfrUYdpQ53um3JW9yD6 Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: "freebsd-arm@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 08:54:38 -0000 On Thu, Jul 4, 2013 at 3:58 PM, Andrew Turner wrote: > On Tue, 2 Jul 2013 16:33:23 -0600 > Warner Losh wrote: > > > On Jul 2, 2013, at 2:11 PM, Andrew Turner wrote: > > > Hello, > > > > > > I'm planning on changing the default ARM ABI to the ARM EABI. I > > > believe all the known issues have been fixed, however I would like > > > to know if there are any outstanding problems. > > > > Cool! > > > > Does the in-tree gcc support this? What happens if you turn off clang > > and try to do this? > > It should, however I have not used it in a number of months. > It works. Btw FYI VFP is not compiling for GCC > > Andrew > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 13:18:54 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 982D921C for ; Thu, 4 Jul 2013 13:18:54 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-bk0-f53.google.com (mail-bk0-f53.google.com [209.85.214.53]) by mx1.freebsd.org (Postfix) with ESMTP id 2AD571640 for ; Thu, 4 Jul 2013 13:18:53 +0000 (UTC) Received: by mail-bk0-f53.google.com with SMTP id e11so641549bkh.12 for ; Thu, 04 Jul 2013 06:18:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=message-id:date:from:organization:user-agent:mime-version:to:cc :subject:references:in-reply-to:content-type :content-transfer-encoding:x-gm-message-state; bh=ZM8DtqQ2AaAlPnJiCtYnTYOG0NhK25rHC7ZFZPVHto0=; b=Gh/gat4BG67qd2Z+MqCK3OGrlyjYrgCdE+kJNdqO+rowQaCVGHWBN9NcUy0fr5Tpa0 73ZiDnZriCv6xBt4x6eyMzsqEP5gzf8JHzOAfDLYqfxZ/Py43ywjnpKF+1mKtpz3FOuj c6ndUYJ3jNDmvYf4PnIaYwm6Bbit1MJb4CSAvOkJvs5rUsfUtAj7k62qJ+CAX9yovC2n 1CVo9345h8Te4nA3JbTimpMQOIzh4Vuu7+pwGCNvOm37EcTYWVsXhR0HqEMhrgyzW5im q2cnbSK80/bM9xqHD8pzjS6L5FGbCKbmjqoR3bVq2LSgugtr6kns1P6pSDeQ+BQOMrno Q13g== X-Received: by 10.204.65.69 with SMTP id h5mr1068938bki.59.1372943449472; Thu, 04 Jul 2013 06:10:49 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id eu16sm964648bkc.0.2013.07.04.06.10.48 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 06:10:48 -0700 (PDT) Message-ID: <51D57456.9080504@semihalf.com> Date: Thu, 04 Jul 2013 15:10:46 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@FreeBSD.org Subject: Re: New pmap-v6.c features and improvements References: <519B6B1C.9060008@semihalf.com> <20130522184232.GA437@jail.io> <519E0D62.5030708@semihalf.com> <51CC4CC1.4020509@semihalf.com> In-Reply-To: <51CC4CC1.4020509@semihalf.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Gm-Message-State: ALoCoQllSWOIieWpSbD0mCzf2jUjEIj7kndm0ZC3lPBVS81QwS8346RUtWPkwz/i8yR9cMe95p+b Cc: ray@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 13:18:54 -0000 On 27.06.2013 16:31, Zbyszek Bodek wrote: > On 23.05.2013 14:36, Zbyszek Bodek wrote: >> On 22.05.2013 20:42, Ruslan Bukin wrote: >>> On Tue, May 21, 2013 at 02:39:56PM +0200, Zbyszek Bodek wrote: >>>> Hello Everyone, >>>> >>>> I would like to introduce another pack of patches for pmap-v6.c and >>>> related, that we created as a part of Semihalf work on Superpages >>>> support. >>>> >>>> The patches include some major changes like: >>>> >>>> - Switch to AP[1:0] access permissions model >>>> - Transition of the mapping related flags to PTE (stop using PVF_ flags >>>> in pv_entry) >>>> - Rework of the pmap_enter_locked() function >>>> - pmap code optimizations >>>> >>>> And some minor clean-ups: >>>> >>>> - Get rid of the VERBOSE_INIT_ARM option >>>> - Clean-ups, style and naming improvements to pmap >>>> >>>> Please check out the attachment for details. >>>> >>>> I will be happy to answer your questions and doubts if any. >>>> >>>> Best regards >>>> Zbyszek Bodek >>> >>> I tested new patches with exynos5 and everything is OK. >>> (I mean all works as usual) >>> >> >> Hello. >> >> I'm happy to announce that code has been integrated to the FreeBSD HEAD. >> Great thanks your help! >> > > Hello Everyone, > > We have two micro patches for pmap-v6.c containing fix for 'modified' > bit emulation and removal of the redundant PGA_WRITEABLE clearing. > > Please check out the attachment. > > These two are minimal changes and we would like to commit them soon, so > we would be grateful if you could test them on your ARMv6/v7 platforms > and give us your remarks. > Hello, Because there were no objections, we've integrated the patches: http://svnweb.freebsd.org/base?view=revision&revision=252694 http://svnweb.freebsd.org/base?view=revision&revision=252695 Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 16:09:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id CB437922 for ; Thu, 4 Jul 2013 16:09:13 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ie0-f173.google.com (mail-ie0-f173.google.com [209.85.223.173]) by mx1.freebsd.org (Postfix) with ESMTP id 9B86E1EF7 for ; Thu, 4 Jul 2013 16:09:13 +0000 (UTC) Received: by mail-ie0-f173.google.com with SMTP id k13so3434180iea.4 for ; Thu, 04 Jul 2013 09:09:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=RgpZsC7tmNHq59IEg2L1sqyoJPtU9EX/4v1I6TXxe+s=; b=Vcm1YPxNt6elFutdFS7xZwbCkqCRIHUxwu7Jt82jLNcBi2M9OLLxwHhkLvIz2lpXui 4467bMwpMrslRZpEqLZLslqscLWFz4SnyJSFJI7/Yj7tiAaPLyTgJgweikozjf3jtsTI ScF1GF5Ax911JR2E9yE9XzaT94WKGeKLygWa0aYa98LiBLE+MvwgBe2kZ4sHIwgSUMPy Ih1jgt1mRsbRSMfSWw1SZh6nnhsjNa39KLGFK3YyS16NhI0Fq4/i3c5pXwd0+MI8Hx3t nciQtrrV17Ry4iebgxiE8ln81gxCpW7JdHUt0L1R8f9CVckSfV1wWJ336bbyJ1nKtDIJ cOcA== X-Received: by 10.50.130.113 with SMTP id od17mr3173139igb.10.1372954152980; Thu, 04 Jul 2013 09:09:12 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id hj6sm27795475igb.1.2013.07.04.09.09.11 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 09:09:11 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <51D50C55.1040300@myspectrum.nl> Date: Thu, 4 Jul 2013 10:09:09 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <16DEBC38-F99A-4733-86FD-9E81A146CE5C@bsdimp.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> To: Jeroen Hofstee X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQkmz3cJsVEkvSkydVJloPdvMek2M7hfDq0w5VOiH6erBBK8ZCLaHy192Drd62e+91xCoBJ+ Cc: Alexander Motin , Ilya Bakulin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 16:09:13 -0000 On Jul 3, 2013, at 11:47 PM, Jeroen Hofstee wrote: > Hello Ilya, >=20 > On 07/04/2013 12:20 AM, Ilya Bakulin wrote: >> So some bytes lack 0x40... This problem occurs also with other = numbers >> read from the card, for example, vendor ID is read as 0x029F instead = of 0x02DF. >=20 >> +/* Halfword bit masks used for command response extraction. */ >> +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ >> +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ >=20 >> + /* Response bits [15:14] and [13:8] */ >> + *rp++ =3D (resp[2] & MV_SDIO_RSP48_BM6) | >> + ((word & MV_SDIO_RSP48_BM2) << 6); >> + >=20 > =46rom the looks if it, MV_SDIO_RSP48_BM2 must be 3 instead 2. And 0x0031 doesn't look right either... I'd have expected 0x3f. Warner From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 16:46:05 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 3AD5E2A2; Thu, 4 Jul 2013 16:46:05 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-qa0-x231.google.com (mail-qa0-x231.google.com [IPv6:2607:f8b0:400d:c00::231]) by mx1.freebsd.org (Postfix) with ESMTP id E488F10BB; Thu, 4 Jul 2013 16:46:04 +0000 (UTC) Received: by mail-qa0-f49.google.com with SMTP id hu16so866976qab.1 for ; Thu, 04 Jul 2013 09:46:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=fun1jxRYneHYpfOaZ1XmVjG45igNCIDTPbnfeyOZS7Q=; b=BYH6tvrqamCSl4lL7qLn0DuaQpHTuQcQPzMib2i3j5sKqajJCRXGxYgN/AG2JF1SEj TiVxbLlM7hmZbGXqh3Hxuwm7dp2mJOwbmyq5AdliU7IfAv9TM16sw0F/3VYZY9aYILn/ yk3ns6rSiF67BQdp/GAaV/4z1Zj97iv4pz4qI6ge/eiJkKTbdvKR1dO5Ws/BBxicdgHc tYbPCkzWnL3PCLkvsnokTP+mVgBRGj429mHZOvaUhrJ4CtfTP341Ps8l6e3jujrdV7gE fAAJIQLlWLSKhOszTCnPaQsFcU7BXSENbKczZ1lXCz3zda2d83Psbwt0PPxsuzazETCh jBrg== MIME-Version: 1.0 X-Received: by 10.224.174.6 with SMTP id r6mr7609563qaz.87.1372956364428; Thu, 04 Jul 2013 09:46:04 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.224.195.72 with HTTP; Thu, 4 Jul 2013 09:46:04 -0700 (PDT) In-Reply-To: <51D57456.9080504@semihalf.com> References: <519B6B1C.9060008@semihalf.com> <20130522184232.GA437@jail.io> <519E0D62.5030708@semihalf.com> <51CC4CC1.4020509@semihalf.com> <51D57456.9080504@semihalf.com> Date: Thu, 4 Jul 2013 09:46:04 -0700 X-Google-Sender-Auth: AImj8pk3fhQ8v_j8hHEqFZOJ078 Message-ID: Subject: Re: New pmap-v6.c features and improvements From: Adrian Chadd To: Zbyszek Bodek Content-Type: text/plain; charset=ISO-8859-1 Cc: freebsd-arm@freebsd.org, ray@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 16:46:05 -0000 On 4 July 2013 06:10, Zbyszek Bodek wrote: > Hello, > > Because there were no objections, we've integrated the patches: > > http://svnweb.freebsd.org/base?view=revision&revision=252694 > http://svnweb.freebsd.org/base?view=revision&revision=252695 Hi! Great work! It's great that you're finding and fixing these ARM bugs! -adrian From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 17:00:52 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id A71A196A for ; Thu, 4 Jul 2013 17:00:52 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from wa3yre.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id 50DB81162 for ; Thu, 4 Jul 2013 17:00:51 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by wa3yre.wynn.com (8.14.3/8.12.6) with ESMTP id r64H0i11001336 for ; Thu, 4 Jul 2013 13:00:44 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Thu, 4 Jul 2013 13:00:44 -0400 From: Brett Wynkoop To: freebsd-arm@freebsd.org Subject: Gave up on svnup Message-ID: <20130704130044.4aceefa6@ivory.wynn.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 17:00:52 -0000 Greeting- Even with the most recent build of svnup from ports I found the darn thing just hung after a few packets with the svn server. I have dropped back to using csup. If the new head builds that should give me the svnlite someone spoke of and I can use that to move to using svnlite for /usr/src instead of csup. -Brett -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 A free people ought to be armed. - George Washington From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 17:32:26 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 21E19EB8 for ; Thu, 4 Jul 2013 17:32:26 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ie0-f173.google.com (mail-ie0-f173.google.com [209.85.223.173]) by mx1.freebsd.org (Postfix) with ESMTP id E5C4412D1 for ; Thu, 4 Jul 2013 17:32:25 +0000 (UTC) Received: by mail-ie0-f173.google.com with SMTP id k13so3569732iea.4 for ; Thu, 04 Jul 2013 10:32:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=dRehf4Gl3r/4NAeg91yERMncgGc9FcksAR+2g+ukbBE=; b=OyQxqyhQk+3aJab3eE8t1FG/Ya4PAbf7JUI7RNA3eo8XE8jfdnrqbNWOQnNXM4dP8P 2XgxXtN8PqWLjhNrDGNdl45outLv+W5k+pRnA1sGJsfQPgeV+mElR6m83R2+D3wv0uY8 HJBg9CIX/U2u3jXTV0t5oDAHXKJQmG63EIhqspYtYT/okZueqVkda/iaESw67J8KS/OH +IXrdv0ZqavOq2XMwr4gjij3tcMPCrJhGPwNasA5J+Gf4lfevqhkEC8IMPpp5pMb36di KRb6he75TwoQo5KOjrQsDmSg0Yxn9oGwTb7ojhotoojDFXoNE+C4+LxoOXMc/yuJqbom CIOQ== X-Received: by 10.50.50.104 with SMTP id b8mr3328993igo.1.1372959138928; Thu, 04 Jul 2013 10:32:18 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id n5sm2116729igv.5.2013.07.04.10.32.17 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 10:32:17 -0700 (PDT) Sender: Warner Losh Subject: Re: HEADS UP: Changing the default ABI to EABI Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Thu, 4 Jul 2013 11:32:15 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <94777EB9-FA09-4D6D-A8DA-361CFE028C7C@bsdimp.com> References: <20130702211103.332e8854@bender.Home> <7BBCF927-7619-462E-9E4F-9F3172746BE5@bsdimp.com> <20130704085856.6d024927@bender.Home> To: Alie Tan X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQnZAIQBUdqd5xbnVDLmtsBLVHeselybvtTleIV5G2VI6m+CtFzlCzJcDyWT8iRj+OtIAclQ Cc: "freebsd-arm@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 17:32:26 -0000 On Jul 4, 2013, at 2:54 AM, Alie Tan wrote: > On Thu, Jul 4, 2013 at 3:58 PM, Andrew Turner = wrote: > On Tue, 2 Jul 2013 16:33:23 -0600 > Warner Losh wrote: >=20 > > On Jul 2, 2013, at 2:11 PM, Andrew Turner wrote: > > > Hello, > > > > > > I'm planning on changing the default ARM ABI to the ARM EABI. I > > > believe all the known issues have been fixed, however I would like > > > to know if there are any outstanding problems. > > > > Cool! > > > > Does the in-tree gcc support this? What happens if you turn off = clang > > and try to do this? >=20 > It should, however I have not used it in a number of months. > It works. Btw FYI VFP is not compiling for GCC=20 OK. thanks. Guess that means that we don't need to have some kind of = safety interlock for that... Warner From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 17:34:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id A1047FFD for ; Thu, 4 Jul 2013 17:34:13 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ie0-f172.google.com (mail-ie0-f172.google.com [209.85.223.172]) by mx1.freebsd.org (Postfix) with ESMTP id 7353312E6 for ; Thu, 4 Jul 2013 17:34:13 +0000 (UTC) Received: by mail-ie0-f172.google.com with SMTP id 16so3676687iea.17 for ; Thu, 04 Jul 2013 10:34:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=kQm/JUOfjCS+rtaXbNz5r2FqkW2GsqaobEUYCZDwWP0=; b=dJ/f0XDYfGTh03xRM9BHQTMLWJRpcFFzJItfEkYeDBwuLY5nLvoOPKODMxLg+U1iQz UOnseG1iU5qKBR3vn/EZ77Eztd8e81IJlKqFQhplX/P99QsRhiqJ1i8i3XXmSuf2R7qe jTVpGZKaEE8PUYJR5oUNqgz0LlbVgHegTF1zqBql+MrqsbR0t5NdqQgr8aE4F3v+OcEu 0D/QRcerMPX3TlfV68HoaHx+YVVPM3B8N9DXobR74cc8/qv+A+PJYp3eqSuX5Bp9fOIH 4OUkN2ztVcJ+YhUAnsiLiKBa7QBOG7Z8WMorfLAiMJuhlsS4MFkutkTcs30x6N2kSH7A ItdA== X-Received: by 10.50.119.74 with SMTP id ks10mr24348197igb.59.1372959246983; Thu, 04 Jul 2013 10:34:06 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id ht10sm2146153igb.2.2013.07.04.10.34.05 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 10:34:06 -0700 (PDT) Sender: Warner Losh Subject: Re: New pmap-v6.c features and improvements Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <51D57456.9080504@semihalf.com> Date: Thu, 4 Jul 2013 11:34:04 -0600 Content-Transfer-Encoding: 7bit Message-Id: References: <519B6B1C.9060008@semihalf.com> <20130522184232.GA437@jail.io> <519E0D62.5030708@semihalf.com> <51CC4CC1.4020509@semihalf.com> <51D57456.9080504@semihalf.com> To: Zbyszek Bodek X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQkD0cdZ0pkEk5R+9ir+nL9p6c34lfmFVZP9zUMwKPF50VRS8zxmOeIhWBtzbqlypdEXM6s3 Cc: freebsd-arm@FreeBSD.org, ray@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 17:34:13 -0000 On Jul 4, 2013, at 7:10 AM, Zbyszek Bodek wrote: > On 27.06.2013 16:31, Zbyszek Bodek wrote: >> On 23.05.2013 14:36, Zbyszek Bodek wrote: >>> On 22.05.2013 20:42, Ruslan Bukin wrote: >>>> On Tue, May 21, 2013 at 02:39:56PM +0200, Zbyszek Bodek wrote: >>>>> Hello Everyone, >>>>> >>>>> I would like to introduce another pack of patches for pmap-v6.c and >>>>> related, that we created as a part of Semihalf work on Superpages >>>>> support. >>>>> >>>>> The patches include some major changes like: >>>>> >>>>> - Switch to AP[1:0] access permissions model >>>>> - Transition of the mapping related flags to PTE (stop using PVF_ flags >>>>> in pv_entry) >>>>> - Rework of the pmap_enter_locked() function >>>>> - pmap code optimizations >>>>> >>>>> And some minor clean-ups: >>>>> >>>>> - Get rid of the VERBOSE_INIT_ARM option >>>>> - Clean-ups, style and naming improvements to pmap >>>>> >>>>> Please check out the attachment for details. >>>>> >>>>> I will be happy to answer your questions and doubts if any. >>>>> >>>>> Best regards >>>>> Zbyszek Bodek >>>> >>>> I tested new patches with exynos5 and everything is OK. >>>> (I mean all works as usual) >>>> >>> >>> Hello. >>> >>> I'm happy to announce that code has been integrated to the FreeBSD HEAD. >>> Great thanks your help! >>> >> >> Hello Everyone, >> >> We have two micro patches for pmap-v6.c containing fix for 'modified' >> bit emulation and removal of the redundant PGA_WRITEABLE clearing. >> >> Please check out the attachment. >> >> These two are minimal changes and we would like to commit them soon, so >> we would be grateful if you could test them on your ARMv6/v7 platforms >> and give us your remarks. >> > > Hello, > > Because there were no objections, we've integrated the patches: > > http://svnweb.freebsd.org/base?view=revision&revision=252694 > http://svnweb.freebsd.org/base?view=revision&revision=252695 thanks Zbyszek! Warner From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 17:42:51 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 8FC98297 for ; Thu, 4 Jul 2013 17:42:51 +0000 (UTC) (envelope-from freebsd_arm@myspectrum.nl) Received: from mail.virtualhost.nl (mail.virtualhost.nl [89.200.201.133]) by mx1.freebsd.org (Postfix) with ESMTP id DE0541361 for ; Thu, 4 Jul 2013 17:42:50 +0000 (UTC) Received: (qmail 67420 invoked by uid 1141); 4 Jul 2013 19:42:42 +0200 Received: from ip120-12-208-87.adsl2.static.versatel.nl (HELO [10.0.0.15]) (87.208.12.120) (smtp-auth username freebsd_arm@myspectrum.nl, mechanism plain) by mail.virtualhost.nl (qpsmtpd/0.84) with (CAMELLIA256-SHA encrypted) ESMTPSA; Thu, 04 Jul 2013 19:42:42 +0200 Message-ID: <51D5B41A.5000805@myspectrum.nl> Date: Thu, 04 Jul 2013 19:42:50 +0200 From: Jeroen Hofstee User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <16DEBC38-F99A-4733-86FD-9E81A146CE5C@bsdimp.com> In-Reply-To: <16DEBC38-F99A-4733-86FD-9E81A146CE5C@bsdimp.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Alexander Motin , Ilya Bakulin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 17:42:51 -0000 Hello Warner, On 07/04/2013 06:09 PM, Warner Losh wrote: > On Jul 3, 2013, at 11:47 PM, Jeroen Hofstee wrote: > >> Hello Ilya, >> >> On 07/04/2013 12:20 AM, Ilya Bakulin wrote: >>> So some bytes lack 0x40... This problem occurs also with other numbers >>> read from the card, for example, vendor ID is read as 0x029F instead of 0x02DF. >>> +/* Halfword bit masks used for command response extraction. */ >>> +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ >>> +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ >>> + /* Response bits [15:14] and [13:8] */ >>> + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | >>> + ((word & MV_SDIO_RSP48_BM2) << 6); >>> + >> From the looks if it, MV_SDIO_RSP48_BM2 must be 3 instead 2. > And 0x0031 doesn't look right either... I'd have expected 0x3f. which 0x0031 (perhaps I need to have my eyes checked....)? Regards, Jeroen From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 19:10:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 80140C40 for ; Thu, 4 Jul 2013 19:10:04 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from wa3yre.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id A1D4019A3 for ; Thu, 4 Jul 2013 19:10:03 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by wa3yre.wynn.com (8.14.3/8.12.6) with ESMTP id r64JA0W5002365 for ; Thu, 4 Jul 2013 15:10:00 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Thu, 4 Jul 2013 15:09:59 -0400 From: Brett Wynkoop To: Brett Wynkoop Subject: Most recent R-PI kernel refuses to build Message-ID: <20130704150959.76adeedf@ivory.wynn.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 19:10:04 -0000 Greeting- Just used csup to pull the most recent sources and for starters tried to build a generic Pi kerne, with these results" Don't forget to do ``make cleandepend && make depend'' root@fbsd-pi:/usr/src/sys/arm/conf # cd ../compile/RPI-B root@fbsd-pi:/usr/src/sys/arm/compile/RPI-B # make depend && make clean "../../../conf/kern.mk", line 37: Malformed conditional (${MK_FORMAT_EXTENSIONS} == "no") "../../../conf/kern.mk", line 39: if-less else "../../../conf/kern.mk", line 41: if-less endif make: fatal errors encountered -- cannot continue root@fbsd-pi:/usr/src/sys/arm/compile/RPI-B # So is the only way for me to get caught up to head going to be do another cross build with Tim's tools. That seems nuts to me. -Brett -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 April 19, 1775 An English attempt to confiscate guns from Americans triggered a successful revolution...... Dear Congress, that's a hint. From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 19:42:32 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 67B08619 for ; Thu, 4 Jul 2013 19:42:32 +0000 (UTC) (envelope-from rpaulo@felyko.com) Received: from felyko.com (felyko.com [IPv6:2607:f2f8:a528::3:1337:ca7]) by mx1.freebsd.org (Postfix) with ESMTP id 52B641BAE for ; Thu, 4 Jul 2013 19:42:32 +0000 (UTC) Received: from [IPv6:2601:9:4d00:119:dce0:37cf:e5e6:f376] (unknown [IPv6:2601:9:4d00:119:dce0:37cf:e5e6:f376]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by felyko.com (Postfix) with ESMTPSA id A44E33983B; Thu, 4 Jul 2013 12:42:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=felyko.com; s=mail; t=1372966951; bh=FXR+WdpnX76pgjvn6RzgCCqh4Q3TVRKRY+CJeMK0R/A=; h=Subject:From:In-Reply-To:Date:Cc:References:To; b=CRRf0o/ijz3knouvx28ESNy/HZU23wSNP2PO3Eu97HcUHJ/qOCgSKrZvQdGHLoMAI hr7LRxx0pSdzfeRUxaKeF5mIGyX0ObreE1KZOlxrVMB419oS/AdN4ZNLF8CQCSUXRB VG1s55oFBypQeASVQCrHjAmBmTjmRk71bVttZuqo= Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: Most recent R-PI kernel refuses to build From: Rui Paulo In-Reply-To: <20130704150959.76adeedf@ivory.wynn.com> Date: Thu, 4 Jul 2013 12:42:30 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <94DAA01E-8E5E-43C7-919C-6DBB0B5D40EB@felyko.com> References: <20130704150959.76adeedf@ivory.wynn.com> To: Brett Wynkoop X-Mailer: Apple Mail (2.1508) Cc: Brett Wynkoop X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 19:42:32 -0000 On 4 Jul 2013, at 12:09, Brett Wynkoop wrote: > Greeting- >=20 > Just used csup to pull the most recent sources and for starters tried > to build a generic Pi kerne, with these results" >=20 > Don't forget to do ``make cleandepend && make depend'' > root@fbsd-pi:/usr/src/sys/arm/conf # cd ../compile/RPI-B > root@fbsd-pi:/usr/src/sys/arm/compile/RPI-B # make depend && make = clean > "../../../conf/kern.mk", line 37: Malformed conditional > (${MK_FORMAT_EXTENSIONS} =3D=3D "no") "../../../conf/kern.mk", line = 39: > if-less else "../../../conf/kern.mk", line 41: if-less endif > make: fatal errors encountered -- cannot continue > root@fbsd-pi:/usr/src/sys/arm/compile/RPI-B #=20 >=20 > So is the only way for me to get caught up to head going to be do > another cross build with Tim's tools. That seems nuts to me. You don't have an up to date kernel-toolchain. To save you lots of work, = you should probably build the kernel with 'buildworld' + 'buildkernel' = or 'kernel-toolchain' + 'buildkernel'. -- Rui Paulo From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 19:47:00 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 3DECB9E5 for ; Thu, 4 Jul 2013 19:47:00 +0000 (UTC) (envelope-from jordan.hubbard@gmail.com) Received: from mail-oa0-x22c.google.com (mail-oa0-x22c.google.com [IPv6:2607:f8b0:4003:c02::22c]) by mx1.freebsd.org (Postfix) with ESMTP id 09BEB1BDA for ; Thu, 4 Jul 2013 19:46:59 +0000 (UTC) Received: by mail-oa0-f44.google.com with SMTP id l10so2357063oag.17 for ; Thu, 04 Jul 2013 12:46:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=content-type:mime-version:subject:from:in-reply-to:date:cc :message-id:references:to:x-mailer; bh=5XrPgWJET999TObwGHim3Mo6MDjOfUyr/kh3WKLStKc=; b=lXbKotu8/WFHPrQrzWZzMhrZh6jm/Z4c7bUtNC++2PNbIOIeFsFQQNQTEwVwNtM559 g0RFnBe/07DHjx3HhIqsEUzSr3bNBkcg4gcA/iU3YsLbRu3ObnCsQfki9NxFjhRm3fmE T61r2oHH1KIYe0hFeQMcPNyhjcu/izwInnJrz1n/5Ir22WYOHjdSkuai0wprqoSztggk 4TC1sG2fd8ICmysuAwb5aFhrsDSyfUemD5GV/4cDDCSjKV+g3e/rUidm8s6PzMsFC/+f KzQP6JFeQViXMRxVjoUbJIARd3ojAL3WflIsdGALUUg8dPV4u1NCdZXQb88tuEBdcYg5 W4cw== X-Received: by 10.182.66.137 with SMTP id f9mr1325863obt.24.1372967219637; Thu, 04 Jul 2013 12:46:59 -0700 (PDT) Received: from [10.20.30.70] (29.sub-70-197-2.myvzw.com. [70.197.2.29]) by mx.google.com with ESMTPSA id rs4sm7797223obc.10.2013.07.04.12.46.58 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 12:46:59 -0700 (PDT) Mime-Version: 1.0 (Mac OS X Mail 6.6 \(1510\)) Subject: Re: Most recent R-PI kernel refuses to build From: "Jordan K. Hubbard" In-Reply-To: <20130704150959.76adeedf@ivory.wynn.com> Date: Thu, 4 Jul 2013 12:46:59 -0700 Message-Id: References: <20130704150959.76adeedf@ivory.wynn.com> To: Brett Wynkoop X-Mailer: Apple Mail (2.1510) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 19:47:00 -0000 On Jul 4, 2013, at 12:09 PM, Brett Wynkoop wrote: > So is the only way for me to get caught up to head going to be do > another cross build with Tim's tools. That seems nuts to me. I think something is seriously spooged with your hosting environment. = You can't svn update. Your build metadata is corrupt (I'll bet a dollar = if you look in that kern.mk file, you'll find the tell-tale <<<< markers = of a merge conflict). If I were you I'd nuke that whole system from = orbit and start from scratch with a -current snapshot - it's the only = way to be sure! My own -current system svn updates just fine. It builds an ARM kernel = and userland just fine (as I posted the other day, I'm running on it). = The probable difference is that I started from scratch with a new VM. - Jordan From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 19:50:38 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id D0345BEA for ; Thu, 4 Jul 2013 19:50:38 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ie0-f178.google.com (mail-ie0-f178.google.com [209.85.223.178]) by mx1.freebsd.org (Postfix) with ESMTP id 9FE1B1C04 for ; Thu, 4 Jul 2013 19:50:38 +0000 (UTC) Received: by mail-ie0-f178.google.com with SMTP id u16so3816562iet.37 for ; Thu, 04 Jul 2013 12:50:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:subject:mime-version:content-type:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer :x-gm-message-state; bh=4efWXdI2sx2fWL/knga7F455OElbR25vdNwfTm1jv1c=; b=O3OLaEGgvKlLMMxiSbzNifLGguPYJi0BcTuu6XBJOjUdz/Tzu5fioTOcYOlF6EnMUI u7hSp1kbZe+IDjf8JLtSNl0iL1owzZrfQCQyxFxQ1sR0/uwR1uu5gJ6MZTnJX6GY2wDg eI17S889szG0TWlnanb+u/Z873MJH1sRZ3oRGajpg2/D1cl+HYz/ryPvhFMtwV19gaD/ CNrUSzHIj5DuYNQNmPNvsa+kW5wjwbuXIx/s49f0t4mvSuxdhYLNUX2wGMbn66jFiZaH 2DFJneXFDzEqYv9TTn3JJ9bo5tF6LNRAPjibd+8VPsL7G2hYNyiCURFkQ/gPQJacgUqo d+Ug== X-Received: by 10.50.127.139 with SMTP id ng11mr17110919igb.6.1372966932697; Thu, 04 Jul 2013 12:42:12 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id x10sm28088806igl.3.2013.07.04.12.42.10 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 12:42:11 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <51D5B41A.5000805@myspectrum.nl> Date: Thu, 4 Jul 2013 13:42:09 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <16DEBC38-F99A-4733-86FD-9E81A146CE5C@bsdimp.com> <51D5B41A.5000805@myspectrum.nl> To: Jeroen Hofstee X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQnywkBo9+Cis4qgzDfXXerTOBv4wvXdraafjrIvhXQLBNBeWZo/xNmfZgcCsNJDSrKA8NjD Cc: Alexander Motin , Ilya Bakulin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 19:50:38 -0000 On Jul 4, 2013, at 11:42 AM, Jeroen Hofstee wrote: > Hello Warner, >=20 > On 07/04/2013 06:09 PM, Warner Losh wrote: >> On Jul 3, 2013, at 11:47 PM, Jeroen Hofstee wrote: >>=20 >>> Hello Ilya, >>>=20 >>> On 07/04/2013 12:20 AM, Ilya Bakulin wrote: >>>> So some bytes lack 0x40... This problem occurs also with other = numbers >>>> read from the card, for example, vendor ID is read as 0x029F = instead of 0x02DF. >>>> +/* Halfword bit masks used for command response extraction. */ >>>> +#define MV_SDIO_RSP48_BM2 0x0002 /* Lower 2 bits. */ >>>> +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ >>>> + /* Response bits [15:14] and [13:8] */ >>>> + *rp++ =3D (resp[2] & MV_SDIO_RSP48_BM6) | >>>> + ((word & MV_SDIO_RSP48_BM2) << 6); >>>> + >>> =46rom the looks if it, MV_SDIO_RSP48_BM2 must be 3 instead 2. >> And 0x0031 doesn't look right either... I'd have expected 0x3f. > which 0x0031 (perhaps I need to have my eyes checked....)? No, my eyes. Warner From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 20:32:30 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 1FA10AAE for ; Thu, 4 Jul 2013 20:32:30 +0000 (UTC) (envelope-from rpaulo@FreeBSD.org) Received: from felyko.com (felyko.com [IPv6:2607:f2f8:a528::3:1337:ca7]) by mx1.freebsd.org (Postfix) with ESMTP id 0D9FA1D76 for ; Thu, 4 Jul 2013 20:32:30 +0000 (UTC) Received: from [IPv6:2601:9:4d00:119:a9e2:619c:ecb6:ceaa] (unknown [IPv6:2601:9:4d00:119:a9e2:619c:ecb6:ceaa]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by felyko.com (Postfix) with ESMTPSA id BF4853986A; Thu, 4 Jul 2013 13:32:29 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: Most recent R-PI kernel refuses to build From: Rui Paulo In-Reply-To: Date: Thu, 4 Jul 2013 13:32:29 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20130704150959.76adeedf@ivory.wynn.com> To: Jordan K. Hubbard X-Mailer: Apple Mail (2.1508) Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 20:32:30 -0000 On 4 Jul 2013, at 12:46, Jordan K. Hubbard = wrote: > On Jul 4, 2013, at 12:09 PM, Brett Wynkoop = wrote: >=20 >> So is the only way for me to get caught up to head going to be do >> another cross build with Tim's tools. That seems nuts to me. >=20 > I think something is seriously spooged with your hosting environment. = You can't svn update. Your build metadata is corrupt (I'll bet a = dollar if you look in that kern.mk file, you'll find the tell-tale <<<< = markers of a merge conflict). If I were you I'd nuke that whole = system from orbit and start from scratch with a -current snapshot - it's = the only way to be sure! The problem was actually because we imported NetBSD's make and they are = incompatible now. Brett is trying to compile CURRENT with FreeBSD's make = which won't work. The fix is to use the method I described in my = previous email. -- Rui Paulo From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 20:38:21 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id BD13BC84; Thu, 4 Jul 2013 20:38:21 +0000 (UTC) (envelope-from jordan.hubbard@gmail.com) Received: from mail-ob0-x22c.google.com (mail-ob0-x22c.google.com [IPv6:2607:f8b0:4003:c01::22c]) by mx1.freebsd.org (Postfix) with ESMTP id 7BE301DA6; Thu, 4 Jul 2013 20:38:21 +0000 (UTC) Received: by mail-ob0-f172.google.com with SMTP id wo10so2033055obc.17 for ; Thu, 04 Jul 2013 13:38:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=content-type:mime-version:subject:from:in-reply-to:date:cc :message-id:references:to:x-mailer; bh=NYwaH8ngOvknoNJuDxcct1G8yOe49AaMYtFBrAO0t/M=; b=NArTfiAZN/aHxzPJpzoV50C3PL3ng+XjCYVqn1lP02IdlgHHIrvuiXuCAnFdgdAQSh 49pHMaUDU+5dx+ePyLq/CUZFui3vsX4wEe+VTmBSardIPd5CVYTh2qgVaY9DxW4ehUOZ jZXcOsq77SRQwTIBI2bBZYDMn14VOFQZ20bUY199lJhm93Ofcj2mqQzwLWhT5UBOoJqT ANVd6mkIRfrEdB7pvf2T7gACx4jjJ1RLtaacRaRpAxDUbfhz3Nbz56L5o3m8s1U4v8aD 0aJ2HstWUolZ45WB3ETL53KQxZaFggzfNS2ldRL1hpNNsO6pk17QcKvTo+P17gghSaF3 fwfA== X-Received: by 10.60.41.37 with SMTP id c5mr7820910oel.43.1372970301139; Thu, 04 Jul 2013 13:38:21 -0700 (PDT) Received: from [10.20.30.70] (29.sub-70-197-2.myvzw.com. [70.197.2.29]) by mx.google.com with ESMTPSA id m11sm8353156oer.4.2013.07.04.13.38.19 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Jul 2013 13:38:20 -0700 (PDT) Mime-Version: 1.0 (Mac OS X Mail 6.6 \(1510\)) Subject: Re: Most recent R-PI kernel refuses to build From: Hubbard Jordan In-Reply-To: Date: Thu, 4 Jul 2013 13:38:21 -0700 Message-Id: References: <20130704150959.76adeedf@ivory.wynn.com> To: Rui Paulo X-Mailer: Apple Mail (2.1510) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 20:38:21 -0000 On Jul 4, 2013, at 1:32 PM, Rui Paulo wrote: > The problem was actually because we imported NetBSD's make and they = are incompatible now. Brett is trying to compile CURRENT with FreeBSD's = make which won't work. The fix is to use the method I described in my = previous email. Damn, lost a buck. :-) Still not sure why he can't svn update though... - Jordan From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 20:42:22 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id C49F5E9D for ; Thu, 4 Jul 2013 20:42:22 +0000 (UTC) (envelope-from rpaulo@FreeBSD.org) Received: from felyko.com (felyko.com [174.136.100.2]) by mx1.freebsd.org (Postfix) with ESMTP id B256B1DD6 for ; Thu, 4 Jul 2013 20:42:22 +0000 (UTC) Received: from [IPv6:2601:9:4d00:119:a9e2:619c:ecb6:ceaa] (unknown [IPv6:2601:9:4d00:119:a9e2:619c:ecb6:ceaa]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by felyko.com (Postfix) with ESMTPSA id BEC613982B; Thu, 4 Jul 2013 13:42:15 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: Most recent R-PI kernel refuses to build From: Rui Paulo In-Reply-To: Date: Thu, 4 Jul 2013 13:42:15 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20130704150959.76adeedf@ivory.wynn.com> To: Hubbard Jordan X-Mailer: Apple Mail (2.1508) Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 20:42:22 -0000 On 4 Jul 2013, at 13:38, Hubbard Jordan = wrote: > On Jul 4, 2013, at 1:32 PM, Rui Paulo wrote: >=20 >> The problem was actually because we imported NetBSD's make and they = are incompatible now. Brett is trying to compile CURRENT with FreeBSD's = make which won't work. The fix is to use the method I described in my = previous email. >=20 > Damn, lost a buck. :-) >=20 > Still not sure why he can't svn update though... That's because svnup isn't working very well at the moment... svn or = csup should work. -- Rui Paulo From owner-freebsd-arm@FreeBSD.ORG Thu Jul 4 22:59:39 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 3CFB7D12; Thu, 4 Jul 2013 22:59:39 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp.kibab.com [5.9.14.202]) by mx1.freebsd.org (Postfix) with ESMTP id EE0DB12DF; Thu, 4 Jul 2013 22:59:38 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 86E123F47A DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1372978770; bh=sFG/DBaUyN8DRwpJlhE1w6PGSaDHhCEhKPqunQLdDrY=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=S0VFWaesGRSE41sH2hIEukEX5uLSdKC+DRxrwBb/DBtvi0fJ6LB0Atp2irVhj0zVT 7dNoyD0Lzoq0AheLkmQui5eLpmI/c0U1tFQmuMnb69Zxe8qKlwtpXdz1smJv2Cti9e B+LABXFoauJi+cUvR7/iwLRXbKfgoHOqHFhI1Ajg= Message-ID: <51D5FE4C.9060102@bakulin.de> Date: Fri, 05 Jul 2013 00:59:24 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> In-Reply-To: <51D531CB.3060300@bakulin.de> X-Enigmail-Version: 1.5.1 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="----enig2WKGGPGDVOVGRXXPJHMSO" Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Jul 2013 22:59:39 -0000 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) ------enig2WKGGPGDVOVGRXXPJHMSO Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable I have added some more bus methods and the first prototype of Marvell 802= =2E11 SDIO driver. Right now it is able to attach and read some card-specific information. I'm analyzing the Linux driver and try to do the same things [1]. The next thing that should be done is uploading firmware to the card. My work is kept here: https://github.com/kibab/freebsd/compare/master...k= ibab-dplug#files_bucket I likely won't be able to work further on it during the next week, but please review the code and post your comments. [1] https://github.com/torvalds/linux/blob/master/drivers/net/wireless/mw= ifiex/sdio.c --=20 Regards, Ilya Bakulin ------enig2WKGGPGDVOVGRXXPJHMSO Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG/MacGPG2 v2.0.19 (Darwin) Comment: GPGTools - http://gpgtools.org iEYEARECAAYFAlHV/k8ACgkQo9vlj1oadwjjKgCgtM1mYECWO2QsuDxrcPGUGzr3 AxIAn2/fjxC5nfxOho8kMwsjoiThHzfE =NYFS -----END PGP SIGNATURE----- ------enig2WKGGPGDVOVGRXXPJHMSO-- From owner-freebsd-arm@FreeBSD.ORG Fri Jul 5 00:43:12 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7B6B3151; Fri, 5 Jul 2013 00:43:12 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id 502D51716; Fri, 5 Jul 2013 00:43:12 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.5/8.14.5) with ESMTP id r650h4rf065494; Thu, 4 Jul 2013 20:43:04 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.5/8.14.5/Submit) id r650h4AA065469; Fri, 5 Jul 2013 00:43:04 GMT (envelope-from tinderbox@freebsd.org) Date: Fri, 5 Jul 2013 00:43:04 GMT Message-Id: <201307050043.r650h4AA065469@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [head tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jul 2013 00:43:12 -0000 TB --- 2013-07-04 22:20:33 - tinderbox 2.10 running on freebsd-current.sentex.ca TB --- 2013-07-04 22:20:33 - FreeBSD freebsd-current.sentex.ca 8.3-PRERELEASE FreeBSD 8.3-PRERELEASE #0: Mon Mar 26 13:54:12 EDT 2012 des@freebsd-current.sentex.ca:/usr/obj/usr/src/sys/GENERIC amd64 TB --- 2013-07-04 22:20:33 - starting HEAD tinderbox run for arm/arm TB --- 2013-07-04 22:20:33 - cleaning the object tree TB --- 2013-07-04 22:20:33 - /usr/local/bin/svn stat /src TB --- 2013-07-04 22:20:37 - At svn revision 252731 TB --- 2013-07-04 22:20:38 - building world TB --- 2013-07-04 22:20:38 - CROSS_BUILD_TESTING=YES TB --- 2013-07-04 22:20:38 - MAKEOBJDIRPREFIX=/obj TB --- 2013-07-04 22:20:38 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-07-04 22:20:38 - SRCCONF=/dev/null TB --- 2013-07-04 22:20:38 - TARGET=arm TB --- 2013-07-04 22:20:38 - TARGET_ARCH=arm TB --- 2013-07-04 22:20:38 - TZ=UTC TB --- 2013-07-04 22:20:38 - __MAKE_CONF=/dev/null TB --- 2013-07-04 22:20:38 - cd /src TB --- 2013-07-04 22:20:38 - /usr/bin/make -B buildworld >>> Building an up-to-date make(1) >>> World build started on Thu Jul 4 22:20:45 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies [...] ===> usr.sbin/wpa/wpa_supplicant (depend) rm -f .depend CC='cc ' mkdep -f .depend -a -I/src/usr.sbin/wpa/wpa_supplicant -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//hostapd -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/common -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/l2_packet -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps -DCONFIG_CTRL_IFACE -DCONFIG_CTRL_IFACE_UNIX -DCONFIG_BACKEND_FILE -DCONFIG_DEBUG_SYSLOG -DCONFIG_DRIVER_BSD -DCONFIG_DRIVER_NDIS -DCONFIG_DRIVER_WIRED -DCONFIG_PEERKEY -DCONFIG_SMARTCARD -DCONFIG_TERMINATE_ONLASTIF -DCONFIG_WPS -DCONFIG_WPS2 -DCONFIG_WPS_UPNP -DCONFIG_TLS=openssl -DCONFIG_IEEE80211R -DCONFIG_INTERWORKING -DCONFIG_PRIVSEP -DCONFIG_HS20 -DCONFIG_GAS -DPKCS12_FUNCS -DEAP! _GTC -DEAP_LEAP -DEAP_MD5 -DEAP_MSCHAPv2 -DEAP_OTP -DEAP_PEAP -DEAP_PSK -DEAP_TLS -DEAP_TTLS -DEAP_GTC -DEAP_OTP -DEAP_LEAP -DIEEE8021X_EAPOL -DCONFIG_SHA256 -DEAP_TLS_OPENSSL -I/src/usr.sbin/wpa/wpa_supplicant -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//hostapd -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/common -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/l2_packet -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils -I/src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps -DCONFIG_CTRL_IFACE -DCONFIG_CTRL_IFACE_UNIX -std=gnu99 /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-unwrap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/base64.c /src/usr.sbin/wpa/wpa_supplicant! /../../../contrib/wpa//wpa_supplicant/blacklist.c /src/usr.sbi! n/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/bss.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/config.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/config_file.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/ctrl_iface.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/ctrl_iface_unix.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers/driver_bsd.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers/driver_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers/driver_ndis.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers/driver_wired.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/drivers/drivers.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/eap_register.c /src/usr.sbin/wpa/wpa_suppli! cant/../../../contrib/wpa//src/utils/eloop.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/events.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/common/gas.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/gas_query.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/ap/hs20.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/hs20_supplicant.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/http_client.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/http_server.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/httpread.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/common/ieee802_11_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/interworking.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/l2_packet/l2_packet_freebsd.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_suppli! cant/main.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/! crypto/md5.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/notify.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/offchannel.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/os_unix.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/rsn_supp/peerkey.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/rsn_supp/pmksa_cache.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/rsn_supp/preauth.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/scan.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/upnp_xml.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/uuid.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/rsn_supp/wpa.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/common/wpa_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/wpa_debug.c /src/usr.sbin/wpa/wpa_supplicant/../../../contr! ib/wpa//src/rsn_supp/wpa_ft.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/rsn_supp/wpa_ie.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/wpa_supplicant.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/utils/wpabuf.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/wpas_glue.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_attr_build.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_attr_parse.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_attr_process.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_dev_attr.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_enrollee.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_registrar.c /src/usr.sbin/wp! a/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/wps_supplicant.c ! /src/usr..sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_upnp.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_upnp_ap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_upnp_event.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_upnp_ssdp.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/wps/wps_upnp_web.c /src/usr.sbin/wpa/wpa_supplicant/Packet32.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_common/chap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_common/eap_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_gtc.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_leap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_md5.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_methods.c /src! /usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_mschapv2.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_otp.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_peap.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_common/eap_peap_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_psk.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_common/eap_psk_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_tls.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_tls_common.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/eap_ttls.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eapol_supp/eapol_supp_sm.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/ms_funcs.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/eap_peer/mschapv2.c /src/usr.sbin/w! pa/wpa_supplicant/../../../contrib/wpa//src/crypto/crypto_openssl.c /src! /usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/random.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/sha1-prf.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/sha256-prf.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/tls_openssl.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-cbc.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-eax.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-ctr.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-encblock.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/aes-omac1.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//src/crypto/sha1-tlsprf.c /src/usr.sbin/wpa/wpa_supplicant/../../../contrib/wpa//wpa_supplicant/notify.c:16:10: fatal error: 'dbus/dbus_common.h' file not found #include "dbus/dbus_common.h" ^ 1 error generated. mkdep: compile failed *** Error code 1 Stop. make: stopped in /src/usr.sbin/wpa/wpa_supplicant *** Error code 1 Stop. make: stopped in /src/usr.sbin/wpa *** Error code 1 Stop. make: stopped in /src/usr.sbin *** Error code 1 Stop. make: stopped in /src *** Error code 1 Stop. make: stopped in /src *** Error code 1 Stop in /src. TB --- 2013-07-05 00:43:04 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-07-05 00:43:04 - ERROR: failed to build world TB --- 2013-07-05 00:43:04 - 7183.80 user 1031.64 system 8551.24 real http://tinderbox.freebsd.org/tinderbox-head-build-HEAD-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Fri Jul 5 03:36:23 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 42F6C98D; Fri, 5 Jul 2013 03:36:23 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from wa3yre.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id 059941E33; Fri, 5 Jul 2013 03:36:22 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by wa3yre.wynn.com (8.14.3/8.12.6) with ESMTP id r653aLBN006737; Thu, 4 Jul 2013 23:36:21 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Thu, 4 Jul 2013 23:36:21 -0400 From: Brett Wynkoop To: Rui Paulo Subject: Re: Most recent R-PI kernel refuses to build Message-ID: <20130704233621.08d61bfe@ivory.wynn.com> In-Reply-To: References: <20130704150959.76adeedf@ivory.wynn.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jul 2013 03:36:23 -0000 Greeting- Well per your advice folks I bit the bullet and started a buildworld on the Pi a few moments ago. We will see how that turns out! On the bright side I now have a Dell 1750 running 9.1 on zfs that I can use for cross builds if I totally screw the Pi up. I sure hope I will be able to retire most of my old power hungry x86 boxes soon in favor of Pi and Bone boxes running off my solar panel. -Brett -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 April 19, 1775 An English attempt to confiscate guns from Americans triggered a successful revolution...... Dear Congress, that's a hint. From owner-freebsd-arm@FreeBSD.ORG Fri Jul 5 15:37:12 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id BD40DF48 for ; Fri, 5 Jul 2013 15:37:12 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-we0-f182.google.com (mail-we0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 50D9312A9 for ; Fri, 5 Jul 2013 15:37:11 +0000 (UTC) Received: by mail-we0-f182.google.com with SMTP id p60so2107794wes.27 for ; Fri, 05 Jul 2013 08:37:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=message-id:date:from:organization:user-agent:mime-version:to:cc :subject:references:in-reply-to:content-type :content-transfer-encoding:x-gm-message-state; bh=Kts4kNH78IcanCCW6GVTZ63pRNED9zx5VKa07q/LgGw=; b=l2M/UUZRweyWt1p3+GWsfejInqI08EENKb5ZJ8XwARU6wSvM/vtxgY9Npq1goEJRlv 0NcmUHFsynVdr2VSvIKIleTbBOSHThWld89dSTRJTqQizh9CjPTFoxQRD/aREJyEk3vK yfTYYM+q3qe5OdLDPZTuM5/+NsdebZQjdMK1pgJ1OMdwtWCRtF4l3le572huQPKoSxxl Q3bE1LDaEnNZKnfh2ft7+Ol5eANrJiGJxO8nBB1+qwE5U40Bt0cNxFfVp1CdTzk6waxm +d7No3acpooxCqN54SLTuSgvqaoyi5Nq2TL7d1VxOfLQUz5AdDc9m1jiJonwltOSvitA 7Syg== X-Received: by 10.180.96.227 with SMTP id dv3mr6158074wib.59.1373038625232; Fri, 05 Jul 2013 08:37:05 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id ev19sm10359307wid.2.2013.07.05.08.37.03 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Jul 2013 08:37:04 -0700 (PDT) Message-ID: <51D6E81D.3090503@semihalf.com> Date: Fri, 05 Jul 2013 17:37:01 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: Jeff Roberson Subject: Re: Kernel build fails on ARM: Cannot fork: Cannot allocate memory References: <51C4A067.7010203@semihalf.com> <20130623065706.GV91021@kib.kiev.ua> <20130623083220.GA41511@mail.bsdpad.com> <20130623143248.GA91021@kib.kiev.ua> <20130623144346.GA69378@mail.bsdpad.com> <20130623161617.GC91021@kib.kiev.ua> <20130623164425.GA77339@mail.bsdpad.com> <20130623165040.GD91021@kib.kiev.ua> <20130623170507.GA79364@mail.bsdpad.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Gm-Message-State: ALoCoQlX2c1Mpv3BRS4Xlj8KiQSo4AcscPnFZhNg4qk4+Ot7ArnVLp3CBRsjjkpmLEEXuXuh00j+ Cc: Konstantin Belousov , freebsd-arm@FreeBSD.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jul 2013 15:37:12 -0000 On 25.06.2013 05:23, Jeff Roberson wrote: > On Sun, 23 Jun 2013, Ruslan Bukin wrote: > >> On Sun, Jun 23, 2013 at 07:50:40PM +0300, Konstantin Belousov wrote: >>> On Sun, Jun 23, 2013 at 08:44:25PM +0400, Ruslan Bukin wrote: >>>> On Sun, Jun 23, 2013 at 07:16:17PM +0300, Konstantin Belousov wrote: >>>>> On Sun, Jun 23, 2013 at 06:43:46PM +0400, Ruslan Bukin wrote: >>>>>> >>>>>> Trying to mount root from ufs:/dev/da0 []... >>>>>> WARNING: / was not properly dismounted >>>>>> warning: no time-of-day clock registered, system time will not be >>>>>> set accurately >>>>>> panic: __rw_wlock_hard: recursing but non-recursive rw pmap pv >>>>>> global @ /usr/home/br/dev/head/sys/arm/arm/pmap-v6.c:1289 >>>>>> >>>>>> KDB: enter: panic >>>>>> [ thread pid 1 tid 100001 ] >>>>>> Stopped at kdb_enter+0x48: ldrb r15, [r15, r15, ror r15]! >>>>>> db> bt >>>>>> Tracing pid 1 tid 100001 td 0xc547f620 >>>>>> _end() at 0xde9d0530 >>>>>> scp=0xde9d0530 rlv=0xc1211458 (db_trace_thread+0x34) >>>>>> rsp=0xde9d0514 rfp=0xc12d1b60 >>>>>> Bad frame pointer: 0xc12d1b60 >>>>>> db> >>>>> This is completely broken. It seems that witness triggered the panic, >>>>> and ddb is unable to obtain a backtrace from the normal panic(9) call. >>>>> >>>>> Show the output of the 'show alllocks'. >>>> >>>> No such command >>> Do you have witness in the kernel config ? If not, add it to the config >>> and retry. >> >> Trying to mount root from ufs:/dev/da0 []... >> WARNING: / was not properly dismounted >> warning: no time-of-day clock registered, system time will not be set >> accurately >> panic: __rw_wlock_hard: recursing but non-recursive rw pmap pv global >> @ /usr/home/br/dev/head/sys/arm/arm/pmap-v6.c:1289 >> >> KDB: enter: panic >> [ thread pid 1 tid 100001 ] >> Stopped at kdb_enter+0x48: ldrb r15, [r15, r15, ror r15]! >> db> show alllocks >> Process 1 (kernel) thread 0xc55fc620 (100001) >> exclusive sleep mutex pmap (pmap) r = 0 (0xc5600590) locked @ >> /usr/home/br/dev/head/sys/arm/arm/pmap-v6.c:729 >> exclusive rw pmap pv global (pmap pv global) r = 0 (0xc1479dd0) locked >> @ /usr/home/br/dev/head/sys/arm/arm/pmap-v6.c:728 >> shared rw vm object (vm object) r = 0 (0xc1551d4c) locked @ >> /usr/home/br/dev/head/sys/vm/vm_map.c:1809 >> exclusive sx vm map (user) (vm map (user)) r = 0 (0xc5600528) locked @ >> /usr/home/br/dev/head/sys/kern/imgact_elf.c:445 >> exclusive lockmgr ufs (ufs) r = 0 (0xc56f7914) locked @ >> /usr/home/br/dev/head/sys/kern/imgact_elf.c:821 >> exclusive sleep mutex Giant (Giant) r = 0 (0xc147c778) locked @ >> /usr/home/br/dev/head/sys/kern/vfs_mount.c:1093 >> db> >> > > Would any of the arm users be interested in testing a larger patch that > changes the way the kernel allocations KVA? It also has some UMA code > that lessens kernel memory utilization. > > http://people.freebsd.org/~jeff/vmem.diff > > Any reports would be helpful. Is there any ETA on getting stack tracing > fixed? I suspect the pmap recursion encountered with Kostik's patch > exist in the current kernel. The other changes in this patch my fix > that as well. > > Thanks, > Jeff Hello Jeff, I apologize for a long time with no respond. The problems that I reported at the origin of this tread are no longer relevant. I've made some really extensive tests on the current HEAD and there is no track of kstack allocation failure on my ARM target now. Thanks a lot for your help! Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Fri Jul 5 19:24:28 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id CBFDEB19; Fri, 5 Jul 2013 19:24:28 +0000 (UTC) (envelope-from gonzo@id.bluezbox.com) Received: from id.bluezbox.com (id.bluezbox.com [88.198.91.248]) by mx1.freebsd.org (Postfix) with ESMTP id 811E51E63; Fri, 5 Jul 2013 19:24:28 +0000 (UTC) Received: from [207.6.254.8] (helo=[192.168.1.65]) by id.bluezbox.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77 (FreeBSD)) (envelope-from ) id 1UvBcB-000C5m-8q; Fri, 05 Jul 2013 12:24:21 -0700 Content-Type: text/plain; charset=iso-8859-1 Mime-Version: 1.0 (Mac OS X Mail 6.3 \(1503\)) Subject: Re: Beaglebone USB driver (Mentor Graphics OTG) From: Oleksandr Tymoshenko In-Reply-To: Date: Fri, 5 Jul 2013 12:24:00 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: <49E5BE45-208C-4AAD-980D-590F32D9B600@bluezbox.com> References: <51608AA4.2020804@bluezbox.com> <51611A7B.2010105@bitfrost.no> <0927BB4C-6917-408D-B102-AB98F72314B6@bluezbox.com> <51CBDFEA.7050203@bitfrost.no> To: Hans Petter Selasky X-Mailer: Apple Mail (2.1503) Sender: gonzo@id.bluezbox.com X-Spam-Level: -- X-Spam-Report: Spam detection software, running on the system "id.bluezbox.com", has identified this incoming email as possible spam. The original message has been attached to this so you can view it (if it isn't spam) or label similar future email. If you have any questions, see The administrator of that system for details. Content preview: On 2013-07-01, at 9:48 PM, Oleksandr Tymoshenko wrote: > > On 2013-06-26, at 11:47 PM, Hans Petter Selasky wrote: > >> On 06/27/13 02:53, Oleksandr Tymoshenko wrote: >>> >>> On 2013-04-07, at 12:04 AM, Hans Petter Selasky wrote: >>> >>>> On 04/06/13 22:50, Oleksandr Tymoshenko wrote: >>>>> Hello, >>>>> [...] Content analysis details: (-2.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 URIBL_BLOCKED ADMINISTRATOR NOTICE: The query to URIBL was blocked. See http://wiki.apache.org/spamassassin/DnsBlocklists#dnsbl-block for more information. [URIs: bluezbox.com] -1.0 ALL_TRUSTED Passed through trusted hosts only via SMTP -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: arm@freebsd.org, usb@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jul 2013 19:24:28 -0000 On 2013-07-01, at 9:48 PM, Oleksandr Tymoshenko = wrote: >=20 > On 2013-06-26, at 11:47 PM, Hans Petter Selasky = wrote: >=20 >> On 06/27/13 02:53, Oleksandr Tymoshenko wrote: >>>=20 >>> On 2013-04-07, at 12:04 AM, Hans Petter Selasky = wrote: >>>=20 >>>> On 04/06/13 22:50, Oleksandr Tymoshenko wrote: >>>>> Hello, >>>>>=20 .. skipped .. >=20 > Writing 127 to FADDR breaks driver. It can't even attach device = properly.=20 >=20 > I do not completely understand the scenario behind this requirement. = My=20 > recollection is: when we cancel IN transaction somehow we should = ensure=20 > that function that currently handles it does not stuck forever. =46rom = what=20 > I see it's just impossible. There is internal NAK timer that fails the = transaction > once it reached configured value (or 3 by default AFAIR). Isn't it = enough? >=20 > I tried unloading active uwrtn driver - it unloads with some delay but = as=20 > far as I can see from logs delay is not due to USB internal = transactions code > it must be upper layer.=20 >=20 > Could you, please, elaborate on the matter? >=20 > Here is updated version of the patch:=20 > = http://people.freebsd.org/~gonzo/arm/patches/beaglebone-usb-20130701.diff >=20 > Besides cosmetic fixes I also synced = dev/usb/controller/musb_otg_atmelarm.c > to the latest changes of core logic: added required wrappers and some=20= > initializations.=20 >=20 > I do not longer have access to USB analyzer so my debugging abilities > is somewhat limited now. Hi Hans, The driver seems to be fairly stable judging from my tests. I'd like to = commit it as-is, get more test coverage from users and tighten up loose ends = then.=20 What do you think? From owner-freebsd-arm@FreeBSD.ORG Fri Jul 5 23:36:45 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 11529E4E for ; Fri, 5 Jul 2013 23:36:45 +0000 (UTC) (envelope-from pettefar@gmail.com) Received: from mail-wg0-x234.google.com (mail-wg0-x234.google.com [IPv6:2a00:1450:400c:c00::234]) by mx1.freebsd.org (Postfix) with ESMTP id 9E1BC1AC5 for ; Fri, 5 Jul 2013 23:36:44 +0000 (UTC) Received: by mail-wg0-f52.google.com with SMTP id b12so2348215wgh.31 for ; Fri, 05 Jul 2013 16:36:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:content-type:mime-version:subject:from:in-reply-to:date:cc :content-transfer-encoding:message-id:references:to:x-mailer; bh=wT61xcKMmYlrt3BXDRq0ytcZqZ/JMJwp3kyaU/fJZD4=; b=mhQyvp4Hff1Xug7LydThr8xfGDlvVSIPyISkuw9EO/U98W4xF3zRLFGz18CQFLTa0K PA9fiC2V4eupRYdZ8skpup95E8uWFx5jTz22kgfYKvurs5a7yNXatg4NEPmhdfhd+Ay+ lN06ZZkdqmNCodyjanm64ovZn2WSXNDyCMVRogoMz9hoOwwbMGJsfMzHbV3a6QLTAc0Y d9fPVZQCVUQrhPly/UgAvnETcpl8xCMgyFi8JnVn1garPLp9y4DnNAfD4YrKFoXdohd8 UCNBDUOyaBMWjfXOfM745zir6DykpmHl15W/6E75Vjr73ig9fw/8sGEynhSQCFYHixpT /XFg== X-Received: by 10.194.75.201 with SMTP id e9mr7117641wjw.20.1373067403572; Fri, 05 Jul 2013 16:36:43 -0700 (PDT) Received: from [10.10.19.31] ([86.43.74.198]) by mx.google.com with ESMTPSA id fb9sm43319786wid.2.2013.07.05.16.36.41 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Jul 2013 16:36:43 -0700 (PDT) Sender: Nick Pettefar Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: boinc/seti on RPi From: Nick In-Reply-To: Date: Sat, 6 Jul 2013 00:36:39 +0100 Content-Transfer-Encoding: quoted-printable Message-Id: <5C2068B3-83C7-40E0-A067-D9C235CFB260@pettefar.com> References: To: hiren panchasara X-Mailer: Apple Mail (2.1508) Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jul 2013 23:36:45 -0000 Hi Hiren, Thanks for that! Done it and the make has continued. Unfortunately I am now stuck on glib20 which isn't available as a binary = and won't compile on the Pi. Bah! Nick /usr/local/lib/libffi.so: undefined reference to `__clear_cache' cc: error: linker command failed with exit code 1 (use -v to see = invocation) gmake[4]: *** [gobject-query] Error 1 gmake[4]: Leaving directory = `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' gmake[3]: *** [all-recursive] Error 1 gmake[3]: Leaving directory = `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' gmake[2]: *** [all] Error 2 gmake[2]: Leaving directory = `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' gmake[1]: *** [all-recursive] Error 1 gmake[1]: Leaving directory `/usr/ports/devel/glib20/work/glib-2.34.3' gmake: *** [all] Error 2 *** Error code 1 Stop. make: stopped in /usr/ports/devel/glib20 *** Error code 1 Stop. make: stopped in /usr/ports/devel/glib20 *** Error code 1 Stop. make: stopped in /usr/ports/graphics/cairo *** Error code 1 Stop. make: stopped in /usr/ports/graphics/cairo *** Error code 1 Stop. make: stopped in /usr/ports/devel/gobject-introspection *** Error code 1 Stop. make: stopped in /usr/ports/devel/libnotify *** Error code 1 Stop. make: stopped in /usr/ports/net/boinc-client *** Error code 1 Stop. make: stopped in /usr/ports/net/boinc-client *** Error code 1 Stop. make: stopped in /usr/ports/astro/boinc-setiathome-enhanced *** Error code 1 Stop. make: stopped in /usr/ports/astro/boinc-setiathome-enhanced On 3 Jul 2013, at 16:52, hiren panchasara = wrote: > On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar = wrote: >> Hi, I am trying to install boinc/seti on my Raspberry Pi running = FreeBSD. >>=20 >> root@bsdpi:/usr/ports/devel/cmake # uname -a >> FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun = 1 >> 04:12:21 SGT 2013 >> root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B >> arm >>=20 >> Unfortunately I cannot install cmake, it keeps failing: >=20 > Not helping with the error but you can probably grab the prebuild > package from http://mirrors.nycbug.org/pub/FreeBSD_ARM/pkg/ to unblock > yourself. >=20 > I see it has cmake there. >=20 > cheers, > Hiren >>=20 >> root@bsdpi:/usr/ports/devel/cmake # make >> =3D=3D=3D> Configuring for cmake-2.8.10.2 >> =3D=3D=3D> FreeBSD 10 autotools fix applied to >> /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure >> --------------------------------------------- >> CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. >> C compiler on this system is: cc -O -pipe >> --------------------------------------------- >> Error when bootstrapping CMake: >> Cannot find appropriate C++ compiler on this system. >> Please specify one using environment variable CXX. >> See cmake_bootstrap.log for compilers attempted. >> --------------------------------------------- >> Log of errors: >> = /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.l= og >> --------------------------------------------- >> =3D=3D=3D> Script "configure" failed unexpectedly. >> Please report the problem to kde@FreeBSD.org [maintainer] and attach = the >> "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the = output >> of the failure of your make command. Also, it might be a good idea to >> provide >> an overview of all packages installed on your system (e.g. a >> /usr/local/sbin/pkg-static info -g -Ea). >> *** Error code 1 >>=20 >> Stop. >>=20 >> Any ideas anyone? >>=20 >> Regards, >>=20 >> Nick Pettefar >> N. Dublin >> _______________________________________________ >> freebsd-arm@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 01:34:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id E2A495AB for ; Sat, 6 Jul 2013 01:34:04 +0000 (UTC) (envelope-from peter@rulingia.com) Received: from vps.rulingia.com (host-122-100-2-194.octopus.com.au [122.100.2.194]) by mx1.freebsd.org (Postfix) with ESMTP id 642F91F01 for ; Sat, 6 Jul 2013 01:34:03 +0000 (UTC) Received: from server.rulingia.com (c220-239-237-213.belrs5.nsw.optusnet.com.au [220.239.237.213]) by vps.rulingia.com (8.14.5/8.14.5) with ESMTP id r661XtCU010910 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Sat, 6 Jul 2013 11:33:55 +1000 (EST) (envelope-from peter@rulingia.com) X-Bogosity: Ham, spamicity=0.000000 Received: from server.rulingia.com (localhost.rulingia.com [127.0.0.1]) by server.rulingia.com (8.14.5/8.14.5) with ESMTP id r661XmQa087438 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 6 Jul 2013 11:33:48 +1000 (EST) (envelope-from peter@server.rulingia.com) Received: (from peter@localhost) by server.rulingia.com (8.14.5/8.14.5/Submit) id r661XmEO087437 for freebsd-arm@freebsd.org; Sat, 6 Jul 2013 11:33:48 +1000 (EST) (envelope-from peter) Date: Sat, 6 Jul 2013 11:33:48 +1000 From: Peter Jeremy To: freebsd-arm@freebsd.org Subject: buildworld failure on arm/armv6 using gcc Message-ID: <20130706013348.GP39302@server.rulingia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="3VRmKSg17yJg2MZg" Content-Disposition: inline X-PGP-Key: http://www.rulingia.com/keys/peter.pgp User-Agent: Mutt/1.5.21 (2010-09-15) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 01:34:04 -0000 --3VRmKSg17yJg2MZg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable I'm getting the following error trying to build either r252698 (natively) or r252781 (cross) for my RPi with gcc (ie WITHOUT_CLANG=3Dyes). /usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_ato= mic.o): In function `svn_named_atomic__cmpxchg': named_atomic.c:(.text+0xf0): undefined reference to `__sync_val_compare_and= _swap_8' /usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_ato= mic.o): In function `svn_named_atomic__add': named_atomic.c:(.text+0x174): undefined reference to `__sync_add_and_fetch_= 8' /usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_ato= mic.o): In function `svn_named_atomic__write': named_atomic.c:(.text+0x1c0): undefined reference to `__sync_lock_test_and_= set_8' /usr/obj/usr/src/usr.bin/svn/svn/../lib/libapr/libapr.a(builtins.o): In fun= ction `apr_atomic_dec32': builtins.c:(.text+0x90): undefined reference to `__sync_sub_and_fetch_4' *** Error code 1 Tinberbox build are succeeding but I gather they are using clang. I've looked back through the archives and there were similar build issues on both ARM & MIPS in mid April and MIPS in mid June but I can't find what the fix was. --=20 Peter Jeremy --3VRmKSg17yJg2MZg Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.20 (FreeBSD) iEUEARECAAYFAlHXc/wACgkQ/opHv/APuIcsiACgk9bX8l8sIUZtMkHMPVejA42E ME0AmPYijVpQw2OJhgbzPNyRiEk0mvc= =q8x2 -----END PGP SIGNATURE----- --3VRmKSg17yJg2MZg-- From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 01:34:32 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 58D785E6 for ; Sat, 6 Jul 2013 01:34:32 +0000 (UTC) (envelope-from hiren.panchasara@gmail.com) Received: from mail-ee0-x22f.google.com (mail-ee0-x22f.google.com [IPv6:2a00:1450:4013:c00::22f]) by mx1.freebsd.org (Postfix) with ESMTP id E5CD01F05 for ; Sat, 6 Jul 2013 01:34:31 +0000 (UTC) Received: by mail-ee0-f47.google.com with SMTP id e49so1653103eek.20 for ; Fri, 05 Jul 2013 18:34:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=JLQJ/dAAtOIwBoHTEVo5jZmxAUIM8ohq/Sda68HJVuY=; b=H0X+crul/hSZ7UgwRKEPHvhFsDUubGEWmLBHUj/Q4+fFU/ih/OEFZzBCCrIV/rH0we Kdw5lj8EJVb1DYB0zR9T0CyGsr6lDjl7ikaQdDOpd2xsmCqhFwmU5VxHOnMci/oI/Io0 kRXgt+L0GLV9mjBkJVD7FMxufuMqc/QbqWyfZ1C1rm0n20aeJgtWJSXkN52jD6XC6OO1 fMdLlHlnAmwqWHBEQtKLt5w/7hEmcwLb006bt7ovLKmhSrCaj8dktOo53qHPGfcRImFF RJfdVNZ8KTSV5oXec1WKiy618fN9wx9ksVhwgt7uWjMW0qaxajTQGW4GLi+SsNUkWBBO jz5A== MIME-Version: 1.0 X-Received: by 10.15.31.9 with SMTP id x9mr14600433eeu.103.1373074471084; Fri, 05 Jul 2013 18:34:31 -0700 (PDT) Received: by 10.14.119.203 with HTTP; Fri, 5 Jul 2013 18:34:30 -0700 (PDT) In-Reply-To: <5C2068B3-83C7-40E0-A067-D9C235CFB260@pettefar.com> References: <5C2068B3-83C7-40E0-A067-D9C235CFB260@pettefar.com> Date: Fri, 5 Jul 2013 18:34:30 -0700 Message-ID: Subject: Re: boinc/seti on RPi From: hiren panchasara To: Nick Content-Type: text/plain; charset=UTF-8 Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 01:34:32 -0000 On Fri, Jul 5, 2013 at 4:36 PM, Nick wrote: > Hi Hiren, > > Thanks for that! Done it and the make has continued. > > Unfortunately I am now stuck on glib20 which isn't available as a binary and won't compile on the Pi. Bah! Again, I am not helping you with the errors but I could create one on my beaglebone black with a couple weeks old kernel. You can pick it up from here: www.strugglingcoder.info/pkgs/glib-2.34.3.txz hope it helps, Hiren > > Nick > > /usr/local/lib/libffi.so: undefined reference to `__clear_cache' > cc: error: linker command failed with exit code 1 (use -v to see invocation) > gmake[4]: *** [gobject-query] Error 1 > gmake[4]: Leaving directory `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' > gmake[3]: *** [all-recursive] Error 1 > gmake[3]: Leaving directory `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' > gmake[2]: *** [all] Error 2 > gmake[2]: Leaving directory `/usr/ports/devel/glib20/work/glib-2.34.3/gobject' > gmake[1]: *** [all-recursive] Error 1 > gmake[1]: Leaving directory `/usr/ports/devel/glib20/work/glib-2.34.3' > gmake: *** [all] Error 2 > *** Error code 1 > > Stop. > make: stopped in /usr/ports/devel/glib20 > *** Error code 1 > > Stop. > make: stopped in /usr/ports/devel/glib20 > *** Error code 1 > > Stop. > make: stopped in /usr/ports/graphics/cairo > *** Error code 1 > > Stop. > make: stopped in /usr/ports/graphics/cairo > *** Error code 1 > > Stop. > make: stopped in /usr/ports/devel/gobject-introspection > *** Error code 1 > > Stop. > make: stopped in /usr/ports/devel/libnotify > *** Error code 1 > > Stop. > make: stopped in /usr/ports/net/boinc-client > *** Error code 1 > > Stop. > make: stopped in /usr/ports/net/boinc-client > *** Error code 1 > > Stop. > make: stopped in /usr/ports/astro/boinc-setiathome-enhanced > *** Error code 1 > > Stop. > make: stopped in /usr/ports/astro/boinc-setiathome-enhanced > > On 3 Jul 2013, at 16:52, hiren panchasara wrote: > >> On Wed, Jul 3, 2013 at 8:09 AM, Nick Pettefar wrote: >>> Hi, I am trying to install boinc/seti on my Raspberry Pi running FreeBSD. >>> >>> root@bsdpi:/usr/ports/devel/cmake # uname -a >>> FreeBSD bsdpi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r251172M: Sat Jun 1 >>> 04:12:21 SGT 2013 >>> root@fbsd10:/root/crochet/work/obj/arm.armv6/usr/src/sys/RPI-B >>> arm >>> >>> Unfortunately I cannot install cmake, it keeps failing: >> >> Not helping with the error but you can probably grab the prebuild >> package from http://mirrors.nycbug.org/pub/FreeBSD_ARM/pkg/ to unblock >> yourself. >> >> I see it has cmake there. >> >> cheers, >> Hiren >>> >>> root@bsdpi:/usr/ports/devel/cmake # make >>> ===> Configuring for cmake-2.8.10.2 >>> ===> FreeBSD 10 autotools fix applied to >>> /usr/ports/devel/cmake/work/cmake-2.8.10.2/configure >>> --------------------------------------------- >>> CMake 2.8.10.2, Copyright 2000-2012 Kitware, Inc. >>> C compiler on this system is: cc -O -pipe >>> --------------------------------------------- >>> Error when bootstrapping CMake: >>> Cannot find appropriate C++ compiler on this system. >>> Please specify one using environment variable CXX. >>> See cmake_bootstrap.log for compilers attempted. >>> --------------------------------------------- >>> Log of errors: >>> /usr/ports/devel/cmake/work/cmake-2.8.10.2/Bootstrap.cmk/cmake_bootstrap.log >>> --------------------------------------------- >>> ===> Script "configure" failed unexpectedly. >>> Please report the problem to kde@FreeBSD.org [maintainer] and attach the >>> "/usr/ports/devel/cmake/work/cmake-2.8.10.2/config.log" including the output >>> of the failure of your make command. Also, it might be a good idea to >>> provide >>> an overview of all packages installed on your system (e.g. a >>> /usr/local/sbin/pkg-static info -g -Ea). >>> *** Error code 1 >>> >>> Stop. >>> >>> Any ideas anyone? >>> >>> Regards, >>> >>> Nick Pettefar >>> N. Dublin >>> _______________________________________________ >>> freebsd-arm@freebsd.org mailing list >>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 04:09:34 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id EE3BEF84 for ; Sat, 6 Jul 2013 04:09:34 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from wa3yre.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id AEB7E15CD for ; Sat, 6 Jul 2013 04:09:34 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by wa3yre.wynn.com (8.14.3/8.12.6) with ESMTP id r6649RX7019849 for ; Sat, 6 Jul 2013 00:09:27 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Sat, 6 Jul 2013 00:09:26 -0400 From: Brett Wynkoop To: FreeBSD ARM List Subject: Re: Most recent R-PI kernel refuses to build Message-ID: <20130706000926.1a545c66@ivory.wynn.com> In-Reply-To: <20130704233621.08d61bfe@ivory.wynn.com> References: <20130704150959.76adeedf@ivory.wynn.com> <20130704233621.08d61bfe@ivory.wynn.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 04:09:35 -0000 Greeting- Well buildworld failed most of the way through. I decided to just regrab head from today and try again. If it fails again I guess I will take a close look at the failure and see what it teaches me. Probably 24-48 hours from now I will either have success or another failure. -Brett -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 April 19, 1775 An English attempt to confiscate guns from Americans triggered a successful revolution...... Dear Congress, that's a hint. From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 05:09:11 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 96FDD90C for ; Sat, 6 Jul 2013 05:09:11 +0000 (UTC) (envelope-from peter@rulingia.com) Received: from vps.rulingia.com (host-122-100-2-194.octopus.com.au [122.100.2.194]) by mx1.freebsd.org (Postfix) with ESMTP id 2B1981797 for ; Sat, 6 Jul 2013 05:09:10 +0000 (UTC) Received: from server.rulingia.com (c220-239-237-213.belrs5.nsw.optusnet.com.au [220.239.237.213]) by vps.rulingia.com (8.14.5/8.14.5) with ESMTP id r66593XU011418 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Sat, 6 Jul 2013 15:09:04 +1000 (EST) (envelope-from peter@rulingia.com) X-Bogosity: Ham, spamicity=0.000000 Received: from server.rulingia.com (localhost.rulingia.com [127.0.0.1]) by server.rulingia.com (8.14.5/8.14.5) with ESMTP id r6658tJ5089371 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Sat, 6 Jul 2013 15:08:56 +1000 (EST) (envelope-from peter@server.rulingia.com) Received: (from peter@localhost) by server.rulingia.com (8.14.5/8.14.5/Submit) id r6658t1a089370 for freebsd-arm@freebsd.org; Sat, 6 Jul 2013 15:08:55 +1000 (EST) (envelope-from peter) Date: Sat, 6 Jul 2013 15:08:55 +1000 From: Peter Jeremy To: freebsd-arm@freebsd.org Subject: Re: buildworld failure on arm/armv6 using gcc Message-ID: <20130706050855.GQ39302@server.rulingia.com> References: <20130706013348.GP39302@server.rulingia.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="itqfrb9Qq3wY07cp" Content-Disposition: inline In-Reply-To: <20130706013348.GP39302@server.rulingia.com> X-PGP-Key: http://www.rulingia.com/keys/peter.pgp User-Agent: Mutt/1.5.21 (2010-09-15) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 05:09:11 -0000 --itqfrb9Qq3wY07cp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2013-Jul-06 11:33:48 +1000, Peter Jeremy wrote: >I'm getting the following error trying to build either r252698 >(natively) or r252781 (cross) for my RPi with gcc (ie >WITHOUT_CLANG=3Dyes). The problem goes away if I use clang but I understood gcc should still be supported. >/usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_at= omic.o): In function `svn_named_atomic__cmpxchg': >named_atomic.c:(.text+0xf0): undefined reference to `__sync_val_compare_an= d_swap_8' >/usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_at= omic.o): In function `svn_named_atomic__add': >named_atomic.c:(.text+0x174): undefined reference to `__sync_add_and_fetch= _8' >/usr/obj/usr/src/usr.bin/svn/svn/../lib/libsvn_subr/libsvn_subr.a(named_at= omic.o): In function `svn_named_atomic__write': >named_atomic.c:(.text+0x1c0): undefined reference to `__sync_lock_test_and= _set_8' >/usr/obj/usr/src/usr.bin/svn/svn/../lib/libapr/libapr.a(builtins.o): In fu= nction `apr_atomic_dec32': >builtins.c:(.text+0x90): undefined reference to `__sync_sub_and_fetch_4' >*** Error code 1 I've split the failures into two categories: __sync_add_and_fetch_8 __sync_lock_test_and_set_8 __sync_val_compare_and_swap_8 these should be defined in /usr/src/sys/arm/arm/stdatomic.c (and compiled into libcompiler_rt.a) but that file only defines 1-, 2- and 4-byte variants for userland armv6 (it looks like it fakes 8-byte variants in the kernel by disabling interrupts). I don't know ARM assembler well enough to know if there's any way to do 64-bit atomic operations. I suspect not. __sync_sub_and_fetch_4 There are references to __sync_sub_and_fetch() but I can't any sign of a definition. It looks like __sync_sub_and_fetch_4 is supposed to be a gcc builtin so I'm not sure why it's being emitted without a definition. >Tinberbox build are succeeding but I gather they are using clang. It looks like it would be worthwhile building 9.x and head with both gcc and clang to prevent this sort of regression. --=20 Peter Jeremy --itqfrb9Qq3wY07cp Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.20 (FreeBSD) iEYEARECAAYFAlHXpmcACgkQ/opHv/APuIfhkACfWYL/jeeIv9pj04MoC6BkpPy2 Rg0An143IyeSHXHxQJTp8nvklbJdhqtL =QJ4j -----END PGP SIGNATURE----- --itqfrb9Qq3wY07cp-- From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 15:56:33 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id A4B3E83E for ; Sat, 6 Jul 2013 15:56:33 +0000 (UTC) (envelope-from freebsd-arm@wynn.com) Received: from wa3yre.wynn.com (wa3yre.wynn.com [199.89.147.3]) by mx1.freebsd.org (Postfix) with ESMTP id 4A6671B61 for ; Sat, 6 Jul 2013 15:56:32 +0000 (UTC) Received: from ivory.wynn.com (mail.wynn.com [199.89.147.3]) (authenticated bits=0) by wa3yre.wynn.com (8.14.3/8.12.6) with ESMTP id r66FuVdQ025690; Sat, 6 Jul 2013 11:56:31 -0400 (EDT) (envelope-from freebsd-arm@wynn.com) Date: Sat, 6 Jul 2013 11:56:31 -0400 From: Brett Wynkoop To: Brett Wynkoop Subject: Re: Most recent R-PI kernel refuses to build Message-ID: <20130706115631.5d36a4ac@ivory.wynn.com> In-Reply-To: <20130706000926.1a545c66@ivory.wynn.com> References: <20130704150959.76adeedf@ivory.wynn.com> <20130704233621.08d61bfe@ivory.wynn.com> <20130706000926.1a545c66@ivory.wynn.com> X-Mailer: Claws Mail 3.9.0 (GTK+ 2.24.19; x86_64-apple-darwin10.8.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: FreeBSD ARM List X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 15:56:33 -0000 Greeting- Buildworld failed again, with head from yesterday. I guess it is time to bite the bullet and set up do do another cross build now that I have a machine running FreeBSD 9.1 up and running. If anyone has any ideas I am open to hearing them. -Brett > ===> cddl/lib/libctf (depend) ===> cddl/lib/libnvpair (depend) rm -f .depend CC='cc ' mkdep -f .depend -a -I/export/src/cddl/lib/libnvpair/../../../cddl/compat/opensolaris/include -I/export/src/cddl/lib/libnvpair/../../../cddl/contrib/opensolaris/lib/libzpool/common -I/export/src/cddl/lib/libnvpair/../../../sys/cddl/compat/opensolaris -I/export/src/cddl/lib/libnvpair/../../../sys/cddl/contrib/opensolaris/uts/common -I/export/src/cddl/lib/libnvpair/../../../sys/cddl/contrib/opensolaris/uts/common/fs/zfs -I/export/src/cddl/lib/libnvpair/../../../sys -I/export/src/cddl/lib/libnvpair/../../../cddl/contrib/opensolaris/head -I/export/src/cddl/lib/libnvpair/../../../cddl/compat/opensolaris/lib/libumem -DNEED_SOLARIS_BOOLEAN -std=gnu89 /export/src/cddl/lib/libnvpair/../../../cddl/contrib/opensolaris/lib/libnvpair/libnvpair.c /export/src/cddl/lib/libnvpair/../../../cddl/contrib/opensolaris/lib/libnvpair/nvpair_alloc_system.c /export/src/cddl/lib/libnvpair/../../../sys/cddl/contrib/opensolaris/common/nvpair/nvpair_alloc_fixed.c /export/src/cddl/lib/libnvpair/../../../sys/cddl/contrib/opensolaris/common/nvpair/nvpair.c /export/src/cddl/lib/libnvpair/../../../sys/cddl/contrib/opensolaris/common/nvpair/fnvpair.c Abort trap mkdep: compile failed *** Error code 1 Stop. make: stopped in /export/src/cddl/lib/libnvpair *** Error code 1 Stop. make: stopped in /export/src/cddl/lib *** Error code 1 Stop. make: stopped in /export/src *** Error code 1 Stop. make: stopped in /export/src *** Error code 1 Stop. make: stopped in /export/src *** [buildworld] Error code 1 Stop in /export/src. -- wynkoop@wynn.com http://prd4.wynn.com/wynkoop/pgp-keys.txt 917-642-6925 718-717-5435 A free people ought to be armed. - George Washington From owner-freebsd-arm@FreeBSD.ORG Sat Jul 6 22:12:16 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id EA637A06 for ; Sat, 6 Jul 2013 22:12:16 +0000 (UTC) (envelope-from gdinolt@pacbell.net) Received: from nm3-vm4.access.bullet.mail.gq1.yahoo.com (nm3-vm4.access.bullet.mail.gq1.yahoo.com [216.39.63.91]) by mx1.freebsd.org (Postfix) with ESMTP id 8DA8F179D for ; Sat, 6 Jul 2013 22:12:16 +0000 (UTC) Received: from [216.39.60.176] by nm3.access.bullet.mail.gq1.yahoo.com with NNFMP; 06 Jul 2013 22:12:10 -0000 Received: from [67.195.22.117] by tm12.access.bullet.mail.gq1.yahoo.com with NNFMP; 06 Jul 2013 22:12:10 -0000 Received: from [127.0.0.1] by smtp112.sbc.mail.gq1.yahoo.com with NNFMP; 06 Jul 2013 22:12:10 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pacbell.net; s=s1024; t=1373148730; bh=RaFQExPCAoA55ZkKiGnQeflvKMeN4ZEuW1DQUN+Wp9Q=; h=X-Yahoo-Newman-Id:X-Yahoo-Newman-Property:X-YMail-OSG:X-Yahoo-SMTP:X-Rocket-Received:Message-ID:Date:From:User-Agent:MIME-Version:To:Subject:Content-Type:Content-Transfer-Encoding; b=MDIrSBd9sqfPgxMWRh6X1g3qOkw7kp+JBti1sei41a7Az9W70tvJSP3XwzQGQzeiraBmPPo5tgeO+Rz3L7csnVXFW4z9TUwDZIDgMmKrq6xfAqDTurmm1apxMU6av1mx3S5Lx4IAekq9Qj39wwtsTzltZWnQglrMLXzGRvliqlE= X-Yahoo-Newman-Id: 352069.38783.bm@smtp112.sbc.mail.gq1.yahoo.com X-Yahoo-Newman-Property: ymail-3 X-YMail-OSG: DQbKLy0VM1lPZGrHLEjhE26GAfWd8i01vP6bBaSIIpznled .Lt8ZkhPjcIATKXY0h9MJcpe_N2NHsklOc3SQ6kFwioGjSqVOnLv.VaiFZin 9cAY4lDTwmQ8Y00gZlOGrjioF_ryaT3egkZeMZ5yf8PaisCBSNY6_lm7dvxK PB6eoEpdGOtOQe71vCooLPFYQlQUoLk6dT377L_8dJKO_Z7yJUe13hG.Tpp_ 3F.33.4KId7RqAWoI2ycVge2joyw5yr_frgzCt5lLyqaI2PIzhLR6w68_7Yq PIMOJTk9WrDdPVv6L5S.xluMxtKG92.mmPIwUn3Weou9HCtCBuPgwvMObbxq o1._u1slTsbjQp72VfkDHghd_K0ZGV4U7t_XHPNV4d.ZsTD8BpINTmtma38X LQ.RYmuG86n3biMaMeshhJbCM9YW2x0GvDe87dt6MpwqB_ua7LOG7vA86poX 9I0zctiG8WUDE_ae2v2.R9.GpGkuXK_yCWhmkStXRDiU.c4h11R9S_CUYpm4 zZTCvDECyVaNHYb95_kcHzzYZ_XjyLqpgrn1BBuPkIW6GpHnvkCEDVucR X-Yahoo-SMTP: g9loM_SswBBOyHij_hyVRQs7bA3f_.wzcjhmZdnefuo- X-Rocket-Received: from [192.168.1.2] (gdinolt@70.231.140.43 with plain) by smtp112.sbc.mail.gq1.yahoo.com with SMTP; 06 Jul 2013 15:12:10 -0700 PDT Message-ID: <51D89639.6050607@pacbell.net> Date: Sat, 06 Jul 2013 15:12:09 -0700 From: "George W. Dinolt" User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130629 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: libffi on beaglebone black (fbsd 10)? Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jul 2013 22:12:17 -0000 Hi all: I have been playing around with the Beaglebone Black. I have FreeBSD 10 running on it. ( Thanks Tim Kientzle for crochet support). I have been able to build bash, python-2.7.5 and several other programs on it. Several programs (specifically db42 and its dependents) don't compile with clang 3.3 on the beaglebone, but do so with the gcc. More data available if someone is interested. The bash, python and other programs run but python fails on importing ctypes, which, in turn, depends on libffi interface. Python raises a "Signal 6" (SIGABRT) signal and quits. As an experiment, I tried building libffi from devel/ports but the "make check" program in the build directory FAILS on all tests. Does anyone have any clues as to how to get libffi working? Unfortunately my real work doesn't give me time to debug this. Thanks, G Dinolt