Date: Sun, 1 Jun 1997 23:47:59 -0700 (MST) From: Don Yuniskis <dgy@rtd.com> To: msmith@atrad.adelaide.edu.au (Michael Smith) Cc: freebsd-hackers@freefall.FreeBSD.org (FreeBSD hackers) Subject: Re: diskless hardware *design* suggestions Message-ID: <199706020647.XAA19653@seagull.rtd.com> In-Reply-To: <199706010423.NAA11598@genesis.atrad.adelaide.edu.au> from "Michael Smith" at Jun 1, 97 01:53:49 pm
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It seems that Michael Smith said: > Don Yuniskis stands accused of saying: > > > > Haven't yet decided since that would be a daughterboard, > > anyway. BTW, the SC400 includes support for direct drive > > of an LCD display, etc. It *could* be kludged to drive > > a CRT with a small effort... > > ... so it has an onboard video controller of some sort? Yes. But, to be honest, I haven't looked at it in detail as it's pretty minimalist (the SC400 is intended for use in high end PDA's, etc. driving an LCD/pen interface). Use of the display controller requires you to give up the 32bit databus in favor of 16... > > > DMA is not common with NICs. Shared memory (usually controlled by > > > the NIC) and programmed I/O are the norm. > > > > Yes. Those NIC's that support DMA tend to be bus-mastering > > themselves -- hence my problem! > > The Crystal parts do slave DMA, but that's generally too slow to be useful. If they'll push 32 bits at a time and aren't limited by things like the ISA "standard" DMA rates, that could be quite usable since it would eliminate the need for a separate buffer memory, etc. > > AMD's devices that are interesting all want to be bus masters. > > Some of SMC's newer parts are somewhat appealing (10Base* > > devices with integrated RAM, etc.). Still no clear cut "winners", > > though... it's unfortunate that all the [34]86 MCU's have either > > missing DRAM controllers or poor/nonexistent support for > > bus mastering (obviously because they would have to drive the bus > > back *into* the MCU core...) > > TBH, unless you desperately need 100Mbps ethernet performance, a > PIO-only solution using an 8390-family part (private SRAM) or even one > using shared memory (remember that the 8390-family parts take most of > the work out of arbitrating for the RAM, check the datasheets) will > give you a very high-performance 10Mbps solution at low > cost/complexity. I'm suspecting that 1MB/s is probably less than ideal for some of the applications I have in mind. I'd like to nail down the network interface "once and for all" and not have to redesign it later, etc. AMD's SuperNet2 parts look attractive but that's a sizeable investment in silicon and driver development (and *definitely* gobbles up too much real estate). I was hoping a 10Base2 solution would be *very* appealing and keep me from digging into some of the other options... (hmmm... what's that? "Design by laziness"?? :>) > The "smaller" solutions like the SMC and Crystal parts are short on > features (less packet RAM most significantly), and IMHO they're not > suitable if performance is an issue. Unfortunate but understandable. I guess I'll start digging through other network technologies and just plan on "biting the bullet"... Thanx! --don
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