From owner-freebsd-bugs@FreeBSD.ORG Thu May 15 02:10:04 2008 Return-Path: Delivered-To: freebsd-bugs@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4CDD0106567C for ; Thu, 15 May 2008 02:10:04 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id 3F0788FC0A for ; Thu, 15 May 2008 02:10:04 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (gnats@localhost [127.0.0.1]) by freefall.freebsd.org (8.14.2/8.14.2) with ESMTP id m4F2A4FY085666 for ; Thu, 15 May 2008 02:10:04 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.2/8.14.1/Submit) id m4F2A4gL085665; Thu, 15 May 2008 02:10:04 GMT (envelope-from gnats) Date: Thu, 15 May 2008 02:10:04 GMT Message-Id: <200805150210.m4F2A4gL085665@freefall.freebsd.org> To: freebsd-bugs@FreeBSD.org From: Arthur Hartwig Cc: Subject: Re: kern/114370: [hang] 6.2 kernel with SMP options hangs when dumping core on dual cpu board X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: Arthur Hartwig List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 May 2008 02:10:04 -0000 The following reply was made to PR kern/114370; it has been noted by GNATS. From: Arthur Hartwig To: bug-followup@freebsd.org, yrao@force10networks.com Cc: Subject: Re: kern/114370: [hang] 6.2 kernel with SMP options hangs when dumping core on dual cpu board Date: Thu, 15 May 2008 11:49:39 +1000 This is a multi-part message in MIME format. --------------010407080400050407080903 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sorry for the delay. I sent this message last week and the mail system returned it to me last night. I'll try sending through a different mail server. ------------------------------------------------------------------------ A very similar sounding issue is discussed in PR 115801. I prefer the patch there because it doesn't add anything to the interrupt handler, a handler which could be called frequently on a busy system. Current generation Intel chipsets tend to have the SATA disk controller sharing an interrupt line with one or more other devices. For example, in the 632xESB the SATA controller shares irq18 with one of the USB controllers and irq18 may be used by also be used by PCI Express devices operating in PCI Legacy interrupt mode. Every interrupt request from any device using the same interrupt line as the disk controller results in the disk controller interrupt handler getting called so its useful to keep anything unnecessary out of the interrupt handler. --------------010407080400050407080903 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Sorry for the delay. I sent this message last week and the mail system returned it to me last night. I'll try sending through a different mail server.

A very similar sounding issue is discussed in PR 115801.

I prefer the patch there because it doesn't add anything to the interrupt handler, a handler which could be called frequently on a busy system.

Current generation Intel chipsets tend to have the SATA disk controller sharing an interrupt line with one or more other devices. For example, in the 632xESB the SATA controller shares irq18 with one of the USB controllers and irq18 may be used by also be used by PCI Express devices operating in PCI Legacy interrupt mode. Every interrupt request from any device using the same interrupt line as the disk controller results in the disk controller interrupt handler getting called so its useful to keep anything unnecessary out of the interrupt handler.


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