Date: Thu, 27 Dec 2001 11:41:12 -0800 From: Mike Smith <msmith@freebsd.org> To: Matthew Dillon <dillon@apollo.backplane.com> Cc: Michal Mertl <mime@traveller.cz>, Alfred Perlstein <bright@mu.org>, John Hanley <jh_@yahoo.com>, arch@FreeBSD.ORG Subject: Re: 64 bit counters Message-ID: <200112271941.fBRJfCF01253@mass.dis.org> In-Reply-To: Your message of "Thu, 27 Dec 2001 00:13:38 PST." <200112270813.fBR8Dc150215@apollo.backplane.com>
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> :Why do I think it never becomes wrong? Generally I'm adding rather small
> :value (<1e6 or so) to 64 bit counter. When one addition overflows less
> :significant 32 bits, several next additions don't overflow.
> :
> :u_int64_t+=u_long is:
> :addl %eax,(u_int64_t) ; this is atomic, right?
> :adcl $0,4(u_int64_t)
> :
> :If interrupt occurs in between these two instructions, then the less
> :significant halt is right and more significant will be fixed after the
> :execution returns to second instruction. Even if the interrupt modified
> :the value, we can expect (read - be sure) it didn't modify the more
> :significant half.
>
> You are absolutely right. The carry will only be set on the addl
> which overflows the 32 bit counter and will not be set on any of
> the other addl's that might be occuring just before, inbetween the
> two instructions, or just after. So only one of those will cause the
> msb to increment.
>
> For UP the addl instruction is atomic. For SMP we still have to lock the
> bus cycle. Something like this:
>
> lock; addl %eax,(u_int64_t)
> lock; adcl $0,4(u_int64_t)
This is all well and good, but not portable.
Sorry folks. 8(
--
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people to take different points of view. [Dr. Fritz Todt]
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