From owner-freebsd-questions Sun Aug 29 20:56: 0 1999 Delivered-To: freebsd-questions@freebsd.org Received: from mail.xmission.com (mail.xmission.com [198.60.22.22]) by hub.freebsd.org (Postfix) with ESMTP id 454231529E; Sun, 29 Aug 1999 20:55:51 -0700 (PDT) (envelope-from wes@softweyr.com) Received: from [204.68.178.39] (helo=softweyr.com) by mail.xmission.com with esmtp (Exim 2.12 #1) id 11LIXu-0007fl-00; Sun, 29 Aug 1999 21:55:50 -0600 Message-ID: <37CA00C4.95ACE5D7@softweyr.com> Date: Sun, 29 Aug 1999 21:55:48 -0600 From: Wes Peters Organization: Softweyr LLC X-Mailer: Mozilla 4.5 [en] (X11; U; FreeBSD 3.1-RELEASE i386) X-Accept-Language: en MIME-Version: 1.0 To: Chuck Robey Cc: Thomas David Rivers , freebsd-hackers@FreeBSD.ORG, freebsd-questions@FreeBSD.ORG, kdrobnac@mission.mvnc.edu Subject: Re: Intel Merced FreeBSD??? References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-freebsd-questions@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG Chuck Robey wrote: > > When I was in the computer architecture classes, I did a lot of > modeling of various kinds of things that could be done to speed up a > processor (the least of which is cache memory, but it stands as a good > "for instance" thing here). One thing that impressed me, when doing > modelling of multiple different things like speculative execution and > the IA64's rumored ability to speculatively execute several different > paths of loop, was the extreme difficulty to adequately model how all > the different parts work (and mis-work) together. You end up having to > really inspect many megabytes of output in detail, just to figure out if > one feature worked right in one particular scenario, and I was only > doing a relatively basic piece of modelling. > > Trying to model the IA64 would have been a Manhattan Project sized task. But they've had PLENTY of time. HP had the 64-bit architecture defined and a simulator underway in 1994, when Intel joined the project. The Merced, which is a specific chip model with the 64-bit architecture and x86 emulator, was originally supposed to ship in late 1997. > Honestly, I am wondering about Intel and HP's ability to really produce > a reliable chip that had as many difficult-to-model features as the IA64 > is supposed to have. I think that's the real reason that it's not > actually being sampled. Your point on the 860 is very correct, but if > they *could* have brought the IA64 out today with the features that they > have been promising (at the speed they promised) it would have made the > PowerPC and the Alpha look ill Uh, no, HP has already admitted that when Merced ships it will be slower than current-generation PA-RISC CPUs. Which means it will also be slower than Alpha, PowerPC, and UltraSPARC processors you can buy now. -- "Where am I, and what am I doing in this handbasket?" Wes Peters Softweyr LLC http://softweyr.com/ wes@softweyr.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message