From owner-svn-src-head@FreeBSD.ORG Sat Jan 31 12:43:31 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id C3178741; Sat, 31 Jan 2015 12:43:31 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 95C6C88F; Sat, 31 Jan 2015 12:43:31 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t0VChVab041741; Sat, 31 Jan 2015 12:43:31 GMT (envelope-from loos@FreeBSD.org) Received: (from loos@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t0VChUgU041733; Sat, 31 Jan 2015 12:43:30 GMT (envelope-from loos@FreeBSD.org) Message-Id: <201501311243.t0VChUgU041733@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: loos set sender to loos@FreeBSD.org using -f From: Luiz Otavio O Souza Date: Sat, 31 Jan 2015 12:43:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r277971 - in head/sys/mips: atheros cavium rt305x X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 31 Jan 2015 12:43:31 -0000 Author: loos Date: Sat Jan 31 12:43:30 2015 New Revision: 277971 URL: https://svnweb.freebsd.org/changeset/base/277971 Log: Replace spaces with tabs, this will easier future changes on softc structure. No functional changes. Modified: head/sys/mips/atheros/ar71xx_gpiovar.h head/sys/mips/cavium/octeon_gpiovar.h head/sys/mips/rt305x/rt305x_gpiovar.h Modified: head/sys/mips/atheros/ar71xx_gpiovar.h ============================================================================== --- head/sys/mips/atheros/ar71xx_gpiovar.h Sat Jan 31 12:27:40 2015 (r277970) +++ head/sys/mips/atheros/ar71xx_gpiovar.h Sat Jan 31 12:43:30 2015 (r277971) @@ -57,12 +57,12 @@ struct ar71xx_gpio_softc { device_t dev; - struct mtx gpio_mtx; - struct resource *gpio_mem_res; - int gpio_mem_rid; - struct resource *gpio_irq_res; - int gpio_irq_rid; - void *gpio_ih; + struct mtx gpio_mtx; + struct resource *gpio_mem_res; + int gpio_mem_rid; + struct resource *gpio_irq_res; + int gpio_irq_rid; + void *gpio_ih; int gpio_npins; struct gpio_pin *gpio_pins; }; Modified: head/sys/mips/cavium/octeon_gpiovar.h ============================================================================== --- head/sys/mips/cavium/octeon_gpiovar.h Sat Jan 31 12:27:40 2015 (r277970) +++ head/sys/mips/cavium/octeon_gpiovar.h Sat Jan 31 12:43:30 2015 (r277971) @@ -43,11 +43,11 @@ struct octeon_gpio_softc { device_t dev; - struct mtx gpio_mtx; - struct resource *gpio_irq_res[OCTEON_GPIO_IRQS]; - int gpio_irq_rid[OCTEON_GPIO_IRQS]; - void *gpio_ih[OCTEON_GPIO_IRQS]; - void *gpio_intr_cookies[OCTEON_GPIO_IRQS]; + struct mtx gpio_mtx; + struct resource *gpio_irq_res[OCTEON_GPIO_IRQS]; + int gpio_irq_rid[OCTEON_GPIO_IRQS]; + void *gpio_ih[OCTEON_GPIO_IRQS]; + void *gpio_intr_cookies[OCTEON_GPIO_IRQS]; int gpio_npins; struct gpio_pin gpio_pins[OCTEON_GPIO_PINS]; }; Modified: head/sys/mips/rt305x/rt305x_gpiovar.h ============================================================================== --- head/sys/mips/rt305x/rt305x_gpiovar.h Sat Jan 31 12:27:40 2015 (r277970) +++ head/sys/mips/rt305x/rt305x_gpiovar.h Sat Jan 31 12:43:30 2015 (r277971) @@ -30,12 +30,12 @@ struct rt305x_gpio_softc { device_t dev; - struct mtx gpio_mtx; - struct resource *gpio_mem_res; - int gpio_mem_rid; - struct resource *gpio_irq_res; - int gpio_irq_rid; - void *gpio_ih; + struct mtx gpio_mtx; + struct resource *gpio_mem_res; + int gpio_mem_rid; + struct resource *gpio_irq_res; + int gpio_irq_rid; + void *gpio_ih; int gpio_npins; struct gpio_pin gpio_pins[NGPIO]; int reset_gpio;