From owner-freebsd-hardware Wed Aug 16 18:03:18 1995 Return-Path: hardware-owner Received: (from majordom@localhost) by freefall.FreeBSD.org (8.6.11/8.6.6) id SAA08105 for hardware-outgoing; Wed, 16 Aug 1995 18:03:18 -0700 Received: from gndrsh.aac.dev.com (gndrsh.aac.dev.com [198.145.92.241]) by freefall.FreeBSD.org (8.6.11/8.6.6) with ESMTP id SAA08099 for ; Wed, 16 Aug 1995 18:03:14 -0700 Received: (from rgrimes@localhost) by gndrsh.aac.dev.com (8.6.11/8.6.9) id SAA21491; Wed, 16 Aug 1995 18:02:22 -0700 From: "Rodney W. Grimes" Message-Id: <199508170102.SAA21491@gndrsh.aac.dev.com> Subject: Re: i82424ZX vs i82424TX cache dram controller To: jmb@kryten.atinc.com (Jonathan M. Bresler) Date: Wed, 16 Aug 1995 18:02:22 -0700 (PDT) Cc: freebsd-hardware@freebsd.org In-Reply-To: from "Jonathan M. Bresler" at Aug 16, 95 04:03:54 pm X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Length: 2513 Sender: hardware-owner@freebsd.org Precedence: bulk > > > anyone able to clue me in on the diffs between the Zx and the Tx ?? > > i just picked up a book _pci_system_architecture_ from mindshare. cost > $5 and talks about the i82420 TX pci chipset. is this the saturn > chipset vs saturn ii chipset ? Intel has done some real brain twisters in chip set model numbers, names and postfixes. i82420 is used as a generic number to refer to a family of PCI chip sets, usually used for 486 designs. The i82430 generic number is used to refer to a family of PCI chip sets, usually used for Pentium designs. The Saturn I, and II chip sets are a subclass of i82420. > why was the saturn chipset replaced--new features or faulty > chipset ? Officially the former, technically, and really, the latter. Intel is good at this. When the announced ``Triton'' it was a wonderful new great thing, then 30 days later, they came out and said oh, and by the way, Neptune does have these nasty bugs in it, but we fixed them in the Triton chip set. They just pulled the same stunt with Triton vs Triton II. Only this time they are ``adding'' the main memory and PCI parity checking as a feature, instead of ``fixing the bug'' of leaving this functionality totally out of Triton I, for no good and real reason (yea, sure it was a cost saving feature, like it saved all of $5.00 to leave that out of a chip set, and I am talking about end user cost). > jmb > > ps. the asus sp3g uses: > chip0 on pci0:0 > chip1 on pci0:2 You left out a bit of that string, and it is an important part: chip0 rev 4 on pci0:0 ^^^^^ As far as I can assertain rev 0, 1 and 2 are Saturn I, 3 and 4 are Saturn II. Since Intel data books do not publish code names, it is very hard to figure these things out at times :-(. chip1 rev 132 on pci0:2 > > the book talks of: > intel 82424TX cache dram controller > intel 82423TX data path unit > intel 82378IB pci-isa bridge The TX vs ZX are feature changes in the same chip set, the same data sheet is used for both parts. The book is most likely talking about Saturn I. I can't even find in data in my Intel library on the 82424TX chip :-(. But then, I don't have the Saturn data book sheets. -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Reliable computers for FreeBSD