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Date:      Sun, 30 Jul 2006 21:54:27 +1000
From:      Peter Jeremy <peterjeremy@optushome.com.au>
To:        Michal Mertl <mime@traveller.cz>
Cc:        Paul Allen <nospam@ugcs.caltech.edu>, freebsd-current@freebsd.org
Subject:   Re: vmstat's entries type
Message-ID:  <20060730115427.GD1310@turion.vk2pj.dyndns.org>
In-Reply-To: <1154250451.23616.37.camel@genius.i.cz>
References:  <20060728210154.GC748@turion.vk2pj.dyndns.org> <1154189612.1565.10.camel@genius.i.cz> <20060729205655.GE748@turion.vk2pj.dyndns.org> <20060729211530.GA50342@uk.tiscali.com> <1154212340.3609.18.camel@genius.i.cz> <20060729230214.GI12597@groat.ugcs.caltech.edu> <1154216319.23616.23.camel@genius.i.cz> <1154217036.23616.28.camel@genius.i.cz> <20060730005342.GJ12597@groat.ugcs.caltech.edu> <1154250451.23616.37.camel@genius.i.cz>

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On Sun, 2006-Jul-30 11:07:31 +0200, Michal Mertl wrote:
>Paul Allen wrote:
>> Which FreeBSD tier-I 64b arch do you have in mind...
>
>I was referring to what Peter Jeremy said earlier in this thread:
>
>> RISC architectures usually only have TAS lock primitives (because "inc
>> mem" doesn't exist) and so require a spinlock to perform an atomic
>> update.

This was based on an examination of /usr/src/sys/*/include/atomic.h.
It looks like I was overly quick because the RISC architectures are
using compare-and-swap, rather than test-and-set primitives - sorry
about the error.  The details are:
- Alpha (RIP) used a loop around a locked conditional store
- amd64 appears to support RMW
- arm doesn't support 64-bit atomic operations
- i386 doesn't support 64-bit atomic operations (but could implement them
  using cmpxchg8b in a loop)
- ia64 uses cmpxchg in a loop
- ppc doesn't support 64-bit atomic operations
- sparc64 uses cas in a loop.

Whilst true spinlocks are not needed, amd64 is the only architecture
FreeBSD supports that does not require some sort of loop to perform
a 64-bit atomic operation.

--=20
Peter Jeremy

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