From owner-svn-src-head@FreeBSD.ORG Thu Jan 1 14:01:21 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C4E4C106566B; Thu, 1 Jan 2009 14:01:21 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id B2ACC8FC1C; Thu, 1 Jan 2009 14:01:21 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n01E1L3j071255; Thu, 1 Jan 2009 14:01:21 GMT (envelope-from marius@svn.freebsd.org) Received: (from marius@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n01E1LD3071252; Thu, 1 Jan 2009 14:01:21 GMT (envelope-from marius@svn.freebsd.org) Message-Id: <200901011401.n01E1LD3071252@svn.freebsd.org> From: Marius Strobl Date: Thu, 1 Jan 2009 14:01:21 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r186682 - in head/sys/sparc64: include sparc64 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Jan 2009 14:01:22 -0000 Author: marius Date: Thu Jan 1 14:01:21 2009 New Revision: 186682 URL: http://svn.freebsd.org/changeset/base/186682 Log: - Currently the PMAP code is laid out to let the kernel TSB cover the whole KVA space using one locked 4MB dTLB entry per GB of physical memory. On Cheetah-class machines only the dt16 can hold locked entries though, which would be completely consumed for the kernel TSB on machines with >= 16GB. Therefore limit the KVA space to use no more than half of the lockable dTLB slots, given that we need them also for other things. - Add sanity checks which ensure that we don't exhaust the (lockable) TLB slots. Modified: head/sys/sparc64/include/tlb.h head/sys/sparc64/sparc64/machdep.c head/sys/sparc64/sparc64/pmap.c Modified: head/sys/sparc64/include/tlb.h ============================================================================== --- head/sys/sparc64/include/tlb.h Thu Jan 1 13:26:53 2009 (r186681) +++ head/sys/sparc64/include/tlb.h Thu Jan 1 14:01:21 2009 (r186682) @@ -129,6 +129,8 @@ typedef void tlb_flush_user_t(void); struct pmap; struct tlb_entry; +extern int dtlb_slots; +extern int itlb_slots; extern int kernel_tlb_slots; extern struct tlb_entry *kernel_tlbs; Modified: head/sys/sparc64/sparc64/machdep.c ============================================================================== --- head/sys/sparc64/sparc64/machdep.c Thu Jan 1 13:26:53 2009 (r186681) +++ head/sys/sparc64/sparc64/machdep.c Thu Jan 1 14:01:21 2009 (r186682) @@ -115,6 +115,8 @@ typedef int ofw_vec_t(void *); extern vm_offset_t ksym_start, ksym_end; #endif +int dtlb_slots; +int itlb_slots; struct tlb_entry *kernel_tlbs; int kernel_tlb_slots; @@ -276,7 +278,7 @@ sparc64_init(caddr_t mdp, u_long o1, u_l tick_stop(); /* - * Set up Open Firmware entry points + * Set up Open Firmware entry points. */ ofw_tba = rdpr(tba); ofw_vec = (u_long)vec; @@ -380,6 +382,19 @@ sparc64_init(caddr_t mdp, u_long o1, u_l end = (vm_offset_t)_end; } + /* + * Determine the TLB slot maxima, which are expected to be + * equal across all CPUs. + * NB: for Cheetah-class CPUs, these properties only refer + * to the t16s. + */ + if (OF_getprop(pc->pc_node, "#dtlb-entries", &dtlb_slots, + sizeof(dtlb_slots)) == -1) + panic("sparc64_init: cannot determine number of dTLB slots"); + if (OF_getprop(pc->pc_node, "#itlb-entries", &itlb_slots, + sizeof(itlb_slots)) == -1) + panic("sparc64_init: cannot determine number of iTLB slots"); + cache_init(pc); cache_enable(); uma_set_align(pc->pc_cache.dc_linesize - 1); Modified: head/sys/sparc64/sparc64/pmap.c ============================================================================== --- head/sys/sparc64/sparc64/pmap.c Thu Jan 1 13:26:53 2009 (r186681) +++ head/sys/sparc64/sparc64/pmap.c Thu Jan 1 14:01:21 2009 (r186682) @@ -334,13 +334,23 @@ pmap_bootstrap(vm_offset_t ekva) /* * Calculate the size of kernel virtual memory, and the size and mask - * for the kernel TSB. + * for the kernel TSB based on the phsyical memory size but limited + * by letting the kernel TSB take up no more than half of the dTLB + * slots available for locked entries. */ virtsz = roundup(physsz, PAGE_SIZE_4M << (PAGE_SHIFT - TTE_SHIFT)); + virtsz = MIN(virtsz, + (dtlb_slots / 2 * PAGE_SIZE_4M) << (PAGE_SHIFT - TTE_SHIFT)); vm_max_kernel_address = VM_MIN_KERNEL_ADDRESS + virtsz; tsb_kernel_size = virtsz >> (PAGE_SHIFT - TTE_SHIFT); tsb_kernel_mask = (tsb_kernel_size >> TTE_SHIFT) - 1; + if (kernel_tlb_slots + PCPU_PAGES + tsb_kernel_size / PAGE_SIZE_4M + + 1 /* PROM page */ + 1 /* spare */ > dtlb_slots) + panic("pmap_bootstrap: insufficient dTLB entries"); + if (kernel_tlb_slots + 1 /* PROM page */ + 1 /* spare */ > itlb_slots) + panic("pmap_bootstrap: insufficient iTLB entries"); + /* * Allocate the kernel TSB and lock it in the TLB. */