From owner-freebsd-arm@freebsd.org Fri Aug 28 08:35:45 2015 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 277609C48E0 for ; Fri, 28 Aug 2015 08:35:45 +0000 (UTC) (envelope-from zbodek@gmail.com) Received: from mail-la0-x229.google.com (mail-la0-x229.google.com [IPv6:2a00:1450:4010:c03::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 997C094B for ; Fri, 28 Aug 2015 08:35:44 +0000 (UTC) (envelope-from zbodek@gmail.com) Received: by laba3 with SMTP id a3so27953860lab.1 for ; Fri, 28 Aug 2015 01:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; bh=20Cl1BCQbKeqSEntLu2PAvmNtZoVfIRN47U+X3e48K0=; b=0GrPvOaxTj1L+ULGKxD6w3QD8NEyjWy0Z4Jn3/Au9vp+YYO3rwZrVLHWGB06kmKmfV d+Q4rygMvBfWElHdbE2QyVDtZnrImHxwFRw7r2dKFfSpQaqvm1br2teaMhsScO8PZDz8 WwaZTmgrxX0or6RqU5HdCP6D/grC1SRUEungRdiqm0m5DsaYkOZ/WaWCccgLM+ZyPUfv jquB24w4PjfOxm+aIINAwT+xF7rlDpDHuw/vsO3sywFiSBVl1s3vlnigKXtq8D2S0GLk GoKzBV9n+bhB8+yY6+9jsTt0FrB1k8QTiffCQ+gKtOfWdL6++dcdUb7jIc1GTWb7jE36 oUPQ== X-Received: by 10.152.179.107 with SMTP id df11mr4115262lac.95.1440750942527; Fri, 28 Aug 2015 01:35:42 -0700 (PDT) MIME-Version: 1.0 Received: by 10.112.167.163 with HTTP; Fri, 28 Aug 2015 01:35:23 -0700 (PDT) In-Reply-To: References: From: Zbigniew Bodek Date: Fri, 28 Aug 2015 10:35:23 +0200 Message-ID: Subject: Re: GIC - interrupts interpretation in DTS/FDT To: Mihai Carabas Cc: "freebsd-arm@freebsd.org" Content-Type: text/plain; charset=UTF-8 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Aug 2015 08:35:45 -0000 Hello Mihai, This documents may be helpful: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/gic.txt The meaning of each interrupt cell (for ARM GIC) is described there. Best regards zbb 2015-08-28 9:15 GMT+02:00 Mihai Carabas : > Hi everyone, > > In the sys/arm/arm/gic.c there is a comment: "The hardware only supports > active-high-level or rising-edge". From where is this deducted? > > I'm looking in the TRM for Cortex-A15 and there are some interrupts > active-low-level. E.g.: "Virtual Timer event (PPI4) This is the event > generated from the virtual timer and uses ID27. The interrupt is active-LOW > level-sensitive." > > Thanks, > Mihai > _______________________________________________ > freebsd-arm@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"