From owner-svn-src-user@FreeBSD.ORG Sun Feb 22 03:30:04 2015 Return-Path: Delivered-To: svn-src-user@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 2CEB257F; Sun, 22 Feb 2015 03:30:04 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 0C49D139; Sun, 22 Feb 2015 03:30:04 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t1M3U30j055601; Sun, 22 Feb 2015 03:30:03 GMT (envelope-from nwhitehorn@FreeBSD.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t1M3U38L055597; Sun, 22 Feb 2015 03:30:03 GMT (envelope-from nwhitehorn@FreeBSD.org) Message-Id: <201502220330.t1M3U38L055597@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: nwhitehorn set sender to nwhitehorn@FreeBSD.org using -f From: Nathan Whitehorn Date: Sun, 22 Feb 2015 03:30:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r279138 - user/nwhitehorn/ppc64-pmap-rework/aim X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 22 Feb 2015 03:30:04 -0000 Author: nwhitehorn Date: Sun Feb 22 03:30:02 2015 New Revision: 279138 URL: https://svnweb.freebsd.org/changeset/base/279138 Log: Fix operation of 32-bit kernels on 64-bit CPUs. I'm not sure this mode is even really useful, but the fixes aren't so bad. Modified: user/nwhitehorn/ppc64-pmap-rework/aim/mmu_oea64.c user/nwhitehorn/ppc64-pmap-rework/aim/moea64_native.c Modified: user/nwhitehorn/ppc64-pmap-rework/aim/mmu_oea64.c ============================================================================== --- user/nwhitehorn/ppc64-pmap-rework/aim/mmu_oea64.c Sun Feb 22 03:04:40 2015 (r279137) +++ user/nwhitehorn/ppc64-pmap-rework/aim/mmu_oea64.c Sun Feb 22 03:30:02 2015 (r279138) @@ -969,8 +969,10 @@ moea64_late_bootstrap(mmu_t mmup, vm_off moea64_kenter(mmup, moea64_scratchpage_va[i], 0); + PMAP_LOCK(kernel_pmap); moea64_scratchpage_pvo[i] = moea64_pvo_find_va( kernel_pmap, (vm_offset_t)moea64_scratchpage_va[i]); + PMAP_UNLOCK(kernel_pmap); } } } @@ -2255,7 +2257,7 @@ moea64_pvo_enter(mmu_t mmu, struct pvo_e PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); KASSERT(moea64_pvo_find_va(pvo->pvo_pmap, PVO_VADDR(pvo)) == NULL, - ("Existing mapping for VA %#zx", PVO_VADDR(pvo))); + ("Existing mapping for VA %#jx", (uintmax_t)PVO_VADDR(pvo))); moea64_pvo_enter_calls++; Modified: user/nwhitehorn/ppc64-pmap-rework/aim/moea64_native.c ============================================================================== --- user/nwhitehorn/ppc64-pmap-rework/aim/moea64_native.c Sun Feb 22 03:04:40 2015 (r279137) +++ user/nwhitehorn/ppc64-pmap-rework/aim/moea64_native.c Sun Feb 22 03:30:02 2015 (r279138) @@ -294,8 +294,6 @@ moea64_pte_unset_native(mmu_t mmu, struc struct lpte properpt; uint64_t ptelo; - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - moea64_pte_from_pvo(pvo, &properpt); rw_rlock(&moea64_eviction_lock); @@ -334,8 +332,6 @@ moea64_pte_replace_native(mmu_t mmu, str struct lpte properpt; int64_t ptelo; - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - if (flags == 0) { /* Just some software bits changing. */ moea64_pte_from_pvo(pvo, &properpt); @@ -515,8 +511,9 @@ atomic_pte_lock(volatile struct lpte *pt "li %0, 0\n\t" /* failure - retval = 0 */ "3:\n\t" : "=&r" (ret), "=&r"(oldhihalf), "=m" (pte->pte_hi) - : "r" ((volatile char *)&pte->pte_hi + 4), "r" (bitmask), - "r" (LPTE_LOCKED), "m" (pte->pte_hi) + : "r" ((volatile char *)&pte->pte_hi + 4), + "r" ((uint32_t)bitmask), "r" ((uint32_t)LPTE_LOCKED), + "m" (pte->pte_hi) : "cr0", "cr1", "cr2", "memory"); *oldhi = (pte->pte_hi & 0xffffffff00000000ULL) | oldhihalf; @@ -591,8 +588,6 @@ moea64_pte_insert_native(mmu_t mmu, stru struct lpte insertpt; uintptr_t slot; - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - /* Initialize PTE */ moea64_pte_from_pvo(pvo, &insertpt);