Date: Thu, 13 Nov 2008 08:56:31 -0800 From: Jeremy Chadwick <koitsu@FreeBSD.org> To: freebsd-hackers@freebsd.org Subject: Re: assigning interrupts Message-ID: <20081113165631.GA26469@icarus.home.lan> In-Reply-To: <20081113154003.GC1750@britannica.bec.de> References: <491BFB68.7050405@infoweapons.com> <20081113104054.GA17501@icarus.home.lan> <20081113154003.GC1750@britannica.bec.de>
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On Thu, Nov 13, 2008 at 04:40:03PM +0100, Joerg Sonnenberger wrote: > On Thu, Nov 13, 2008 at 02:40:54AM -0800, Jeremy Chadwick wrote: > > Otherwise, consider purchasing a motherboard that has an APIC (this is > > not a typo) increasing the IRQ count to 256. > > This is wrong. The first IO-APIC gives you 8 additional interrupts to > the 16 ISA interrupt lines. Every additional IO-APIC gives you 24 more. > Most modern chipsets have one IO-APIC, at least for non-embedded > systems. It doesn't mean you don't get interrupt sharing though. I think the problem is that I was thinking of local APICs, which provide a few hundred (I don't remember the exact number) IRQs to an I/O APIC. For what it's worth, the devices he listed are exclusively on the PCI bus. Regarding "it means you can still get interrupt sharing", I'd like to hear more about why/how that's possible with a system sporting at least one I/O APIC. -- | Jeremy Chadwick jdc at parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP: 4BD6C0CB |
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