Date: Wed, 27 Aug 2008 17:31:05 GMT From: Przemek Witaszczyk <vi0@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 148635 for review Message-ID: <200808271731.m7RHV5SA025530@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=148635 Change 148635 by vi0@vi0_gilgamesh.semihalf.com on 2008/08/27 17:30:58 - added mpc5k2 dedicated directory in sys/powerpc - added A. Turners ofwbus driver - added PIC driver skeleton, creted from sys/powerpc/powermac/hrowpic.c - the driver attach method fails (but is called) - kernel panics on no PIC found Affected files ... .. //depot/projects/soc2008/vi0/efika/contrib/ntp/FREEBSD-Xlist#3 add .. //depot/projects/soc2008/vi0/efika/contrib/ntp/FREEBSD-upgrade#3 add .. //depot/projects/soc2008/vi0/efika/crypto/openssh/FREEBSD-Xlist#3 add .. //depot/projects/soc2008/vi0/efika/crypto/openssh/RFC.nroff#3 add .. //depot/projects/soc2008/vi0/efika/etc/rc.d/kernel#3 add .. //depot/projects/soc2008/vi0/efika/kbuild#1 add .. //depot/projects/soc2008/vi0/efika/kernel/kernel#1 add .. //depot/projects/soc2008/vi0/efika/kernel/kernel.debug#1 add .. //depot/projects/soc2008/vi0/efika/kernel/kernel.symbols#1 add .. //depot/projects/soc2008/vi0/efika/kernel/send#1 add .. //depot/projects/soc2008/vi0/efika/lib/libc/stdlib/grantpt.3#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_aiboost.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_asus.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_fujitsu.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_ibm.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_panasonic.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_sony.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/acpi_toshiba.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/io.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/linux.4#3 add .. //depot/projects/soc2008/vi0/efika/share/man/man4/man4.i386/ndis.4#3 add .. //depot/projects/soc2008/vi0/efika/share/timedef/no_NO.ISO8859-1.src#3 add .. //depot/projects/soc2008/vi0/efika/share/timedef/no_NO.UTF-8.src#3 add .. //depot/projects/soc2008/vi0/efika/share/zoneinfo/Theory#3 add .. //depot/projects/soc2008/vi0/efika/sys/conf/files.powerpc#5 edit .. //depot/projects/soc2008/vi0/efika/sys/conf/files.powerpc.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/dev/cxgb/cxgb_lro.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/LICENSE#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/README#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_80003es2lan.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_80003es2lan.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82540.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82541.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82541.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82542.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82543.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82543.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82571.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_82571.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_api.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_api.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_defines.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_hw.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_ich8lan.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_ich8lan.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_mac.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_mac.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_manage.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_manage.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_nvm.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_nvm.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_osdep.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_osdep.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_phy.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_phy.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/e1000_regs.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/if_em.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/em/if_em.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_82575.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_82575.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_api.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_api.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_defines.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_hw.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_mac.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_mac.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_manage.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_manage.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_nvm.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_nvm.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_osdep.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_osdep.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_phy.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_phy.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/e1000_regs.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/if_igb.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/igb/if_igb.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/dev/ofw/openfirm.c.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/dev/ofw/openfirm.c.rej#1 add .. //depot/projects/soc2008/vi0/efika/sys/dev/ofw/openfirm.c.rej.orig#1 add .. //depot/projects/soc2008/vi0/efika/sys/kern/tty_conf.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_pcn.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_pcnreg.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_sis.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_sisreg.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_ste.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_stereg.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_tl.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_tlreg.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_wb.c#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_wbreg.h#3 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_xl.c#4 add .. //depot/projects/soc2008/vi0/efika/sys/pci/if_xlreg.h#4 add .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/locore.S#4 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/locore.S.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/machdep.c#5 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/machdep.c.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/mmu_oea.c#5 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/mmu_oea.c.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/trap_subr.S#4 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/trap_subr.S.orig#2 delete .. //depot/projects/soc2008/vi0/efika/sys/powerpc/conf/GENERIC#4 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/include/psl.h#4 edit .. //depot/projects/soc2008/vi0/efika/sys/powerpc/mpc5k2/mpc5k2_pic.c#1 add .. //depot/projects/soc2008/vi0/efika/sys/powerpc/mpc5k2/mpc5k2_picvar.h#1 add .. //depot/projects/soc2008/vi0/efika/sys/powerpc/mpc5k2/ofwbus.c#1 add .. //depot/projects/soc2008/vi0/efika/sys/sys/linedisc.h#3 add .. //depot/projects/soc2008/vi0/efika/tbuild#1 add .. //depot/projects/soc2008/vi0/efika/usr.bin/window/:tt#3 add .. //depot/projects/soc2008/vi0/efika/usr.bin/window/:tty#3 add .. //depot/projects/soc2008/vi0/efika/usr.bin/window/:var#3 add .. //depot/projects/soc2008/vi0/efika/usr.bin/window/:ww#3 add Differences ... ==== //depot/projects/soc2008/vi0/efika/sys/conf/files.powerpc#5 (text+ko) ==== @@ -1,7 +1,7 @@ # This file tells config what files go into building a kernel, # files marked standard are always included. # -# $FreeBSD: src/sys/conf/files.powerpc,v 1.79 2008/06/07 22:58:32 marcel Exp $ +# $FreeBSD: src/sys/conf/files.powerpc,v 1.77 2008/04/30 00:50:50 marcel Exp $ # # The long compile-with and dependency lines are required because of # limitations in config: backslash-newline doesn't work in strings, and @@ -27,7 +27,6 @@ crypto/blowfish/bf_enc.c optional crypto | ipsec crypto/des/des_enc.c optional crypto | ipsec | netsmb -dev/bm/if_bm.c optional bm powermac dev/fb/fb.c optional sc dev/hwpmc/hwpmc_powerpc.c optional hwpmc dev/kbd/kbd.c optional sc @@ -78,6 +77,10 @@ powerpc/aim/uio_machdep.c optional aim powerpc/aim/uma_machdep.c optional aim powerpc/aim/vm_machdep.c optional aim +powerpc/aim/ofw_oea.S optional aim +powerpc/aim/ofwreal.S optional aim +powerpc/mpc5k2/mpc5k2_pic.c standard +powerpc/mpc5k2/ofwbus.c standard powerpc/booke/clock.c optional e500 powerpc/booke/copyinout.c optional e500 powerpc/booke/interrupt.c optional e500 @@ -108,7 +111,6 @@ powerpc/ofw/ofw_syscons.c optional sc aim powerpc/powermac/ata_kauai.c optional powermac ata powerpc/powermac/ata_macio.c optional powermac ata -powerpc/powermac/dbdma.c optional powermac pci powerpc/powermac/grackle.c optional powermac pci powerpc/powermac/hrowpic.c optional powermac pci powerpc/powermac/macio.c optional powermac pci ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/locore.S#4 (text+ko) ==== @@ -89,6 +89,9 @@ GLOBAL(esym) .long 0 /* end of symbol table */ +GLOBAL(firmstk) + .space PAGE_SIZE,8 + GLOBAL(ofmsr) .long 0, 0, 0, 0, 0 /* msr/sprg0-3 used in Open Firmware */ @@ -126,14 +129,8 @@ .text .globl __start __start: -#ifdef FIRMWORKSBUGS - mfmsr 0 - andi. 0,0,PSL_IR|PSL_DR - beq 1f - bl ofwr_init -1: -#endif + li 8,0 li 9,0x100 mtctr 9 ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/machdep.c#5 (text+ko) ==== @@ -239,6 +239,9 @@ extern void *extint, *extsize; extern void *dblow, *dbsize; extern void *vectrap, *vectrapsize; +extern void *imisstrap, *imisssize; +extern void *dlmisstrap, *dlmisssize; +extern void *dsmisstrap, *dsmisssize; u_int powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) @@ -332,6 +335,9 @@ bcopy(&trapcode, (void *)EXC_SC, (size_t)&trapsize); bcopy(&trapcode, (void *)EXC_TRC, (size_t)&trapsize); bcopy(&trapcode, (void *)EXC_FPA, (size_t)&trapsize); + bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize); + bcopy(&dlmisstrap, (void *)EXC_DLMISS, (size_t)&dlmisssize); + bcopy(&dsmisstrap, (void *)EXC_DSMISS, (size_t)&dsmisssize); bcopy(&vectrap, (void *)EXC_VEC, (size_t)&vectrapsize); bcopy(&trapcode, (void *)EXC_VECAST, (size_t)&trapsize); bcopy(&trapcode, (void *)EXC_THRM, (size_t)&trapsize); ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/mmu_oea.c#5 (text+ko) ==== @@ -661,6 +661,8 @@ trcp[0] = 0x1007; } +extern char *OF_buf; + void moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) { @@ -898,6 +900,8 @@ kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; kernel_pmap->pm_active = ~0; + OF_buf = (char *)moea_bootstrap_alloc(PAGE_SIZE, 0); + pmap_cpu_bootstrap(trace, 0); pmap_bootstrapped++; ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/aim/trap_subr.S#4 (text+ko) ==== @@ -330,6 +330,209 @@ bla s_trap /* LR & 0xff00 is exception # */ CNAME(alisize) = .-CNAME(alitrap) + + /* + * It's G2 specific. Instuction TLB miss. + */ + .globl CNAME(imisstrap),CNAME(imisssize) +CNAME(imisstrap): + mfspr %r2, SPR_HASH1 /* get first pointer */ + addi %r1, 0, 8 /* load 8 for counter */ + mfctr %r0 /* save counter */ + mfspr %r3, SPR_ICMP /* get first compare value */ + addi %r2, %r2, -8 /* pre dec the pointer */ +im0: + mtctr %r1 /* load counter */ +im1: + lwzu %r1, 8(%r2) /* get next pte */ + cmp 0, %r1, %r3 /* see if found pte */ + bdnzf 2, im1 /* dec count br if cmp ne and if + * count not zero */ + bne instr_sec_hash /* if not found set up second hash + * or exit */ + lwz %r1, +4(%r2) /* load tlb entry lower-word */ + andi. %r3, %r1, 8 /* check G bit */ + bne do_isi_prot /* if guarded, take an ISI */ + mtctr %r0 /* restore counter */ + mfspr %r0, SPR_IMISS /* get the miss address for the tlbli */ + mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ + mtcrf 0x80, %r3 /* restore CR0 */ + mtspr SPR_RPA, %r1 /* set the pte */ + ori %r1, %r1, 0x100 /* set reference bit */ + srwi %r1, %r1, 8 /* get byte 7 of pte */ + tlbli %r0 /* load the itlb */ + stb %r1, +6(%r2) /* update page table */ + rfi /* return to executing program */ + +instr_sec_hash: + andi. %r1, %r3, 0x0040 /* see if we have done second hash */ + bne do_isi /* if so, go to ISI interrupt */ + mfspr %r2, SPR_HASH2 /* get the second pointer */ + ori %r3, %r3, 0x0040 /* change the compare value */ + addi %r1, %r0, 8 /* load 8 for counter */ + addi %r2, %r2, -8 /* pre dec for update on load */ + b im0 /* try second hash */ + +/* Create a faked ISI interrupt as the address was not found */ +do_isi_prot: + mfspr %r3, SPR_SRR1 /* get srr1 */ + andi. %r2, %r3, 0xffff /* clean upper srr1 */ + addis %r2, %r2, 0x0800 /* or in srr<4> = 1 to flag prot + * violation */ + b isi1 +do_isi: + mfspr %r3, SPR_SRR1 /* get srr1 */ + andi. %r2, %r3, 0xffff /* clean srr1 */ + addis %r2, %r2, 0x4000 /* or in srr1<1> = 1 to flag pte + * not found */ +isi1: + mtctr %r0 /* restore counter */ + mtspr SPR_SRR1, %r2 /* set srr1 */ + mfmsr %r0 /* get msr */ + xoris %r0, %r0, 0x2 /* flip the msr<tgpr> bit */ + mtcrf 0x80, %r3 /* restore CR0 */ + mtmsr %r0 /* flip back to the native gprs */ + ba EXC_ISI /* go to instr. access interrupt */ + +CNAME(imisssize) = .-CNAME(imisstrap) + +/* + * It's G2 specific. Data load TLB miss. + */ + .globl CNAME(dlmisstrap),CNAME(dlmisssize) +CNAME(dlmisstrap): + mfspr %r2, SPR_HASH1 /* get first pointer */ + addi %r1, 0, 8 /* load 8 for counter */ + mfctr %r0 /* save counter */ + mfspr %r3, SPR_DCMP /* get first compare value */ + addi %r2, %r2, -8 /* pre dec the pointer */ +dm0: + mtctr %r1 /* load counter */ +dm1: + lwzu %r1, 8(%r2) /* get next pte */ + cmp 0, 0, %r1, %r3 /* see if found pte */ + bdnzf 2, dm1 /* dec count br if cmp ne and if + * count not zero */ + bne data_sec_hash /* if not found set up second hash + * or exit */ + lwz %r1, +4(%r2) /* load tlb entry lower-word */ + mtctr %r0 /* restore counter */ + mfspr %r0, SPR_DMISS /* get the miss address for the tlbld */ + mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ + mtcrf 0x80, %r3 /* restore CR0 */ + mtspr SPR_RPA, %r1 /* set the pte */ + ori %r1, %r1, 0x100 /* set reference bit */ + srwi %r1, %r1, 8 /* get byte 7 of pte */ + tlbld %r0 /* load the dtlb */ + stb %r1, +6(%r2) /* update page table */ + rfi /* return to executing program */ + +data_sec_hash: + andi. %r1, %r3, 0x0040 /* see if we have done second hash */ + bne do_dsi /* if so, go to DSI interrupt */ + mfspr %r2, SPR_HASH2 /* get the second pointer */ + ori %r3, %r3, 0x0040 /* change the compare value */ + addi %r1, 0, 8 /* load 8 for counter */ + addi %r2, %r2, -8 /* pre dec for update on load */ + b dm0 /* try second hash */ + +CNAME(dlmisssize) = .-CNAME(dlmisstrap) + +/* + * It's G2 specific. Data store TLB miss. + */ + .globl CNAME(dsmisstrap),CNAME(dsmisssize) +CNAME(dsmisstrap): + mfspr %r2, SPR_HASH1 /* get first pointer */ + addi %r1, 0, 8 /* load 8 for counter */ + mfctr %r0 /* save counter */ + mfspr %r3, SPR_DCMP /* get first compare value */ + addi %r2, %r2, -8 /* pre dec the pointer */ +ds0: + mtctr %r1 /* load counter */ +ds1: + lwzu %r1, 8(%r2) /* get next pte */ + cmp 0, 0, %r1, %r3 /* see if found pte */ + bdnzf 2, ds1 /* dec count br if cmp ne and if + * count not zero */ + bne data_store_sec_hash /* if not found set up second hash + * or exit */ + lwz %r1, +4(%r2) /* load tlb entry lower-word */ + andi. %r3, %r1, 0x80 /* check the C-bit */ + beq data_store_chk_prot /* if (C==0) + * go check protection modes */ +ds2: + mtctr %r0 /* restore counter */ + mfspr %r0, SPR_DMISS /* get the miss address for the tlbld */ + mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ + mtcrf 0x80, %r3 /* restore CR0 */ + mtspr SPR_RPA, %r1 /* set the pte */ + tlbld %r0 /* load the dtlb */ + rfi /* return to executing program */ + +data_store_sec_hash: + andi. %r1, %r3, 0x0040 /* see if we have done second hash */ + bne do_dsi /* if so, go to DSI interrupt */ + mfspr %r2, SPR_HASH2 /* get the second pointer */ + ori %r3, %r3, 0x0040 /* change the compare value */ + addi %r1, 0, 8 /* load 8 for counter */ + addi %r2, %r2, -8 /* pre dec for update on load */ + b ds0 /* try second hash */ + +/* Check the protection before setting PTE(c-bit) */ +data_store_chk_prot: + rlwinm. %r3,%r1,30,0,1 /* test PP */ + bge- chk0 /* if (PP == 00 or PP == 01) + * goto chk0: */ + andi. %r3, %r1, 1 /* test PP[0] */ + beq+ chk2 /* return if PP[0] == 0 */ + b do_dsi_prot /* else DSIp */ +chk0: + mfspr %r3,SPR_SRR1 /* get old msr */ + andis. %r3,%r3,0x0008 /* test the KEY bit (SRR1-bit 12) */ + beq chk2 /* if (KEY==0) goto chk2: */ + b do_dsi_prot /* else do_dsi_prot */ +chk2: + ori %r1, %r1, 0x180 /* set reference and change bit */ + sth %r1, 6(%r2) /* update page table */ + b ds2 /* and back we go */ + +/* Create a faked DSI interrupt as the address was not found */ +do_dsi: + mfspr %r3, SPR_SRR1 /* get srr1 */ + rlwinm %r1,%r3,9,6,6 /* get srr1<flag> to bit 6 for + * load/store, zero rest */ + addis %r1, %r1, 0x4000 /* or in dsisr<1> = 1 to flag pte + * not found */ + b dsi1 + +do_dsi_prot: + mfspr %r3, SPR_SRR1 /* get srr1 */ + rlwinm %r1,%r3,9,6,6 /* get srr1<flag> to bit 6 for + *load/store, zero rest */ + addis %r1, %r1, 0x0800 /* or in dsisr<4> = 1 to flag prot + * violation */ + +dsi1: + mtctr %r0 /* restore counter */ + andi. %r2, %r3, 0xffff /* clear upper bits of srr1 */ + mtspr SPR_SRR1, %r2 /* set srr1 */ + mtspr SPR_DSISR, %r1 /* load the dsisr */ + mfspr %r1, SPR_DMISS /* get miss address */ + rlwinm. %r2,%r2,0,31,31 /* test LE bit */ + beq dsi2 /* if little endian then: */ + xor %r1, %r1, 0x07 /* de-mung the data address */ +dsi2: + mtspr SPR_DAR, %r1 /* put in dar */ + mfmsr %r0 /* get msr */ + xoris %r0, %r0, 0x2 /* flip the msr<tgpr> bit */ + mtcrf 0x80, %r3 /* restore CR0 */ + mtmsr %r0 /* flip back to the native gprs */ + ba EXC_DSI /* branch to DSI interrupt */ + +CNAME(dsmisssize) = .-CNAME(dsmisstrap) + + /* * Similar to the above for DSI * Has to handle BAT spills ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/conf/GENERIC#4 (text+ko) ==== @@ -107,7 +107,8 @@ # PCI Ethernet NICs that use the common MII bus controller code. device miibus # MII bus support device bge # Broadcom BCM570xx Gigabit Ethernet -device bm # Apple BMAC Ethernet +#??? config claims it's unknown device: ??? +#device bm # Apple BMAC Ethernet device gem # Sun GEM/Sun ERI/Apple GMAC device dc # DEC/Intel 21143 and various workalikes device fxp # Intel EtherExpress PRO/100B (82557, 82558) ==== //depot/projects/soc2008/vi0/efika/sys/powerpc/include/psl.h#4 (text+ko) ==== @@ -77,6 +77,7 @@ */ #define PSL_VEC 0x02000000 /* AltiVec vector unit available */ #define PSL_POW 0x00040000 /* power management */ +#define PSL_TGPR 0x00020000 /* temp. gpr remapping (mpc603e) */ #define PSL_ILE 0x00010000 /* interrupt endian mode (1 == le) */ #define PSL_EE 0x00008000 /* external interrupt enable */ #define PSL_PR 0x00004000 /* privilege mode (1 == user) */ @@ -86,6 +87,7 @@ #define PSL_SE 0x00000400 /* single-step trace enable */ #define PSL_BE 0x00000200 /* branch trace enable */ #define PSL_FE1 0x00000100 /* floating point interrupt mode 1 */ +#define PSL_CE 0x00000080 /* critical exception enable */ #define PSL_IP 0x00000040 /* interrupt prefix */ #define PSL_IR 0x00000020 /* instruction address relocation */ #define PSL_DR 0x00000010 /* data address relocation */
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