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[73.19.52.228]) by smtp.gmail.com with ESMTPSA id v1sm19207167pff.9.2019.02.21.10.13.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Feb 2019 10:13:12 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 12.2 \(3445.102.3\)) Subject: Re: svn commit: r344437 - head/sys/dev/ntb/ntb_hw From: Enji Cooper In-Reply-To: <201902211410.x1LEAEa2042271@repo.freebsd.org> Date: Thu, 21 Feb 2019 10:13:11 -0800 Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Content-Transfer-Encoding: quoted-printable Message-Id: <8FC17E30-1360-44CE-9284-286B6282C244@gmail.com> References: <201902211410.x1LEAEa2042271@repo.freebsd.org> To: Alexander Motin X-Mailer: Apple Mail (2.3445.102.3) X-Rspamd-Queue-Id: 893B286508 X-Spamd-Bar: ------ Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-6.94 / 15.00]; NEURAL_HAM_MEDIUM(-1.00)[-1.000,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; REPLY(-4.00)[]; NEURAL_HAM_SHORT(-0.94)[-0.937,0] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Feb 2019 18:13:15 -0000 > On Feb 21, 2019, at 6:10 AM, Alexander Motin wrote: >=20 > Author: mav > Date: Thu Feb 21 14:10:14 2019 > New Revision: 344437 > URL: https://svnweb.freebsd.org/changeset/base/344437 >=20 > Log: > Allow I/OAT of present Xeon E5/E7 to work thorugh PLX NTB. >=20 > Its a hack, we can't know/list all DMA engines, but this covers all > I/OAT of Xeon E5/E7 at least from Sandy Bridge till Skylake I saw. >=20 > MFC after: 1 week > Sponsored by: iXsystems, Inc. >=20 > Modified: > head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c >=20 > Modified: head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c > = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D > --- head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Thu Feb 21 12:13:27 2019 = (r344436) > +++ head/sys/dev/ntb/ntb_hw/ntb_hw_plx.c Thu Feb 21 14:10:14 2019 = (r344437) > @@ -202,16 +202,24 @@ ntb_plx_init(device_t dev) > if (sc->alut) > PNTX_WRITE(sc, 0xc94, 0); >=20 > - /* Enable Link Interface LUT entries 0/1 for peer 0/1. = */ > - PNTX_WRITE(sc, 0xdb4, 0x00090001); > + /* Enable all Link Interface LUT entries for peer. */ > + for (i =3D 0; i < 32; i +=3D 2) { Is `32` written down in the NTB spec somewhere? Should it be a = #define, or should it be programmatically adjusted based on the CPU? Thank you! -Enji=