From owner-freebsd-current@FreeBSD.ORG Sat Oct 30 03:37:40 2004 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7FB7416A4CE; Sat, 30 Oct 2004 03:37:40 +0000 (GMT) Received: from juniper.fornext.org (53.35.138.210.xn.2iij.net [210.138.35.53]) by mx1.FreeBSD.org (Postfix) with ESMTP id 768FF43D2D; Sat, 30 Oct 2004 03:37:39 +0000 (GMT) (envelope-from shino@fornext.org) Received: from [127.0.0.1] (ariel.net.ss.titech.ac.jp [131.112.21.25]) by juniper.fornext.org (Postfix) with ESMTP id 9BBDB2A; Sat, 30 Oct 2004 12:37:37 +0900 (JST) Date: Sat, 30 Oct 2004 12:37:37 +0900 From: Shunsuke SHINOMIYA To: John Baldwin In-Reply-To: <200410281111.24398.jhb@FreeBSD.org> References: <20041028165604.DCF8.SHINO@fornext.org> <200410281111.24398.jhb@FreeBSD.org> Message-Id: <20041030105024.360A.SHINO@fornext.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------_4182F3603605024E3510_MULTIPART_MIXED_" Content-Transfer-Encoding: 7bit X-Mailer: Becky! ver. 2.11.02 [ja] cc: freebsd-current@FreeBSD.org cc: obrien@FreeBSD.org Subject: Re[2]: disabling interrupt storm protection X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 30 Oct 2004 03:37:40 -0000 --------_4182F3603605024E3510_MULTIPART_MIXED_ Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Thank you John, I wrote a patch(which is attached to this mail) so that the problem doesn't occur in my environment. This patch changes the meaning of `storm'. But, I think use of the parameter(hw_intr_threshold) to control the detector in this method is clearer than the present method, and it needs no DELAY(1). In the detector to which this patch is applied and compiled with -DHACK2 flag, `storm' is the situation that the number of generated interrupts per unit time(1/hz) is larger than threshold. If kern_intr.c is compiled with -DHACK2 -DHACK3 flags, it works as interrupt rate limiter. What do you think about this method? -- Shunsuke SHINOMIYA --------_4182F3603605024E3510_MULTIPART_MIXED_ Content-Type: application/octet-stream; name="kern_intr.c.patch" Content-Disposition: attachment; filename="kern_intr.c.patch" Content-Transfer-Encoding: base64 LS0tIC9ob21lL3NoaW5vL3dvcmsvZnJlZWJzZC9zcmMvc3lzL2tlcm4va2Vybl9pbnRyLmMJVGh1 IFNlcCAgOSAxOTowMzoxOSAyMDA0CisrKyAvaG9tZS9zaGluby93b3JrL3BhY2tldG1lcmdlL3N5 cy9rZXJuL2tlcm5faW50ci5jCVNhdCBPY3QgMzAgMTE6NTM6NTkgMjAwNApAQCAtNDg1LDE0ICs0 ODUsMjMgQEAgaXRocmVhZF9sb29wKHZvaWQgKmFyZykKIAlzdHJ1Y3QgaW50cmhhbmQgKmloOwkJ LyogYW5kIG91ciBpbnRlcnJ1cHQgaGFuZGxlciBjaGFpbiAqLwogCXN0cnVjdCB0aHJlYWQgKnRk OwogCXN0cnVjdCBwcm9jICpwOworI2lmbmRlZiBIQUNLMgogCWludCBjb3VudCwgd2FybWluZywg d2FybmVkOworI2Vsc2UKKwlpbnQgY291bnQsIGN1cnJfdGlja3MsIHdhcm5lZDsKKyNlbmRpZgog CQogCXRkID0gY3VydGhyZWFkOwogCXAgPSB0ZC0+dGRfcHJvYzsKIAlpdGhkID0gKHN0cnVjdCBp dGhkICopYXJnOwkvKiBwb2ludCB0byBteXNlbGYgKi8KIAlLQVNTRVJUKGl0aGQtPml0X3RkID09 IHRkICYmIHRkLT50ZF9pdGhkID09IGl0aGQsCiAJICAgICgiJXM6IGl0aHJlYWQgYW5kIHByb2Mg bGlua2FnZSBvdXQgb2Ygc3luYyIsIF9fZnVuY19fKSk7CisjaWZuZGVmIEhBQ0syCiAJd2FybWlu ZyA9IDEwICogaW50cl9zdG9ybV90aHJlc2hvbGQ7CisjZWxzZQorCWNvdW50ID0gMDsKKwljdXJy X3RpY2tzID0gdGlja3M7CisjZW5kaWYKIAl3YXJuZWQgPSAwOwogCiAJLyoKQEAgLTUxNCw3ICs1 MjMsOSBAQCBpdGhyZWFkX2xvb3Aodm9pZCAqYXJnKQogCiAJCUNUUjQoS1RSX0lOVFIsICIlczog cGlkICVkOiAoJXMpIG5lZWQ9JWQiLCBfX2Z1bmNfXywKIAkJICAgICBwLT5wX3BpZCwgcC0+cF9j b21tLCBpdGhkLT5pdF9uZWVkKTsKKyNpZm5kZWYgSEFDSzIKIAkJY291bnQgPSAwOworI2VuZGlm CiAJCXdoaWxlIChpdGhkLT5pdF9uZWVkKSB7CiAJCQkvKgogCQkJICogU2VydmljZSBpbnRlcnJ1 cHRzLiAgSWYgYW5vdGhlciBpbnRlcnJ1cHQKQEAgLTU0OCw2ICs1NTksNyBAQCByZXN0YXJ0Ogog CQkJCWlmICgoaWgtPmloX2ZsYWdzICYgSUhfTVBTQUZFKSA9PSAwKQogCQkJCQltdHhfdW5sb2Nr KCZHaWFudCk7CiAJCQl9CisjaWZuZGVmIEhBQ0syCiAJCQlpZiAoaXRoZC0+aXRfZW5hYmxlICE9 IE5VTEwpIHsKIAkJCQlpdGhkLT5pdF9lbmFibGUoaXRoZC0+aXRfdmVjdG9yKTsKIApAQCAtNTY3 LDYgKzU3OSwxNiBAQCByZXN0YXJ0OgogCQkJCX0KIAkJCX0KIAorI2Vsc2UKKwkJCWlmKGludHJf c3Rvcm1fdGhyZXNob2xkIDw9IDApCisJCQkJZ290byBlbmFibGVfaW50cjsKKworCQkJaWYoY3Vy cl90aWNrcyAhPSB0aWNrcykgeworCQkJCWNvdW50ID0gMDsKKwkJCQljdXJyX3RpY2tzID0gdGlj a3M7CisJCQkJZ290byBlbmFibGVfaW50cjsKKwkJCX0KKyNlbmRpZiAvKiBIQUNLMiAqLwogCQkJ LyoKIAkJCSAqIElmIHdlIGRldGVjdCBhbiBpbnRlcnJ1cHQgc3Rvcm0sIHNsZWVwIHVudGlsCiAJ CQkgKiB0aGUgbmV4dCBoYXJkY2xvY2sgdGljay4gIFdlIHNsZWVwIGF0IHRoZQpAQCAtNTk1LDkg KzYxNywyMSBAQCByZXN0YXJ0OgogCQkJCSAqIGF3YXkgdW5sZXNzIHRoZSBpbnRlcnJ1cHQgcmVw ZWF0cwogCQkJCSAqIGxlc3Mgb2Z0ZW4gdGhlIGhhcmRjbG9jayBpbnRlcnJ1cHQuCiAJCQkJICov CisjaWZuZGVmIEhBQ0syCiAJCQkJY291bnQgPSBJTlRfTUFYIC0gMTsKIAkJCX0KKyNlbHNlCisj aWZuZGVmIEhBQ0szCisJCQkJY3Vycl90aWNrcyA9IHRpY2tzOworI2VuZGlmIC8qIEhBQ0szICov CisJCQl9IGVsc2UKKyNlbmRpZiAvKiBIQUNLMiAqLwogCQkJY291bnQrKzsKKyNpZmRlZiBIQUNL MgorZW5hYmxlX2ludHI6CisJCQlpZiAoaXRoZC0+aXRfZW5hYmxlICE9IE5VTEwpCisJCQkJaXRo ZC0+aXRfZW5hYmxlKGl0aGQtPml0X3ZlY3Rvcik7CisjZW5kaWYgLyogSEFDSzIgKi8KIAkJfQog CQlXSVRORVNTX1dBUk4oV0FSTl9QQU5JQywgTlVMTCwgInN1c3BlbmRpbmcgaXRocmVhZCIpOwog CQltdHhfYXNzZXJ0KCZHaWFudCwgTUFfTk9UT1dORUQpOwo= --------_4182F3603605024E3510_MULTIPART_MIXED_--