Date: Wed, 11 Aug 2010 05:30:52 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r211162 - user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212 Message-ID: <201008110530.o7B5UqLY050648@svn.freebsd.org>
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Author: adrian Date: Wed Aug 11 05:30:52 2010 New Revision: 211162 URL: http://svn.freebsd.org/changeset/base/211162 Log: Since the AR_PHY_AGC_CONTROL flags are also in AR5212, look at migrating the NF-cal related routines I've written out from AR5416 to here. This adds AR5212 versions; it doesn't delete the AR5416 versions (yet). Modified: user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212.h user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Modified: user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212.h ============================================================================== --- user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212.h Wed Aug 11 04:55:58 2010 (r211161) +++ user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212.h Wed Aug 11 05:30:52 2010 (r211162) @@ -608,4 +608,8 @@ extern void ar5212AniPoll(struct ath_hal const struct ieee80211_channel *); extern void ar5212AniReset(struct ath_hal *, const struct ieee80211_channel *, HAL_OPMODE, int); + +extern HAL_BOOL ar5212IsNFCalInProgress(struct ath_hal *ah); +extern HAL_BOOL ar5212WaitNFCalComplete(struct ath_hal *ah, int i); + #endif /* _ATH_AR5212_H_ */ Modified: user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c ============================================================================== --- user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Wed Aug 11 04:55:58 2010 (r211161) +++ user/adrian/if_ath_devel/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Wed Aug 11 05:30:52 2010 (r211162) @@ -567,13 +567,13 @@ ar5212SetDecompMask(struct ath_hal *ah, { struct ath_hal_5212 *ahp = AH5212(ah); - if (keyidx >= HAL_DECOMP_MASK_SIZE) - return HAL_EINVAL; - OS_REG_WRITE(ah, AR_DCM_A, keyidx); - OS_REG_WRITE(ah, AR_DCM_D, en ? AR_DCM_D_EN : 0); - ahp->ah_decompMask[keyidx] = en; + if (keyidx >= HAL_DECOMP_MASK_SIZE) + return HAL_EINVAL; + OS_REG_WRITE(ah, AR_DCM_A, keyidx); + OS_REG_WRITE(ah, AR_DCM_D, en ? AR_DCM_D_EN : 0); + ahp->ah_decompMask[keyidx] = en; - return AH_TRUE; + return AH_TRUE; } /* Setup coverage class */ @@ -646,7 +646,7 @@ ar5212Use32KHzclock(struct ath_hal *ah, struct ath_hal_5212 *ahp = AH5212(ah); return ath_hal_eepromGetFlag(ah, AR_EEP_32KHZCRYSTAL) && (ahp->ah_enable32kHzClock == USE_32KHZ || - ahp->ah_enable32kHzClock == AUTO_32KHZ); + ahp->ah_enable32kHzClock == AUTO_32KHZ); } else return AH_FALSE; } @@ -675,16 +675,16 @@ ar5212SetupClock(struct ath_hal *ah, HAL if (IS_2413(ah) || IS_5413(ah) || IS_2417(ah)) { OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_LIMIT, 0x26); - OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0d); - OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x07); - OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0x3f); + OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0d); + OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x07); + OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0x3f); /* # Set sleep clock rate to 32 KHz. */ OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x2); } else { OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_LIMIT, 0x0a); - OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0c); - OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x03); - OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0x20); + OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0c); + OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x03); + OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0x20); OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x3); } } else { @@ -702,8 +702,8 @@ ar5212SetupClock(struct ath_hal *ah, HAL OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x32); else OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0e); - OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x0c); - OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0xff); + OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x0c); + OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0xff); OS_REG_WRITE(ah, AR_PHY_REFCLKPD, IS_RAD5112_ANY(ah) || IS_5413(ah) || IS_2417(ah) ? 0x14 : 0x18); OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, @@ -731,9 +731,9 @@ ar5212RestoreClock(struct ath_hal *ah, H */ OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_CONTROL, 0x1f); OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_LIMIT, 0x7f); - OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0e); - OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x0c); - OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0xff); + OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0e); + OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x0c); + OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0xff); OS_REG_WRITE(ah, AR_PHY_REFCLKPD, IS_RAD5112_ANY(ah) || IS_5413(ah) ? 0x14 : 0x18); } @@ -1071,3 +1071,39 @@ ar5212GetDiagState(struct ath_hal *ah, i } return AH_FALSE; } + +/* + * Check whether there's an in-progress NF completion. + * + * Returns AH_TRUE if there's a in-progress NF calibration, AH_FALSE + * otherwise. + */ +HAL_BOOL +ar5212IsNFCalInProgress(struct ath_hal *ah) +{ + if (OS_REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) + return AH_TRUE; + return AH_FALSE; +} + +/* + * Wait for an in-progress NF calibration to complete. + * + * The completion function waits "i" times 10uS. + * It returns AH_TRUE if the NF calibration completed (or was never + * in progress); AH_FALSE if it was still in progress after "i" checks. + */ +HAL_BOOL +ar5212WaitNFCalComplete(struct ath_hal *ah, int i) +{ + int j; + if (i <= 0) + i = 1; /* it should run at least once */ + for (j = 0; j < i; j++) { + if (! ar5212IsNFCalInProgress(ah)) + return AH_TRUE; + OS_DELAY(10); + } + return AH_FALSE; +} +
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