From owner-freebsd-arm@FreeBSD.ORG Fri May 2 20:46:04 2014 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id B01252A1 for ; Fri, 2 May 2014 20:46:04 +0000 (UTC) Received: from mail-we0-x232.google.com (mail-we0-x232.google.com [IPv6:2a00:1450:400c:c03::232]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 497451948 for ; Fri, 2 May 2014 20:46:04 +0000 (UTC) Received: by mail-we0-f178.google.com with SMTP id u56so4123010wes.23 for ; Fri, 02 May 2014 13:46:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=/DbBqwORO3PdV602Y99crbB0gcI4cHxKhG00Uu4EIH8=; b=GnVtCqIp7vFQNLgYcb+GJNrHQbVpmodCCvex0gS2HjCUAZuEKth39CMG/gvXQvXCfE 3Bp7FWrnPOtZe3xKJIhFdqeI4xeIyHgXfb/4OAZ2x2SXVjhzTWhZ19kbYwbumnvCPaOi VmIhybn+U4cZ1REDs2KXqO6aN4PETEq8QZp11hzd64KFsSnvZL84UXKEIpYf8uMLTOj8 huV4yez1/+t5B30rlp/e35+qwCNvp935vbEx8zScwT85Wc5hwdR6PXyYyN3Htb22Y/J3 pEkLN0AFK7Pa1zDrfyCA3JTLfCwoaPL2RWPkaxBrhlqNRwVAGu1Tz8Z+Fs9+6ubC9Vlw gkeg== MIME-Version: 1.0 X-Received: by 10.180.228.42 with SMTP id sf10mr4545334wic.33.1399063562406; Fri, 02 May 2014 13:46:02 -0700 (PDT) Received: by 10.217.10.195 with HTTP; Fri, 2 May 2014 13:46:02 -0700 (PDT) In-Reply-To: References: <53633440.3070702@hot.ee> Date: Fri, 2 May 2014 16:46:02 -0400 Message-ID: Subject: Re: BBB/I2C: Read PMIC data From: Winston Smith To: Warner Losh Content-Type: text/plain; charset=UTF-8 Cc: FreeBSD ARM X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 May 2014 20:46:04 -0000 On Fri, May 2, 2014 at 11:30 AM, Warner Losh wrote: > Only if the kernel is actively accessing them so your transactions are messed up. > In the kernel, all the bridge knows about is transactions of one flavor or another. > This may indicate a more fundamental issue going on, either in your belief that > it is at 24, or in the address (which is 7 bits) gets translated to 8 bits. Try a left > shift 1 bit. Alright, figured it out. The "dummy" write that precedes the read is not a dummy, you're sending a command to the I2C device. For a EEPROM, you send it a 2 byte address of where to read. For the PMIC, you need to send it a *1-byte* register ID! I've updated the tool and renamed it `bbb_sysutil.c`: http://pastebin.com/NhMy9D7d Here's the output (still working on the "interrupt storm" issue!): root@beaglebone:~ # ./bbb_sysutil TPS65217 PMIC @ address 24: ChipID: E2 TPS65217C rev 1.2 Status: 08 ACPWR interrupt storm detected on "intr70:"; throttling interrupt source EEPROM @ address 50: signature=AA:55:33:EE Model: A335BNLT0A6A Serial: 0214BBBK4321 Let me know if there is any more data you want from the PMIC. -W