From owner-freebsd-smp@FreeBSD.ORG Wed Jul 16 00:12:47 2003 Return-Path: Delivered-To: freebsd-smp@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 83EF937B401; Wed, 16 Jul 2003 00:12:47 -0700 (PDT) Received: from ztxmail04.ztx.compaq.com (ztxmail04.ztx.compaq.com [161.114.1.208]) by mx1.FreeBSD.org (Postfix) with ESMTP id BD9A543F85; Wed, 16 Jul 2003 00:12:46 -0700 (PDT) (envelope-from john.cagle@hp.com) Received: from cceexg13.americas.cpqcorp.net (cceexg13.americas.cpqcorp.net [16.110.250.119]) by ztxmail04.ztx.compaq.com (Postfix) with ESMTP id 4891FBED3; Wed, 16 Jul 2003 02:12:46 -0500 (CDT) Received: from cceexc19.americas.cpqcorp.net ([16.110.250.85]) by cceexg13.americas.cpqcorp.net with Microsoft SMTPSVC(5.0.2195.6673); Wed, 16 Jul 2003 02:12:46 -0500 X-MimeOLE: Produced By Microsoft Exchange V6.0.6375.0 content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Date: Wed, 16 Jul 2003 02:12:45 -0500 Message-ID: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: maximum of CPUs Thread-Index: AcNLCFTjQFJs6gFBQaOUmgGcKBOQGQAYIUeA From: "Cagle, John (ISS-Houston)" To: "John Baldwin" X-OriginalArrivalTime: 16 Jul 2003 07:12:46.0170 (UTC) FILETIME=[A82D5BA0:01C34B69] cc: freebsd-smp@freebsd.org cc: Patrik Veselik Subject: RE: maximum of CPUs X-BeenThere: freebsd-smp@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: FreeBSD SMP implementation group List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Jul 2003 07:12:47 -0000 > -----Original Message----- > From: John Baldwin [mailto:jhb@FreeBSD.org]=20 > On 15-Jul-2003 Cagle, John (ISS-Houston) wrote: > > -- > > I/O APICs: APIC ID Version State Address > > 8 0x11 usable 0xfec00000 > > 9 0x11 usable 0xfec01000 > > 10 0x11 usable 0xfec02000 > >=20 > > Is this what you would expect to see on an 8-way server=20 > that supports > > hyperthreading? >=20 > Ugh, I would hope that the APIC ID's wouldn't collide with CPUs. :( > Note that you have real CPU's at ID's 8 and 10 and a logical one at > 9. Currently my code doesn't renumber APIC ID's to try to cope with > this type of case. Does the ACPI MADT table report the same values > for the APIC ID's of the I/O APICs? I should have updated my BIOS before trying this out. Sure enough, this was a BIOS bug that was corrected in March. The I/O APICS are now numbered 16, 17 & 18 so as to not collide with processor's local APICS. (Looks like the original BIOS only accounted for processors 0..7, without hyperthreading.) However, even with the properly renumbered IOAPICs, I still get the same panic: "No free physical APIC IDs found". I'm going to add some debug messages and track this down further. I'll let you know if I find anything. I'll also check the MADT to see if it jives with everything else. Thanks, John