From owner-freebsd-mobile@FreeBSD.ORG Sat Nov 8 17:16:09 2008 Return-Path: Delivered-To: freebsd-mobile@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5C7C8106568A; Sat, 8 Nov 2008 17:16:09 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from cmail.optima.ua (cmail.optima.ua [195.248.191.121]) by mx1.freebsd.org (Postfix) with ESMTP id 6E4B78FC1B; Sat, 8 Nov 2008 17:16:08 +0000 (UTC) (envelope-from mav@FreeBSD.org) X-Spam-Flag: SKIP X-Spam-Yversion: Spamooborona-2.1.0 Received: from [212.86.226.226] (account mav@alkar.net HELO mavbook.mavhome.dp.ua) by cmail.optima.ua (CommuniGate Pro SMTP 5.2.9) with ESMTPSA id 227353361; Sat, 08 Nov 2008 19:16:07 +0200 Message-ID: <4915C956.8090509@FreeBSD.org> Date: Sat, 08 Nov 2008 19:16:06 +0200 From: Alexander Motin User-Agent: Thunderbird 2.0.0.17 (X11/20081029) MIME-Version: 1.0 To: Kevin Oberman References: <20081108160342.0F91945010@ptavv.es.net> In-Reply-To: <20081108160342.0F91945010@ptavv.es.net> Content-Type: text/plain; charset=KOI8-R; format=flowed Content-Transfer-Encoding: 7bit Cc: Sam Leffler , "Alexandre \"Sunny\" Kovalenko" , Ian Smith , freebsd-mobile@freebsd.org Subject: Re: RFC: powerd algorithms enhancements X-BeenThere: freebsd-mobile@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Mobile computing with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 08 Nov 2008 17:16:09 -0000 Kevin Oberman wrote: > While I am hardly an expert on CPU power management, I have done a lot > of testing and benchmarking and I really think that FreeBSD uses CPU > throttling and/or P4TCC lin a manner not intended by Intel and not as > Windows does and I think that is why we have the problem. > > TCC was designed to be used for thermal control and I suspect, though I > have no documentation to support it, that throttling was, as well. They > were to allow the temperature of the CPU to be kept at a safe level > when, due to inadequate heat transfer or some other problem, a CPU could > be getting hot enough to damage itself. TCC affects only frequency, but not the voltage. So it reduces active consumption together with performance. But idle consumption depends on presence of different power-saving technologies. For example I have done tests some time ago which show that TCC gives benefits on idle when C1E is not present of disabled. As soon as C1E on modern CPUs anyway disables frequency when idle, TCC is just unable to propose anything better. > While both result in steps of 12.5% reduction in speed, for their > designed purpose, they probably will only be used when the CPU is being > clocked (or over-clocked) at its highest speed and will only be slowed > by, perhaps, 25 or 37.5%, not 75 or 87.5%. Those long pauses simply > don't work well. From overheat protection point of view I don't see the reason why TCC can't be combined with EST. EST is surely more effective as it also controls CPU voltage. We should just be sure that while creating combined frequency list we are always using lowest possible EST profile. If it happen that due to uneven dividers we can get 200MHz using TCC divider from some higher frequency or 300MHz by EST we should probably prefer last one. > SpeedStep, EST, Cool 'n' Quiet, and the like are designed for power > management and my tests have shown them to be far more effective for > this than throttling. I simply disable both TCC and throttling and let > EST/Cool 'n' Quiet do the job. It seem almost as effective in reducing > power consumption and provides better responsiveness in my systems. It > does mean that, instead of 32 speeds, I have only 5, ranging from 2 GHz > down to .8 Ghz, but that is quite adequate for my needs. EST at the same time controls CPU voltage, so it effective for both active and idle states and does not depends on C1E. Only deeper Cx sleep states are able to give something comparing to EST on idle consumption. > Note that this applies to newer systems. SpeedStep was not very good and > TCC/throttling was probably needed on old systems. (It was on my old 1 > GHz P4, at least.) But modern systems seem happiest and most efficient > when just using the tools designed for power management. As I understand TCC is effective for CPUs without C1E support enabled. SpeedStep and EST may also have some opponents from Cx world. So here is a big question how can we distinguish which CPU capabilities are most power-effective for this specific CPU? From other point view may left kernel things as is, but teach powerd to use only EST/C'n'Q frequencies for power saving when they are available. EST freqs are available via sysctl now, so it's not difficult. I don't have C'n'Q systems to check it, but it should not be a problem to make the same there. If we sometimes wish to do passive temperature control, we could use full combined set of frequencies. -- Alexander Motin