Date: Wed, 24 Apr 1996 18:57:39 -0400 (EDT) From: "Marc G. Fournier" <scrappy@ki.net> To: Michael Smith <msmith@atrad.adelaide.edu.au> Cc: current@FreeBSD.org, cat@ki.net, geoff@ki.net Subject: Re: MotherBoard Jumper Settings... Message-ID: <Pine.NEB.3.93.960424185439.1276A-100000@freebsd.ki.net> In-Reply-To: <199604240618.PAA16813@genesis.atrad.adelaide.edu.au>
next in thread | previous in thread | raw e-mail | index | archive | help
On Wed, 24 Apr 1996, Michael Smith wrote: > Marc G. Fournier stands accused of saying: > > > > First off, my CPU is an Intel DX4-100 w Write/Thru. CMOS > > was set for Write/Back...have changed it to Write/Thru... > > Ouch. Make sure there were no jumpers relevant to that as well. > None that I've been able to find, seems to be purely a CMOS setting... > > Second of all, one of the jumper that was supposed to be > > set, wasn't...have set it... > > Also bad. > Yup :( > > Third, the Oscillator Frequency was set for 33Mhz instead > > of 25Mhz...have fixed it... > > Wrong. "DX4" is marketting crap. They're really DX3's, so 33 is correct. > Reverted back again... > > If so, and I haven't changed that one yet, my CMOS is set for 20ns... > > would that produce any of the bugs I've been reporting? > > No. If the BIOS supports 15ns cycle cache memory then you may be > able to improve your performance by frobbing that. > So I should pop this up to 15ns? > Convention in naming memory parts is to put the size in Kbits in the part > number; 61512 implies 512kbits or 64kx8 or 128kx4. (I would expect the > latter). The setting you have now implies 8 cache parts, not 4. > If there's a 256kB/128kbx4 setting, try that. > The highest I have is 128Kb x 8 x 4pcs, so will try that out... Marc G. Fournier scrappy@ki.net Systems Administrator @ ki.net scrappy@freebsd.org
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?Pine.NEB.3.93.960424185439.1276A-100000>