From owner-svn-src-projects@FreeBSD.ORG Mon Mar 19 22:26:15 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C94E21065786; Mon, 19 Mar 2012 22:26:15 +0000 (UTC) (envelope-from cognet@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 9B28B8FC15; Mon, 19 Mar 2012 22:26:15 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q2JMQF3s089314; Mon, 19 Mar 2012 22:26:15 GMT (envelope-from cognet@svn.freebsd.org) Received: (from cognet@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q2JMQF0s089312; Mon, 19 Mar 2012 22:26:15 GMT (envelope-from cognet@svn.freebsd.org) Message-Id: <201203192226.q2JMQF0s089312@svn.freebsd.org> From: Olivier Houchard Date: Mon, 19 Mar 2012 22:26:15 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r233215 - projects/armv6/sys/arm/arm X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Mar 2012 22:26:15 -0000 Author: cognet Date: Mon Mar 19 22:26:15 2012 New Revision: 233215 URL: http://svn.freebsd.org/changeset/base/233215 Log: Those bit should have been committed as well, use the page tables provided by the BSP instead of assuming startup_pagetables is still available. Modified: projects/armv6/sys/arm/arm/locore.S Modified: projects/armv6/sys/arm/arm/locore.S ============================================================================== --- projects/armv6/sys/arm/arm/locore.S Mon Mar 19 22:26:02 2012 (r233214) +++ projects/armv6/sys/arm/arm/locore.S Mon Mar 19 22:26:15 2012 (r233215) @@ -229,6 +229,10 @@ Lend: .word _edata Lstartup_pagetable: .word STARTUP_PAGETABLE_ADDR +#ifdef SMP +Lstartup_pagetable_secondary: + .word temp_pagetable +#endif mmu_init_table: /* fill all table VA==PA */ /* map SDRAM VA==PA, WT cacheable */ @@ -240,6 +244,7 @@ mmu_init_table: MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) /* map VA 0xc0000000..0xc3ffffff to PA */ MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) + MMU_INIT(0x48000000, 0x48000000, 1, L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW)) #endif .word 0 /* end of table */ #endif @@ -278,13 +283,16 @@ svcstk: Lsramaddr: .word 0xffff0080 -/* Use carefully!!! Changes r0, r1 */ +#if 0 #define AP_DEBUG(tmp) \ mrc p15, 0, r1, c0, c0, 5; \ ldr r0, Lsramaddr; \ add r0, r1, lsl #2; \ mov r1, tmp; \ str r1, [r0], #0x0000; +#else +#define AP_DEBUG(tmp) +#endif ASENTRY_NP(mptramp) @@ -322,6 +330,11 @@ ASENTRY_NP(mpentry) orr r7, r7, #(I32_bit|F32_bit) msr cpsr_c, r7 + + adr r7, Ltag + bic r7, r7, #0xf0000000 + orr r7, r7, #PHYSADDR + /* Disable MMU for a while */ mrc p15, 0, r2, c1, c0, 0 bic r2, r2, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\ @@ -337,14 +350,17 @@ ASENTRY_NP(mpentry) AP_DEBUG(#3) Ltag: - ldr r0, Lstartup_pagetable + ldr r0, Lstartup_pagetable_secondary + bic r0, r0, #0xf0000000 + orr r0, r0, #PHYSADDR + ldr r0, [r0] #if defined(SMP) - orr r0, r0, #2 /* Set TTB shared memory flag */ + orr r0, r0, #0 /* Set TTB shared memory flag */ #endif mcr p15, 0, r0, c2, c0, 0 /* Set TTB */ mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */ -#if defined(CPU_ARM11) || defined(CPU_MV_PJ4B) +#if defined(CPU_ARM11) || defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) mov r0, #0 mcr p15, 0, r0, c13, c0, 1 /* Set ASID to 0 */ #endif @@ -356,7 +372,7 @@ Ltag: mcr p15, 0, r0, c3, c0, 0 /* Enable MMU */ mrc p15, 0, r0, c1, c0, 0 -#if defined(CPU_ARM11) || defined(CPU_MV_PJ4B) +#if defined(CPU_ARM11) || defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) orr r0, r0, #CPU_CONTROL_V6_EXTPAGE #endif orr r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE) @@ -369,6 +385,7 @@ Ltag: adr r1, .Lstart ldmia r1, {r1, r2, sp} /* Set initial stack and */ mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 mov r1, #2048 mul r2, r1, r0 sub sp, sp, r2