From owner-svn-src-all@FreeBSD.ORG Mon Jan 28 19:01:22 2013 Return-Path: Delivered-To: svn-src-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id D44B1C5A; Mon, 28 Jan 2013 19:01:22 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id 8998231D; Mon, 28 Jan 2013 19:01:21 +0000 (UTC) Received: from odyssey.starpoint.kiev.ua (alpha-e.starpoint.kiev.ua [212.40.38.101]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id VAA03568; Mon, 28 Jan 2013 21:01:19 +0200 (EET) (envelope-from avg@FreeBSD.org) Message-ID: <5106CAFF.3050905@FreeBSD.org> Date: Mon, 28 Jan 2013 21:01:19 +0200 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130113 Thunderbird/17.0.2 MIME-Version: 1.0 To: John Baldwin Subject: Re: svn commit: r245850 - in head/sys/sparc64: include sparc64 References: <201301232252.r0NMqLxh085107@svn.freebsd.org> <5103ABCC.3010706@FreeBSD.org> <201301280954.51558.jhb@freebsd.org> In-Reply-To: <201301280954.51558.jhb@freebsd.org> X-Enigmail-Version: 1.4.6 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org, src-committers@FreeBSD.org X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Jan 2013 19:01:22 -0000 on 28/01/2013 16:54 John Baldwin said the following: > On Saturday, January 26, 2013 5:11:24 am Andriy Gapon wrote: >> on 24/01/2013 00:52 Marius Strobl said the following: >>> This is due to >>> the fact that on sparc64, spinlock_enter() only raises the PIL but doesn't >>> disable interrupts completely. >> >> John, >> >> I wonder if you are considering pushing your amd64 TPR patch some day... > > I have it in a p4 branch still that is easy to update. I haven't yet been > able to do any testing/benchmarks that show it as beneficial. > I am thinking about architectural benefits. Like doing inter-processor stuff with less risk of deadlocks. Or "hard CPU stop" without resorting to NMI. Things like that... -- Andriy Gapon