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From: "Darren Pilgrim" <darren.pilgrim@bitfreak.org>
To: "'John Baldwin'" <jhb@freebsd.org>
Date: Thu, 8 Dec 2005 10:55:27 -0800
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Cc: freebsd-current@freebsd.org
Subject: RE: can someone explain...[ PCI interrupts]
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From: John Baldwin
> On Wednesday 07 December 2005 06:11 pm, Darren Pilgrim wrote:
> > What if the APIC was programmed to be edge-triggered just before the
> > ithread runs and programmed back to level-trigger when the ithread
> > completes?
>=20
> I'd rather work on my other solution which might be about 5 lines of =
code=20
> rather than screw around with the APICs when that might have other =
side=20
> effects.

My apologies, I didn't intend to come off as dictating design.  I'm
interested in the subject and it's rare to find people knowledgeable and
willing to converse about more advanced topics.

Like many others here, I have a very significant investment in hardware =
to
which this directly relates.  I wanted to find out about the details of =
the
behavior I'm observing and the impact of various solutions as both a
business man and a student of engineering.