From owner-freebsd-hackers Fri Sep 27 9:47:31 2002 Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.FreeBSD.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 470BE37B401 for ; Fri, 27 Sep 2002 09:47:30 -0700 (PDT) Received: from postfix2-2.free.fr (postfix2-2.free.fr [213.228.0.140]) by mx1.FreeBSD.org (Postfix) with ESMTP id ADFA643E75 for ; Fri, 27 Sep 2002 09:47:29 -0700 (PDT) (envelope-from porte10@free.fr) Received: from imp4-1.free.fr (imp4-1.free.fr [213.228.0.57]) by postfix2-2.free.fr (Postfix) with ESMTP id 709645F7CE for ; Fri, 27 Sep 2002 18:47:28 +0200 (CEST) Received: by imp4-1.free.fr (Postfix, from userid 33) id 296AE85D8; Fri, 27 Sep 2002 18:47:28 +0200 (MEST) To: freebsd-hackers@freebsd.org Subject: Runlevels and opcodes Message-ID: <1033145248.3d948ba01aeae@imp.free.fr> Date: Fri, 27 Sep 2002 18:47:28 +0200 (MEST) From: porte10@free.fr MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit User-Agent: IMP/PHP IMAP webmail program 2.2.6 X-Originating-IP: 194.206.100.20 Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG Runlevels and opcodes I am a bit familiar with the design of operating systems but i definitely lack practical experience so please apologize if i am confusing things ... Anyway i think the subject is likely to interest our readers ! On most modern operating systems, system calls provide control and isolation for resource access (memory, drivers...) and thereby security. *** But what does prevent a user-level process from executing wild instructions (RESET, traps, other dangerous instructions and undocumented features) ? More generally, does any of you know if some architectures provide the possibility of designing custom transitions between processor "runlevels" (usually there are only 2 available, superuser and user modes) ? E.g. processor starts in super-user mode ----> thread 1: switch to user-level with some opcodes masked ----> thread 2: switch to another user-level with other opcodes masked How do context switches occur on existing architectures ? Is it some kind of "forking" from super-user mode to user mode and multiple simultaneous user mode contexts (no switching back to super-user mode) ? Basically, what are the main differences between (intel, sparc, alpha, ...) from this point of view ? Best regards Phil To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message