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From: Juli Mallett <jmallett@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
Subject: PERFORCE change 32457 for review
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http://perforce.freebsd.org/chv.cgi?CH=32457

Change 32457 by jmallett@jmallett_dalek on 2003/06/02 22:36:00

	Not bothering with CCA right now, hide it under SUPPORT_SB1.

Affected files ...

.. //depot/projects/mips/sys/mips/mips/machdep.c#30 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/machdep.c#30 (text+ko) ====

@@ -174,7 +174,9 @@
 int mips_cpu_flags;
 int mips_has_r4k_mmu;
 int mips_has_llsc;
+#ifdef	SUPPORT_SB1
 int mips3_pg_cached;
+#endif
 
 int mips_num_tlb_entries;
 
@@ -536,11 +538,13 @@
 	  MIPS32_FLAGS | CPU_MIPS_NO_WAIT | CPU_MIPS_I_D_CACHE_COHERENT,
 						"Au1100 (Rev 2 core)" 	},
 
+#ifdef	SUPPORT_SB1
 	/* The SB1 CPUs use a CCA of 5 - "Cacheable Coherent Shareable" */
 	{ MIPS_PRID_CID_SIBYTE, MIPS_SB1, -1,	-1, -1, 0,
 	  MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT |
 	  CPU_MIPS_HAVE_SPECIAL_CCA | (5 << CPU_MIPS_CACHED_CCA_SHIFT),
 						"SB1"			},
+#endif /* SUPPORT_SB1 */
 
 	{ 0, 0, 0,				0, 0, 0,
 	  0,					NULL			}
@@ -736,6 +740,7 @@
 	mips_has_r4k_mmu = mips_cpu_flags & CPU_MIPS_R4K_MMU;
 	mips_has_llsc = (mips_cpu_flags & CPU_MIPS_NO_LLSC) == 0;
 
+#ifdef	SUPPORT_SB1
 	if (mycpu->cpu_flags & CPU_MIPS_HAVE_SPECIAL_CCA) {
 		uint32_t cca;
 
@@ -744,6 +749,7 @@
 		mips3_pg_cached = MIPS3_CCA_TO_PG(cca);
 	} else
 		mips3_pg_cached = MIPS3_DEFAULT_PG_CACHED;
+#endif	SUPPORT_SB1
 
 #ifdef __HAVE_MIPS_MACHDEP_CACHE_CONFIG
 	mips_machdep_cache_config();