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Date:      Mon, 8 Nov 2010 19:15:32 +0000 (UTC)
From:      Pyun YongHyeon <yongari@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r214992 - head/sys/dev/re
Message-ID:  <201011081915.oA8JFWPj047577@svn.freebsd.org>

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Author: yongari
Date: Mon Nov  8 19:15:31 2010
New Revision: 214992
URL: http://svn.freebsd.org/changeset/base/214992

Log:
  Reduce spin wait time consumed in GMII register access routine.
  There were a couple of attempts in the past to reduce it since it
  took more than 1ms. Because mii_tick() periodically polls link
  status, waiting more than 1ms for each GMII register access was
  overkill. Unfortunately all previous attempts were failed with
  various ways on different controllers.
  This time, add additional 20us dealy at the end of GMII register
  access which seems to requirement of all RealTek controllers to
  issue next GMII register access request. This is the same way what
  Linux does.

Modified:
  head/sys/dev/re/if_re.c

Modified: head/sys/dev/re/if_re.c
==============================================================================
--- head/sys/dev/re/if_re.c	Mon Nov  8 19:12:19 2010	(r214991)
+++ head/sys/dev/re/if_re.c	Mon Nov  8 19:15:31 2010	(r214992)
@@ -423,13 +423,12 @@ re_gmii_readreg(device_t dev, int phy, i
 	}
 
 	CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
-	DELAY(1000);
 
 	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);
 		if (rval & RL_PHYAR_BUSY)
 			break;
-		DELAY(100);
+		DELAY(25);
 	}
 
 	if (i == RL_PHY_TIMEOUT) {
@@ -437,6 +436,11 @@ re_gmii_readreg(device_t dev, int phy, i
 		return (0);
 	}
 
+	/*
+	 * Controller requires a 20us delay to process next MDIO request.
+	 */
+	DELAY(20);
+
 	return (rval & RL_PHYAR_PHYDATA);
 }
 
@@ -451,13 +455,12 @@ re_gmii_writereg(device_t dev, int phy, 
 
 	CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
 	    (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY);
-	DELAY(1000);
 
 	for (i = 0; i < RL_PHY_TIMEOUT; i++) {
 		rval = CSR_READ_4(sc, RL_PHYAR);
 		if (!(rval & RL_PHYAR_BUSY))
 			break;
-		DELAY(100);
+		DELAY(25);
 	}
 
 	if (i == RL_PHY_TIMEOUT) {
@@ -465,6 +468,11 @@ re_gmii_writereg(device_t dev, int phy, 
 		return (0);
 	}
 
+	/*
+	 * Controller requires a 20us delay to process next MDIO request.
+	 */
+	DELAY(20);
+
 	return (0);
 }
 



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