Date: Wed, 18 Nov 2009 16:25:20 +0200 From: Andriy Gapon <avg@icyb.net.ua> To: Kai Gallasch <gallasch@free.de>, "S.N.Grigoriev" <serguey-grigoriev@yandex.ru> Cc: freebsd-current@freebsd.org Subject: Re: 8.0RC2 amd64 - kernel panic running make buildworld Message-ID: <4B0403D0.3090101@icyb.net.ua> In-Reply-To: <20091117165304.01676555@orwell.free.de> References: <1031257439203@webmail57.yandex.ru> <hdc73v$4rt$1@ger.gmane.org> <941257966918@webmail42.yandex.ru> <200911111504.14906.jhb@freebsd.org> <20091112195932.5875387e@orwell.free.de> <4AFD140D.7010407@icyb.net.ua> <20091113144804.2c0fb90f@orwell.free.de> <4AFD655E.5020801@icyb.net.ua> <20091114022121.217dd831@orwell.free.de> <4AFE7A32.7060203@icyb.net.ua> <4B025FA9.7020003@icyb.net.ua> <20091117165304.01676555@orwell.free.de>
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Kai, Serguey,
thank you very much for the testing!
This has been an invaluable help.
I am now trying to narrow down possible causes of the issue and to come up with
the most efficient patch.
If/when you have a chance could you please test the following changes?
The patches are against mainline source tree (that is, not against previous
patch(es)).
So, please first try *only* this patch:
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
index 44b71f3..33b8c2a 100644
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -2981,6 +2981,7 @@ setpte:
* Map the superpage.
*/
pde_store(pde, PG_PS | newpde);
+ pmap_invalidate_range(pmap, trunc_2mpage(va), trunc_2mpage(va) + NBPDR);
pmap_pde_promotions++;
CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#lx"
Most likely this will fix the buildworld scenario.
But I am not sure if it will fix ZFS scenario.
If it does - then great, if not, please apply the following patch in addition to
the previous one and test again:
diff --git a/sys/amd64/amd64/mca.c b/sys/amd64/amd64/mca.c
index d291d00..d6547a3 100644
--- a/sys/amd64/amd64/mca.c
+++ b/sys/amd64/amd64/mca.c
@@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$");
#include <sys/sysctl.h>
#include <sys/systm.h>
#include <sys/taskqueue.h>
+#include <machine/cputypes.h>
#include <machine/mca.h>
#include <machine/md_var.h>
#include <machine/specialreg.h>
@@ -465,6 +466,8 @@ void
mca_init(void)
{
uint64_t mcg_cap;
+ uint64_t ctl;
+ int skip;
int i;
/* MCE is required. */
@@ -482,14 +485,22 @@ mca_init(void)
wrmsr(MSR_MCG_CTL, MCG_CTL_ENABLE);
for (i = 0; i < (mcg_cap & MCG_CAP_COUNT); i++) {
- /*
- * Enable logging of all errors. For P6
- * processors, MC0_CTL is always enabled.
- *
- * XXX: Better CPU test needed here?
- */
- if (!(i == 0 && (cpu_id & 0xf00) == 0x600))
- wrmsr(MSR_MC_CTL(i), 0xffffffffffffffffUL);
+ /* By default enable logging of all errors. */
+ ctl = 0xffffffffffffffffUL;
+ skip = 0;
+ if (cpu_vendor_id == CPU_VENDOR_INTEL) {
+ /* For P6 MC0_CTL is always enabled. */
+ if (i == 0 && CPUID_TO_FAMILY(cpu_id) == 0x6)
+ skip = 1;
+ } else if (cpu_vendor_id == CPU_VENDOR_AMD) {
+ /* BKDG for Family 10h: unset GartTblWkEn. */
+ if (i == 4 && CPUID_TO_FAMILY(cpu_id) >= 0xf) {
+ ctl &= ~(1UL << 10);
+ }
+ }
+
+ if (!skip)
+ wrmsr(MSR_MC_CTL(i), ctl);
/* Clear all errors. */
wrmsr(MSR_MC_STATUS(i), 0);
--
Andriy Gapon
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