Date: Thu, 31 May 2007 03:46:59 GMT From: Arthur Hartwig<arthur.hartwig@nokia.com> To: freebsd-gnats-submit@FreeBSD.org Subject: i386/113177: Extended PCI Configuration register (>= 0x100) not enabled Message-ID: <200705310346.l4V3kxW9017719@www.freebsd.org> Resent-Message-ID: <200705310350.l4V3o4tl077834@freefall.freebsd.org>
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>Number: 113177 >Category: i386 >Synopsis: Extended PCI Configuration register (>= 0x100) not enabled >Confidential: no >Severity: non-critical >Priority: medium >Responsible: freebsd-i386 >State: open >Quarter: >Keywords: >Date-Required: >Class: sw-bug >Submitter-Id: current-users >Arrival-Date: Thu May 31 03:50:04 GMT 2007 >Closed-Date: >Last-Modified: >Originator: Arthur Hartwig >Release: 6.1 >Organization: Nokia >Environment: >Description: The Intel 5000P Chipset is not recognised in pci_cfgregopen() in sys/i386/pci/pci_cfgreg.c as one supporting memory mapped access to PCI device configuration registers hence error registers with offset > 256 in the MCH can not be accessed. This would also be true of FreeBSD CURRENT. >How-To-Repeat: >Fix: Suggested fix, change the last part of pci_cfgregopen() in sys/i386/pci/pci_cfgreg.c to read: vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2); did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2); if (vid == 0x8086) { switch (did) { case 0x3590: case 0x3592: /* Intel 7520 or 7320 */ pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16; pciereg_cfgopen(); break; case 0x2580: case 0x2584: /* Intel 915 or 925 */ pciebar = pci_cfgregread(0, 0, 0, 0x48, 4); pciereg_cfgopen(); break; case 0x25d8: /* Intel 5000P */ case 0x25d0: case 0x25d4: /* Intel 5000P or 5000Z or 5000V */ pciebar = pci_cfgregread(0, 16, 0, 0x64, 4); #ifndef PAE if (pciebar >= 0x10000) { printf("%s: Memory mapped PCI configuration " "area base 0x%08x too high\n", __FUNCTION__, pciebar ); pciebar = 0; break; } #endif pciebar = pciebar << 16; pciereg_cfgopen(); break; } } return(1); } Notes: The 5000 series chipset datasheet says the did of the 5000P is 0x25c8 but the actual device in my system has a did of 0x25d8 hence I've used 0x25d8. I don't have access to systems with 5000Z or 5000V chipsets so I have used the values in the datasheet for them. I suspect there are a bunch of other Intel chipset that should also be recognised: 954, 955, 965 and 965 and variants. Probably something similar (without the #ifndef PAE) needs to go into the amd64 branch. >Release-Note: >Audit-Trail: >Unformatted:
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