Date: Fri, 3 Jan 2003 17:31:43 -0800 From: "Luoqi Chen" <lchen@briontech.com> To: "Martin Blapp" <mb@imp.ch> Cc: "Hiten Pandya" <hiten@unixdaemons.com>, <current@FreeBSD.ORG> Subject: RE: SIS 962 chipset, problems ... Message-ID: <AHEKICEOIHLOGINAFIINGEKECAAA.lchen@briontech.com> In-Reply-To: <20030101164111.B5373-100000@levais.imp.ch>
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> Good year everybody > > Luigi, I converted your patch to CURRENT, there were only > minor changes to do and it seems to work ! > > sis0: <SiS 900 10/100BaseTX> port 0x2000-0x20ff mem > 0xec005000-0xec005fff irq 1$ > at device 4.0 on pci0 > sis0: Ethernet address: 00:00:e2:94:66:99 > miibus0: <MII bus> on sis0 > ukphy0: <Generic IEEE 802.3u media interface> on miibus0 > ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto > > http://people.freebsd.org/~mbr/patches/ifsis-luigi.diff > > and added the Linux way of reading the eeprom. I guess > we should make this the default for accessing the eeprom (for > this chipset), > since it is not only the mac address which gets read. > > Luigi: Or isn't this neccessary ? > > http://people.freebsd.org/~mbr/patches/ifsis-mbr.diff > > Martin > Yes, I think it is neccesary, but all my machines have 0x90 revisions. I've discovered another issue with the integrated device, the dma burst size should be limited to 64 bytes. This is in the Linux driver, search for EDB_MASTER_EN, if this bit is set in config register, dma burst size can be no larger than 64, otherwise data errors would sometimes appear at 64 byte data boundaries. There's also a bug exists in almost all Bill's network drivers: when reading PHY regs over the i2c bus, the turnaround ACK bit is read one clock edge too late. This bit is driven low by slave (as any other input data bits from slave) when the clock is LOW. The current code reads the bit after the clock is driven high again. -lq To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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