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Date:      Mon, 11 Jan 1999 17:51:43 -0500
From:      Lee Cremeans <lee@st-lcremean.tidalwave.net>
To:        current@FreeBSD.ORG
Subject:   Re: ide_pci.c question
Message-ID:  <19990111175143.C63501@tidalwave.net>
In-Reply-To: <Pine.GSO.3.95q.990111163507.21129A-100000@rac8.wam.umd.edu>; from Kenneth Wayne Culver on Mon, Jan 11, 1999 at 04:37:01PM -0500
References:  <19990111161557.B63501@tidalwave.net> <Pine.GSO.3.95q.990111163507.21129A-100000@rac8.wam.umd.edu>

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On Mon, Jan 11, 1999 at 04:37:01PM -0500, Kenneth Wayne Culver wrote:
> Kenneth Culver
> Computer Science Major at the University of Maryland, College Park.
> 
> 
> On Mon, 11 Jan 1999, Lee Cremeans wrote:
> 
> > On Mon, Jan 11, 1999 at 04:09:18PM -0500, Kenneth Wayne Culver wrote:
> > > 
> > > try using 0xa0ffa0ff
> > 
> > DMA's already on; that message is a (rather unnecessary) warning saying that
> > ide_pci can't change the default timings by itself (since it obviously
> > doesn't know how). I should change the wording on this, and hide it behind
> > bootverbose...any objections?
> > 
> No problem here, that would work for me, Have you submitted your changes
> to the people that matter so that this fix can be incorporated into
> -current? 

Well, if anyone with commit privs is listening, here's the patch:

--- ide_pci.c	Mon Dec 21 03:55:56 1998
+++ ide_pci.c.new	Sun Jan 10 23:23:41 1999
@@ -120,6 +121,15 @@
 	void	*wdinfo);
 
 static void
+acer_status(struct ide_pci_cookie *cookie);
+
+static int 
+acer_dmainit(struct ide_pci_cookie *cookie,
+	struct  wdparams *wp,
+	int	(*wdcmd)(int, void *),
+	void 	*wdinfo);
+
+static void
 intel_piix_dump_drive(char	*ctlr,
 	int	sitre,
 	int	is_piix4,
@@ -267,8 +277,14 @@
 		printf("ide_pci: generic_dmainit %04x:%d: warning, IDE controller timing not set\n",
 			cookie->iobase_wd,
 			cookie->unit);
+		/* If we're here, then this controller is most likely not set 
+		   for UDMA, even if the drive may be. Make the drive wise
+		   up. */  
+		   
+		if(!wdcmd(WDDMA_MDMA2, wdinfo)) 
+			printf("generic_dmainit: could not set multiword DMA mode!\n");
 		return 1;
-	}
+	}	
 #ifdef IDE_PCI_DEBUG
 	printf("pio_mode: %d, mwdma_mode(wp): %d, udma_mode(wp): %d\n",
 		pio_mode(wp), mwdma_mode(wp), udma_mode(wp));
@@ -836,6 +852,68 @@
 	intel_piix_status
 };
 
+
+static void
+acer_status(struct ide_pci_cookie *cookie) {
+	/* XXX does not do anything right now */
+}
+
+static int
+acer_dmainit(struct ide_pci_cookie *cookie,
+                   struct wdparams *wp,
+                   int(*wdcmd)(int, void *),
+                   void *wdinfo)
+{
+	/* Acer Aladdin DMA setup code. UDMA looks to be sinfully easy to set
+	   on this thing - just one register. */
+	
+	u_long word54 = pci_conf_read(cookie->tag, 0x54);
+	
+	/* Set the default Acer FIFO settings (0x55 = 13-word depth and
+	   slave operation mode 1) */
+	
+	word54 |= 0x5555;
+	
+	/* Is this drive UDMA? Set it up if so... */
+	if(udma_mode(wp) >= 2) {
+		/* This is really easy to do. Just write 0xa (enable 
+		   UDMA mode with 2T timing) into the word at the right
+		   places. */
+		word54 |= (0xA << (16 + (cookie->ctlr * 8) + (cookie->unit * 4)));
+		
+		/* Now set the drive for UDMA2. */
+		if(!wdcmd(WDDMA_UDMA2, wdinfo)) {
+			printf("acer_dmainit: could not set UDMA2 mode on wdc%d:%d!\n", cookie->ctlr, cookie->unit);
+			return 0;
+		}
+		
+		/* Write the new config into the registers. I'm not 
+		   sure if I'm doing this in the right order. */
+		
+		pci_conf_write(cookie->tag, 0x54, word54);
+		
+	} else if(mwdma_mode(wp) >= 2 && pio_mode(wp) >=4) {
+	
+	
+		/* Otherwise, we're already set for regular DMA. */
+
+		if(!wdcmd(WDDMA_MDMA2, wdinfo)) {
+			printf("acer_dmainit: could not set MWDMA2 mode on wdc%d:%d!\n", 
+			     cookie->ctlr, cookie->unit);
+			return 0;
+		}
+		return 1;
+	}
+}
+ 
+static struct vendor_fns vs_acer = 
+{
+	acer_dmainit,
+	acer_status
+};
+	
+	 
+
 /* Generic SFF-8038i code-- all code below here, except for PCI probes,
  * more or less conforms to the SFF-8038i spec as extended for PCI.
  * There should be no code that goes beyond that feature set below.
@@ -918,6 +996,8 @@
 	    		return ("Promise Ultra/33 IDE controller");
 		if (type == 0x05711106)
 			return ("VIA 82C586x (Apollo) Bus-master IDE controller");
+		if (type == 0x522910b9)
+			return ("Acer Labs (ALi) Aladdin IV/V Bus-master IDE controller");
 		if (data & 0x8000)
 			return ("PCI IDE controller (busmaster capable)");
 #ifndef CMD640
@@ -980,7 +1060,10 @@
 		/* Promise controllers */
 		vp = &vs_promise;
 		break;
-
+	
+	case 0x522910b9:
+		vp = &vs_acer;
+		break;
 	default:
 		/* everybody else */
 		vp = &vs_generic;
@@ -1138,9 +1221,7 @@
 		}
 	}
 
-	if (bmista_1 & BMISTA_SIMPLEX || bmista_2 & BMISTA_SIMPLEX) {
-		printf("ide_pci: controller is simplex, no DMA on secondary channel\n");
-	} else if (iobase_wd_2 != 0) {
+	if (iobase_wd_2 != 0) {
 		cookie = mkcookie(iobase_wd_2,
 				  ctlridx + 1,
 				  0, 


-- 
+--------------------------------------------------------------------+
| Lee Cremeans -- Manassas, VA, USA  (WakkyMouse on DALnet and WTnet)|  
|    lcremean@tidalwave.net| http://st-lcremean.tidalwave.net/~lee   |

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