Date: Wed, 16 Jul 1997 01:23:35 -0800 From: Chris Browning <brownie@earthling.net> To: Steve Passe <smp@csn.net> Cc: smp@FreeBSD.ORG Subject: Re: HEADS UP: EISA cards. Message-ID: <33CC9317.9C7588D8@earthling.net> References: <199707160551.XAA06975@Ilsa.StevesCafe.com>
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Steve, This is a very interesting question. I would like to dig into this to see what the "right" thing to do is. Unfortunately, I am not that familar with some of the issues on the SW side of things. I will try to look into this DMA chaining impact. I have a few questions/comments about your proposal. Please excuse any ignorance on my part. I always try to error on the side of completeness :-). > Till now we have been using "mixed mode programming" where the 8259 > PIC's > INT output is routed thru the APIC and handled as an 'ExtInt' on those > machines that don't route the 8254 to the APIC. I DEFINIATELY agree with the drop mix-mode thing. It is a nightmare. NT and some of the other unixes have already sucessfully done this. In addition, you can't support more than one IOAPIC with just mixed-mode (I think). > It turns out that when you do this the 8254 timer INTs (or any INT > from the > 8259) are NOT reflected in the APIC IRR/ISR registers, and CANNOT be > masked > via the APIC TPR register/process priority scheme. This is > unacceptable Interesting. Do you have an 8259 or 8254 in your machine? I doubt it. The south bridge / IOAPIC in your machine is emulating their behavior. This is done for backwards compatibility for brain-dead OSes like DOS. I am also curious about why this would be unacceptible. It might have been mentioned in the full decription. > Intel486(TM) MicroProcessors and related Products, order #241731-002 > pp 4-220 thru 4-302: 82489DX Advanced Programmable Interrupt > Controller > ... > - program the 8259 to pass ONLY the DMA chaining INT > - program the IO APIC to handle this as a regular (ie not 'ExtInt') > input > - abandon the 8254 timer, instead using the APIC's internal timer. > ... > I believe that we don't want to abandon the 8254, but instead should > abandon the DMA chaining INTs (who uses these anyways???) Then we > can program in a similar way, but instead pass the 8254 INT thru as > a regular INT. Why would you not want to abandon the 8254? Why not use the APIC's timer? I would imagine that it was put there for this purpose when running in full symetric mode. Also, why would you not want to program the IOAPIC to handle "this" as normal INTs? > we need to make a policy decision as to whether we can say > bye-bye to the DMA chaining INTs. If I don't get thoughtful feedback > on this > I will just nmake an arbitrary decision (which I suspect to be axing > the DMA > INTs). I think the only situation needing them is non-busmaster EISA > hardware > that does DMA via the motherboard chipset DMA registers. Please > correct me > if I am wrong on this point. What about ISA non-busmastering (most ISA cards) that use MB DMA for operation. Sound cards come to mind :-). Do you not use the chipset DMA for this (you know, when you set the DMA channels on your SB16 to 0 and 1)? Well, I hope this help and is not confusing for you. Chris Intel Corporation Enterprise Servers Group Product Engineering Competitive Development I don't speak for anyone, especially Intel.
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