Date: Wed, 26 Dec 2012 20:16:02 -0800 From: Oleksandr Tymoshenko <gonzo@bluezbox.com> To: Daisuke Aoyama <aoyama@peach.ne.jp> Cc: freebsd-arm@freebsd.org Subject: Re: FreeBSD/armv6z/clang on Raspberry Pi 512MB (with U-Boot + ubldr) Message-ID: <BE93F553-E060-45E5-90FE-39AAD1325BAB@bluezbox.com> In-Reply-To: <2BA73CBF02B04DD19D08CDFC556B8750@ad.peach.ne.jp> References: <B5F827FF91C94FF2AFEE00194A2BB2C5@ad.peach.ne.jp> <B508111FCE534B2CBA61F4D1EC1078D3@ad.peach.ne.jp> <E42823D3-D405-40E7-B4CF-75DC947AC119@bluezbox.com> <2BA73CBF02B04DD19D08CDFC556B8750@ad.peach.ne.jp>
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On 2012-12-26, at 7:52 PM, Daisuke Aoyama <aoyama@peach.ne.jp> wrote: >> PTE sync - related part, Im not sure it's strictly required. We use = WT caches for page tables >> so we should be OK without implicit sync operations for them. I hope = somebody >> more clueful can confirm/disprove this. >=20 > Some digging, I notice "Invalidate Entire Instruction Cache" works = without segfault. > So, Invalidate D-cache is no effect :) >=20 > It seems following should work for this issue: >=20 > mov r0, #0 > mcr p15, 0, r0, c7, c5, 0 /* Invalidate Entire = Instruction Cache */ > mcr p15, 0, r0, c7, c10, 4 /* Data Synchronization = Barrier */ >=20 > Try this code instead of CF_ICACHE_SYNC. > I don't know side effect of Invalidate I-cache, but it works. > Also I don't know whether DSB is required or not. >=20 > For test, using NFS or HDD/SDD is BAD idea for system stress. > You must use SD(mmc) or USB memory. Serial console is recommended for = interrupt test. > Here is simple test from serial console: >=20 > # rm -rf /var/db/portsnap /usr/ports > # mkdir /var/db/portsnap > # portsnap fetch > # portsnap extract > # cd /usr/ports/shells/bash > # make BATCH=3Dy >=20 > If your kernel is really stable, it should finish without any problems = with SD/mmc. >=20 Hmm, I saw problems with i-caches with kernel with WB cache enabled = instead of WT.=20 This patch fixed it for me: http://people.freebsd.org/~gonzo/arm/patches/pmapv6-icache.diff It invalidates i-caches only when new mapping is created, not on every = switch so=20 it should be less taxing on performance. Could you test it on your setup?=20=
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