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Date:      Wed, 7 Sep 2016 07:22:59 -0600
From:      Warner Losh <imp@bsdimp.com>
To:        Erik Moe <e.moe@rcn.com>
Cc:        freebsd-arm <freebsd-arm@freebsd.org>
Subject:   Re: Unaligned access in ubldr.bin
Message-ID:  <CANCZdfqBH5w2SYaiuvdgaZ0DZTBLjSdTAcye4BL%2B3NhaY=f6sA@mail.gmail.com>
In-Reply-To: <E04431D8-F38C-4B9F-BFE1-1207265DED8B@rcn.com>
References:  <E04431D8-F38C-4B9F-BFE1-1207265DED8B@rcn.com>

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On Wed, Sep 7, 2016 at 12:46 AM, Erik Moe <e.moe@rcn.com> wrote:
> Hello,
>
> I=E2=80=99ve been trying to bring up FreeBSD on the USB Armory based on t=
he i.MX53.  I=E2=80=99ve made myself a u-boot patch that will load and star=
t ubldr.bin but I=E2=80=99m running into a issue with what I think is an un=
aligned access issue:

which version of u-boot are you using?


> ## Starting application at 0x70800000 ...
> data abort
> pc : [<70824bac>]          lr : [<7081846c>]
> sp : 8f550c98  ip : 70835a00     fp : 8f550cb0
> r10: 00000002  r9 : 70838d58     r8 : 70833cd9
> r7 : 707fff08  r6 : 000054f0     r5 : 70833cd9  r4 : 00000000
> r3 : 70828fc4  r2 : 70833cd9     r1 : 00000001  r0 : 7083705c
> Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
> Resetting CPU ...
>
> I=E2=80=99ve hand dissambled the code at  pc=3D0x70824bac:
>
> 0x70824ba8: 0xe59f21d0 ldr r2, [pc, #464]
> 0x70824bac: 0xe5825000 str r5, [r2]
> 0x70824bb0: 0xe5d53000 ldrb r3, [r5]
> 0x70824bb4: 0xe353002d cmp r3, #45
> 0x70824bb8: 0x1a00000b bne #+44
>
> The offending instructions is "str r5, [r2]=E2=80=9D where r2 =3D 0x70833=
cd9, which sort of makes sense since it isn=E2=80=99t aligned on a 4 byte b=
oundary.  I=E2=80=99m new to arm ARM, so I=E2=80=99m not really sure.  My q=
uestions are these:
>
> 1.) Doesn=E2=80=99t ARMv6 and higher architecture allow unaligned access?=
  Is there something that u-boot needs be doing in initialization to allow =
unaligned access?

It does, but usually that's configured later in boot.

> 2.) Does ubldr make the assumption that unaligned access is allowed and m=
aybe shouldn=E2=80=99t?  I would think not since ubldr has been around for =
a while and works on numerous ARM processors.

It may be that the compiler is generating bad code in this case? You
might check to see how we're building it and to see if that's causing
problems.

I've been trying to bring up v2016.07 on some boards and that fails
where v2016.05 worked. I get data alignment issues, but all I'm
changing is u-boot.img.

Warner

> Any thoughts at which direction to investigate would be appreciated.
>
> Thanks,
> Erik
>
> FYI, ubldr is failing in =E2=80=9Cgetopt=E2=80=9D.  I=E2=80=99ve used obj=
dump to disassemble ubldr.bin.  You=E2=80=99ll have to subtract the offset =
0xf8 and add 0x7080000 to the addresses bellow to get them to align with th=
e addresses above.
>
>
> getopt(int nargc, char * const *nargv, const char *ostr)
> {
>    24c4c:       e92d4df0        push    {r4, r5, r6, r7, r8, sl, fp, lr}
>    24c50:       e28db018        add     fp, sp, #24
>    24c54:       e1a07000        mov     r7, r0
>         static char *place =3D EMSG;              /* option letter proces=
sing */
>         char *oli;                              /* option letter list ind=
ex */
>
>         if (optreset || !*place) {              /* update scanning pointe=
r */
>    24c58:       e59f0214        ldr     r0, [pc, #532]  ; 24e74 <getopt+0=
x228>
>    24c5c:       e1a06001        mov     r6, r1
>    24c60:       e1a08002        mov     r8, r2
>    24c64:       e5901000        ldr     r1, [r0]
>    24c68:       e3510000        cmp     r1, #0
>    24c6c:       1a000004        bne     24c84 <getopt+0x38>
>    24c70:       e59f1200        ldr     r1, [pc, #512]  ; 24e78 <getopt+0=
x22c>
>    24c74:       e5913000        ldr     r3, [r1]
>    24c78:       e5d34000        ldrb    r4, [r3]
>    24c7c:       e3540000        cmp     r4, #0
>    24c80:       1a00001d        bne     24cfc <getopt+0xb0>
>    24c84:       e3a01000        mov     r1, #0
>                 optreset =3D 0;
>    24c88:       e5801000        str     r1, [r0]
>                 if (optind >=3D nargc || *(place =3D nargv[optind]) !=3D =
'-') {
>                         place =3D EMSG;
>                         return (-1);
>                 }
>                 if (place[1] && *++place =3D=3D '-') {      /* found "--"=
 */
>                         ++optind;
>    24c8c:       e59f01e8        ldr     r0, [pc, #488]  ; 24e7c <getopt+0=
x230>
>    24c90:       e5901000        ldr     r1, [r0]
>         static char *place =3D EMSG;              /* option letter proces=
sing */
>         char *oli;                              /* option letter list ind=
ex */
>
>         if (optreset || !*place) {              /* update scanning pointe=
r */
>                 optreset =3D 0;
>                 if (optind >=3D nargc || *(place =3D nargv[optind]) !=3D =
'-') {
>    24c94:       e1510007        cmp     r1, r7
>    24c98:       aa000011        bge     24ce4 <getopt+0x98>
>    24c9c:       e7965101        ldr     r5, [r6, r1, lsl #2]
>    24ca0:       e59f21d0        ldr     r2, [pc, #464]  ; 24e78 <getopt+0=
x22c>
>    24ca4:       e5825000        str     r5, [r2]
>    24ca8:       e5d53000        ldrb    r3, [r5]
>    24cac:       e353002d        cmp     r3, #45 ; 0x2d
>
>
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