From owner-freebsd-smp Sun Nov 3 00:32:15 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id AAA06310 for smp-outgoing; Sun, 3 Nov 1996 00:32:15 -0800 (PST) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id AAA06301; Sun, 3 Nov 1996 00:32:08 -0800 (PST) Received: (from bde@localhost) by godzilla.zeta.org.au (8.7.6/8.6.9) id TAA24597; Sun, 3 Nov 1996 19:29:10 +1100 Date: Sun, 3 Nov 1996 19:29:10 +1100 From: Bruce Evans Message-Id: <199611030829.TAA24597@godzilla.zeta.org.au> To: dg@Root.COM, smp@csn.net Subject: Re: ed0 timeouts Cc: hackers@freefall.freebsd.org, smp@freefall.freebsd.org Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk >Is it possible for a new INT to be asserted by the if_ed driver WHILE >it is currently being serviced by the edintr() routine? Probably. It is certainly possibly for other ISA devices. The IRQ tends to go low when you read the status register and then there can be another edge when another event occurs. >What I have discovered is that unlike the 8259, the IO APIC will ignore >(ie NOT delivered or held pending) an edge level INT if it currently is >masked. The routine in vector.s masks the INT, calls edintr(), then after >edintr() returns it unmasks the INT. If another INT fired as a result >of ed_start() being called in edintr() BEFORE the INT was unmasked it >would be LOST. It seems to be more braindamaged than an 8259 :-(. (The main 8259 braindamage is that you can't see the state of the IRQ lines directly except while interrupts are masked and not in service.) Bruce From owner-freebsd-smp Sun Nov 3 00:33:39 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id AAA06395 for smp-outgoing; Sun, 3 Nov 1996 00:33:39 -0800 (PST) Received: from soda.CSUA.Berkeley.EDU (soda.CSUA.Berkeley.EDU [128.32.43.52]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id AAA06385 for ; Sun, 3 Nov 1996 00:33:34 -0800 (PST) Received: from localhost (richardc@localhost) by soda.CSUA.Berkeley.EDU (8.6.12/8.6.12) with SMTP id AAA02743 for ; Sun, 3 Nov 1996 00:34:44 -0800 Date: Sun, 3 Nov 1996 00:34:39 -0800 (PST) From: Veggy Vinny To: smp@FreeBSD.ORG Subject: Machine freezes under SMP kernel Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Greetings everyone, It seems like with our machine at earth.GAIANET.NET which I run remotely from San Francisco as it's in Beverly Hills, California tends to freeze when the system is inactive but when I try to compile something like a make world of -current or just the archivers/P5-Compress-Zlib port which would just freeze the machine until someone does a reset with the power switch. Any ideas what could be causing this to occur? Vince GaiaNet Corporation - Unix Networking Operations - GUS Mailing Lists Admin From owner-freebsd-smp Sun Nov 3 00:45:03 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id AAA07224 for smp-outgoing; Sun, 3 Nov 1996 00:45:03 -0800 (PST) Received: from root.com (implode.root.com [198.145.90.17]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id AAA07206; Sun, 3 Nov 1996 00:44:56 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by root.com (8.7.6/8.6.5) with SMTP id AAA23866; Sun, 3 Nov 1996 00:43:51 -0800 (PST) Message-Id: <199611030843.AAA23866@root.com> X-Authentication-Warning: implode.root.com: Host localhost [127.0.0.1] didn't use HELO protocol To: Steve Passe cc: hackers@freefall.freebsd.org, smp@freefall.freebsd.org Subject: Re: ed0 timeouts In-reply-to: Your message of "Sat, 02 Nov 1996 23:43:56 MST." <199611030643.XAA25052@clem.systemsix.com> From: David Greenman Reply-To: dg@Root.COM Date: Sun, 03 Nov 1996 00:43:51 -0800 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk >Question: > >Is it possible for a new INT to be asserted by the if_ed driver WHILE >it is currently being serviced by the edintr() routine? > >What I have discovered is that unlike the 8259, the IO APIC will ignore >(ie NOT delivered or held pending) an edge level INT if it currently is >masked. The routine in vector.s masks the INT, calls edintr(), then after >edintr() returns it unmasks the INT. If another INT fired as a result >of ed_start() being called in edintr() BEFORE the INT was unmasked it >would be LOST. Yes, you can get another interrupt while servicing one. The driver loops until all interrupts are serviced, but there would be a window between when it thinks there are no more interrupts to service and returning to vector.s to unmask the interrupts. This window will exist in all ISA drivers. -DG David Greenman Core-team/Principal Architect, The FreeBSD Project From owner-freebsd-smp Sun Nov 3 01:01:16 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id BAA08180 for smp-outgoing; Sun, 3 Nov 1996 01:01:16 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id BAA08170; Sun, 3 Nov 1996 01:01:04 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id CAA25770; Sun, 3 Nov 1996 02:00:45 -0700 Message-Id: <199611030900.CAA25770@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: dg@Root.COM cc: hackers@freefall.freebsd.org, smp@freefall.freebsd.org, bde@zeta.org.au Subject: Re: ed0 timeouts In-reply-to: Your message of "Sun, 03 Nov 1996 00:43:51 PST." <199611030843.AAA23866@root.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Sun, 03 Nov 1996 02:00:44 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, > Yes, you can get another interrupt while servicing one. The driver loops >until all interrupts are serviced, but there would be a window between when it >thinks there are no more interrupts to service and returning to vector.s to >unmask the interrupts. This window will exist in all ISA drivers. bummer... Intel says: It is strongly recommended that first 82489 (ie APIC) should be unmasked and then the device interrupt should be enabled. By this sequence software can ensure that always an edge will occur at the APIC input only after the interrupt is unmasked. -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Sun Nov 3 01:54:06 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id BAA11406 for smp-outgoing; Sun, 3 Nov 1996 01:54:06 -0800 (PST) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id BAA11395; Sun, 3 Nov 1996 01:53:53 -0800 (PST) Received: (from bde@localhost) by godzilla.zeta.org.au (8.7.6/8.6.9) id UAA28658; Sun, 3 Nov 1996 20:47:03 +1100 Date: Sun, 3 Nov 1996 20:47:03 +1100 From: Bruce Evans Message-Id: <199611030947.UAA28658@godzilla.zeta.org.au> To: dg@Root.COM, smp@csn.net Subject: Re: ed0 timeouts Cc: bde@zeta.org.au, hackers@freefall.freebsd.org, smp@freefall.freebsd.org Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk >bummer... > >Intel says: > >It is strongly recommended that first 82489 (ie APIC) should be unmasked >and then the device interrupt should be enabled. By this sequence software >can ensure that always an edge will occur at the APIC input only after >the interrupt is unmasked. My version of -current does lazy 8259-masking so that the 8259 doesn't have to be masked unless the device interrupt repeats. It would probably work to never mask it for edge triggered interrupts, but I'm worried about noise, and level sensitive interrupts need to be handled somehow. Is the APIC also braindamaged for interrupts masked at the CPU level? Bruce Warning: these diffs contain unrelated things (mostly undefined macros) that won't compile. diff -c2 icu.s~ icu.s *** icu.s~ Thu Oct 31 22:48:25 1996 --- icu.s Thu Oct 31 22:48:27 1996 *************** *** 106,109 **** --- 106,110 ---- jne doreti_unpend doreti_exit: + CPL_CHANGE_3(%eax) movl %eax,_cpl decb _intr_nesting_level *************** *** 154,157 **** --- 155,159 ---- jae doreti_swi cli + CPL_CHANGE_3(%eax) movl %eax,_cpl MEXITCOUNT *************** *** 171,175 **** --- 173,179 ---- */ orl imasks(,%ecx,4),%eax + CPL_CHANGE_4(%eax) movl %eax,_cpl + CPL_CHANGE_4_DONE call %edx popl %eax *************** *** 256,263 **** --- 260,271 ---- pushl %eax orl imasks(,%ecx,4),%eax + CPL_CHANGE_4(%eax) movl %eax,_cpl + CPL_CHANGE_4_DONE call %edx popl %eax + CPL_CHANGE_4(%eax) movl %eax,_cpl + CPL_CHANGE_4_DONE jmp splz_next *************** *** 276,279 **** --- 284,291 ---- pushl %eax cli + #define irq_num 0 + andb $~IRQ_BIT(irq_num),iactive + IRQ_BYTE(irq_num) + incl inotactive_counts + (irq_num) * 4 + #undef irq_num MEXITCOUNT jmp _Xintr0 /* XXX might need _Xfastintr0 */ *************** *** 287,290 **** --- 299,306 ---- pushl %eax cli + #define irq_num 8 + andb $~IRQ_BIT(irq_num),iactive + IRQ_BYTE(irq_num) + incl inotactive_counts + (irq_num) * 4 + #undef irq_num MEXITCOUNT jmp _Xintr8 /* XXX might need _Xfastintr8 */ *************** *** 294,299 **** --- 310,327 ---- ALIGN_TEXT ; \ __CONCAT(vec,irq_num): ; \ + popl %eax ; \ + pushfl ; \ + pushl $KCSEL ; \ + pushl %eax ; \ + cli ; \ + andb $~IRQ_BIT(irq_num),iactive + IRQ_BYTE(irq_num) ; \ + incl inotactive_counts + (irq_num) * 4 ; \ + MEXITCOUNT ; \ + jmp __CONCAT(_Xintr,irq_num) + + #if 0 int $ICU_OFFSET + (irq_num) ; \ ret + #endif BUILD_VEC(1) diff -c2 vector.s~ vector.s *** vector.s~ Thu Oct 31 22:44:16 1996 --- vector.s Thu Oct 31 22:45:20 1996 *************** *** 128,131 **** --- 128,132 ---- pushl _intr_unit + (irq_num) * 4 ; \ call *_intr_handler + (irq_num) * 4 ; /* do the work ASAP */ \ + INTR_ARG_ADJUST ; \ enable_icus ; /* (re)enable ASAP (helps edge trigger?) */ \ addl $4,%esp ; \ *************** *** 136,140 **** notl %eax ; \ andl _ipending,%eax ; \ ! jne 1f ; /* yes, handle them */ \ MEXITCOUNT ; \ MAYBE_POPL_ES ; \ --- 137,142 ---- notl %eax ; \ andl _ipending,%eax ; \ ! jne 3f ; /* yes, maybe handle them */ \ ! 2: ; \ MEXITCOUNT ; \ MAYBE_POPL_ES ; \ *************** *** 145,152 **** --- 147,162 ---- iret ; \ ; \ + 3: ; \ + cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \ + jb 1f ; /* yes, handle unmasked interrupts */ \ + jmp 2b ; /* no, return */ \ + ; \ ALIGN_TEXT ; \ 1: ; \ + CPL_CHANGE($HWI_MASK|SWI_MASK) ; \ movl _cpl,%eax ; \ + /* XXX next line is probably unnecessary now. */ \ movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \ + incb _intr_nesting_level ; /* ... really limit it ... */ \ sti ; /* ... to do this as early as possible */ \ MAYBE_POPL_ES ; /* discard most of thin frame ... */ \ *************** *** 164,168 **** pushl %eax ; \ subl $4,%esp ; /* junk for unit number */ \ - incb _intr_nesting_level ; \ MEXITCOUNT ; \ jmp _doreti --- 174,177 ---- *************** *** 180,189 **** movl %ax,%ds ; /* ... early for obsolete reasons */ \ movl %ax,%es ; \ movb _imen + IRQ_BYTE(irq_num),%al ; \ orb $IRQ_BIT(irq_num),%al ; \ movb %al,_imen + IRQ_BYTE(irq_num) ; \ outb %al,$icu+ICU_IMR_OFFSET ; \ enable_icus ; \ - incl _cnt+V_INTR ; /* tally interrupts */ \ movl _cpl,%eax ; \ testb $IRQ_BIT(irq_num),%reg ; \ --- 189,215 ---- movl %ax,%ds ; /* ... early for obsolete reasons */ \ movl %ax,%es ; \ + movb iactive + IRQ_BYTE(irq_num),%al ; \ + testb $IRQ_BIT(irq_num),%al ; \ + je 1f ; \ + /* XXX skip mcounting here to avoid double count */ \ movb _imen + IRQ_BYTE(irq_num),%al ; \ orb $IRQ_BIT(irq_num),%al ; \ movb %al,_imen + IRQ_BYTE(irq_num) ; \ outb %al,$icu+ICU_IMR_OFFSET ; \ + incl imen_counts + (irq_num) * 4 ; \ + enable_icus ; \ + orb $IRQ_BIT(irq_num),_ipending + IRQ_BYTE(irq_num) ; \ + popl %es ; \ + popl %ds ; \ + popal ; \ + addl $4+4,%esp ; \ + iret ; \ + ; \ + ALIGN_TEXT ; \ + 1: ; \ + orb $IRQ_BIT(irq_num),%al ; \ + movb %al,iactive + IRQ_BYTE(irq_num) ; \ + incl iactive_counts + (irq_num) * 4 ; \ enable_icus ; \ movl _cpl,%eax ; \ testb $IRQ_BIT(irq_num),%reg ; \ *************** *** 192,195 **** --- 218,222 ---- __CONCAT(Xresume,irq_num): ; \ FAKE_MCOUNT(12*4(%esp)) ; /* XXX late to avoid double count */ \ + incl _cnt+V_INTR ; /* tally interrupts */ \ movl _intr_countp + (irq_num) * 4,%eax ; \ incl (%eax) ; \ *************** *** 198,209 **** pushl _intr_unit + (irq_num) * 4 ; \ orl _intr_mask + (irq_num) * 4,%eax ; \ movl %eax,_cpl ; \ sti ; \ call *_intr_handler + (irq_num) * 4 ; \ ! cli ; /* must unmask _imen and icu atomically */ \ movb _imen + IRQ_BYTE(irq_num),%al ; \ andb $~IRQ_BIT(irq_num),%al ; \ movb %al,_imen + IRQ_BYTE(irq_num) ; \ outb %al,$icu+ICU_IMR_OFFSET ; \ sti ; /* XXX _doreti repeats the cli/sti */ \ MEXITCOUNT ; \ --- 225,244 ---- pushl _intr_unit + (irq_num) * 4 ; \ orl _intr_mask + (irq_num) * 4,%eax ; \ + CPL_CHANGE_1(%eax, irq_num) ; \ movl %eax,_cpl ; \ sti ; \ call *_intr_handler + (irq_num) * 4 ; \ ! INTR_ARG_ADJUST ; \ ! cli ; /* unmask iactive, _imen and icu atomically */ \ ! andb $~IRQ_BIT(irq_num),iactive + IRQ_BYTE(irq_num) ; \ ! incl inotactive_counts + (irq_num) * 4 ; \ movb _imen + IRQ_BYTE(irq_num),%al ; \ + testb $IRQ_BIT(irq_num),%al ; \ + je 3f ; \ andb $~IRQ_BIT(irq_num),%al ; \ movb %al,_imen + IRQ_BYTE(irq_num) ; \ outb %al,$icu+ICU_IMR_OFFSET ; \ + incl inotmen_counts + (irq_num) * 4 ; \ + 3: ; \ sti ; /* XXX _doreti repeats the cli/sti */ \ MEXITCOUNT ; \ *************** *** 258,261 **** --- 293,306 ---- .data + iactive: + .long 0 + iactive_counts: + .space NHWI*4 + inotactive_counts: + .space NHWI*4 + imen_counts: + .space NHWI*4 + inotmen_counts: + .space NHWI*4 ihandlers: /* addresses of interrupt handlers */ /* actually resumption addresses for HWI's */ From owner-freebsd-smp Sun Nov 3 13:08:04 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id NAA23156 for smp-outgoing; Sun, 3 Nov 1996 13:08:04 -0800 (PST) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.211]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id NAA23116; Sun, 3 Nov 1996 13:07:59 -0800 (PST) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id OAA03152; Sun, 3 Nov 1996 14:00:34 -0700 From: Terry Lambert Message-Id: <199611032100.OAA03152@phaeton.artisoft.com> Subject: Re: ed0 timeouts To: smp@csn.net (Steve Passe) Date: Sun, 3 Nov 1996 14:00:34 -0700 (MST) Cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org, bde@zeta.org.au In-Reply-To: <199611030900.CAA25770@clem.systemsix.com> from "Steve Passe" at Nov 3, 96 02:00:44 am X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk > > Yes, you can get another interrupt while servicing one. The driver loops > >until all interrupts are serviced, but there would be a window between when it > >thinks there are no more interrupts to service and returning to vector.s to > >unmask the interrupts. This window will exist in all ISA drivers. > > bummer... > > Intel says: > > It is strongly recommended that first 82489 (ie APIC) should be unmasked > and then the device interrupt should be enabled. By this sequence software > can ensure that always an edge will occur at the APIC input only after > the interrupt is unmasked. Or: "Don't ack the thing until fater it's unmasked". Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers. From owner-freebsd-smp Sun Nov 3 13:21:12 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id NAA26088 for smp-outgoing; Sun, 3 Nov 1996 13:21:12 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id NAA25819; Sun, 3 Nov 1996 13:17:43 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id OAA29180; Sun, 3 Nov 1996 14:15:59 -0700 Message-Id: <199611032115.OAA29180@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: Terry Lambert cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org, bde@zeta.org.au Subject: Re: ed0 timeouts In-reply-to: Your message of "Sun, 03 Nov 1996 14:00:34 MST." <199611032100.OAA03152@phaeton.artisoft.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Sun, 03 Nov 1996 14:15:59 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk > > > Yes, you can get another interrupt while servicing one. The driver loops > > >until all interrupts are serviced, but there would be a window between when it > > >thinks there are no more interrupts to service and returning to vector.s to > > >unmask the interrupts. This window will exist in all ISA drivers. > > > > bummer... > > > > Intel says: > > > > It is strongly recommended that first 82489 (ie APIC) should be unmasked > > and then the device interrupt should be enabled. By this sequence software > > can ensure that always an edge will occur at the APIC input only after > > the interrupt is unmasked. > > Or: "Don't ack the thing until fater it's unmasked". Huh? forgive me, not enough sleep... Is this sarcasm or a suggestion that is going over my head? -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Sun Nov 3 13:35:53 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id NAA27564 for smp-outgoing; Sun, 3 Nov 1996 13:35:53 -0800 (PST) Received: from phaeton.artisoft.com (phaeton.Artisoft.COM [198.17.250.211]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id NAA27556; Sun, 3 Nov 1996 13:35:47 -0800 (PST) Received: (from terry@localhost) by phaeton.artisoft.com (8.6.11/8.6.9) id OAA03249; Sun, 3 Nov 1996 14:28:30 -0700 From: Terry Lambert Message-Id: <199611032128.OAA03249@phaeton.artisoft.com> Subject: Re: ed0 timeouts To: smp@csn.net (Steve Passe) Date: Sun, 3 Nov 1996 14:28:30 -0700 (MST) Cc: terry@lambert.org, dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org, bde@zeta.org.au In-Reply-To: <199611032115.OAA29180@clem.systemsix.com> from "Steve Passe" at Nov 3, 96 02:15:59 pm X-Mailer: ELM [version 2.4 PL24] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk > > > It is strongly recommended that first 82489 (ie APIC) should be unmasked > > > and then the device interrupt should be enabled. By this sequence software > > > can ensure that always an edge will occur at the APIC input only after > > > the interrupt is unmasked. > > > > Or: "Don't ack the thing until fater it's unmasked". > > Huh? forgive me, not enough sleep... Is this sarcasm or a suggestion that > is going over my head? I think if you don't ack it, it will not allow another one in. This sort of implies you don't mask the way we currently mask, and it also implies a big latency (which I don't like at all) in taking the interrupt. Then you "manually" ack. I don't know what NT does, but SVR4 ES/MP used a two level interrupt handling mechanism, where the interrupt and all state from the hardware was saved off and queued for processing later. This let them weenie out on acking, but didn't add full processing overhead to the thing. Ie: if I get an int from a card that needs something read off it, it's read off immediately into a driver buffer, then acked, then queued for processing. Have you looked at the Windows 95 interrupt processing code? It's very similar. In some cases (bus master DMA hardware), there's a big concurrency win allowing interrupts from devices before the data from the previous interrupt is actually processed. I suspect the 95 and NT processing is similar (I haven't dived into WinICE on NT yet -- probably within the next month, though). Win95 can't allocate memeory at interrupt time, so the buffer allocation has to come from a free list, or from the ack routine (which is technically not run at interrupt level. I think there would be a big code impact on BSD to adopt this type of processing, but it might be worth it to work around your problem in the long run. From what David said, it looks like this is a generic ISA problem; I'd be surprised if it hasn't bit people without APIC's. I think the patch Bruce posted is a move in this direction (or at least that's what it looked like to me). Regards, Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers. From owner-freebsd-smp Sun Nov 3 14:12:46 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id OAA02432 for smp-outgoing; Sun, 3 Nov 1996 14:12:46 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id OAA02276; Sun, 3 Nov 1996 14:12:13 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id PAA29444; Sun, 3 Nov 1996 15:10:34 -0700 Message-Id: <199611032210.PAA29444@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: Terry Lambert cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org, bde@zeta.org.au Subject: Re: ed0 timeouts In-reply-to: Your message of "Sun, 03 Nov 1996 14:28:30 MST." <199611032128.OAA03249@phaeton.artisoft.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Sun, 03 Nov 1996 15:10:33 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, >> Huh? forgive me, not enough sleep... Is this sarcasm or a suggestion that >> is going over my head? > > I think if you don't ack it, it will not allow another one in. ^^^ are you refering to the EOI sequence? it is complicated by the fact that you mask an INT in the IO APIC, but you send the EOI only to the local APIC, where the IRR & ISR bits are kept. So delaying the EOI will prevent it from getting to this CPU, but another CPU could then grab it, which is what we DON'T want. ( the "focus processor" feature might be a way around this problem ). >in the long run. From what David said, it looks like this is a >generic ISA problem; I'd be surprised if it hasn't bit people without >APIC's. the big difference is that the 8259 latches INTs when masked, the APIC ignores them. >I think the patch Bruce posted is a move in this direction (or at least >that's what it looked like to me). me too, but I need to apply the patch and look at it as a complete work, it touches on areas that have already changed to accommidate the APIC. there are also (undefined) macros in there that hide details (Bruce: hint, hint). -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Sun Nov 3 14:49:47 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id OAA05841 for smp-outgoing; Sun, 3 Nov 1996 14:49:47 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id OAA05806 for ; Sun, 3 Nov 1996 14:49:25 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id PAA29659 for ; Sun, 3 Nov 1996 15:48:21 -0700 Message-Id: <199611032248.PAA29659@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: smp@freefall.freebsd.org Subject: Re: APIC testers Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Sun, 03 Nov 1996 15:48:20 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, Janick TAILLANDIER has kindly been helping test the APIC IO code on a Dell Optiplex GXPro. unfortunately it doesn't work. I think I understand the problems (found 2). The first is that they share INTs from both PIC busses, recording the ones from PCI bus0 first, then PCI bus1. This causes my code to "forget" the bus0 values. This won't be too hard to deal with... The second problem is tougher. The MP spec allows the system clock to be left unattached from the APIC, which DELL chose to do. The spec then calls for "mixed-mode" programming where the 8259 is cascaded to the APIC, all INTs on the 8259 EXCEPT the clock are masked, and special programming of the APIC is done to make it all work. This may or may not require ALOT of reprogramming of the kernel INT code, I need to think it over. Will 8259 EOIs need to be sent for clock INTs? or is it a simple as doing the initial setup of the IO APIC and then forgetting it? What else does this break? -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Sun Nov 3 20:12:23 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id UAA07868 for smp-outgoing; Sun, 3 Nov 1996 20:12:23 -0800 (PST) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id UAA07857; Sun, 3 Nov 1996 20:12:16 -0800 (PST) Received: (from bde@localhost) by godzilla.zeta.org.au (8.7.6/8.6.9) id PAA22707; Mon, 4 Nov 1996 15:10:48 +1100 Date: Mon, 4 Nov 1996 15:10:48 +1100 From: Bruce Evans Message-Id: <199611040410.PAA22707@godzilla.zeta.org.au> To: smp@csn.net, terry@lambert.org Subject: Re: ed0 timeouts Cc: bde@zeta.org.au, dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk >me too, but I need to apply the patch and look at it as a complete work, it >touches on areas that have already changed to accommidate the APIC. >there are also (undefined) macros in there that hide details (Bruce: hint, >hint). Define them as nothing or delete them. They have nothing to do with interrupt masking. Bruce From owner-freebsd-smp Mon Nov 4 14:29:58 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id OAA06753 for smp-outgoing; Mon, 4 Nov 1996 14:29:58 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id OAA06740; Mon, 4 Nov 1996 14:29:52 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id PAA06642; Mon, 4 Nov 1996 15:29:25 -0700 Message-Id: <199611042229.PAA06642@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: Bruce Evans cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org Subject: Re: ed0 timeouts In-reply-to: Your message of "Sun, 03 Nov 1996 20:47:03 +1100." <199611030947.UAA28658@godzilla.zeta.org.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Mon, 04 Nov 1996 15:29:25 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Bruce, >My version of -current does lazy 8259-masking so that the 8259 doesn't >have to be masked unless the device interrupt repeats. I added these changes to the SMP kernel (#define APIC_LAZY in smptests.h, should be commited later today) and it seems to fix the problem! However system IO seemed to get hosed when I entered ddb to check the values of a few checkpoints I keep for debug. I went in/out of ddb several times (I think) but then going out the system "semi-hung": I could not get back to my virtual term, nor could I loggin anywhere else. I could ping the system so at least part of it lived... Have you ever seen similar problems with this code on your system? -- > It would probably >work to never mask it for edge triggered interrupts, but I'm worried >about noise, and level sensitive interrupts need to be handled somehow. I suspect I have only "greatly diminished" the occurrancees of INT loss, NOT completely eliminated them, since you mask on the 2nd hit. I would think a "properly" designed card would not be prone to noise. I could make 2 versions of the INTR macro (edge & level), and plug the appropriate one in as necessary in the XintXXX table. Opinions, anyone? -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Mon Nov 4 15:33:05 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id PAA12455 for smp-outgoing; Mon, 4 Nov 1996 15:33:05 -0800 (PST) Received: (from fsmp@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id PAA12448 for freebsd-smp; Mon, 4 Nov 1996 15:33:03 -0800 (PST) Date: Mon, 4 Nov 1996 15:33:03 -0800 (PST) From: Steve Passe Message-Id: <199611042333.PAA12448@freefall.freebsd.org> To: freebsd-smp Subject: cvs commit: sys/i386/i386 mp_machdep.c mpapic.c pmap.c sys/i386/include smptests.h sys/i386/isa icu.s if_ed.c vector.s Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk fsmp 96/11/04 15:33:02 Modified: i386/i386 mp_machdep.c mpapic.c pmap.c i386/include smptests.h i386/isa icu.s if_ed.c vector.s Log: Attempt to fix "missing" INTerrupt problem. appers to work, OFF by default, enable via smptests.h: #define APIC_LAZY use with caution, little testing, one hang so far. Submitted by: Bruce Evans also some minor cleanup. Revision Changes Path 1.12 +15 -1 sys/i386/i386/mp_machdep.c 1.13 +14 -1 sys/i386/i386/mpapic.c 1.26 +10 -4 sys/i386/i386/pmap.c 1.2 +34 -1 sys/i386/include/smptests.h 1.14 +43 -2 sys/i386/isa/icu.s 1.2 +860 -247 sys/i386/isa/if_ed.c 1.18 +185 -7 sys/i386/isa/vector.s From owner-freebsd-smp Mon Nov 4 17:05:20 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id RAA18395 for smp-outgoing; Mon, 4 Nov 1996 17:05:20 -0800 (PST) Received: (from fsmp@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id RAA18388 for freebsd-smp; Mon, 4 Nov 1996 17:05:18 -0800 (PST) Date: Mon, 4 Nov 1996 17:05:18 -0800 (PST) From: Steve Passe Message-Id: <199611050105.RAA18388@freefall.freebsd.org> To: freebsd-smp Subject: cvs commit: sys/i386/isa vector.s Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk fsmp 96/11/04 17:05:17 Modified: i386/isa vector.s Log: oops, conflicting define in last commit. Revision Changes Path 1.19 +3 -3 sys/i386/isa/vector.s From owner-freebsd-smp Mon Nov 4 21:18:45 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id VAA04552 for smp-outgoing; Mon, 4 Nov 1996 21:18:45 -0800 (PST) Received: from godzilla.zeta.org.au (godzilla.zeta.org.au [203.2.228.19]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id VAA04541; Mon, 4 Nov 1996 21:18:35 -0800 (PST) Received: (from bde@localhost) by godzilla.zeta.org.au (8.7.6/8.6.9) id PAA10694; Tue, 5 Nov 1996 15:56:31 +1100 Date: Tue, 5 Nov 1996 15:56:31 +1100 From: Bruce Evans Message-Id: <199611050456.PAA10694@godzilla.zeta.org.au> To: bde@zeta.org.au, smp@csn.net Subject: Re: ed0 timeouts Cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk >I added these changes to the SMP kernel (#define APIC_LAZY in smptests.h, >should be commited later today) and it seems to fix the problem! > >However system IO seemed to get hosed when I entered ddb to check >the values of a few checkpoints I keep for debug. >I went in/out of ddb several times (I think) but then going out the system >"semi-hung": I could not get back to my virtual term, nor could I loggin >anywhere else. I could ping the system so at least part of it lived... > >Have you ever seen similar problems with this code on your system? ISTR remember that the non-masking of interrupts in ddb became critical when I implemented lazy masking. It was at least difficult to debug. >I would think a "properly" designed card would not be prone to noise. >I could make 2 versions of the INTR macro (edge & level), and plug the >appropriate one in as necessary in the XintXXX table. It would be good to generate more-specialized versions of the interrupt handlers, without generation more versions :-). (I spent a lot of time debugging a syscall performance bug that turned out to be that _Xsyscall was almost an exact multiple of PAGE_SIZE away from _syscall. This caused lots of cache collisions. The Pentium I-cache is only 2-way interleaved, so the next code access to another axact multiple of PAGE_SIZE away busts the cache. It was noticeably (40% slowdown) busted even on a 486DX/2. I fixed this by reordering the object files, but then the bloated interrupt code happened to push `doreti' to almost an exact multiple of PAGE_SIZE away from _Xsyscall :-].) Bruce This keeps interrupts disabled in debuggers. Its main disadvantage is that the clock no longer ever works while you're sitting at the debugger prompt. Previously the clock (and other interrupts) worked iff they happened not to be masked. TODO: The clock (and perhaps other devices) should be adjusted when the debugger gives up control. The debugger should not (except optionally) permit interrupts while single stepping. diff -c2 exception.s~ exception.s *** exception.s~ Mon Aug 12 09:36:45 1996 --- exception.s Mon Oct 28 20:55:30 1996 *************** *** 59,66 **** #define TRAP(a) pushl $(a) ; jmp _alltraps - /* - * XXX - debugger traps are now interrupt gates so at least bdb doesn't lose - * control. The sti's give the standard losing behaviour for ddb and kgdb. - */ #ifdef BDE_DEBUGGER #define BDBTRAP(name) \ --- 116,119 ---- *************** *** 79,84 **** #endif - #define BPTTRAP(a) testl $PSL_I,4+8(%esp) ; je 1f ; sti ; 1: ; TRAP(a) - MCOUNT_LABEL(user) MCOUNT_LABEL(btrap) --- 132,135 ---- *************** *** 88,97 **** IDTVEC(dbg) BDBTRAP(dbg) ! pushl $0; BPTTRAP(T_TRCTRAP) IDTVEC(nmi) pushl $0; TRAP(T_NMI) IDTVEC(bpt) BDBTRAP(bpt) ! pushl $0; BPTTRAP(T_BPTFLT) IDTVEC(ofl) pushl $0; TRAP(T_OFLOW) --- 139,148 ---- IDTVEC(dbg) BDBTRAP(dbg) ! pushl $0; TRAP(T_TRCTRAP) IDTVEC(nmi) pushl $0; TRAP(T_NMI) IDTVEC(bpt) BDBTRAP(bpt) ! pushl $0; TRAP(T_BPTFLT) IDTVEC(ofl) pushl $0; TRAP(T_OFLOW) diff -c2 machdep.c~ machdep.c *** machdep.c~ Thu Oct 31 22:03:44 1996 --- machdep.c Sat Nov 2 12:52:14 1996 *************** *** 1041,1047 **** setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); ! setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); ! setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); --- 1063,1069 ---- setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); ! setidt(1, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); ! setidt(3, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL)); setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); From owner-freebsd-smp Tue Nov 5 00:08:26 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id AAA14906 for smp-outgoing; Tue, 5 Nov 1996 00:08:26 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id AAA14899; Tue, 5 Nov 1996 00:08:22 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id BAA09221; Tue, 5 Nov 1996 01:08:02 -0700 Message-Id: <199611050808.BAA09221@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: Bruce Evans cc: dg@Root.COM, hackers@freefall.freebsd.org, smp@freefall.freebsd.org Subject: Re: ed0 timeouts In-reply-to: Your message of "Tue, 05 Nov 1996 15:56:31 +1100." <199611050456.PAA10694@godzilla.zeta.org.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Tue, 05 Nov 1996 01:08:02 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, >>However system IO seemed to get hosed when I entered ddb to check >>the values of a few checkpoints I keep for debug. >>I went in/out of ddb several times (I think) but then going out the system >>"semi-hung": I could not get back to my virtual term, nor could I loggin >>anywhere else. I could ping the system so at least part of it lived... >> >>Have you ever seen similar problems with this code on your system? > >ISTR remember that the non-masking of interrupts in ddb became critical >when I implemented lazy masking. It was at least difficult to debug. I just had the same hang without entering ddb. I was running emacs via an X session on another system, with light load on the system. Looked like it might be something unique to the SMP kernel, appeared to be stuck in get_mplock(). Hopefully next time it happens I will be able to spend some time in the debugger to find more clues... In general it appears to be working well, I was up for 3-4 hours b4 this occured without a single lost INT (that I noticed, anyways!) -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK----- From owner-freebsd-smp Tue Nov 5 18:38:30 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id SAA10044 for smp-outgoing; Tue, 5 Nov 1996 18:38:30 -0800 (PST) Received: (from fsmp@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id SAA10037 for freebsd-smp; Tue, 5 Nov 1996 18:38:28 -0800 (PST) Date: Tue, 5 Nov 1996 18:38:28 -0800 (PST) From: Steve Passe Message-Id: <199611060238.SAA10037@freefall.freebsd.org> To: freebsd-smp Subject: cvs commit: sys/i386/conf options.i386 sys/i386/i386 mp_machdep.c mpapic.c sys/i386/include mpapic.h smp.h Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk fsmp 96/11/05 18:38:28 Modified: i386/conf options.i386 Log: added opt_smp.h options NCPU, NBUS, NAPIC, NINTR Revision Changes Path 1.9 +5 -1 sys/i386/conf/options.i386 Modified: i386/i386 mp_machdep.c mpapic.c Log: use opt_smp.h options NCPU, NBUS, NAPIC, NINTR new MP parsing to allow multiple shared INTs on APIC pins. fixed several "default config" bugs. Revision Changes Path 1.13 +143 -106 sys/i386/i386/mp_machdep.c 1.14 +9 -3 sys/i386/i386/mpapic.c Modified: i386/include mpapic.h smp.h Log: defaults for options NCPU, NBUS, NAPIC, NINTR new MP parsing to allow multiple shared INTs on APIC pins. fixed several "default config" bugs. Revision Changes Path 1.4 +11 -6 sys/i386/include/mpapic.h 1.17 +5 -1 sys/i386/include/smp.h From owner-freebsd-smp Wed Nov 6 11:54:20 1996 Return-Path: owner-smp Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id LAA20684 for smp-outgoing; Wed, 6 Nov 1996 11:54:20 -0800 (PST) Received: from clem.systemsix.com (clem.systemsix.com [198.99.86.131]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id LAA20679 for ; Wed, 6 Nov 1996 11:54:14 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by clem.systemsix.com (8.6.12/8.6.12) with SMTP id MAA18772 for ; Wed, 6 Nov 1996 12:54:11 -0700 Message-Id: <199611061954.MAA18772@clem.systemsix.com> X-Authentication-Warning: clem.systemsix.com: Host localhost didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 From: Steve Passe To: freebsd-smp@freefall.freebsd.org Subject: sup no longer works Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 06 Nov 1996 12:54:11 -0700 Sender: owner-smp@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk Hi, You can no longer get the SMP sources via sup, it has been replaced by cvsup. see the "message of the day" on the SMP page for details on converting to this new protocal (you'll like it, thanx John!). -- Steve Passe | powered by smp@csn.net | FreeBSD