Date: Tue, 17 Sep 2002 21:15:47 +1000 From: Peter Grehan <grehan@freebsd.org> To: freebsd-firewire@freebsd.org Subject: test on FreeBSD/ppc Message-ID: <3D870EE3.1A07857C@freebsd.org>
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With some slight mods (attached), I dropped the base firewire code into a
PPC kernel and booted it on an eMac, with an iPod attached. Here's the
relevant lines from the boot log. I might look into this if I get some
more time: I suspect there are some endian issues.
...
fwohci0: <Lucent FW322/323> mem 0xf5000000-0xf500ffff irq 40 at device 14.0 on pci2
fwohci0: PCI bus latency was changing to 250.
cache_size 8.
fwohci0: OHCI version 1.0 (ROM=0)
fwohci0: resetting OHCI...done (0)
fwohci0: BUS_OPT 0xa082 -> 0xf800a082
fwohci0: Link 1394a available S400, 2 ports, maxrec 2048 bytes
fwohci0: Enable 1394a Enhancements
fwohci0: cannot read phy
fwohci0: cannot read phy
fwohci0: EUI64 00:03:93:ff:fe:a4:36:fe
fwochi_set_intr: 1
firewire0: <IEEE1394<Firewire> bus> on fwohci0
firewire0: firewire bus attach
firewire0: cannot read phy
...
firewire0: BUS reset
firewire0: node id = 0xc800ffc1, CYCLEMASTER mode
firewire0: 2 nodes, maxhop <= 1, Not found IRM capable nodefirewire0: BMR = 3f
...
start AT DMA status=0
firewire0: unrecoverable error
later,
Peter.
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Index: firewire.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/firewire/firewire.c,v
retrieving revision 1.1
diff -u -r1.1 firewire.c
--- firewire.c 2002/09/13 12:31:56 1.1
+++ firewire.c 2002/09/17 11:12:26
@@ -651,7 +651,7 @@
*/
fp = (struct fw_pkt *)(it->stproc->buf);
/* XXX: Parameter relies on NTSC type DV video */
- tmpsync = 3072 * 8000 * 100 / 2997;
+ tmpsync = (u_int64_t)3072 * 8000 * 100 / 2997;
tmpsync *= it->dvsync;
dvsync = tmpsync;
dvsync %= 0xc00;
Index: firewire.h
===================================================================
RCS file: /home/ncvs/src/sys/dev/firewire/firewire.h,v
retrieving revision 1.1
diff -u -r1.1 firewire.h
--- firewire.h 2002/09/13 12:31:56 1.1
+++ firewire.h 2002/09/17 11:12:27
@@ -402,6 +402,12 @@
u_int32_t dest_lo;
u_int16_t extcode;
u_int16_t len;
+#define FW_LREQ_MSKSWAP 1
+#define FW_LREQ_CMPSWAP 2
+#define FW_LREQ_FTADD 3
+#define FW_LREQ_LTADD 4
+#define FW_LREQ_BDADD 5
+#define FW_LREQ_WRADD 6
u_int32_t payload[0];
}lreq;
struct {
Index: fwohci_pci.c
===================================================================
RCS file: /home/ncvs/src/sys/dev/firewire/fwohci_pci.c,v
retrieving revision 1.1
diff -u -r1.1 fwohci_pci.c
--- fwohci_pci.c 2002/09/13 12:31:56 1.1
+++ fwohci_pci.c 2002/09/17 11:12:27
@@ -105,10 +105,27 @@
device_set_desc(dev, "Ricoh R5C552");
return 0;
}
+ if ((pci_get_vendor(dev) == FW_VENDORID_APPLE) &&
+ (pci_get_device(dev) == FW_DEVICE_PANGEA)) {
+ device_set_desc(dev, "Apple Pangea");
+ return 0;
+ }
+ if ((pci_get_vendor(dev) == FW_VENDORID_APPLE) &&
+ (pci_get_device(dev) == FW_DEVICE_UNINORTH)) {
+ device_set_desc(dev, "Apple UniNorth");
+ return 0;
+ }
+ if ((pci_get_vendor(dev) == FW_VENDORID_LUCENT) &&
+ (pci_get_device(dev) == FW_DEVICE_FW322)) {
+ device_set_desc(dev, "Lucent FW322/323");
+ return 0;
+ }
#endif
if (pci_get_class(dev) == PCIC_SERIALBUS
&& pci_get_subclass(dev) == PCIS_SERIALBUS_FW
&& pci_get_progif(dev) == PCI_INTERFACE_OHCI) {
+ printf("XXXfw: vendid=%x, dev=%x\n", pci_get_vendor(dev),
+ pci_get_device(dev));
device_set_desc(dev, "1394 Open Host Controller Interface");
return 0;
}
Index: fwohcireg.h
===================================================================
RCS file: /home/ncvs/src/sys/dev/firewire/fwohcireg.h,v
retrieving revision 1.1
diff -u -r1.1 fwohcireg.h
--- fwohcireg.h 2002/09/13 12:31:56 1.1
+++ fwohcireg.h 2002/09/17 11:12:28
@@ -40,6 +40,8 @@
#define FW_VENDORID_SONY 0x104d
#define FW_VENDORID_VIA 0x1106
#define FW_VENDORID_RICOH 0x1180
+#define FW_VENDORID_APPLE 0x106b
+#define FW_VENDORID_LUCENT 0x11c1
#define FW_DEVICE_UPD861 0x0063
#define FW_DEVICE_TITSB22 0x8009
@@ -49,6 +51,9 @@
#define FW_DEVICE_CX3022 0x8039
#define FW_DEVICE_VT6306 0x3044
#define FW_DEVICE_R5C552 0x1180
+#define FW_DEVICE_PANGEA 0x0030
+#define FW_DEVICE_UNINORTH 0x0031
+#define FW_DEVICE_FW322 0x5811
#define PCI_INTERFACE_OHCI 0x10
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