Date: Sun, 23 Mar 2003 13:45:55 -0800 (PST) From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 27263 for review Message-ID: <200303232145.h2NLjtTd057398@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=27263 Change 27263 by marcel@marcel_nfs on 2003/03/23 13:44:53 Round one: if it aint broken, break it. This round redefines all context related structures in terms of the register sets. It includes trapframe, pcb, mcontext, sigframe, ptrace registers and so on. The immediate consequence is that any piece of code that accesses these structures has to be rewritten. Rewriting varies from a simple substitution to a wholesale overhaul. Some pieces have been modified to the extend that compilation is possible. Other pieces have been removed from the compilation by removing functionality (such as DDB). A new file has been added (context.s) that has functions to save and restore register sets (not quite complete). The intend is to call these functions whenever a register set has to be saved or restored. This approach will very likely not yield the most optimal code in some cases, but will improve maintainability in all cases. Maybe in 5 or 10 years we have stabilized enough that we can micro- optimize each individual case, avoid the call overhead and squeeze all the ILP we can get out of it. Future enhancements to these functions will include cycle count collection and frequency statistics to allow us to tune the algorithms and inject lfetch instructions (and shit :-) This branch can only compile SKI now. The kernel will crash and burn as soon as we start to create new threads though. From this moment on it's fixing and rewiting the code to work with the new register sets and to deal with the fact that we may have to use unwinding to construct register sets that are not being saved... With GDB compilable, we can now also work on getting the ptrace interface in shape. Affected files ... .. //depot/projects/ia64_epc/sys/conf/files.ia64#4 edit .. //depot/projects/ia64_epc/sys/ia64/conf/SKI#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/context.s#1 add .. //depot/projects/ia64_epc/sys/ia64/ia64/db_interface.c#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/elf_machdep.c#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#4 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/genassym.c#4 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#4 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/swtch.s#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/syscall.s#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/trap.c#4 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/vm_machdep.c#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/_regset.h#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/cpu.h#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/db_machdep.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/pcb.h#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/reg.h#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/signal.h#3 edit .. //depot/projects/ia64_epc/sys/ia64/include/ucontext.h#3 edit Differences ... ==== //depot/projects/ia64_epc/sys/conf/files.ia64#4 (text+ko) ==== @@ -30,6 +30,7 @@ ia64/ia64/busdma_machdep.c standard ia64/ia64/clock.c standard ia64/ia64/clock_if.m standard +ia64/ia64/context.s standard ia64/ia64/critical.c standard ia64/ia64/db_disasm.c optional ddb ia64/ia64/db_interface.c optional ddb @@ -60,8 +61,8 @@ ia64/ia64/sys_machdep.c standard ia64/ia64/syscall.s standard ia64/ia64/trap.c standard -ia64/ia64/unaligned.c standard -ia64/ia64/unwind.c standard +#ia64/ia64/unaligned.c standard +#ia64/ia64/unwind.c standard ia64/ia64/vga_machdep.c optional vga ia64/ia64/vm_machdep.c standard ia64/isa/isa.c optional isa ==== //depot/projects/ia64_epc/sys/ia64/conf/SKI#2 (text+ko) ==== @@ -32,7 +32,6 @@ options COMPAT_43 #Compatible with BSD 4.3 [KEEP THIS!] options COMPAT_FREEBSD4 -options DDB options FFS #Berkeley Fast Filesystem options INET #InterNETworking options INET6 #IPv6 communications protocols ==== //depot/projects/ia64_epc/sys/ia64/ia64/db_interface.c#2 (text+ko) ==== @@ -76,23 +76,21 @@ struct db_variable db_regs[] = { /* Misc control/app registers */ -#define DB_MISC_REGS 15 /* make sure this is correct */ +#define DB_MISC_REGS 13 /* make sure this is correct */ {"pc", (db_expr_t*) 0, db_get_pc_reg}, - {"ip", (db_expr_t*) &ddb_regs.tf_cr_iip, FCN_NULL}, - {"psr", (db_expr_t*) &ddb_regs.tf_cr_ipsr, FCN_NULL}, - {"cr.isr", (db_expr_t*) &ddb_regs.tf_cr_isr, FCN_NULL}, - {"cr.ifa", (db_expr_t*) &ddb_regs.tf_cr_ifa, FCN_NULL}, - {"pr", (db_expr_t*) &ddb_regs.tf_pr, FCN_NULL}, - {"ar.rsc", (db_expr_t*) &ddb_regs.tf_ar_rsc, FCN_NULL}, - {"ar.pfs", (db_expr_t*) &ddb_regs.tf_ar_pfs, FCN_NULL}, - {"cr.ifs", (db_expr_t*) &ddb_regs.tf_cr_ifs, FCN_NULL}, - {"ar.bspstore", (db_expr_t*) &ddb_regs.tf_ar_bspstore, FCN_NULL}, - {"ar.rnat", (db_expr_t*) &ddb_regs.tf_ar_rnat, FCN_NULL}, - {"ndirty", (db_expr_t*) &ddb_regs.tf_ndirty, FCN_NULL}, - {"ar.unat", (db_expr_t*) &ddb_regs.tf_ar_unat, FCN_NULL}, - {"ar.ccv", (db_expr_t*) &ddb_regs.tf_ar_ccv, FCN_NULL}, - {"ar.fpsr", (db_expr_t*) &ddb_regs.tf_ar_fpsr, FCN_NULL}, + {"ip", (db_expr_t*) &ddb_regs.tf_special.ip, FCN_NULL}, + {"psr", (db_expr_t*) &ddb_regs.tf_special.psr, FCN_NULL}, + {"cr.isr", (db_expr_t*) &ddb_regs.tf_special.isr, FCN_NULL}, + {"cr.ifa", (db_expr_t*) &ddb_regs.tf_special.ifa, FCN_NULL}, + {"pr", (db_expr_t*) &ddb_regs.tf_special.pr, FCN_NULL}, + {"ar.rsc", (db_expr_t*) &ddb_regs.tf_special.rsc, FCN_NULL}, + {"ar.pfs", (db_expr_t*) &ddb_regs.tf_special.pfs, FCN_NULL}, + {"cr.ifs", (db_expr_t*) &ddb_regs.tf_special.ifs, FCN_NULL}, + {"ar.bspstore", (db_expr_t*) &ddb_regs.tf_special.bspstore, FCN_NULL}, + {"ar.rnat", (db_expr_t*) &ddb_regs.tf_special.rnat, FCN_NULL}, + {"ar.unat", (db_expr_t*) &ddb_regs.tf_special.nat, FCN_NULL}, + {"ar.fpsr", (db_expr_t*) &ddb_regs.tf_special.fpsr, FCN_NULL}, /* Branch registers */ {"rp", (db_expr_t*) &ddb_regs.tf_b[0], FCN_NULL}, ==== //depot/projects/ia64_epc/sys/ia64/ia64/elf_machdep.c#2 (text+ko) ==== @@ -262,8 +262,10 @@ if (ph->p_type == PT_IA_64_UNWIND) { vaddr = ph->p_vaddr + reloc; +#if 0 ia64_add_unwind_table((vm_offset_t)lf->address, vaddr, vaddr + ph->p_memsz); +#endif } ++ph; } @@ -275,6 +277,8 @@ elf_cpu_unload_file(linker_file_t lf) { +#if 0 ia64_delete_unwind_table((vm_offset_t)lf->address); +#endif return (0); } ==== //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#4 (text+ko) ==== @@ -793,7 +793,7 @@ { .mfi alloc r14=ar.pfs,0,0,1,0 // in case we call ast() nop 1 - add r3=TF_CR_IPSR+16,sp + add r3=TF_SPECIAL_PSR+16,sp ;; } { .mmi ==== //depot/projects/ia64_epc/sys/ia64/ia64/genassym.c#4 (text+ko) ==== @@ -93,6 +93,8 @@ ASSYM(PCB_CURRENT_PMAP, offsetof(struct pcb, pcb_current_pmap)); ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); +ASSYM(PCB_PRESERVED_NAT, offsetof(struct pcb, pcb_preserved.nat)); +ASSYM(PCB_SPECIAL_RP, offsetof(struct pcb, pcb_special.rp)); ASSYM(R_IA64_DIR64LSB, R_IA64_DIR64LSB); ASSYM(R_IA64_FPTR64LSB, R_IA64_FPTR64LSB); @@ -103,11 +105,19 @@ ASSYM(SIZEOF_TRAPFRAME, sizeof(struct trapframe)); ASSYM(TD_FLAGS, offsetof(struct thread, td_flags)); -ASSYM(TD_KSE, offsetof(struct thread, td_kse)); ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); ASSYM(TDF_ASTPENDING, TDF_ASTPENDING); ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED); +ASSYM(TF_SPECIAL_BSP, offsetof(struct trapframe, tf_special.bsp)); +ASSYM(TF_SPECIAL_PFS, offsetof(struct trapframe, tf_special.pfs)); +ASSYM(TF_SPECIAL_PSR, offsetof(struct trapframe, tf_special.psr)); + +ASSYM(UC_MCONTEXT_MC_SPECIAL_BSPSTORE, + offsetof(ucontext_t, uc_mcontext.mc_special.bspstore)); +ASSYM(UC_MCONTEXT_MC_SPECIAL_RNAT, + offsetof(ucontext_t, uc_mcontext.mc_special.rnat)); + ASSYM(VM_MAX_ADDRESS, VM_MAX_ADDRESS); ==== //depot/projects/ia64_epc/sys/ia64/ia64/locore.s#2 (text+ko) ==== @@ -120,7 +120,7 @@ ;; ld8 out0=[out0] ;; - add r16=PCB_RP,out0 // return to mi_startup_trampoline + add r16=PCB_SPECIAL_RP,out0 // return to mi_startup_trampoline movl r17=mi_startup_trampoline ;; st8 [r16]=r17 @@ -267,7 +267,7 @@ mov b6=r8 // transfer to a branch register cover ;; - add r8=UC_MCONTEXT_MC_AR_BSP,r16 // address or mc_ar_bsp + add r8=UC_MCONTEXT_MC_SPECIAL_BSPSTORE,r16 // address or mc_ar_bsp mov r9=ar.bsp // save ar.bsp ;; st8 [r8]=r9 @@ -275,7 +275,7 @@ (p1) br.cond.sptk.few 1f // branch if not switching flushrs // flush out to old bs mov ar.rsc=0 // switch off RSE - add r8=UC_MCONTEXT_MC_AR_RNAT,r16 // address of mc_ar_rnat + add r8=UC_MCONTEXT_MC_SPECIAL_RNAT,r16 // address of mc_ar_rnat ;; mov r9=ar.rnat // value of ar.rnat after flush mov ar.bspstore=r18 // point at new bs @@ -298,11 +298,11 @@ ;; (p1) br.cond.sptk.few 2f // note: p1 is preserved mov ar.rsc=0 - add r8=UC_MCONTEXT_MC_AR_RNAT,r4 // address of mc_ar_rnat + add r8=UC_MCONTEXT_MC_SPECIAL_RNAT,r4 // address of mc_ar_rnat ;; ld8 r9=[r8] ;; - add r8=UC_MCONTEXT_MC_AR_BSP,r4 // address of mc_ar_bsp + add r8=UC_MCONTEXT_MC_SPECIAL_BSPSTORE,r4 // address of mc_ar_bsp ;; ld8 r10=[r8] ;; ==== //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#4 (text+ko) ==== @@ -708,9 +708,9 @@ * XXX what is all this +/- 16 stuff? */ thread0.td_frame = (struct trapframe *)thread0.td_pcb - 1; - thread0.td_pcb->pcb_special.gr[_GR12] = + thread0.td_pcb->pcb_special.sp = (u_int64_t)thread0.td_frame - 16; - thread0.td_pcb->pcb_special.ar_bspstore = (u_int64_t)proc0kstack; + thread0.td_pcb->pcb_special.bspstore = (u_int64_t)proc0kstack; mutex_init(); @@ -804,7 +804,7 @@ PROC_LOCK_ASSERT(p, MA_OWNED); psp = p->p_sigacts; frame = td->td_frame; - sp = frame->tf_special.gr[_GR12]; + sp = frame->tf_special.sp; oonstack = sigonstack(sp); rndfsize = ((sizeof(sf) + 15) / 16) * 16; @@ -890,28 +890,28 @@ /* Set up the registers to return to sigcode. */ frame->tf_special.psr &= ~IA64_PSR_RI; frame->tf_special.ip = PS_STRINGS - (esigcode - sigcode); - frame->tf_special.gr[_GR1] = sig; + frame->tf_special.gp = sig; PROC_LOCK(p); if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { - frame->tf_scratch.gr[_GR15] = (u_int64_t)&(sfp->sf_si); + frame->tf_scratch.gr15 = (u_int64_t)&(sfp->sf_si); /* Fill in POSIX parts */ sf.sf_si.si_signo = sig; sf.sf_si.si_code = code; sf.sf_si.si_addr = (void*)frame->tf_special.ifa; } else - frame->tf_scratch.gr[_GR15] = code; + frame->tf_scratch.gr15 = code; - frame->tf_special.gr[_GR12] = (u_int64_t)sfp - 16; - frame->tf_scratch.gr[_GR14] = sig; - frame->tf_scratch.gr[_GR16] = (u_int64_t) &sfp->sf_uc; - frame->tf_scratch.gr[_GR17] = (u_int64_t)catcher; - frame->tf_scratch.gr[_GR18] = sbs; + frame->tf_special.sp = (u_int64_t)sfp - 16; + frame->tf_scratch.gr14 = sig; + frame->tf_scratch.gr16 = (u_int64_t) &sfp->sf_uc; + frame->tf_scratch.gr17 = (u_int64_t)catcher; + frame->tf_scratch.gr18 = sbs; #ifdef DEBUG if (sigdebug & SDB_FOLLOW) printf("sendsig(%d): pc %lx, catcher %lx\n", p->p_pid, - frame->tf_cr_iip, frame->tf_scratch.gr[_GR17]); + frame->tf_cr_iip, frame->tf_scratch.gr17); if ((sigdebug & SDB_KSTACK) && p->p_pid == sigpid) printf("sendsig(%d): sig %d returns\n", p->p_pid, sig); @@ -973,7 +973,7 @@ PROC_LOCK(p); #if defined(COMPAT_43) || defined(COMPAT_SUNOS) - if (sigonstack(frame->tf_special.gr[_GR12])) + if (sigonstack(frame->tf_special.sp)) p->p_sigstk.ss_flags |= SS_ONSTACK; else p->p_sigstk.ss_flags &= ~SS_ONSTACK; @@ -1053,7 +1053,7 @@ IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | IA64_PSR_CPL_USER; - frame->tf_special.gr[_GR12] = (stack & ~15) - 16; + frame->tf_special.sp = (stack & ~15) - 16; /* * Write values for out0, out1 and out2 to the user's backing @@ -1061,13 +1061,13 @@ * initial register frame. Assumes that (bspstore & 0x1f8) < * 0x1e0. */ - frame->tf_special.ar_bspstore = td->td_md.md_bspstore + 24; - suword((caddr_t)frame->tf_special.ar_bspstore - 24, stack); - suword((caddr_t)frame->tf_special.ar_bspstore - 16, ps_strings); - suword((caddr_t)frame->tf_special.ar_bspstore - 8, 0); + frame->tf_special.bspstore = td->td_md.md_bspstore + 24; + suword((caddr_t)frame->tf_special.bspstore - 24, stack); + suword((caddr_t)frame->tf_special.bspstore - 16, ps_strings); + suword((caddr_t)frame->tf_special.bspstore - 8, 0); - frame->tf_special.ar_rsc = 0xf; - frame->tf_special.ar_fpsr = IA64_FPSR_DEFAULT; + frame->tf_special.rsc = 0xf; + frame->tf_special.fpsr = IA64_FPSR_DEFAULT; td->td_md.md_flags &= ~MDP_FPUSED; ia64_fpstate_drop(td); @@ -1161,7 +1161,7 @@ /* XXX preserved */ ia64_fpstate_save(td, 0); - fpregs->fpr_highfp = pcb->pcb_highfp; + fpregs->fpr_high = pcb->pcb_high_fp; return (0); } @@ -1175,7 +1175,7 @@ /* XXX preserved */ ia64_fpstate_drop(td); - pcb->pcb_highfp = fpregs->fpr_highfp; + pcb->pcb_high_fp = fpregs->fpr_high; return (0); } @@ -1226,10 +1226,7 @@ ia64_fpstate_save(struct thread *td, int write) { if (td == PCPU_GET(fpcurthread)) { - /* - * Save the state in the pcb. - */ - savehighfp(&td->td_pcb->pcb_highfp); + _get_high_fp(&td->td_pcb->pcb_high_fp); if (write) { td->td_frame->tf_special.psr |= IA64_PSR_DFH; @@ -1264,13 +1261,13 @@ fptd = PCPU_GET(fpcurthread); if (fptd != NULL) { /* Dump the old fp state if its valid. */ - savehighfp(&fptd->td_pcb->pcb_highfp); + _get_high_fp(&fptd->td_pcb->pcb_high_fp); fptd->td_frame->tf_special.psr |= IA64_PSR_DFH; } /* Remember the new FP owner and reload its state. */ PCPU_SET(fpcurthread, td); - restorehighfp(&td->td_pcb->pcb_highfp); + _set_high_fp(&td->td_pcb->pcb_high_fp); td->td_frame->tf_special.psr &= ~IA64_PSR_DFH; td->td_md.md_flags |= MDP_FPUSED; ==== //depot/projects/ia64_epc/sys/ia64/ia64/swtch.s#2 (text+ko) ==== @@ -197,7 +197,7 @@ ENTRY(pcb_restore,0) mov ar.rsc=0 add r9=8,r8 - add r31=PCB_UNAT47,r8 + add r31=PCB_PRESERVED_NAT,r8 ;; ld8 r12=[r8],16 // sp ld8 r30=[r9],16 // ar.unat @@ -438,322 +438,6 @@ END(cpu_switch) /* - * savehighfp: Save f32-f127 - * - * Arguments: - * in0 array of struct ia64_fpreg - */ -ENTRY(savehighfp, 1) - - add r14=16,in0 - ;; - stf.spill [in0]=f32,32 - stf.spill [r14]=f33,32 - ;; - stf.spill [in0]=f34,32 - stf.spill [r14]=f35,32 - ;; - stf.spill [in0]=f36,32 - stf.spill [r14]=f37,32 - ;; - stf.spill [in0]=f38,32 - stf.spill [r14]=f39,32 - ;; - stf.spill [in0]=f40,32 - stf.spill [r14]=f41,32 - ;; - stf.spill [in0]=f42,32 - stf.spill [r14]=f43,32 - ;; - stf.spill [in0]=f44,32 - stf.spill [r14]=f45,32 - ;; - stf.spill [in0]=f46,32 - stf.spill [r14]=f47,32 - ;; - stf.spill [in0]=f48,32 - stf.spill [r14]=f49,32 - ;; - stf.spill [in0]=f50,32 - stf.spill [r14]=f51,32 - ;; - stf.spill [in0]=f52,32 - stf.spill [r14]=f53,32 - ;; - stf.spill [in0]=f54,32 - stf.spill [r14]=f55,32 - ;; - stf.spill [in0]=f56,32 - stf.spill [r14]=f57,32 - ;; - stf.spill [in0]=f58,32 - stf.spill [r14]=f59,32 - ;; - stf.spill [in0]=f60,32 - stf.spill [r14]=f61,32 - ;; - stf.spill [in0]=f62,32 - stf.spill [r14]=f63,32 - ;; - stf.spill [in0]=f64,32 - stf.spill [r14]=f65,32 - ;; - stf.spill [in0]=f66,32 - stf.spill [r14]=f67,32 - ;; - stf.spill [in0]=f68,32 - stf.spill [r14]=f69,32 - ;; - stf.spill [in0]=f70,32 - stf.spill [r14]=f71,32 - ;; - stf.spill [in0]=f72,32 - stf.spill [r14]=f73,32 - ;; - stf.spill [in0]=f74,32 - stf.spill [r14]=f75,32 - ;; - stf.spill [in0]=f76,32 - stf.spill [r14]=f77,32 - ;; - stf.spill [in0]=f78,32 - stf.spill [r14]=f79,32 - ;; - stf.spill [in0]=f80,32 - stf.spill [r14]=f81,32 - ;; - stf.spill [in0]=f82,32 - stf.spill [r14]=f83,32 - ;; - stf.spill [in0]=f84,32 - stf.spill [r14]=f85,32 - ;; - stf.spill [in0]=f86,32 - stf.spill [r14]=f87,32 - ;; - stf.spill [in0]=f88,32 - stf.spill [r14]=f89,32 - ;; - stf.spill [in0]=f90,32 - stf.spill [r14]=f91,32 - ;; - stf.spill [in0]=f92,32 - stf.spill [r14]=f93,32 - ;; - stf.spill [in0]=f94,32 - stf.spill [r14]=f95,32 - ;; - stf.spill [in0]=f96,32 - stf.spill [r14]=f97,32 - ;; - stf.spill [in0]=f98,32 - stf.spill [r14]=f99,32 - ;; - stf.spill [in0]=f100,32 - stf.spill [r14]=f101,32 - ;; - stf.spill [in0]=f102,32 - stf.spill [r14]=f103,32 - ;; - stf.spill [in0]=f104,32 - stf.spill [r14]=f105,32 - ;; - stf.spill [in0]=f106,32 - stf.spill [r14]=f107,32 - ;; - stf.spill [in0]=f108,32 - stf.spill [r14]=f109,32 - ;; - stf.spill [in0]=f110,32 - stf.spill [r14]=f111,32 - ;; - stf.spill [in0]=f112,32 - stf.spill [r14]=f113,32 - ;; - stf.spill [in0]=f114,32 - stf.spill [r14]=f115,32 - ;; - stf.spill [in0]=f116,32 - stf.spill [r14]=f117,32 - ;; - stf.spill [in0]=f118,32 - stf.spill [r14]=f119,32 - ;; - stf.spill [in0]=f120,32 - stf.spill [r14]=f121,32 - ;; - stf.spill [in0]=f122,32 - stf.spill [r14]=f123,32 - ;; - stf.spill [in0]=f124,32 - stf.spill [r14]=f125,32 - ;; - stf.spill [in0]=f126 - stf.spill [r14]=f127 - ;; - br.ret.sptk.few rp - -END(savehighfp) - -/* - * restorehighfp: Restore f32-f127 - * - * Arguments: - * in0 array of struct ia64_fpreg - */ -ENTRY(restorehighfp, 1) - - add r14=16,in0 - ;; - ldf.fill f32=[in0],32 - ldf.fill f33=[r14],32 - ;; - ldf.fill f34=[in0],32 - ldf.fill f35=[r14],32 - ;; - ldf.fill f36=[in0],32 - ldf.fill f37=[r14],32 - ;; - ldf.fill f38=[in0],32 - ldf.fill f39=[r14],32 - ;; - ldf.fill f40=[in0],32 - ldf.fill f41=[r14],32 - ;; - ldf.fill f42=[in0],32 - ldf.fill f43=[r14],32 - ;; - ldf.fill f44=[in0],32 - ldf.fill f45=[r14],32 - ;; - ldf.fill f46=[in0],32 - ldf.fill f47=[r14],32 - ;; - ldf.fill f48=[in0],32 - ldf.fill f49=[r14],32 - ;; - ldf.fill f50=[in0],32 - ldf.fill f51=[r14],32 - ;; - ldf.fill f52=[in0],32 - ldf.fill f53=[r14],32 - ;; - ldf.fill f54=[in0],32 - ldf.fill f55=[r14],32 - ;; - ldf.fill f56=[in0],32 - ldf.fill f57=[r14],32 - ;; - ldf.fill f58=[in0],32 - ldf.fill f59=[r14],32 - ;; - ldf.fill f60=[in0],32 - ldf.fill f61=[r14],32 - ;; - ldf.fill f62=[in0],32 - ldf.fill f63=[r14],32 - ;; - ldf.fill f64=[in0],32 - ldf.fill f65=[r14],32 - ;; - ldf.fill f66=[in0],32 - ldf.fill f67=[r14],32 - ;; - ldf.fill f68=[in0],32 - ldf.fill f69=[r14],32 - ;; - ldf.fill f70=[in0],32 - ldf.fill f71=[r14],32 - ;; - ldf.fill f72=[in0],32 - ldf.fill f73=[r14],32 - ;; - ldf.fill f74=[in0],32 - ldf.fill f75=[r14],32 - ;; - ldf.fill f76=[in0],32 - ldf.fill f77=[r14],32 - ;; - ldf.fill f78=[in0],32 - ldf.fill f79=[r14],32 - ;; - ldf.fill f80=[in0],32 - ldf.fill f81=[r14],32 - ;; - ldf.fill f82=[in0],32 - ldf.fill f83=[r14],32 - ;; - ldf.fill f84=[in0],32 - ldf.fill f85=[r14],32 - ;; - ldf.fill f86=[in0],32 - ldf.fill f87=[r14],32 - ;; - ldf.fill f88=[in0],32 - ldf.fill f89=[r14],32 - ;; - ldf.fill f90=[in0],32 - ldf.fill f91=[r14],32 - ;; - ldf.fill f92=[in0],32 - ldf.fill f93=[r14],32 - ;; - ldf.fill f94=[in0],32 - ldf.fill f95=[r14],32 - ;; - ldf.fill f96=[in0],32 - ldf.fill f97=[r14],32 - ;; - ldf.fill f98=[in0],32 - ldf.fill f99=[r14],32 - ;; - ldf.fill f100=[in0],32 - ldf.fill f101=[r14],32 - ;; - ldf.fill f102=[in0],32 - ldf.fill f103=[r14],32 - ;; - ldf.fill f104=[in0],32 - ldf.fill f105=[r14],32 - ;; - ldf.fill f106=[in0],32 - ldf.fill f107=[r14],32 - ;; - ldf.fill f108=[in0],32 - ldf.fill f109=[r14],32 - ;; - ldf.fill f110=[in0],32 - ldf.fill f111=[r14],32 - ;; - ldf.fill f112=[in0],32 - ldf.fill f113=[r14],32 - ;; - ldf.fill f114=[in0],32 - ldf.fill f115=[r14],32 - ;; - ldf.fill f116=[in0],32 - ldf.fill f117=[r14],32 - ;; - ldf.fill f118=[in0],32 - ldf.fill f119=[r14],32 - ;; - ldf.fill f120=[in0],32 - ldf.fill f121=[r14],32 - ;; - ldf.fill f122=[in0],32 - ldf.fill f123=[r14],32 - ;; - ldf.fill f124=[in0],32 - ldf.fill f125=[r14],32 - ;; - ldf.fill f126=[in0] - ldf.fill f127=[r14] - ;; - br.ret.sptk.few rp - -END(restorehighfp) - -/* * fork_trampoline() * * Arrange for a function to be invoked neatly, after a cpu_switch(). ==== //depot/projects/ia64_epc/sys/ia64/ia64/syscall.s#2 (text+ko) ==== @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002 Marcel Moolenaar + * Copyright (c) 2002, 2003 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -150,20 +150,20 @@ st8 [r30]=r27,16 // tf_b[2] st8 [r31]=r16,16 // tf_b[3] ;; - st8 [r30]=r17,TF_R_R1-(TF_B+4*8) // tf_b[4] - st8 [r31]=r29,TF_R_R4-(TF_B+5*8) // tf_b[5] + st8 [r30]=r17,-64 // tf_b[4] + st8 [r31]=r29,-64 // tf_b[5] ;; - st8 [r30]=r1,TF_R_R5-TF_R_R1 // tf_r[0] (=r1=gp) + st8 [r30]=r1,-64 // tf_r[0] (=r1=gp) .mem.offset 8,0 st8.spill [r31]=r4,16 // tf_r[3] (=r4) ;; .mem.offset 0,0 st8.spill [r30]=r5,16 // tf_r[4] (=r5) .mem.offset 8,0 - st8.spill [r31]=r6,TF_R_SP-TF_R_R6 // tf_r[5] (=r6) + st8.spill [r31]=r6,-64 // tf_r[5] (=r6) ;; .mem.offset 0,0 - st8.spill [r30]=r7,TF_R_R15-TF_R_R7 // tf_r[6] (=r7) + st8.spill [r30]=r7,-64 // tf_r[6] (=r7) st8 [r31]=r18 // tf_r[11] (=r12=sp) ;; st8 [r30]=r8 // tf_r[14] (syscall number) @@ -193,12 +193,11 @@ mov r19=ar.bsp add sp=-16,sp ;; - add r20=TF_CR_IFS+(8*8),r16 - sub r19=r19,r17 - add r21=TF_NDIRTY+(8*8),r16 + add r20=TF_SPECIAL_PFS+(8*8),r16 + add r21=TF_SPECIAL_BSP+(8*8),r16 ;; st8 [r20]=r18 // tf_cr_ifs - st8 [r21]=r19 // tf_ndirty + st8 [r21]=r19 // tf_as_bsp ;; alloc r14=ar.pfs,0,1,3,0 add loc0=(8*8),r16 @@ -212,18 +211,18 @@ add r15=0,loc0 add r16=SIZEOF_TRAPFRAME,loc0 ;; - add r30=TF_R_R10,r15 - add r31=TF_R_SP,r15 + add r30=0,r15 // R10 + add r31=0,r15 // SP ;; alloc r14=ar.pfs,0,0,0,0 mov ar.k6=r16 - ld8 sp=[r31],TF_R_R9-TF_R_SP // tf_r[11] (r12=sp) + ld8 sp=[r31],-64 // tf_r[11] (r12=sp) ;; ld8 r10=[r30],-16 // tf_r[9] (=r10) - ld8 r9=[r31],TF_R_R1-TF_R_R9 // tf_r[8] (=r9) + ld8 r9=[r31],-64 // tf_r[8] (=r9) ;; - ld8 r8=[r30],TF_B-TF_R_R8 // tf_r[7] (=r8) - ld8 r1=[r31],TF_AR_FPSR-TF_R_R1 // tf_r[0] (=r1=gp) + ld8 r8=[r30],-64 // tf_r[7] (=r8) + ld8 r1=[r31],-64 // tf_r[0] (=r1=gp) ;; ld8 r16=[r30],-32 // tf_b[0] ld8 r17=[r31],-16 // tf_ar_fpsr @@ -266,320 +265,3 @@ br.ret.sptk b6 ;; .endp epc_syscall - - -/* - * _{get|set}_special_sync - * Do not follow runtime convention! - */ -/* - * inputs: r16 struct _special - * r17 return address - */ -ENTRY(_get_special_sync, 0) -{ .mii - flushrs - mov b6=r17 - add r17=8,r16 - ;; -} -{ .mmi - st8 [r16]=r1,16 // gp - st8 [r17]=r12,16 // sp - mov r18=b0 - ;; -} -{ .mmi - st8 [r16]=r13,16 // tp - mov r19=ar.rsc - mov r20=pr - ;; -} -{ .mmi - st8 [r17]=r18,16 // rp - mov ar.rsc=0 - mov r21=ar.pfs - ;; -} -{ .mmb - st8 [r16]=r20,16 // pr - st8 [r17]=r19,16 // ar.rsc - nop 0 - ;; -} -{ .mmi - st8 [r16]=r21,16 // ar.pfs - mov r22=ar.bsp - nop 1 - ;; -} -{ .mmb - st8 [r17]=r22,16 // ar.bspstore - mov r23=ar.rnat - nop 2 - ;; -} -{ .mmi - st8 [r16]=r23 // ar.rnat - mov r24=ar.fpsr - nop 3 - ;; -} -{ .mmb - st8 [r17]=r24 // ar.fpsr - mov ar.rsc=r19 - br.sptk b6 - ;; -} -END(_get_special_sync) - -/* - * inputs: r16 struct _special - */ -ENTRY(_set_special_sync, 0) -{ .mmi - invala - mov ar.rsc=0 - add r17=8,r16 - ;; -} -{ .mmb - ld8 r1=[r16],16 // gp - ld8 r12=[r17],16 // sp - nop 0 - ;; -} -{ .mmb - ld8 r13=[r16],16 // tp - ld8 r18=[r17],16 // rp - nop 1 - ;; -} -{ .mmi - ld8 r19=[r16],16 // pr - ld8 r20=[r17],16 // ar.rsc - mov b0=r18 - ;; -} -{ .mmi - loadrs - ld8 r21=[r16],16 // ar.pfs - mov pr=r19,0x1fffe - ;; -} -{ .mmi - ld8 r22=[r17],16 // ar.bspstore - ld8 r23=[r16] // ar.rnat - mov ar.pfs=r21 - ;; -} -{ .mmb - ld8 r24=[r17] // ar.fpsr - mov ar.bspstore=r22 - nop 2 - ;; -} -{ .mmb - mov ar.rnat=r23 - mov ar.rsc=r20 - nop 3 - ;; -} -{ .mib - mov ar.fpsr=r24 - nop 4 - br.ret.sptk rp - ;; -} -END(_set_special_sync) - -/* - * _{get|set}_callee_saved - */ -ENTRY(_get_callee_saved, 1) -{ .mii - mov r31=ar.unat - add r2=8,in0 - add r3=16,in0 - ;; -} -{ .mmi - .mem.offset 0,0 - st8.spill [r2]=r4,16 // r4 - .mem.offset 8,0 - st8.spill [r3]=r5,16 // r5 - mov r29=b1 - ;; -} -{ .mmi - .mem.offset 16,0 - st8.spill [r2]=r6,16 // r6 - .mem.offset 24,0 - st8.spill [r3]=r7,16 // r7 - mov r28=b2 - ;; -} -{ .mmi - st8 [r2]=r29,16 // b1 - mov r30=ar.unat - mov r27=b3 - ;; -} -{ .mmi - st8 [in0]=r30 // nat - st8 [r3]=r28,16 // b2 - mov r26=b4 - ;; -} -{ .mmi - st8 [r2]=r27,16 // b3 - st8 [r3]=r26,16 // b4 - mov r25=b5 - ;; -} -{ .mmi - st8 [r2]=r25,16 // b5 - st8 [r3]=r31 // ar.unat - mov r24=ar.lc - ;; -} -{ .mfb - st8 [r2]=r24 // ar.lc - nop 0 - br.ret.sptk rp - ;; -} -END(_get_callee_saved) - -ENTRY(_set_callee_saved, 1) -{ .mii - ld8 r31=[in0] // nat - add r2=8,in0 - add r3=16,in0 - ;; -} -{ .mmb - mov ar.unat=r31 - lfetch [r3] >>> TRUNCATED FOR MAIL (1000 lines) <<< To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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