From owner-p4-projects@FreeBSD.ORG Sun Sep 14 16:50:22 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 5CAEC16A4E0; Sun, 14 Sep 2003 16:50:22 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id F302E16A4E4 for ; Sun, 14 Sep 2003 16:50:21 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id A850143FA3 for ; Sun, 14 Sep 2003 16:50:20 -0700 (PDT) (envelope-from peter@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h8ENoK0U044707 for ; Sun, 14 Sep 2003 16:50:20 -0700 (PDT) (envelope-from peter@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h8ENoKlu044704 for perforce@freebsd.org; Sun, 14 Sep 2003 16:50:20 -0700 (PDT) Date: Sun, 14 Sep 2003 16:50:20 -0700 (PDT) Message-Id: <200309142350.h8ENoKlu044704@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to peter@freebsd.org using -f From: Peter Wemm To: Perforce Change Reviews Subject: PERFORCE change 38064 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Sep 2003 23:50:23 -0000 http://perforce.freebsd.org/chv.cgi?CH=38064 Change 38064 by peter@peter_work on 2003/09/14 16:49:55 initial updates Affected files ... .. //depot/projects/hammer/sys/amd64/isa/atpic.c#2 edit Differences ... ==== //depot/projects/hammer/sys/amd64/isa/atpic.c#2 (text+ko) ==== @@ -49,30 +49,12 @@ #include #include -#include -#include +#include +#include + +#ifdef DEV_ISA #include - -/* XXX: Magic numbers */ -#ifdef PC98 -#ifdef AUTO_EOI_1 -#define MASTER_MODE 0x1f /* Master auto EOI, 8086 mode */ -#else -#define MASTER_MODE 0x1d /* Master 8086 mode */ #endif -#define SLAVE_MODE 9 /* 8086 mode */ -#else /* IBM-PC */ -#ifdef AUTO_EOI_1 -#define MASTER_MODE (2 | 1) /* Auto EOI, 8086 mode */ -#else -#define MASTER_MODE 1 /* 8086 mode */ -#endif -#ifdef AUTO_EOI_2 -#define SLAVE_MODE (2 | 1) /* Auto EOI, 8086 mode */ -#else -#define SLAVE_MODE 1 /* 8086 mode */ -#endif -#endif /* PC98 */ static void atpic_init(void *dummy); @@ -195,10 +177,10 @@ inthand_t *handler; int irq; #endif - register_t eflags; + register_t rflags; mtx_lock_spin(&icu_lock); - eflags = intr_disable(); + rflags = intr_disable(); #ifdef old irq = IRQ(ap, ai); ih = TAILQ_FIRST(&ai->at_intsrc.is_ithread->it_handlers); @@ -208,13 +190,11 @@ handler = ai->at_fastintr; } else handler = ai->at_intr; - setidt(ap->at_intbase + ai->at_irq, handler, SDT_SYS386IGT, SEL_KPL, - GSEL(GCODE_SEL, SEL_KPL)); + setidt(ap->at_intbase + ai->at_irq, handler, SDT_SYSIGT, SEL_KPL, 0); #else - setidt(ap->at_intbase + ai->at_irq, ai->at_intr, SDT_SYS386IGT, - SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); + setidt(ap->at_intbase + ai->at_irq, ai->at_intr, SDT_SYSIGT, SEL_KPL, 0); #endif - intr_restore(eflags); + intr_restore(rflags); mtx_unlock_spin(&icu_lock); } @@ -253,12 +233,7 @@ /* Reset the PIC and program with next four bytes. */ mtx_lock_spin(&icu_lock); -#ifdef DEV_MCA - if (MCA_system) - outb(pic->at_ioaddr, 0x19); - else -#endif - outb(pic->at_ioaddr, 0x11); + outb(pic->at_ioaddr, ICW1_RESET | ICW1_IC4); imr_addr = pic->at_ioaddr + ICU_IMR_OFFSET; /* Start vector. */ @@ -275,22 +250,30 @@ outb(imr_addr, IRQ_SLAVE); /* slave on line 7 */ /* Set mode. */ - if (slave) - outb(imr_addr, SLAVE_MODE); - else - outb(imr_addr, MASTER_MODE); + if (slave) { +#ifdef AUTO_EOI_2 + outb(imr_addr, ICW4_AEOI | ICW4_8086); +#else + outb(imr_addr, ICW4_8086); +#endif + } else { +#ifdef AUTO_EOI_1 + outb(imr_addr, ICW4_AEOI | ICW4_8086); +#else + outb(imr_addr, ICW4_8086); +#endif + } /* Set interrupt enable mask. */ outb(imr_addr, *pic->at_imen); /* Reset is finished, default to IRR on read. */ - outb(pic->at_ioaddr, 0x0a); + outb(pic->at_ioaddr, OCW3_SEL | OCW3_RIS); -#ifndef PC98 /* Set priority order to 3-7, 0-2 (com2 first). */ if (!slave) - outb(pic->at_ioaddr, 0xc0 | (3 - 1)); -#endif + outb(pic->at_ioaddr, ICU_SETPRI | 0x2); + mtx_unlock_spin(&icu_lock); }