From owner-freebsd-net@FreeBSD.ORG Sun Apr 25 06:11:10 2004 Return-Path: Delivered-To: freebsd-net@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 3DDCC16A4CF; Sun, 25 Apr 2004 06:11:10 -0700 (PDT) Received: from mail023.syd.optusnet.com.au (mail023.syd.optusnet.com.au [211.29.132.101]) by mx1.FreeBSD.org (Postfix) with ESMTP id E76F743D54; Sun, 25 Apr 2004 06:11:08 -0700 (PDT) (envelope-from david.burns@dugeem.net) Received: from dugeem.net (c211-30-248-50.carlnfd2.nsw.optusnet.com.au [211.30.248.50])i3PDB6j17615; Sun, 25 Apr 2004 23:11:07 +1000 Message-ID: <408BB8DF.5090509@dugeem.net> Date: Sun, 25 Apr 2004 23:10:55 +1000 From: David Burns User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.6) Gecko/20040113 X-Accept-Language: en, en-us MIME-Version: 1.0 To: Andre Oppermann References: <408A160F.4090703@dugeem.net> <408A91BC.46A0D95F@freebsd.org> In-Reply-To: <408A91BC.46A0D95F@freebsd.org> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit cc: net@freebsd.org Subject: Re: fast ethernet driver MII phy serial clock rates X-BeenThere: freebsd-net@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Networking and TCP/IP with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 25 Apr 2004 13:11:10 -0000 Andre Oppermann wrote: > > This is a very interesting observation. I've just worked my way through > the MII code to add link state notification to the routing socket and had > to remove a couple of return(0) when the link is up to break so the later > status function can read the MII and announce the state change if neccessary. > Based on your explanation this seems to be a regression and I will look at > how to work around this. > > Do you have any idea how to make the MII access faster or to get some sort > of async notification from the hardware when the link state changes so we > don't have to poll every second? > Apart from cautiously removing the DELAY(1) and retesting each driver on a few different hardware platforms there are a couple of other small improvements that could be considered: 1. Not all PHYs need resyncing on every operation - which would obviously eliminate half the access time 2. Only do autoneg operations every 10 seconds (although I think 17 is the current period for MII autoneg timeout?) - at least this will help minimise per second operations. A handful of PHYs appear to support a form of link state interrupt but given it hasn't already been implemented I'm suspecting broken hardware - not to mention the additional driver complexity necessary for a small gain. David