From owner-freebsd-acpi@FreeBSD.ORG Sun May 18 03:05:32 2008 Return-Path: Delivered-To: freebsd-acpi@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E90CA1065671; Sun, 18 May 2008 03:05:32 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from mail12.syd.optusnet.com.au (mail12.syd.optusnet.com.au [211.29.132.193]) by mx1.freebsd.org (Postfix) with ESMTP id 7A8698FC1C; Sun, 18 May 2008 03:05:32 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from server.vk2pj.dyndns.org (c122-106-215-175.belrs3.nsw.optusnet.com.au [122.106.215.175]) by mail12.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id m4I35TjV026007 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 18 May 2008 13:05:30 +1000 Received: from server.vk2pj.dyndns.org (localhost.vk2pj.dyndns.org [127.0.0.1]) by server.vk2pj.dyndns.org (8.14.2/8.14.2) with ESMTP id m4I35TSr001384; Sun, 18 May 2008 13:05:29 +1000 (EST) (envelope-from peter@server.vk2pj.dyndns.org) Received: (from peter@localhost) by server.vk2pj.dyndns.org (8.14.2/8.14.2/Submit) id m4I35TlG001383; Sun, 18 May 2008 13:05:29 +1000 (EST) (envelope-from peter) Date: Sun, 18 May 2008 13:05:28 +1000 From: Peter Jeremy To: Ariff Abdullah Message-ID: <20080518030528.GA1099@server.vk2pj.dyndns.org> References: <20080428112623.GA99757@server.vk2pj.dyndns.org> <20080516202242.3992b284.ariff@FreeBSD.org> <20080517073716.GF80125@server.vk2pj.dyndns.org> <20080517194326.420ceb81.ariff@FreeBSD.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="uAKRQypu60I7Lcqm" Content-Disposition: inline In-Reply-To: <20080517194326.420ceb81.ariff@FreeBSD.org> X-PGP-Key: http://members.optusnet.com.au/peterjeremy/pubkey.asc User-Agent: Mutt/1.5.17 (2007-11-01) Cc: freebsd-acpi@FreeBSD.org Subject: Re: BIOS Regression on HP/Compaq [d]v6000 series notebooks X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 May 2008 03:05:33 -0000 --uAKRQypu60I7Lcqm Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2008-May-17 19:43:26 +0800, Ariff Abdullah wrote: >Install sysutils/devcpu from ports, load cpu.ko, and grab / compile >http://people.freebsd.org/~ariff/misc/k8c1e/ . Try playing with it >(enable, disable, status) It reported C1E disabled normally and enabled when I removed power. Explicitly disabling it when running on battery caused everything to behave. Curiously, enabling C1E when running on AC power did not make things stop - which confused me. I extended k8c1e.c to report the actual IPMR contents. This gave me the following. Running on AC (ie after plugging AC back in): cpu0: MSR=3D0x0000000004c10000 C1E disabled cpu1: MSR=3D0x0000000004c10000 C1E disabled Disconnecting AC: cpu0: MSR=3D0x0000000014c11015 C1E enabled cpu1: MSR=3D0x000000001cc11015 C1E enabled I notice that it doesn't set SmiOnCmpHalt on CPU0. Interestingly, "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors" (#32559) revision 3.08, states that each of C1eOnCmpHalt, SmiOnCmpHalt and IntPndMsg are mutually exclusive (only one can be set to 1) and that all cores should be programmed the same - it looks like the BIOS is not doing this. I don't know why your patch is not working. It looks suspiciously like it's not getting the relevant ACPI notify message (or maybe the ACPI BIOS is sending the ACPI notify early and juggling C1E after the notify). I checked and I _am_ running a kernel with the patch in it. --=20 Peter Jeremy Please excuse any delays as the result of my ISP's inability to implement an MTA that is either RFC2821-compliant or matches their claimed behaviour. --uAKRQypu60I7Lcqm Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (FreeBSD) iEYEARECAAYFAkgvnPgACgkQ/opHv/APuIeIfACfWC6Q7Jv2w7elyoKWatKz/dim W0sAoIv4N2SqI7puCWbHDNA76HTvdS8T =HM6S -----END PGP SIGNATURE----- --uAKRQypu60I7Lcqm-- From owner-freebsd-acpi@FreeBSD.ORG Sun May 18 03:30:56 2008 Return-Path: Delivered-To: freebsd-acpi@FreeBSD.org Received: from miki (localhost [IPv6:::1]) by hub.freebsd.org (Postfix) with SMTP id 82B19106567B; Sun, 18 May 2008 03:30:55 +0000 (UTC) (envelope-from ariff@FreeBSD.org) Date: Sun, 18 May 2008 11:30:51 +0800 From: Ariff Abdullah To: Peter Jeremy Message-Id: <20080518113051.34027506.ariff@FreeBSD.org> In-Reply-To: <20080518030528.GA1099@server.vk2pj.dyndns.org> References: <20080428112623.GA99757@server.vk2pj.dyndns.org> <20080516202242.3992b284.ariff@FreeBSD.org> <20080517073716.GF80125@server.vk2pj.dyndns.org> <20080517194326.420ceb81.ariff@FreeBSD.org> <20080518030528.GA1099@server.vk2pj.dyndns.org> Organization: FreeBSD X-Mailer: /usr/local/lib/ruby/1.8/net/smtp.rb Mime-Version: 1.0 Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg="PGP-SHA1"; boundary="Signature=_Sun__18_May_2008_11_30_51_+0800_f/EWDOZF1ORaZRni" Cc: freebsd-acpi@FreeBSD.org Subject: Re: BIOS Regression on HP/Compaq [d]v6000 series notebooks X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 May 2008 03:30:56 -0000 --Signature=_Sun__18_May_2008_11_30_51_+0800_f/EWDOZF1ORaZRni Content-Type: text/plain; charset=US-ASCII Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, 18 May 2008 13:05:28 +1000 Peter Jeremy wrote: > On 2008-May-17 19:43:26 +0800, Ariff Abdullah > wrote: > >Install sysutils/devcpu from ports, load cpu.ko, and grab / compile > >http://people.freebsd.org/~ariff/misc/k8c1e/ . Try playing with it > >(enable, disable, status) >=20 > It reported C1E disabled normally and enabled when I removed power. > Explicitly disabling it when running on battery caused everything to > behave. Curiously, enabling C1E when running on AC power did not > make things stop - which confused me. >=20 > I extended k8c1e.c to report the actual IPMR contents. This gave > me the following. >=20 > Running on AC (ie after plugging AC back in): > cpu0: MSR=3D0x0000000004c10000 C1E disabled > cpu1: MSR=3D0x0000000004c10000 C1E disabled >=20 > Disconnecting AC: > cpu0: MSR=3D0x0000000014c11015 C1E enabled > cpu1: MSR=3D0x000000001cc11015 C1E enabled >=20 > I notice that it doesn't set SmiOnCmpHalt on CPU0. Interestingly, > "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh > Processors" (#32559) revision 3.08, states that each of > C1eOnCmpHalt, SmiOnCmpHalt and IntPndMsg are mutually exclusive > (only one can be set to 1) and that all cores should be programmed > the same - it looks like the BIOS is not doing this. >=20 > I don't know why your patch is not working. It looks suspiciously > like it's not getting the relevant ACPI notify message (or maybe the > ACPI BIOS is sending the ACPI notify early and juggling C1E after > the notify). I checked and I _am_ running a kernel with the patch > in it. > The patch does not try to get to other cpus, too much complications just for a tiny quirk. Since acpi AC notifaction delivered only to a single cpu, the quirk applied only to and just that cpu. If the BIOS set C1E before sending ac notification, you're lucky: otherwise not (which _probably_ in your case). Disregarding my patch, try executing that "k8c1e disable" through devd notifaction by adding followings to /etc/devd.conf: # K8 C1E notify 100 { match "system" "ACPI"; match "subsystem" "ACAD"; action "/whatever/k8c1e disable > /dev/null 2>&1"; }; Perhaps even: action "sleep X ; /whatever/k8c1e..." -- Ariff Abdullah FreeBSD ... Recording in stereo is obviously too advanced and confusing for us idiot ***** users :P ........ --Signature=_Sun__18_May_2008_11_30_51_+0800_f/EWDOZF1ORaZRni Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (FreeBSD) iEYEARECAAYFAkgvousACgkQlr+deMUwTNqvxgCfef3hmbcfZTCVC3j7Q6mjZOrS XqkAnA6UYO84hJHgkreMR6cyp5HWoS6d =1orn -----END PGP SIGNATURE----- --Signature=_Sun__18_May_2008_11_30_51_+0800_f/EWDOZF1ORaZRni-- From owner-freebsd-acpi@FreeBSD.ORG Sun May 18 11:44:58 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 752901065670 for ; Sun, 18 May 2008 11:44:58 +0000 (UTC) (envelope-from uspoerlein@gmail.com) Received: from fg-out-1718.google.com (fg-out-1718.google.com [72.14.220.159]) by mx1.freebsd.org (Postfix) with ESMTP id E9ED08FC17 for ; Sun, 18 May 2008 11:44:57 +0000 (UTC) (envelope-from uspoerlein@gmail.com) Received: by fg-out-1718.google.com with SMTP id l26so1805004fgb.35 for ; Sun, 18 May 2008 04:44:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:received:received:received:date:from:to:cc:subject:message-id:mail-followup-to:references:mime-version:content-type:content-disposition:in-reply-to:user-agent; bh=I5MlAf94cLtJt5oyU7rcbXi7VtWMUL4WqbcFSpPYQ9g=; b=AqSaOXQlHFUF3Zj79eHZCahEIJZgrSWQcBMETlpY0x5uSSddXXqfS/eY5/jKRAtixD/eYkfPYChOT8WO6XIaWN+H9VcrsM09tSAAlcPZBLAO0ivD3s+6Z5H2Kvr9ordLGBF2jyca6MszmcpsRWIfoNynZhmkxqWOHafOT568X3w= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=date:from:to:cc:subject:message-id:mail-followup-to:references:mime-version:content-type:content-disposition:in-reply-to:user-agent; b=S9jBbknKeQADfaQcRG2iWobDtZh1o9HI4nhW8Kz6zV5qqCEYOXwWNgZAoSRwkTOKWUfSjS6PY4QchdL2hwrvJdoxa5q0gbYAQyXXkiBUb1SH8Ht9+UWjN4e9zP0c+i0dSmwhSmrHyAKtyyYDXssG3gy+0hHET5Ds0EuUnPs+zpI= Received: by 10.125.71.15 with SMTP id y15mr4708367mkk.82.1211109393762; Sun, 18 May 2008 04:16:33 -0700 (PDT) Received: from acme.spoerlein.net ( [217.172.44.86]) by mx.google.com with ESMTPS id e11sm6953216fga.1.2008.05.18.04.16.32 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 18 May 2008 04:16:32 -0700 (PDT) Received: from roadrunner.spoerlein.net (e180148079.adsl.alicedsl.de [85.180.148.79]) by acme.spoerlein.net (8.14.2/8.14.2) with ESMTP id m4IBGTgC031804 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Sun, 18 May 2008 13:16:31 +0200 (CEST) (envelope-from uspoerlein@gmail.com) Received: from roadrunner.spoerlein.net (localhost [127.0.0.1]) by roadrunner.spoerlein.net (8.14.2/8.14.2) with ESMTP id m4IB6C8a003476 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 18 May 2008 13:06:12 +0200 (CEST) (envelope-from uspoerlein@gmail.com) Received: (from uqs@localhost) by roadrunner.spoerlein.net (8.14.2/8.14.2/Submit) id m4IB6Bho003475; Sun, 18 May 2008 13:06:11 +0200 (CEST) (envelope-from uspoerlein@gmail.com) Date: Sun, 18 May 2008 13:06:10 +0200 From: Ulrich Spoerlein To: rpaulo@FreeBSD.org Message-ID: <20080518110610.GA3434@roadrunner.spoerlein.net> Mail-Followup-To: rpaulo@FreeBSD.org, freebsd-acpi@FreeBSD.org, FreeBSD-gnats-submit@freebsd.org References: <200805162227.m4GMR8na097427@freefall.freebsd.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200805162227.m4GMR8na097427@freefall.freebsd.org> User-Agent: Mutt/1.5.17 (2007-11-01) Cc: freebsd-acpi@FreeBSD.org, FreeBSD-gnats-submit@FreeBSD.org Subject: Re: kern/123705: [acpi_cpu] [regression] acpi_cpu.c rev 1.57.2.4 broke booting on SuperMicro X7DBP X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 May 2008 11:44:58 -0000 Hi, only tested the patch on this one machine, no more panics, although the _OSC evaluation itself fails: cpu0: on acpi0 ACPI-1304: *** Error: Method execution failed [\_PR_.CPU0._OSC] (Node 0xc871e660), AE_AML_OPERAND_TYPE cpu0: switching to generic Cx mode acpi_throttle0: on cpu0 acpi_throttle0: P_CNT from P_BLK 0x1010 Thanks! Ulrich Spoerlein From owner-freebsd-acpi@FreeBSD.ORG Sun May 18 13:47:34 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5F9C81065672 for ; Sun, 18 May 2008 13:47:34 +0000 (UTC) (envelope-from rpaulo@gmail.com) Received: from ug-out-1314.google.com (ug-out-1314.google.com [66.249.92.170]) by mx1.freebsd.org (Postfix) with ESMTP id DF6658FC1D for ; Sun, 18 May 2008 13:47:33 +0000 (UTC) (envelope-from rpaulo@gmail.com) Received: by ug-out-1314.google.com with SMTP id q2so305764uge.37 for ; Sun, 18 May 2008 06:47:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:date:from:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:sender; bh=9aJ1+XCS0qHCYkGLptXRJzUAjPxlXfbMiLp0UDfCSX8=; b=l22EULDn5AxFwyORrtISq+FN47pp4XdDJ+xKdl9H/QeXfXQv/I6FFOJMd5X2+KGhM1F7lqrYuGob9zTYPJj5pGMMslcjuYS9DZk4T0qLDAF0Uni/36Jqh3dGZUWT1kCbOn3TCwPgazLaVFGmgHzTqq+sX27C7+nQldMLCRwbtXg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject:references:in-reply-to:content-type:content-transfer-encoding:sender; b=Y3G0H2iICeX8QKwqWhg2ZcCFcwKncMNN3rdOFDxFecDySVBuNdjqcGNtwGFMENYd/mmy3HFnHL0eZha4KVBRoZCCFqJLOxXVd1Iov4m0uQUYdy9ikNVzEc6mdXIP3uyxF9k4hUcoSgh7U2WpJyNRjD7cmA0fuWJx193WAJxuky0= Received: by 10.66.250.18 with SMTP id x18mr2456105ugh.79.1211118452372; Sun, 18 May 2008 06:47:32 -0700 (PDT) Received: from epsilon.local ( [89.214.185.160]) by mx.google.com with ESMTPS id j27sm924674ugc.65.2008.05.18.06.47.30 (version=SSLv3 cipher=RC4-MD5); Sun, 18 May 2008 06:47:31 -0700 (PDT) Message-ID: <48303370.1030101@fnop.net> Date: Sun, 18 May 2008 14:47:28 +0100 From: Rui Paulo User-Agent: Thunderbird 2.0.0.14 (Macintosh/20080421) MIME-Version: 1.0 To: Nate Lawson References: <482E1895.3000700@cis.rit.edu> <482F1482.6060105@miralink.com> <482F44AC.1010904@root.org> In-Reply-To: <482F44AC.1010904@root.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Sender: Rui Paulo Cc: freebsd-acpi@freebsd.org Subject: Re: Update on T42p with FreeBSD-7.0 and ACPI X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 May 2008 13:47:34 -0000 Nate Lawson wrote: > Sean Bruno wrote: >> Bob Krzaczek wrote: >>> Following some extremely helpful advice from Tobias Roth, I've moved >>> from RELEASE to STABLE, and I'm happy to say that the laptop is so >>> much better behaved with suspend/resume logic. >>> >>> One anomaly: /etc/rc.suspend is still not running. This turns out to >>> be harmless in my particular case. However, I've verified first hand >>> that Mitsuru IWASAKI's patch will take care of this. >>> >>> http://lists.freebsd.org/pipermail/freebsd-acpi/2008-April/004806.html >>> >>> Anyway, thanks again for the fast and responsive feedback, folks. >>> This is getting much more stable and useful, now. >>> >>> Cheers, >>> Bob >>> >> Hrm...Is there a PR somewhere on this issue? Or, more importantly, >> has a committer accepted the patch? > > Iwasaki-san's patch should be committed. Rui? > Will do it. Thanks. Regards, -- Rui Paulo From owner-freebsd-acpi@FreeBSD.ORG Mon May 19 03:10:20 2008 Return-Path: Delivered-To: freebsd-acpi@FreeBSD.org Received: from miki (localhost [IPv6:::1]) by hub.freebsd.org (Postfix) with SMTP id 48168106566B; Mon, 19 May 2008 03:10:19 +0000 (UTC) (envelope-from ariff@FreeBSD.org) Date: Mon, 19 May 2008 11:09:54 +0800 From: Ariff Abdullah To: Peter Jeremy Message-Id: <20080519110954.09c2d42f.ariff@FreeBSD.org> In-Reply-To: <20080518030528.GA1099@server.vk2pj.dyndns.org> References: <20080428112623.GA99757@server.vk2pj.dyndns.org> <20080516202242.3992b284.ariff@FreeBSD.org> <20080517073716.GF80125@server.vk2pj.dyndns.org> <20080517194326.420ceb81.ariff@FreeBSD.org> <20080518030528.GA1099@server.vk2pj.dyndns.org> Organization: FreeBSD X-Mailer: /usr/local/lib/ruby/1.8/net/smtp.rb Mime-Version: 1.0 Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg="PGP-SHA1"; boundary="Signature=_Mon__19_May_2008_11_09_54_+0800_DZQFe8fDqo4DxeOS" Cc: freebsd-acpi@FreeBSD.org Subject: Re: BIOS Regression on HP/Compaq [d]v6000 series notebooks X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 May 2008 03:10:20 -0000 --Signature=_Mon__19_May_2008_11_09_54_+0800_DZQFe8fDqo4DxeOS Content-Type: text/plain; charset=US-ASCII Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, 18 May 2008 13:05:28 +1000 Peter Jeremy wrote: > On 2008-May-17 19:43:26 +0800, Ariff Abdullah > wrote: > >Install sysutils/devcpu from ports, load cpu.ko, and grab / compile > >http://people.freebsd.org/~ariff/misc/k8c1e/ . Try playing with it > >(enable, disable, status) >=20 > It reported C1E disabled normally and enabled when I removed power. > Explicitly disabling it when running on battery caused everything to > behave. Curiously, enabling C1E when running on AC power did not > make things stop - which confused me. >=20 > I extended k8c1e.c to report the actual IPMR contents. This gave > me the following. >=20 > Running on AC (ie after plugging AC back in): > cpu0: MSR=3D0x0000000004c10000 C1E disabled > cpu1: MSR=3D0x0000000004c10000 C1E disabled >=20 > Disconnecting AC: > cpu0: MSR=3D0x0000000014c11015 C1E enabled > cpu1: MSR=3D0x000000001cc11015 C1E enabled >=20 > I notice that it doesn't set SmiOnCmpHalt on CPU0. Interestingly, > "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh > Processors" (#32559) revision 3.08, states that each of > C1eOnCmpHalt, SmiOnCmpHalt and IntPndMsg are mutually exclusive > (only one can be set to 1) and that all cores should be programmed > the same - it looks like the BIOS is not doing this. >=20 > I don't know why your patch is not working. It looks suspiciously > like it's not getting the relevant ACPI notify message (or maybe the > ACPI BIOS is sending the ACPI notify early and juggling C1E after > the notify). I checked and I _am_ running a kernel with the patch > in it. >=20 I've been thinking on taking a different stab by hijacking cpu_idle*() functions instead. Please disregard all previous quirks and get either of these: http://people.freebsd.org/~ariff/misc/k8c1e/current_k8c1e_idle_hlt.diff http://people.freebsd.org/~ariff/misc/k8c1e/releng6-7_k8c1e_idle_hlt.diff -- Ariff Abdullah FreeBSD ... Recording in stereo is obviously too advanced and confusing for us idiot ***** users :P ........ --Signature=_Mon__19_May_2008_11_09_54_+0800_DZQFe8fDqo4DxeOS Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (FreeBSD) iEYEARECAAYFAkgw74IACgkQlr+deMUwTNpv5ACgkpnCej7zDgM7ODT7PcDfpl0Y 3zUAn3AUe9hLQ1QuKvuoDLQcUpjHUJpS =v9lG -----END PGP SIGNATURE----- --Signature=_Mon__19_May_2008_11_09_54_+0800_DZQFe8fDqo4DxeOS-- From owner-freebsd-acpi@FreeBSD.ORG Mon May 19 11:06:48 2008 Return-Path: Delivered-To: freebsd-acpi@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 534D3106566B for ; Mon, 19 May 2008 11:06:48 +0000 (UTC) (envelope-from owner-bugmaster@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id 3A65F8FC21 for ; Mon, 19 May 2008 11:06:48 +0000 (UTC) (envelope-from owner-bugmaster@FreeBSD.org) Received: from freefall.freebsd.org (localhost [127.0.0.1]) by freefall.freebsd.org (8.14.2/8.14.2) with ESMTP id m4JB6mOT011480 for ; Mon, 19 May 2008 11:06:48 GMT (envelope-from owner-bugmaster@FreeBSD.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.2/8.14.1/Submit) id m4JB6lrC011476 for freebsd-acpi@FreeBSD.org; Mon, 19 May 2008 11:06:47 GMT (envelope-from owner-bugmaster@FreeBSD.org) Date: Mon, 19 May 2008 11:06:47 GMT Message-Id: <200805191106.m4JB6lrC011476@freefall.freebsd.org> X-Authentication-Warning: freefall.freebsd.org: gnats set sender to owner-bugmaster@FreeBSD.org using -f From: FreeBSD bugmaster To: freebsd-acpi@FreeBSD.org Cc: Subject: Current problem reports assigned to freebsd-acpi@FreeBSD.org X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 May 2008 11:06:48 -0000 Current FreeBSD problem reports Critical problems Serious problems S Tracker Resp. Description -------------------------------------------------------------------------------- o i386/54756 acpi ACPI suspend/resume problem on CF-W2 laptop o i386/55661 acpi ACPI suspend/resume problem on ARMADA M700 o kern/56024 acpi ACPI suspend drains battery while in S3 o i386/72566 acpi ACPI, FreeBSD disables fan on Compaq Armada 1750 o i386/79081 acpi ACPI suspend/resume not working on HP nx6110 o kern/81000 acpi [apic] Via 8235 sound card worked great with FreeBSD 5 s kern/91038 acpi [panic] [ata] [acpi] 6.0-RELEASE on Fujitsu Siemens Am s i386/91748 acpi acpi problem on Acer TravelMare 4652LMi (nvidia panic, o kern/102252 acpi acpi thermal does not work on Abit AW8D (intel 975) o kern/104625 acpi ACPI on ASUS A8N-32 SLI/ASUS P4P800 does not show ther o kern/106924 acpi [acpi] ACPI resume returns g_vfs_done() errors and ker o kern/108954 acpi [acpi] 'sleep(1)' sleeps >1 seconds when speedstep (Cx o i386/114562 acpi [acpi] cardbus is dead after s3 on Thinkpad T43 with a o amd64/115011 acpi ACPI problem ,reboot system down. o kern/116939 acpi [acpi] PCI-to-PCI misconfigured for bus three and can o kern/118973 acpi [acpi]: Kernel panic with acpi boot o kern/119200 acpi [acpi] Lid close switch suspends CPU for 1 second on H o kern/119356 acpi [acpi]: i386 ACPI wakeup not work due resource exhaust o kern/120953 acpi [acpi]: FreeBSD 6.3 Release: acpi_tz0: _TMP value is o kern/121454 acpi [pst] Promise SuperTrak SX6000 does not load during bo 20 problems total. Non-critical problems S Tracker Resp. Description -------------------------------------------------------------------------------- f kern/67309 acpi zzz reboot computer (ACPI S3) o i386/69750 acpi Boot without ACPI failed on ASUS L5 s kern/73823 acpi [request] acpi / power-on by timer support o kern/76950 acpi ACPI wrongly blacklisted on Micron ClientPro 766Xi sys o i386/83018 acpi [install] Installer will not boot on Asus P4S8X BIOS 1 o kern/89411 acpi [acpi] acpiconf bug s kern/90243 acpi Laptop fan doesn't turn off (ACPI enabled) (Packard Be o kern/97383 acpi Volume buttons on IBM Thinkpad crash system with ACPI o kern/103365 acpi [acpi] acpi poweroff doesn't work with geli device att o kern/105537 acpi [acpi] problems in acpi on HP Compaq nc6320 o kern/108017 acpi [acpi]: Acer Aspire 5600 o kern/108488 acpi [acpi] ACPI-1304: *** Error: Method execution failed o kern/108581 acpi [sysctl] sysctl: hw.acpi.cpu.cx_lowest: Invalid argume o kern/108695 acpi [acpi]: Fatal trap 9: general protection fault when in s kern/112544 acpi [acpi] [patch] Add High Precision Event Timer Driver f o kern/114165 acpi [acpi] Dell C810 - ACPI problem o kern/117605 acpi [acpi] [request] add debug.cpufreq.highest o kern/120515 acpi [acpi] [patch] acpi_alloc_wakeup_handler: can't alloc o kern/121102 acpi [acpi_fujitsu] [patch] update acpi_fujitsu for the P80 o kern/121504 acpi [patch] Correctly set hw.acpi.osname on certain machin f amd64/122521 acpi ACPI Error after upgrade to 7.0 o kern/123039 acpi [acpi] ACPI AML_BUFFER_LIMIT errors during boot 22 problems total. From owner-freebsd-acpi@FreeBSD.ORG Tue May 20 17:42:42 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9BEAB106567A for ; Tue, 20 May 2008 17:42:42 +0000 (UTC) (envelope-from freebsd@abv.bg) Received: from smtp-out.abv.bg (smtp-out.abv.bg [194.153.145.70]) by mx1.freebsd.org (Postfix) with ESMTP id 11B698FC1D for ; Tue, 20 May 2008 17:42:39 +0000 (UTC) (envelope-from freebsd@abv.bg) Received: from mail54.abv.bg (mail54.ni.bg [192.168.151.57]) by smtp-out.abv.bg (Postfix) with ESMTP id 622F314ADD1 for ; Tue, 20 May 2008 20:42:32 +0300 (EEST) DomainKey-Signature: a=rsa-sha1; s=smtp-out; d=abv.bg; c=simple; q=dns; b=v3MlW3VDkrJ+sg0xdpsjRLTLRtRhOR5evotKqae96oNBqJIq9JFwXOTU/foiEEhKB cwvuNcB4NZ+Aryu4qzBW5HUG2SxZl9ozlJptkfYfIzH02bxpkoEKhMTzHtAGp7Vm3fk hRJpHGFvlZMgHttLEOXOhmzklxSPvqtuQphfFWk= DKIM-Signature: v=1; a=rsa-sha1; c=simple/simple; d=abv.bg; s=smtp-out; t=1211305352; bh=az1tGrdjfYGaWLGZZOldBZtex4U=; h=Received:Date:From: To:Message-ID:Subject:MIME-Version:Content-Type:X-Priority: X-Mailer:X-Originating-IP:DomainKey; b=SEFU9Unssdu72MDyjrLts+b4yFa yD0rlFqcTBzEDag2hH2yjK3YI1JvbYMtgygb2SPinPfrS4G5a7HNsfl5OE8IOB2G7z9 GkzXtG4e1pAb8nb1Ca1ztOGPUqsYT5Bv3J5vdu1/L4d8+CeRZSIYQtfLoXAaPt8gnP1 aqbWzcWMhM= Received: from mail54.abv.bg (localhost [127.0.0.1]) by mail54.abv.bg (Postfix) with ESMTP id 335081A261A for ; Tue, 20 May 2008 20:42:38 +0300 (EEST) Date: Tue, 20 May 2008 20:42:38 +0300 (EEST) From: Mario Pavlov To: freebsd-acpi@freebsd.org Message-ID: <1749772363.84307.1211305358208.JavaMail.apache@mail54.abv.bg> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_84305_766717363.1211305358202" X-Priority: 3 X-Mailer: AbvMail 1.0 X-Originating-IP: 78.128.21.208 X-Mailman-Approved-At: Tue, 20 May 2008 18:10:12 +0000 Subject: Re: PCI bridge with I/O decode 0x0-0x0 X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 May 2008 17:42:42 -0000 ------=_Part_84305_766717363.1211305358202 Content-Type: text/plain; charset="windows-1251" Content-Transfer-Encoding: 8bit >Hi list, >I've recently bought a laptop Acer Aspire 5920 >but I can't get the LAN and WLAN to work >I thought it's because of the drivers but now I think it's an ACPI problem >here is a verbose logging of the boot process and some comments: >http://lists.freebsd.org/pipermail/freebsd-mobile/2008-May/010727.html >I've tried to dump and decompile the AML image but I'm not very much in the ASL coding and I understand nearly nothing >however I've tried to find on OS specific parts in the code >this is what I found: > > Scope (\_SB) > { > Method (_INI, 0, NotSerialized) > { > If (DTSE) > { > TRAP (0x47) > } > > Store (0x07D0, OSYS) > If (CondRefOf (_OSI, Local0)) > { > If (_OSI ("Linux")) > { > Store (0x01, LINX) > } > > If (_OSI ("Windows 2001")) > { > Store (0x07D1, OSYS) > } > > If (_OSI ("Windows 2001 SP1")) > { > Store (0x07D1, OSYS) > } > > If (_OSI ("Windows 2001 SP2")) > { > Store (0x07D2, OSYS) > } > > If (_OSI ("Windows 2006")) > { > Store (0x07D6, OSYS) > } > } > > If (LAnd (MPEN, LEqual (OSYS, 0x07D1))) > { > TRAP (0x3D) > } > > TRAP (0x2B) > TRAP (0x32) > } > } > >I have no idea what is this for...but I've tried to add an Else clause and some combinations in >like that: > > If (_OSI ("Windows 2006")) > { > Store (0x07D6, OSYS) > } > Else > { > Store (0x01, LINX) > } > >but the result is just the same... >I'm not even sure where exactly the problem is... >Could you give me a hand please >thank you > >Regards >MGP Hi again, I've figured what's the node name of the LAN card - RP06.LANE but I don't understand what does this code mean... do you see any error here ? Device (RP06) { Name (_ADR, 0x001C0005) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x10 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 } }) } } Device (LANE) { Name (_ADR, 0x00) Name (_PRW, Package (0x02) { 0x09, 0x04 }) Name (LANP, 0x00) Method (_PSW, 1, NotSerialized) { If (LEqual (Arg0, 0x00)) { Store (0x00, LANP) } Else { Store (0x01, LANP) } } } } you can find the whole code attached... guys could you please have a look on that I'm sure you could give me some hints... thank you regards MGP ----------------------------------------------------------------- Òúðñè ñå äâîéíèê! http://zoom.bg/page.php?bid=6 ------=_Part_84305_766717363.1211305358202 Content-Type: application/octet-stream; name=laptop.asl Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=laptop.asl /* RSD PTR: OEM=PTLTD, ACPI_Rev=2.0x (2) XSDT=0x7f6d2ef1, length=36, cksum=209 */ /* XSDT: Length=132, Revision=1, Checksum=232, OEMID=ACRSYS, OEM Table ID=ACRPRDCT, OEM Revision=0x6040000, Creator ID= LTP, Creator Revision=0x0 Entries={ 0x7f6ddc2a, 0x7f6ddd1e, 0x7f6ddd86, 0x7f6dddbe, 0x7f6dddfa, 0x7f6dde62, 0x7f6dde8a, 0x7f6d4766, 0x7f6d40ca, 0x7f6d3531, 0x7f6d348b, 0x7f6d2f75 } */ /* FACP: Length=244, Revision=3, Checksum=207, OEMID=INTEL, OEM Table ID=CRESTLNE, OEM Revision=0x6040000, Creator ID=ALAN, Creator Revision=0x1 FACS=0x7f6e0fc0, DSDT=0x7f6d4db5 INT_MODEL=PIC Preferred_PM_Profile=Mobile (2) SCI_INT=9 SMI_CMD=0xb2, ACPI_ENABLE=0xf0, ACPI_DISABLE=0xf1, S4BIOS_REQ=0x0 PSTATE_CNT=0x80 PM1a_EVT_BLK=0x1000-0x1003 PM1a_CNT_BLK=0x1004-0x1005 PM2_CNT_BLK=0x1020-0x1020 PM_TMR_BLK=0x1008-0x100b GPE0_BLK=0x1028-0x102f CST_CNT=0x85 P_LVL2_LAT=1 us, P_LVL3_LAT=35 us FLUSH_SIZE=0, FLUSH_STRIDE=0 DUTY_OFFSET=1, DUTY_WIDTH=3 DAY_ALRM=13, MON_ALRM=0, CENTURY=50 IAPC_BOOT_ARCH= Flags={WBINVD,PROC_C1,SLP_BUTTON,RTC_S4,DCK_CAP} X_FACS=0x7f6e0fc0, X_DSDT=0x7f6d4db5 X_PM1a_EVT_BLK=0x1000:0[32] (IO) X_PM1a_CNT_BLK=0x1004:0[16] (IO) X_PM_TMR_BLK=0x1008:0[32] (IO) X_GPE0_BLK=0x1028:0[64] (IO) */ /* FACS: Length=64, HwSig=0x00000000, Firm_Wake_Vec=0x00000000 Global_Lock= Flags= Version=1 */ /* DSDT: Length=36353, Revision=2, Checksum=167, OEMID=INTEL, OEM Table ID=CRESTLNE, OEM Revision=0x6040000, Creator ID=MSFT, Creator Revision=0x3000001 */ /* APIC: Length=104, Revision=1, Checksum=204, OEMID=INTEL, OEM Table ID=CRESTLNE, OEM Revision=0x6040000, Creator ID=LOHR, Creator Revision=0x5a Local APIC ADDR=0xfee00000 Flags={PC-AT} Type=Local APIC ACPI CPU=0 Flags={ENABLED} APIC ID=0 Type=Local APIC ACPI CPU=1 Flags={ENABLED} APIC ID=1 Type=IO APIC APIC ID=1 INT BASE=0 ADDR=0x00000000fec00000 Type=INT Override BUS=0 IRQ=0 INTR=2 Flags={Polarity=conforming, Trigger=conforming} Type=INT Override BUS=0 IRQ=9 INTR=9 Flags={Polarity=active-hi, Trigger=level} Type=Local NMI ACPI CPU=0 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local NMI ACPI CPU=1 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} */ /* HPET: Length=56, Revision=1, Checksum=10, OEMID=INTEL, OEM Table ID=CRESTLNE, OEM Revision=0x6040000, Creator ID=LOHR, Creator Revision=0x5a HPET Number=0 ADDR=0xfed00000:0[0] (Memory) HW Rev=0x1 Comparitors=2 Counter Size=1 Legacy IRQ routing capable={TRUE} PCI Vendor ID=0x8086 Minimal Tick=128 */ /* MCFG: Length=60, Revision=1, Checksum=50, OEMID=INTEL, OEM Table ID=CRESTLNE, OEM Revision=0x6040000, Creator ID=LOHR, Creator Revision=0x5a Base Address= 0x00000000e0000000 Segment Group= 0x0000 Start Bus= 0 End Bus= 255 */ /* APIC: Length=104, Revision=1, Checksum=19, OEMID=PTLTD, OEM Table ID= APIC, OEM Revision=0x6040000, Creator ID= LTP, Creator Revision=0x0 Local APIC ADDR=0xfee00000 Flags={PC-AT} Type=Local APIC ACPI CPU=0 Flags={ENABLED} APIC ID=0 Type=Local APIC ACPI CPU=1 Flags={ENABLED} APIC ID=1 Type=IO APIC APIC ID=2 INT BASE=0 ADDR=0x00000000fec00000 Type=Local NMI ACPI CPU=0 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=Local NMI ACPI CPU=1 LINT Pin=1 Flags={Polarity=active-hi, Trigger=edge} Type=INT Override BUS=0 IRQ=0 INTR=2 Flags={Polarity=active-hi, Trigger=edge} Type=INT Override BUS=0 IRQ=9 INTR=9 Flags={Polarity=active-hi, Trigger=level} */ /* BOOT: Length=40, Revision=1, Checksum=166, OEMID=PTLTD, OEM Table ID=$SBFTBL$, OEM Revision=0x6040000, Creator ID= LTP, Creator Revision=0x1 */ /* SLIC: Length=374, Revision=1, Checksum=56, OEMID=ACRSYS, OEM Table ID=ACRPRDCT, OEM Revision=0x6040000, Creator ID=acer, Creator Revision=0x0 */ /* SSDT: Length=1615, Revision=1, Checksum=114, OEMID=SataRe, OEM Table ID=SataPri, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20050624 */ /* SSDT: Length=1692, Revision=1, Checksum=15, OEMID=SataRe, OEM Table ID=SataSec, OEM Revision=0x1000, Creator ID=INTL, Creator Revision=0x20050624 */ /* SSDT: Length=607, Revision=1, Checksum=200, OEMID=PmRef, OEM Table ID=Cpu0Tst, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20050624 */ /* SSDT: Length=166, Revision=1, Checksum=109, OEMID=PmRef, OEM Table ID=Cpu1Tst, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20050624 */ /* SSDT: Length=1302, Revision=1, Checksum=209, OEMID=PmRef, OEM Table ID=CpuPm, OEM Revision=0x3000, Creator ID=INTL, Creator Revision=0x20050624 */ /* * Intel ACPI Component Architecture * AML Disassembler version 20070320 * * Disassembly of /tmp/acpidump.LbI61E, Thu May 15 23:25:46 2008 * * * Original Table Header: * Signature "DSDT" * Length 0x0000A253 (41555) * Revision 0x02 * OEM ID "INTEL " * OEM Table ID "CRESTLNE" * OEM Revision 0x06040000 (100925440) * Creator ID "MSFT" * Creator Revision 0x03000001 (50331649) */ DefinitionBlock ("/tmp/acpidump.aml", "DSDT", 2, "INTEL ", "CRESTLNE", 0x06040000) { External (_PSS, IntObj) External (\_PR_.CPU0._PPC) Mutex (MUTX, 0x00) OperationRegion (PRT0, SystemIO, 0x80, 0x04) Field (PRT0, DWordAcc, Lock, Preserve) { P80H, 32 } Method (P8XH, 2, Serialized) { If (LEqual (Arg0, 0x00)) { Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) } If (LEqual (Arg0, 0x01)) { Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08) ), P80D) } If (LEqual (Arg0, 0x02)) { Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10) ), P80D) } If (LEqual (Arg0, 0x03)) { Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18) ), P80D) } Store (P80D, P80H) } Method (\_PIC, 1, NotSerialized) { Store (Arg0, GPIC) } Method (_PTS, 1, NotSerialized) { Store (0xCC, P80H) If (LEqual (Arg0, 0x05)) { \_SB.PHSR (0x05, 0x00) } If (LEqual (Arg0, 0x04)) { Store (0x01, INS4) } If (\_SB.ECOK) { If (LEqual (Arg0, 0x04)) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (0x01, \_SB.PCI0.LPCB.EC0.FLS4) Release (\_SB.PCI0.LPCB.EC0.MUT1) } } Store (0xCB, P80H) } Method (_WAK, 1, NotSerialized) { Store (0xEE, P80H) If (LEqual (Arg0, 0x03)) { If (LOr (LEqual (OSYS, 0x07D1), LEqual (OSYS, 0x07D2))) { TRAP (0x3E) } } If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04))) { If (And (CFGD, 0x01000000)) { If (LAnd (And (CFGD, 0xF0), LEqual (OSYS, 0x07D1))) { TRAP (0x3D) } } } If (NEXP) { If (And (OSCC, 0x02)) { \_SB.PCI0.NHPG () } If (And (OSCC, 0x04)) { \_SB.PCI0.NPME () } } If (LEqual (RP1D, 0x00)) { Notify (\_SB.PCI0.RP01, 0x00) } If (LEqual (RP2D, 0x00)) { Notify (\_SB.PCI0.RP02, 0x00) } If (LEqual (RP3D, 0x00)) { Notify (\_SB.PCI0.RP03, 0x00) } If (LEqual (RP4D, 0x00)) { Notify (\_SB.PCI0.RP04, 0x00) } If (LEqual (RP5D, 0x00)) { Notify (\_SB.PCI0.RP05, 0x00) } If (LEqual (RP6D, 0x00)) { Notify (\_SB.PCI0.RP06, 0x00) } If (LEqual (Arg0, 0x03)) { TRAP (0x46) } If (LEqual (Arg0, 0x04)) { Store (0x00, INS4) \_SB.PHSR (0x02, 0x00) If (DTSE) { TRAP (0x47) } Notify (\_SB.PWRB, 0x02) } \_PR.RPPC () If (LOr (LEqual (Arg0, 0x04), LEqual (Arg0, 0x03))) { Store (\_SB.BTEN, \_SB.PCI0.LPCB.EC0.BLTH) Store (\_SB.WLAN, \_SB.PCI0.LPCB.EC0.WLAN) Store (0x01, \_SB.PCI0.LPCB.EC0.CPLE) } Store (0xED, P80H) Return (0x00) } Method (GETB, 3, Serialized) { Multiply (Arg0, 0x08, Local0) Multiply (Arg1, 0x08, Local1) CreateField (Arg2, Local0, Local1, TBF3) Return (TBF3) } Method (PNOT, 0, Serialized) { If (MPEN) { If (And (PDC0, 0x08)) { Notify (\_PR.CPU0, 0x80) If (And (PDC0, 0x10)) { Sleep (0x64) Notify (\_PR.CPU0, 0x81) } } If (And (PDC1, 0x08)) { Notify (\_PR.CPU1, 0x80) If (And (PDC1, 0x10)) { Sleep (0x64) Notify (\_PR.CPU1, 0x81) } } } Else { Notify (\_PR.CPU0, 0x80) Sleep (0x64) Notify (\_PR.CPU0, 0x81) } } Method (TRAP, 1, Serialized) { Store (Arg0, SMIF) Store (0x00, TRP0) Return (SMIF) } Scope (\_SB) { Method (_INI, 0, NotSerialized) { If (DTSE) { TRAP (0x47) } Store (0x07D0, OSYS) If (CondRefOf (_OSI, Local0)) { If (_OSI ("Linux")) { Store (0x01, LINX) } If (_OSI ("Windows 2001")) { Store (0x07D1, OSYS) } If (_OSI ("Windows 2001 SP1")) { Store (0x07D1, OSYS) } If (_OSI ("Windows 2001 SP2")) { Store (0x07D2, OSYS) } If (_OSI ("Windows 2006")) { Store (0x07D6, OSYS) } } If (LAnd (MPEN, LEqual (OSYS, 0x07D1))) { TRAP (0x3D) } TRAP (0x2B) TRAP (0x32) } } OperationRegion (GNVS, SystemMemory, 0x7F6E0D2C, 0x0100) Field (GNVS, AnyAcc, Lock, Preserve) { OSYS, 16, SMIF, 8, PRM0, 8, PRM1, 8, SCIF, 8, PRM2, 8, PRM3, 8, LCKF, 8, PRM4, 8, PRM5, 8, P80D, 32, LIDS, 8, PWRS, 8, DBGS, 8, LINX, 8, Offset (0x14), ACT1, 8, ACTT, 8, PSVT, 8, TC1V, 8, TC2V, 8, TSPV, 8, CRTT, 8, DTSE, 8, DTS1, 8, DTS2, 8, DTSP, 8, Offset (0x28), APIC, 8, MPEN, 8, PCP0, 8, PCP1, 8, PPCM, 8, Offset (0x32), Offset (0x3C), IGDS, 8, TLST, 8, CADL, 8, PADL, 8, CSTE, 16, NSTE, 16, SSTE, 16, NDID, 8, DID1, 32, DID2, 32, DID3, 32, DID4, 32, DID5, 32, Offset (0x67), BLCS, 8, BRTL, 8, ALSE, 8, ALAF, 8, LLOW, 8, LHIH, 8, Offset (0x6E), EMAE, 8, EMAP, 16, EMAL, 16, Offset (0x74), MEFE, 8, Offset (0x78), TPMP, 8, TPME, 8, Offset (0x82), GTF0, 56, GTF2, 56, IDEM, 8, GTF1, 56, Offset (0xAA), ASLB, 32, IBTT, 8, IPAT, 8, ITVF, 8, ITVM, 8, IPSC, 8, IBLC, 8, IBIA, 8, ISSC, 8, I409, 8, I509, 8, I609, 8, I709, 8, IDMM, 8, IDMS, 8, IF1E, 8, HVCO, 8, NXD1, 32, NXD2, 32, NXD3, 32, NXD4, 32, NXD5, 32, NXD6, 32, NXD7, 32, NXD8, 32, OSCC, 8, OSCS, 8, NEXP, 8, Offset (0xF0) } Name (\DSEN, 0x01) Name (\ECON, 0x00) Name (\GPIC, 0x00) Name (\CTYP, 0x00) Name (\L01C, 0x00) Name (\VFN0, 0x00) Name (\VFN1, 0x00) Name (BRTN, 0x00) Name (BOWN, 0x00) Name (BRUD, 0x00) Scope (\_GPE) { Method (_L01, 0, NotSerialized) { Add (L01C, 0x01, L01C) P8XH (0x00, 0x01) P8XH (0x01, L01C) If (LAnd (LEqual (RP1D, 0x00), \_SB.PCI0.RP01.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP01.PDCX) { Store (0x01, \_SB.PCI0.RP01.PDCX) Store (0x01, \_SB.PCI0.RP01.HPSX) Notify (\_SB.PCI0.RP01, 0x00) } Else { Store (0x01, \_SB.PCI0.RP01.HPSX) } } If (LAnd (LEqual (RP2D, 0x00), \_SB.PCI0.RP02.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP02.PDCX) { Store (0x01, \_SB.PCI0.RP02.PDCX) Store (0x01, \_SB.PCI0.RP02.HPSX) Notify (\_SB.PCI0.RP02, 0x00) } Else { Store (0x01, \_SB.PCI0.RP02.HPSX) } } If (LAnd (LEqual (RP3D, 0x00), \_SB.PCI0.RP03.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP03.PDCX) { Store (0x01, \_SB.PCI0.RP03.PDCX) Store (0x01, \_SB.PCI0.RP03.HPSX) Notify (\_SB.PCI0.RP03, 0x00) } Else { Store (0x01, \_SB.PCI0.RP03.HPSX) } } If (LAnd (LEqual (RP4D, 0x00), \_SB.PCI0.RP04.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP04.PDCX) { Store (0x01, \_SB.PCI0.RP04.PDCX) Store (0x01, \_SB.PCI0.RP04.HPSX) Notify (\_SB.PCI0.RP04, 0x00) } Else { Store (0x01, \_SB.PCI0.RP04.HPSX) } } If (LAnd (LEqual (RP5D, 0x00), \_SB.PCI0.RP05.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP05.PDCX) { Store (0x01, \_SB.PCI0.RP05.PDCX) Store (0x01, \_SB.PCI0.RP05.HPSX) Notify (\_SB.PCI0.RP05, 0x00) } Else { Store (0x01, \_SB.PCI0.RP05.HPSX) } } If (LAnd (LEqual (RP6D, 0x00), \_SB.PCI0.RP06.HPSX)) { Sleep (0x64) If (\_SB.PCI0.RP06.PDCX) { Store (0x01, \_SB.PCI0.RP06.PDCX) Store (0x01, \_SB.PCI0.RP06.HPSX) Notify (\_SB.PCI0.RP06, 0x00) } Else { Store (0x01, \_SB.PCI0.RP06.HPSX) } } } Method (_L02, 0, NotSerialized) { Store (0x00, GPEC) If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (DTSP, \_SB.PCI0.LPCB.EC0.DESP) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Notify (\_TZ.THRM, 0x80) } Method (_L03, 0, NotSerialized) { Notify (\_SB.PCI0.USB1, 0x02) } Method (_L04, 0, NotSerialized) { Notify (\_SB.PCI0.USB2, 0x02) } Method (_L05, 0, NotSerialized) { Notify (\_SB.PCI0.USB5, 0x02) } Method (_L06, 0, NotSerialized) { If (\_SB.PCI0.GFX0.GSSE) { \_SB.PCI0.GFX0.GSCI () } Else { Store (0x01, SCIS) } } Method (_L09, 0, NotSerialized) { If (\_SB.PCI0.RP01.PSPX) { Store (0x01, \_SB.PCI0.RP01.PSPX) Store (0x01, \_SB.PCI0.RP01.PMSX) Notify (\_SB.PCI0.RP01, 0x02) } If (\_SB.PCI0.RP02.PSPX) { Store (0x01, \_SB.PCI0.RP02.PSPX) Store (0x01, \_SB.PCI0.RP02.PMSX) Notify (\_SB.PCI0.RP02, 0x02) } If (\_SB.PCI0.RP03.PSPX) { Store (0x01, \_SB.PCI0.RP03.PSPX) Store (0x01, \_SB.PCI0.RP03.PMSX) Notify (\_SB.PCI0.RP03, 0x02) } If (\_SB.PCI0.RP04.PSPX) { Store (0x01, \_SB.PCI0.RP04.PSPX) Store (0x01, \_SB.PCI0.RP04.PMSX) Notify (\_SB.PCI0.RP04, 0x02) } If (\_SB.PCI0.RP05.PSPX) { Store (0x01, \_SB.PCI0.RP05.PSPX) Store (0x01, \_SB.PCI0.RP05.PMSX) Notify (\_SB.PCI0.RP05, 0x02) } If (\_SB.PCI0.RP06.PSPX) { Store (0x01, \_SB.PCI0.RP06.PSPX) Store (0x01, \_SB.PCI0.RP06.PMSX) Notify (\_SB.PCI0.RP06, 0x02) } } Method (_L0B, 0, NotSerialized) { Notify (\_SB.PCI0.PCIB, 0x02) } Method (_L0C, 0, NotSerialized) { Notify (\_SB.PCI0.USB3, 0x02) } Method (_L0D, 0, NotSerialized) { If (\_SB.PCI0.EHC1.PMES) { Store (0x01, \_SB.PCI0.EHC1.PMES) Notify (\_SB.PCI0.EHC1, 0x02) } If (\_SB.PCI0.EHC2.PMES) { Store (0x01, \_SB.PCI0.EHC2.PMES) Notify (\_SB.PCI0.EHC2, 0x02) } If (\_SB.PCI0.HDEF.PMES) { Store (0x01, \_SB.PCI0.HDEF.PMES) Notify (\_SB.PCI0.HDEF, 0x02) } } Method (_L0E, 0, NotSerialized) { Notify (\_SB.PCI0.USB4, 0x02) } } Scope (\_PR) { Processor (CPU0, 0x00, 0x00001010, 0x06) {} Processor (CPU1, 0x01, 0x00001010, 0x06) {} Method (RPPC, 0, NotSerialized) { If (LEqual (OSYS, 0x07D2)) { If (And (CFGD, 0x01)) { If (LGreater (\_PR.CPU0._PPC, 0x00)) { Subtract (\_PR.CPU0._PPC, 0x01, \_PR.CPU0._PPC) PNOT () Add (\_PR.CPU0._PPC, 0x01, \_PR.CPU0._PPC) PNOT () } Else { Add (\_PR.CPU0._PPC, 0x01, \_PR.CPU0._PPC) PNOT () Subtract (\_PR.CPU0._PPC, 0x01, \_PR.CPU0._PPC) PNOT () } } } } } Scope (\_TZ) { ThermalZone (THRM) { Method (_TMP, 0, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.CTMP, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) Return (Add (Multiply (Local0, 0x0A), 0x0AAC)) } Else { Return (0x0C3C) } } Method (_PSV, 0, NotSerialized) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.TJ85, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LEqual (Local0, 0x00)) { Return (Add (Multiply (0x50, 0x0A), 0x0AAC)) } Else { Return (Add (Multiply (0x63, 0x0A), 0x0AAC)) } } Name (_PSL, Package (0x01) { \_PR.CPU0 }) Name (_TSP, 0x28) Name (_TC1, 0x02) Name (_TC2, 0x03) Method (_CRT, 0, NotSerialized) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.TJ85, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LEqual (Local0, 0x00)) { Return (Add (Multiply (0x61, 0x0A), 0x0AAC)) } Else { Return (Add (Multiply (0x69, 0x0A), 0x0AAC)) } } } } Method (BRTW, 1, Serialized) { Store (Arg0, Local1) If (LEqual (ALSE, 0x02)) { Store (Divide (Multiply (ALAF, Arg0), 0x64, ), Local1) If (LGreater (Local1, 0x64)) { Store (0x64, Local1) } } Store (Divide (Multiply (0xFF, Local1), 0x64, ), Local0) Store (Local0, PRM0) Store (Arg0, BRTL) If (LEqual (TRAP (0x12), 0x00)) { P8XH (0x02, Local0) } } Method (HKDS, 1, Serialized) { If (LEqual (0x00, And (0x03, DSEN))) { If (LEqual (TRAP (Arg0), 0x00)) { If (LNotEqual (CADL, PADL)) { Store (CADL, PADL) If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6))) { Notify (\_SB.PCI0, 0x00) } Else { Notify (\_SB.PCI0.GFX0, 0x00) } Sleep (0x02EE) } Notify (\_SB.PCI0.GFX0, 0x80) } } If (LEqual (0x01, And (0x03, DSEN))) { If (LEqual (TRAP (Increment (Arg0)), 0x00)) { Notify (\_SB.PCI0.GFX0, 0x81) } } } Method (LSDS, 1, Serialized) { If (Arg0) { HKDS (0x0C) } Else { HKDS (0x0E) } If (LNotEqual (And (0x03, DSEN), 0x01)) { Sleep (0x32) While (LEqual (And (0x03, DSEN), 0x02)) { Sleep (0x32) } } } Method (VTOB, 1, NotSerialized) { Store (0x01, Local0) ShiftLeft (Local0, Arg0, Local0) Return (Local0) } Method (BTOV, 1, NotSerialized) { ShiftRight (Arg0, 0x01, Local0) Store (0x00, Local1) While (Local0) { Increment (Local1) ShiftRight (Local0, 0x01, Local0) } Return (Local1) } Method (MKWD, 2, NotSerialized) { If (And (Arg1, 0x80)) { Store (0xFFFF0000, Local0) } Else { Store (Zero, Local0) } Or (Local0, Arg0, Local0) Or (Local0, ShiftLeft (Arg1, 0x08), Local0) Return (Local0) } Method (POSW, 1, NotSerialized) { If (And (Arg0, 0x8000)) { If (LEqual (Arg0, 0xFFFF)) { Return (0xFFFFFFFF) } Else { Not (Arg0, Local0) Increment (Local0) And (Local0, 0xFFFF, Local0) Return (Local0) } } Else { Return (Arg0) } } Method (GBFE, 3, NotSerialized) { CreateByteField (Arg0, Arg1, TIDX) Store (TIDX, Arg2) } Method (PBFE, 3, NotSerialized) { CreateByteField (Arg0, Arg1, TIDX) Store (Arg2, TIDX) } Method (ITOS, 1, NotSerialized) { Store (Buffer (0x09) { /* 0000 */ 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00 }, Local0) Store (Buffer (0x11) { "0123456789ABCDEF" }, Local7) Store (0x08, Local1) Store (0x00, Local2) Store (0x00, Local3) While (Local1) { Decrement (Local1) And (ShiftRight (Arg0, ShiftLeft (Local1, 0x02)), 0x0F, Local4) If (Local4) { Store (Ones, Local3) } If (Local3) { GBFE (Local7, Local4, RefOf (Local5)) PBFE (Local0, Local2, Local5) Increment (Local2) } } Return (Local0) } OperationRegion (NV1, SystemIO, 0x72, 0x02) Field (NV1, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x6E), INS4, 1, Offset (0x70), DLST, 8 } Scope (\_SB) { Name (ECOK, 0x00) Device (PCI0) { Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } Name (_HID, EisaId ("PNP0A08")) Name (_CID, 0x030AD041) Device (MCHC) { Name (_ADR, 0x00) OperationRegion (HBUS, PCI_Config, 0x40, 0xC0) Field (HBUS, DWordAcc, NoLock, Preserve) { EPEN, 1, , 11, EPBR, 20, Offset (0x08), MHEN, 1, , 13, MHBR, 18, Offset (0x14), , 1, PEGA, 1, Offset (0x20), PXEN, 1, PXSZ, 2, , 23, PXBR, 6, Offset (0x28), DIEN, 1, , 11, DIBR, 20, Offset (0x30), IPEN, 1, , 11, IPBR, 20, Offset (0x50), , 4, PM0H, 2, Offset (0x51), PM1L, 2, , 2, PM1H, 2, Offset (0x52), PM2L, 2, , 2, PM2H, 2, Offset (0x53), PM3L, 2, , 2, PM3H, 2, Offset (0x54), PM4L, 2, , 2, PM4H, 2, Offset (0x55), PM5L, 2, , 2, PM5H, 2, Offset (0x56), PM6L, 2, , 2, PM6H, 2, Offset (0x57), , 7, HENA, 1, Offset (0x62), TUUD, 16, Offset (0x70), , 4, TLUD, 12 } } Name (BUF0, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y00, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y01, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y02, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y03, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y04, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y05, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y06, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y07, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y08, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y09, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0A, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, _Y0B, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, _Y0C, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xDFFFFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, _Y0D, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xF0000000, // Range Minimum 0xFEBFFFFF, // Range Maximum 0x00000000, // Translation Offset 0x0EC00000, // Length ,, _Y0E, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFED40000, // Range Minimum 0xFED44FFF, // Range Maximum 0x00000000, // Translation Offset 0x00000000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) { If (^MCHC.PM1L) { CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN) Store (Zero, C0LN) } If (LEqual (^MCHC.PM1L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW) Store (Zero, C0RW) } If (^MCHC.PM1H) { CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN) Store (Zero, C4LN) } If (LEqual (^MCHC.PM1H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW) Store (Zero, C4RW) } If (^MCHC.PM2L) { CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN) Store (Zero, C8LN) } If (LEqual (^MCHC.PM2L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW) Store (Zero, C8RW) } If (^MCHC.PM2H) { CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN) Store (Zero, CCLN) } If (LEqual (^MCHC.PM2H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW) Store (Zero, CCRW) } If (^MCHC.PM3L) { CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN) Store (Zero, D0LN) } If (LEqual (^MCHC.PM3L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW) Store (Zero, D0RW) } If (^MCHC.PM3H) { CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN) Store (Zero, D4LN) } If (LEqual (^MCHC.PM3H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW) Store (Zero, D4RW) } If (^MCHC.PM4L) { CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN) Store (Zero, D8LN) } If (LEqual (^MCHC.PM4L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW) Store (Zero, D8RW) } If (^MCHC.PM4H) { CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN) Store (Zero, DCLN) } If (LEqual (^MCHC.PM4H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW) Store (Zero, DCRW) } If (^MCHC.PM5L) { CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN) Store (Zero, E0LN) } If (LEqual (^MCHC.PM5L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW) Store (Zero, E0RW) } If (^MCHC.PM5H) { CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN) Store (Zero, E4LN) } If (LEqual (^MCHC.PM5H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW) Store (Zero, E4RW) } If (^MCHC.PM6L) { CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN) Store (Zero, E8LN) } If (LEqual (^MCHC.PM6L, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW) Store (Zero, E8RW) } If (^MCHC.PM6H) { CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN) Store (Zero, ECLN) } If (LEqual (^MCHC.PM6H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW) Store (Zero, ECRW) } If (^MCHC.PM0H) { CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN) Store (Zero, F0LN) } If (LEqual (^MCHC.PM0H, 0x01)) { CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW) Store (Zero, F0RW) } CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN) CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX) CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, M1LN) CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M2MN) CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M2MX) CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M2LN) ShiftLeft (^MCHC.PXBR, 0x1A, M1MX) ShiftRight (0x10000000, ^MCHC.PXSZ, Local0) Add (M1MX, Local0, M2MN) Add (Subtract (M2MX, M2MN), 0x01, M2LN) Subtract (M1MX, 0x01, M1MX) ShiftLeft (^MCHC.TLUD, 0x14, M1MN) Add (Subtract (M1MX, M1MN), 0x01, M1LN) Return (BUF0) } Name (GUID, Buffer (0x10) { /* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40, /* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66 }) Method (_OSC, 4, Serialized) { If (LAnd (LEqual (Arg0, GUID), NEXP)) { Store (Arg3, Local0) CreateDWordField (Local0, 0x00, CDW1) CreateDWordField (Local0, 0x04, CDW2) CreateDWordField (Local0, 0x08, CDW3) Store (CDW2, OSCS) Store (CDW3, OSCC) If (Not (And (CDW1, 0x01))) { If (And (OSCC, 0x02)) { NHPG () } If (And (OSCC, 0x04)) { NPME () } } If (LNotEqual (Arg1, One)) { Or (CDW1, 0x08, CDW1) } If (LNotEqual (CDW3, OSCC)) { Or (CDW1, 0x10, CDW1) } Store (OSCC, CDW3) Return (Local0) } Else { Or (CDW1, 0x04, CDW1) Return (Local0) } } Method (_PRT, 0, NotSerialized) { If (GPIC) { Return (Package (0x17) { Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0019FFFF, 0x00, 0x00, 0x14 }, Package (0x04) { 0x001AFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x001AFFFF, 0x01, 0x00, 0x15 }, Package (0x04) { 0x001AFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001BFFFF, 0x00, 0x00, 0x16 }, Package (0x04) { 0x001CFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0x001CFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0x001CFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001CFFFF, 0x03, 0x00, 0x13 }, Package (0x04) { 0x001DFFFF, 0x00, 0x00, 0x17 }, Package (0x04) { 0x001DFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0x001DFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0x001FFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0x001FFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0x001FFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0x001FFFFF, 0x03, 0x00, 0x10 } }) } Else { Return (Package (0x17) { Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x0019FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 }, Package (0x04) { 0x001AFFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x001AFFFF, 0x01, \_SB.PCI0.LPCB.LNKF, 0x00 }, Package (0x04) { 0x001AFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0x001BFFFF, 0x00, \_SB.PCI0.LPCB.LNKG, 0x00 }, Package (0x04) { 0x001CFFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0x001CFFFF, 0x01, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x001CFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0x001CFFFF, 0x03, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x001DFFFF, 0x00, \_SB.PCI0.LPCB.LNKH, 0x00 }, Package (0x04) { 0x001DFFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x001DFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0x001FFFFF, 0x00, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x001FFFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x001FFFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x001FFFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 } }) } } Device (PDRC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x01) Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y0F) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00004000, // Address Length _Y10) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y11) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00001000, // Address Length _Y12) Memory32Fixed (ReadWrite, 0x00000000, // Address Base 0x00000000, // Address Length _Y13) Memory32Fixed (ReadWrite, 0xFED20000, // Address Base 0x00020000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED45000, // Address Base 0x0004B000, // Address Length ) }) Method (_CRS, 0, Serialized) { CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y0F._BAS, RBR0) ShiftLeft (\_SB.PCI0.LPCB.RCBA, 0x0E, RBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y10._BAS, MBR0) ShiftLeft (\_SB.PCI0.MCHC.MHBR, 0x0E, MBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, DBR0) ShiftLeft (\_SB.PCI0.MCHC.DIBR, 0x0C, DBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, EBR0) ShiftLeft (\_SB.PCI0.MCHC.EPBR, 0x0C, EBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, XBR0) ShiftLeft (\_SB.PCI0.MCHC.PXBR, 0x1A, XBR0) CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._LEN, XSZ0) ShiftRight (0x10000000, \_SB.PCI0.MCHC.PXSZ, XSZ0) Return (BUF0) } } Device (PEGP) { Name (_ADR, 0x00010000) Method (_STA, 0, NotSerialized) { If (\_SB.PCI0.MCHC.PEGA) { Return (0x0F) } Else { Return (0x00) } } Method (_PRT, 0, NotSerialized) { If (GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKD, 0x00 } }) } } Device (VGA) { Name (_ADR, 0x00) Name (DISW, 0x01) Method (_DOS, 1, NotSerialized) { Store (Arg0, DISW) Store (ShiftRight (And (DISW, 0x04), 0x02), Local0) \_SB.PHSR (0x04, Local0) } Method (_DOD, 0, NotSerialized) { Return (Package (0x03) { 0x80010100, 0x80010110, 0x80010200 }) } Device (LCD) { Name (_ADR, 0x0110) Method (_BCL, 0, NotSerialized) { Store (0x00, \BOWN) Return (Package (0x0C) { 0x50, 0x32, 0x0A, 0x14, 0x1E, 0x28, 0x32, 0x3C, 0x46, 0x50, 0x5A, 0x64 }) } Method (_BCM, 1, NotSerialized) { If (LEqual (\BOWN, 0x00)) { Store (Subtract (Divide (Arg0, 0x0A, ), 0x01), Local0) Store (Local0, BRTN) Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (Local0, \_SB.PCI0.LPCB.EC0.BLVL) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LLess (OSYS, 0x07D6)) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Sleep (0xC8) Store (0x05, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } } Else { Store (0x00, \BOWN) } } Method (_BQC, 0, NotSerialized) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BLVL, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) Store (Local0, BRTN) Return (Multiply (Add (Local0, 0x01), 0x0A)) } } Device (CRT) { Name (_ADR, 0x0100) } Device (TV) { Name (_ADR, 0x0200) } } } Device (GFX0) { Name (_ADR, 0x00020000) Method (_STA, 0, NotSerialized) { If (\_SB.PCI0.MCHC.PEGA) { Return (0x00) } Else { Return (0x0F) } } Method (_DOS, 1, NotSerialized) { Store (And (Arg0, 0x07), DSEN) } Method (_DOD, 0, NotSerialized) { Store (0x00, NDID) If (LNotEqual (DIDL, Zero)) { Store (SDDL (DID1), DID1) } If (LNotEqual (DDL2, Zero)) { Store (SDDL (DID2), DID2) } If (LNotEqual (DDL3, Zero)) { Store (SDDL (DID3), DID3) } If (LNotEqual (DDL4, Zero)) { Store (SDDL (DID4), DID4) } If (LNotEqual (DDL5, Zero)) { Store (SDDL (DID5), DID5) } If (LEqual (NDID, 0x01)) { Name (TMP1, Package (0x01) { 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP1, 0x00)) Return (TMP1) } If (LEqual (NDID, 0x02)) { Name (TMP2, Package (0x02) { 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP2, 0x00)) Store (Or (0x00010000, DID2), Index (TMP2, 0x01)) Return (TMP2) } If (LEqual (NDID, 0x03)) { Name (TMP3, Package (0x03) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP3, 0x00)) Store (Or (0x00010000, DID2), Index (TMP3, 0x01)) Store (Or (0x00010000, DID3), Index (TMP3, 0x02)) Return (TMP3) } If (LEqual (NDID, 0x04)) { Name (TMP4, Package (0x04) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP4, 0x00)) Store (Or (0x00010000, DID2), Index (TMP4, 0x01)) Store (Or (0x00010000, DID3), Index (TMP4, 0x02)) Store (Or (0x00010000, DID4), Index (TMP4, 0x03)) Return (TMP4) } If (LGreater (NDID, 0x04)) { Name (TMP5, Package (0x05) { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }) Store (Or (0x00010000, DID1), Index (TMP5, 0x00)) Store (Or (0x00010000, DID2), Index (TMP5, 0x01)) Store (Or (0x00010000, DID3), Index (TMP5, 0x02)) Store (Or (0x00010000, DID4), Index (TMP5, 0x03)) Store (Or (0x00010000, DID4), Index (TMP5, 0x04)) Return (TMP5) } Return (Package (0x01) { 0x0400 }) } Device (DD01) { Method (_ADR, 0, Serialized) { If (LEqual (DID1, 0x00)) { Return (0x01) } Else { Return (And (0xFFFF, DID1)) } } Method (_DCS, 0, NotSerialized) { Return (CDDS (DID1)) } Method (_DGS, 0, NotSerialized) { Return (NDDS (DID1)) } Method (_DSS, 1, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD02) { Method (_ADR, 0, Serialized) { If (LEqual (DID2, 0x00)) { Return (0x02) } Else { Return (And (0xFFFF, DID2)) } } Method (_DCS, 0, NotSerialized) { Return (CDDS (DID2)) } Method (_DGS, 0, NotSerialized) { Return (NDDS (DID2)) } Method (_DSS, 1, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Device (DD03) { Method (_ADR, 0, Serialized) { If (LEqual (DID3, 0x00)) { Return (0x03) } Else { Return (And (0xFFFF, DID3)) } } Method (_DCS, 0, NotSerialized) { If (LEqual (DID3, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID3)) } } Method (_DGS, 0, NotSerialized) { Return (NDDS (DID3)) } Method (_DSS, 1, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } Method (_BCL, 0, NotSerialized) { Store (0x00, \BOWN) Return (Package (0x0C) { 0x50, 0x32, 0x0A, 0x14, 0x1E, 0x28, 0x32, 0x3C, 0x46, 0x50, 0x5A, 0x64 }) } Method (_BCM, 1, NotSerialized) { If (LEqual (\BOWN, 0x00)) { Store (Subtract (Divide (Arg0, 0x0A, ), 0x01), Local0) Store (Local0, BRTN) Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (Local0, \_SB.PCI0.LPCB.EC0.BLVL) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LLess (OSYS, 0x07D6)) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Sleep (0xC8) Store (0x05, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } } Else { Store (0x00, \BOWN) } } Method (_BQC, 0, NotSerialized) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BLVL, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) Store (Local0, BRTN) Return (Multiply (Add (Local0, 0x01), 0x0A)) } } Device (DD04) { Method (_ADR, 0, Serialized) { If (LEqual (DID4, 0x00)) { Return (0x04) } Else { Return (And (0xFFFF, DID4)) } } Method (_DCS, 0, NotSerialized) { If (LEqual (DID4, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID4)) } } Method (_DGS, 0, NotSerialized) { Return (NDDS (DID4)) } Method (_DSS, 1, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } Method (_BCL, 0, NotSerialized) { Store (0x00, \BOWN) Return (Package (0x0C) { 0x50, 0x32, 0x0A, 0x14, 0x1E, 0x28, 0x32, 0x3C, 0x46, 0x50, 0x5A, 0x64 }) } Method (_BCM, 1, NotSerialized) { If (LEqual (\BOWN, 0x00)) { Store (Subtract (Divide (Arg0, 0x0A, ), 0x01), Local0) Store (Local0, BRTN) Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (Local0, \_SB.PCI0.LPCB.EC0.BLVL) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LLess (OSYS, 0x07D6)) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Sleep (0xC8) Store (0x05, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } } Else { Store (0x00, \BOWN) } } Method (_BQC, 0, NotSerialized) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BLVL, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) Store (Local0, BRTN) Return (Multiply (Add (Local0, 0x01), 0x0A)) } } Device (DD05) { Method (_ADR, 0, Serialized) { If (LEqual (DID5, 0x00)) { Return (0x05) } Else { Return (And (0xFFFF, DID5)) } } Method (_DCS, 0, NotSerialized) { If (LEqual (DID5, 0x00)) { Return (0x0B) } Else { Return (CDDS (DID5)) } } Method (_DGS, 0, NotSerialized) { Return (NDDS (DID5)) } Method (_DSS, 1, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) } } } Method (SDDL, 1, NotSerialized) { Increment (NDID) Store (And (Arg0, 0x0F0F), Local0) Or (0x80000000, Local0, Local1) If (LEqual (DIDL, Local0)) { Return (Local1) } If (LEqual (DDL2, Local0)) { Return (Local1) } If (LEqual (DDL3, Local0)) { Return (Local1) } If (LEqual (DDL4, Local0)) { Return (Local1) } If (LEqual (DDL5, Local0)) { Return (Local1) } If (LEqual (DDL6, Local0)) { Return (Local1) } If (LEqual (DDL7, Local0)) { Return (Local1) } If (LEqual (DDL8, Local0)) { Return (Local1) } Return (0x00) } Method (CDDS, 1, NotSerialized) { If (LEqual (CADL, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL2, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL3, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL4, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL5, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL6, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL7, And (Arg0, 0x0F0F))) { Return (0x1F) } If (LEqual (CAL8, And (Arg0, 0x0F0F))) { Return (0x1F) } Return (0x1D) } Method (NDDS, 1, NotSerialized) { If (LEqual (NADL, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL2, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL3, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL4, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL5, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL6, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL7, And (Arg0, 0x0F0F))) { Return (0x01) } If (LEqual (NDL8, And (Arg0, 0x0F0F))) { Return (0x01) } Return (0x00) } Scope (\_SB.PCI0) { OperationRegion (MCHP, PCI_Config, 0x40, 0xC0) Field (MCHP, AnyAcc, NoLock, Preserve) { Offset (0x60), TASM, 10, Offset (0x62) } } OperationRegion (IGDP, PCI_Config, 0x40, 0xC0) Field (IGDP, AnyAcc, NoLock, Preserve) { Offset (0x12), , 1, GIVD, 1, , 2, GUMA, 3, Offset (0x14), , 4, GMFN, 1, Offset (0x18), Offset (0xA4), ASLE, 8, Offset (0xA8), GSSE, 1, GSSB, 14, GSES, 1, Offset (0xB0), Offset (0xB1), CDVL, 5, Offset (0xB2), Offset (0xB5), LBPC, 8, Offset (0xBC), ASLS, 32 } OperationRegion (IGDM, SystemMemory, ASLB, 0x2000) Field (IGDM, AnyAcc, NoLock, Preserve) { SIGN, 128, SIZE, 32, OVER, 32, SVER, 256, VVER, 128, GVER, 128, MBOX, 32, Offset (0x100), DRDY, 32, CSTS, 32, CEVT, 32, Offset (0x120), DIDL, 32, DDL2, 32, DDL3, 32, DDL4, 32, DDL5, 32, DDL6, 32, DDL7, 32, DDL8, 32, CPDL, 32, CPL2, 32, CPL3, 32, CPL4, 32, CPL5, 32, CPL6, 32, CPL7, 32, CPL8, 32, CADL, 32, CAL2, 32, CAL3, 32, CAL4, 32, CAL5, 32, CAL6, 32, CAL7, 32, CAL8, 32, NADL, 32, NDL2, 32, NDL3, 32, NDL4, 32, NDL5, 32, NDL6, 32, NDL7, 32, NDL8, 32, ASLP, 32, TIDX, 32, CHPD, 32, CLID, 32, CDCK, 32, SXSW, 32, EVTS, 32, CNOT, 32, NRDY, 32, Offset (0x200), SCIE, 1, GEFC, 4, GXFC, 3, GESF, 8, Offset (0x204), PARM, 32, DSLP, 32, Offset (0x300), ARDY, 32, ASLC, 32, TCHE, 32, ALSI, 32, BCLP, 32, PFIT, 32, CBLV, 32, BCLM, 320, CPFM, 32, EPFM, 32, Offset (0x400), GVD1, 57344 } Name (DBTB, Package (0x15) { 0x00, 0x07, 0x38, 0x01C0, 0x0E00, 0x3F, 0x01C7, 0x0E07, 0x01F8, 0x0E38, 0x0FC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7000, 0x7007, 0x7038, 0x71C0, 0x7E00 }) Name (CDCT, Package (0x03) { Package (0x03) { 0xC8, 0x0140, 0x0190 }, Package (0x03) { 0xC8, 0x014D, 0x0190 }, Package (0x03) { 0xDE, 0x014D, 0x017D } }) Name (SUCC, 0x01) Name (NVLD, 0x02) Name (CRIT, 0x04) Name (NCRT, 0x06) Method (GSCI, 0, Serialized) { Method (GBDA, 0, Serialized) { If (LEqual (GESF, 0x00)) { Store (0x0279, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x01)) { Store (0x0240, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x04)) { And (PARM, 0xEFFF0000, PARM) And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10), PARM) Or (IBTT, PARM, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x05)) { Store (IPSC, PARM) Or (PARM, ShiftLeft (IPAT, 0x08), PARM) Add (PARM, 0x0100, PARM) Or (PARM, ShiftLeft (LIDS, 0x10), PARM) Add (PARM, 0x00010000, PARM) Or (PARM, ShiftLeft (IBIA, 0x14), PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x06)) { Store (ITVF, PARM) Or (PARM, ShiftLeft (ITVM, 0x04), PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x07)) { Store (GIVD, PARM) XOr (PARM, 0x01, PARM) Or (PARM, ShiftLeft (GMFN, 0x01), PARM) Or (PARM, ShiftLeft (0x02, 0x0B), PARM) If (IDMM) { Or (PARM, ShiftLeft (IDMS, 0x11), PARM) } Else { Or (PARM, ShiftLeft (IDMS, 0x0D), PARM) } Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), Subtract ( CDVL, 0x01))), 0x15), PARM, PARM) Store (0x01, GESF) Return (SUCC) } If (LEqual (GESF, 0x0A)) { Store (0x00, PARM) If (ISSC) { Or (PARM, 0x03, PARM) } Store (0x00, GESF) Return (SUCC) } Store (Zero, GESF) Return (CRIT) } Method (SBCB, 0, Serialized) { If (LEqual (GESF, 0x00)) { Store (0x00, PARM) Store (0xF7FD, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x01)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x03)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x04)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x05)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x06)) { Store (And (PARM, 0x0F), ITVF) Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x07)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x08)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x09)) { And (PARM, 0xFF, IBTT) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x0A)) { And (PARM, 0xFF, IPSC) If (And (ShiftRight (PARM, 0x08), 0xFF)) { And (ShiftRight (PARM, 0x08), 0xFF, IPAT) Decrement (IPAT) } And (ShiftRight (PARM, 0x14), 0x07, IBIA) Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x0B)) { And (ShiftRight (PARM, 0x01), 0x01, IF1E) If (And (PARM, ShiftLeft (0x0F, 0x0D))) { And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) Store (0x00, IDMM) } Else { And (ShiftRight (PARM, 0x11), 0x0F, IDMS) Store (0x01, IDMM) } Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x10)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x11)) { Store (ShiftLeft (LIDS, 0x08), PARM) Add (PARM, 0x0100, PARM) Store (Zero, GESF) Return (SUCC) } If (LEqual (GESF, 0x12)) { If (And (PARM, 0x01)) { If (LEqual (ShiftRight (PARM, 0x01), 0x01)) { Store (0x01, ISSC) } Else { Store (Zero, GESF) Return (CRIT) } } Else { Store (0x00, ISSC) } Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } If (LEqual (GESF, 0x13)) { Store (Zero, GESF) Store (Zero, PARM) Return (SUCC) } Store (Zero, GESF) Return (SUCC) } If (LEqual (GEFC, 0x04)) { Store (GBDA (), GXFC) } If (LEqual (GEFC, 0x06)) { Store (SBCB (), GXFC) } Store (0x00, GEFC) Store (0x01, SCIS) Store (0x00, GSSE) Store (0x00, SCIE) Return (Zero) } Method (PDRD, 0, NotSerialized) { If (LNot (DRDY)) { Sleep (ASLP) } Return (LNot (DRDY)) } Method (PSTS, 0, NotSerialized) { If (LGreater (CSTS, 0x02)) { Sleep (ASLP) } Return (LEqual (CSTS, 0x03)) } Method (GNOT, 2, NotSerialized) { If (PDRD ()) { Return (0x01) } Store (Arg0, CEVT) Store (0x03, CSTS) If (LAnd (LEqual (CHPD, 0x00), LEqual (Arg1, 0x00))) { If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6))) { Notify (\_SB.PCI0, Arg1) } Else { Notify (\_SB.PCI0.GFX0, Arg1) } } Notify (\_SB.PCI0.GFX0, 0x80) Return (0x00) } Method (GHDS, 1, NotSerialized) { Store (Arg0, TIDX) Return (GNOT (0x01, 0x00)) } Method (GLID, 1, NotSerialized) { Store (Arg0, CLID) Return (GNOT (0x02, 0x00)) } Method (GDCK, 1, NotSerialized) { Store (Arg0, CDCK) Return (GNOT (0x04, 0x00)) } Method (PARD, 0, NotSerialized) { If (LNot (ARDY)) { Sleep (ASLP) } Return (LNot (ARDY)) } Method (AINT, 2, NotSerialized) { If (LNot (And (TCHE, ShiftLeft (0x01, Arg0)))) { Return (0x01) } If (PARD ()) { Return (0x01) } If (LEqual (Arg0, 0x02)) { If (CPFM) { And (CPFM, 0x0F, Local0) And (EPFM, 0x0F, Local1) If (LEqual (Local0, 0x01)) { If (And (Local1, 0x06)) { Store (0x06, PFIT) } Else { If (And (Local1, 0x08)) { Store (0x08, PFIT) } Else { Store (0x01, PFIT) } } } If (LEqual (Local0, 0x06)) { If (And (Local1, 0x08)) { Store (0x08, PFIT) } Else { If (And (Local1, 0x01)) { Store (0x01, PFIT) } Else { Store (0x06, PFIT) } } } If (LEqual (Local0, 0x08)) { If (And (Local1, 0x01)) { Store (0x01, PFIT) } Else { If (And (Local1, 0x06)) { Store (0x06, PFIT) } Else { Store (0x08, PFIT) } } } } Else { XOr (PFIT, 0x07, PFIT) } Or (PFIT, 0x80000000, PFIT) Store (0x04, ASLC) } Else { If (LEqual (Arg0, 0x01)) { Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP) Or (BCLP, 0x80000000, BCLP) Store (0x02, ASLC) } Else { If (LEqual (Arg0, 0x00)) { Store (Arg1, ALSI) Store (0x01, ASLC) } Else { Return (0x01) } } } Store (0x00, LBPC) Return (0x00) } } Scope (\) { OperationRegion (IO_T, SystemIO, 0x0800, 0x10) Field (IO_T, ByteAcc, NoLock, Preserve) { Offset (0x08), TRP0, 8 } OperationRegion (PMIO, SystemIO, 0x1000, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset (0x2A), , 6, SLID, 1, Offset (0x42), , 1, GPEC, 1, Offset (0x64), , 9, SCIS, 1, Offset (0x66) } OperationRegion (GPIO, SystemIO, 0x1180, 0x3C) Field (GPIO, ByteAcc, NoLock, Preserve) { GU00, 8, GU01, 8, GU02, 8, GU03, 8, GIO0, 8, GIO1, 8, GIO2, 8, GIO3, 8, Offset (0x0C), , 6, LIDP, 1, Offset (0x0D), GL01, 8, GL02, 8, , 3, GP27, 1, GP28, 1, Offset (0x10), Offset (0x18), GB00, 8, GB01, 8, GB02, 8, GB03, 8, Offset (0x2C), , 6, LIDI, 1, Offset (0x2D), GIV1, 8, GIV2, 8, GIV3, 8, GU04, 8, GU05, 8, GU06, 8, GU07, 8, GIO4, 8, GIO5, 8, GIO6, 8, GIO7, 8, , 5, GP37, 1, Offset (0x39), GL05, 8, GL06, 8, GL07, 8 } OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x1000), Offset (0x3000), Offset (0x3404), HPAS, 2, , 5, HPAE, 1, Offset (0x3418), , 1, PATD, 1, SATD, 1, SMBD, 1, HDAD, 1, Offset (0x341A), RP1D, 1, RP2D, 1, RP3D, 1, RP4D, 1, RP5D, 1, RP6D, 1 } Name (_S0, Package (0x03) { 0x00, 0x00, 0x00 }) Name (_S3, Package (0x03) { 0x05, 0x05, 0x00 }) Name (_S4, Package (0x03) { 0x06, 0x06, 0x00 }) Name (_S5, Package (0x03) { 0x07, 0x07, 0x00 }) Method (GETP, 1, Serialized) { If (LEqual (And (Arg0, 0x09), 0x00)) { Return (0xFFFFFFFF) } If (LEqual (And (Arg0, 0x09), 0x08)) { Return (0x0384) } ShiftRight (And (Arg0, 0x0300), 0x08, Local0) ShiftRight (And (Arg0, 0x3000), 0x0C, Local1) Return (Multiply (0x1E, Subtract (0x09, Add (Local0, Local1)) )) } Method (GDMA, 5, Serialized) { If (Arg0) { If (LAnd (Arg1, Arg4)) { Return (0x14) } If (LAnd (Arg2, Arg4)) { Return (Multiply (Subtract (0x04, Arg3), 0x0F)) } Return (Multiply (Subtract (0x04, Arg3), 0x1E)) } Return (0xFFFFFFFF) } Method (GETT, 1, Serialized) { Return (Multiply (0x1E, Subtract (0x09, Add (And (ShiftRight (Arg0, 0x02 ), 0x03), And (Arg0, 0x03))))) } Method (GETF, 3, Serialized) { Name (TMPF, 0x00) If (Arg0) { Or (TMPF, 0x01, TMPF) } If (And (Arg2, 0x02)) { Or (TMPF, 0x02, TMPF) } If (Arg1) { Or (TMPF, 0x04, TMPF) } If (And (Arg2, 0x20)) { Or (TMPF, 0x08, TMPF) } If (And (Arg2, 0x4000)) { Or (TMPF, 0x10, TMPF) } Return (TMPF) } Method (SETP, 3, Serialized) { If (LGreater (Arg0, 0xF0)) { Return (0x08) } Else { If (And (Arg1, 0x02)) { If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02))) { Return (0x2301) } If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, 0x01))) { Return (0x2101) } } Return (0x1001) } } Method (SDMA, 1, Serialized) { If (LLessEqual (Arg0, 0x14)) { Return (0x01) } If (LLessEqual (Arg0, 0x1E)) { Return (0x02) } If (LLessEqual (Arg0, 0x2D)) { Return (0x01) } If (LLessEqual (Arg0, 0x3C)) { Return (0x02) } If (LLessEqual (Arg0, 0x5A)) { Return (0x01) } Return (0x00) } Method (SETT, 3, Serialized) { If (And (Arg1, 0x02)) { If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02))) { Return (0x0B) } If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, 0x01))) { Return (0x09) } } Return (0x04) } } Device (HDEF) { Name (_ADR, 0x001B0000) OperationRegion (HDAR, PCI_Config, 0x4C, 0x10) Field (HDAR, WordAcc, NoLock, Preserve) { DCKA, 1, Offset (0x01), DCKM, 1, , 6, DCKS, 1, Offset (0x08), , 15, PMES, 1 } Name (_PRW, Package (0x02) { 0x0D, 0x03 }) } Device (RP01) { Name (_ADR, 0x001C0000) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKD, 0x00 } }) } } Device (PXSX) { Name (_ADR, 0x00) Name (_RMV, 0x01) } } Device (RP02) { Name (_ADR, 0x001C0001) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x10 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 } }) } } } Device (RP03) { Name (_ADR, 0x001C0002) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x11 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKB, 0x00 } }) } } } Device (RP04) { Name (_ADR, 0x001C0003) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x12 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKC, 0x00 } }) } } } Device (RP05) { Name (_ADR, 0x001C0004) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKD, 0x00 } }) } } } Device (RP06) { Name (_ADR, 0x001C0005) OperationRegion (PXCS, PCI_Config, 0x40, 0xC0) Field (PXCS, AnyAcc, NoLock, WriteAsZeros) { Offset (0x10), , 4, LKDS, 1, Offset (0x12), , 13, LASX, 1, Offset (0x1A), ABPX, 1, , 2, PDCX, 1, , 2, PDSX, 1, Offset (0x1B), LSCX, 1, Offset (0x20), Offset (0x22), PSPX, 1, Offset (0x98), , 30, HPEX, 1, PMEX, 1, , 30, HPSX, 1, PMSX, 1 } Method (_PRT, 0, NotSerialized) { If (\GPIC) { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, 0x00, 0x11 }, Package (0x04) { 0xFFFF, 0x01, 0x00, 0x12 }, Package (0x04) { 0xFFFF, 0x02, 0x00, 0x13 }, Package (0x04) { 0xFFFF, 0x03, 0x00, 0x10 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 } }) } } Device (LANE) { Name (_ADR, 0x00) Name (_PRW, Package (0x02) { 0x09, 0x04 }) Name (LANP, 0x00) Method (_PSW, 1, NotSerialized) { If (LEqual (Arg0, 0x00)) { Store (0x00, LANP) } Else { Store (0x01, LANP) } } } } Method (NHPG, 0, Serialized) { Store (0x00, ^RP01.HPEX) Store (0x00, ^RP02.HPEX) Store (0x00, ^RP03.HPEX) Store (0x00, ^RP04.HPEX) Store (0x01, ^RP01.HPSX) Store (0x01, ^RP02.HPSX) Store (0x01, ^RP03.HPSX) Store (0x01, ^RP04.HPSX) } Method (NPME, 0, Serialized) { Store (0x00, ^RP01.PMEX) Store (0x00, ^RP02.PMEX) Store (0x00, ^RP03.PMEX) Store (0x00, ^RP04.PMEX) Store (0x00, ^RP05.PMEX) Store (0x00, ^RP06.PMEX) Store (0x01, ^RP01.PMSX) Store (0x01, ^RP02.PMSX) Store (0x01, ^RP03.PMSX) Store (0x01, ^RP04.PMSX) Store (0x01, ^RP05.PMSX) Store (0x01, ^RP06.PMSX) } Device (USB1) { Name (_ADR, 0x001D0000) OperationRegion (U1CS, PCI_Config, 0xC4, 0x04) Field (U1CS, DWordAcc, NoLock, Preserve) { U1EN, 2 } Name (_PRW, Package (0x02) { 0x03, 0x03 }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U1EN) } Else { Store (0x00, U1EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (USB2) { Name (_ADR, 0x001D0001) OperationRegion (U2CS, PCI_Config, 0xC4, 0x04) Field (U2CS, DWordAcc, NoLock, Preserve) { U2EN, 2 } Name (_PRW, Package (0x02) { 0x04, 0x03 }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U2EN) } Else { Store (0x00, U2EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (USB3) { Name (_ADR, 0x001D0002) OperationRegion (U2CS, PCI_Config, 0xC4, 0x04) Field (U2CS, DWordAcc, NoLock, Preserve) { U3EN, 2 } Name (_PRW, Package (0x02) { 0x0C, 0x03 }) Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U3EN) } Else { Store (0x00, U3EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (USB4) { Name (_ADR, 0x001A0000) OperationRegion (U4CS, PCI_Config, 0xC4, 0x04) Field (U4CS, DWordAcc, NoLock, Preserve) { U4EN, 2 } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U4EN) } Else { Store (0x00, U4EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (USB5) { Name (_ADR, 0x001A0001) OperationRegion (U5CS, PCI_Config, 0xC4, 0x04) Field (U5CS, DWordAcc, NoLock, Preserve) { U5EN, 2 } Method (_PSW, 1, NotSerialized) { If (Arg0) { Store (0x03, U5EN) } Else { Store (0x00, U5EN) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (EHC1) { Name (_ADR, 0x001D0007) OperationRegion (U7CS, PCI_Config, 0x54, 0x04) Field (U7CS, DWordAcc, NoLock, Preserve) { , 15, PMES, 1 } Device (HUB7) { Name (_ADR, 0x00) Device (PRT1) { Name (_ADR, 0x01) } Device (PRT2) { Name (_ADR, 0x02) } Device (PRT3) { Name (_ADR, 0x03) } Device (PRT4) { Name (_ADR, 0x04) } Device (PRT5) { Name (_ADR, 0x05) } Device (PRT6) { Name (_ADR, 0x06) } } Name (_PRW, Package (0x02) { 0x0D, 0x03 }) Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (EHC2) { Name (_ADR, 0x001A0007) OperationRegion (UFCS, PCI_Config, 0x54, 0x04) Field (UFCS, DWordAcc, NoLock, Preserve) { , 15, PMES, 1 } Device (HUB7) { Name (_ADR, 0x00) Device (PRT1) { Name (_ADR, 0x01) } Device (PRT2) { Name (_ADR, 0x02) } Device (PRT3) { Name (_ADR, 0x03) } Device (PRT4) { Name (_ADR, 0x04) } } Method (_S3D, 0, NotSerialized) { Return (0x02) } Method (_S4D, 0, NotSerialized) { Return (0x02) } } Device (PCIB) { Name (_ADR, 0x001E0000) Method (_PRT, 0, NotSerialized) { If (GPIC) { Return (Package (0x02) { Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x10 }, Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x11 } }) } Else { Return (Package (0x10) { Package (0x04) { 0xFFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 }, Package (0x04) { 0xFFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 }, Package (0x04) { 0xFFFF, 0x02, \_SB.PCI0.LPCB.LNKH, 0x00 }, Package (0x04) { 0xFFFF, 0x03, \_SB.PCI0.LPCB.LNKE, 0x00 }, Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKG, 0x00 }, Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LPCB.LNKF, 0x00 }, Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LPCB.LNKE, 0x00 }, Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LPCB.LNKH, 0x00 }, Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPCB.LNKC, 0x00 }, Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LPCB.LNKD, 0x00 }, Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LPCB.LNKA, 0x00 }, Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LPCB.LNKB, 0x00 }, Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LPCB.LNKE, 0x00 }, Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LPCB.LNKG, 0x00 }, Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LPCB.LNKF, 0x00 } }) } } } Device (LPCB) { Name (_ADR, 0x001F0000) OperationRegion (LPC0, PCI_Config, 0x40, 0xC0) Field (LPC0, AnyAcc, NoLock, Preserve) { Offset (0x20), PARC, 8, PBRC, 8, PCRC, 8, PDRC, 8, Offset (0x28), PERC, 8, PFRC, 8, PGRC, 8, PHRC, 8, Offset (0x40), IOD0, 8, IOD1, 8, Offset (0x48), Z000, 1, Offset (0xB0), RAEN, 1, , 13, RCBA, 18 } Device (LNKA) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x01) Method (_DIS, 0, Serialized) { Store (0x80, PARC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y14) {} }) CreateWordField (RTLA, \_SB.PCI0.LPCB.LNKA._CRS._Y14._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PARC, 0x0F), IRQ0) Return (RTLA) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PARC) } Method (_STA, 0, Serialized) { If (And (PARC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKB) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x02) Method (_DIS, 0, Serialized) { Store (0x80, PBRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLB, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y15) {} }) CreateWordField (RTLB, \_SB.PCI0.LPCB.LNKB._CRS._Y15._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PBRC, 0x0F), IRQ0) Return (RTLB) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PBRC) } Method (_STA, 0, Serialized) { If (And (PBRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKC) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x03) Method (_DIS, 0, Serialized) { Store (0x80, PCRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y16) {} }) CreateWordField (RTLC, \_SB.PCI0.LPCB.LNKC._CRS._Y16._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PCRC, 0x0F), IRQ0) Return (RTLC) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PCRC) } Method (_STA, 0, Serialized) { If (And (PCRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKD) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x04) Method (_DIS, 0, Serialized) { Store (0x80, PDRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLD, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y17) {} }) CreateWordField (RTLD, \_SB.PCI0.LPCB.LNKD._CRS._Y17._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PDRC, 0x0F), IRQ0) Return (RTLD) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PDRC) } Method (_STA, 0, Serialized) { If (And (PDRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKE) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x05) Method (_DIS, 0, Serialized) { Store (0x80, PERC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLE, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y18) {} }) CreateWordField (RTLE, \_SB.PCI0.LPCB.LNKE._CRS._Y18._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PERC, 0x0F), IRQ0) Return (RTLE) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PERC) } Method (_STA, 0, Serialized) { If (And (PERC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKF) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x06) Method (_DIS, 0, Serialized) { Store (0x80, PFRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLF, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y19) {} }) CreateWordField (RTLF, \_SB.PCI0.LPCB.LNKF._CRS._Y19._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PFRC, 0x0F), IRQ0) Return (RTLF) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PFRC) } Method (_STA, 0, Serialized) { If (And (PFRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKG) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x07) Method (_DIS, 0, Serialized) { Store (0x80, PGRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLG, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y1A) {} }) CreateWordField (RTLG, \_SB.PCI0.LPCB.LNKG._CRS._Y1A._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PGRC, 0x0F), IRQ0) Return (RTLG) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PGRC) } Method (_STA, 0, Serialized) { If (And (PGRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (LNKH) { Name (_HID, EisaId ("PNP0C0F")) Name (_UID, 0x08) Method (_DIS, 0, Serialized) { Store (0x80, PHRC) } Name (_PRS, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {1,3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) { Name (RTLH, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, _Y1B) {} }) CreateWordField (RTLH, \_SB.PCI0.LPCB.LNKH._CRS._Y1B._INT, IRQ0) Store (Zero, IRQ0) ShiftLeft (0x01, And (PHRC, 0x0F), IRQ0) Return (RTLH) } Method (_SRS, 1, Serialized) { CreateWordField (Arg0, 0x01, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PHRC) } Method (_STA, 0, Serialized) { If (And (PHRC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } } Device (DMAC) { Name (_HID, EisaId ("PNP0200")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) } Device (FWHD) { Name (_HID, EisaId ("INT0800")) Name (_CRS, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) } Device (HPET) { Name (_HID, EisaId ("PNP0103")) Name (_CID, 0x010CD041) Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED00000, // Address Base 0x00000400, // Address Length _Y1C) }) Method (_STA, 0, NotSerialized) { If (LGreaterEqual (OSYS, 0x07D1)) { If (HPAE) { Return (0x0F) } } Else { If (HPAE) { Return (0x0B) } } Return (0x00) } Method (_CRS, 0, Serialized) { If (HPAE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y1C._BAS, HPT0) If (LEqual (HPAS, 0x01)) { Store (0xFED01000, HPT0) } If (LEqual (HPAS, 0x02)) { Store (0xFED02000, HPT0) } If (LEqual (HPAS, 0x03)) { Store (0xFED03000, HPT0) } } Return (BUF0) } } Device (IPIC) { Name (_HID, EisaId ("PNP0000")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) } Device (MATH) { Name (_HID, EisaId ("PNP0C04")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) } Device (LDRC) { Name (_HID, EisaId ("PNP0C02")) Name (_UID, 0x02) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0068, // Range Minimum 0x006F, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0680, // Range Minimum 0x0680, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0800, // Range Minimum 0x0800, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x1000, // Range Minimum 0x1000, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x1180, // Range Minimum 0x1180, // Range Maximum 0x01, // Alignment 0x40, // Length ) IO (Decode16, 0x1640, // Range Minimum 0x1640, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0xFE00, // Range Minimum 0xFE00, // Range Maximum 0x01, // Alignment 0x01, // Length ) }) } Device (RTC) { Name (_HID, EisaId ("PNP0B00")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) IRQNoFlags () {8} }) } Device (TIMR) { Name (_HID, EisaId ("PNP0100")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) } Device (EC0) { Name (_HID, EisaId ("PNP0C09")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x00, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x00, // Alignment 0x01, // Length ) }) Name (_GPE, 0x18) Name (SEL0, 0xF0) Name (BFLG, 0x00) Method (_REG, 2, NotSerialized) { If (LEqual (Arg0, 0x03)) { Store (Arg1, Local0) If (Local0) { Store (0x01, ECOK) } Else { Store (0x00, ECOK) } } If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (0x03, \_SB.PCI0.LPCB.EC0.RG59) Store (\_SB.BTEN, \_SB.PCI0.LPCB.EC0.BLTH) Store (\_SB.WLAN, \_SB.PCI0.LPCB.EC0.WLAN) Store (0x01, \_SB.PCI0.LPCB.EC0.CPLE) Store (\_SB.PHSR (0x00, 0x00), DOFF) Release (\_SB.PCI0.LPCB.EC0.MUT1) Store (0x00, OSCS) Store (0x00, OSCC) } } OperationRegion (ERAM, EmbeddedControl, 0x00, 0xFF) Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x04), CMCM, 8, CMD1, 8, CMD2, 8, CMD3, 8, Offset (0x18), SMPR, 8, SMST, 8, SMAD, 8, SMCM, 8, SMD0, 256, BCNT, 8, SMAA, 8, BATD, 16, ACDF, 1, Offset (0x41), , 5, FLS4, 1, Offset (0x42), Offset (0x4C), ARCD, 1, , 3, DOCK, 1, LANC, 1, LIDS, 1, CRTS, 1, Offset (0x51), BLVL, 8, Offset (0x53), DOFF, 8, Offset (0x58), CTMP, 8, RG59, 8, Offset (0x60), WLAN, 1, BLTH, 1, CPLE, 1, , 3, WLST, 1, BLTS, 1, , 2, ST3G, 1, MNST, 1, , 1, ED3G, 1, , 3, Offset (0x63), TJ85, 1, , 6, VGAF, 1, Offset (0x70), BTMD, 8, MBTS, 1, MBTF, 1, BATF, 1, , 3, MBDX, 1, MBAD, 1, MBTC, 1, , 2, LION, 1, Offset (0x77), BA1C, 8, MCYC, 16, MTMP, 16, MDAT, 16, MCUR, 16, MBRM, 16, MBVG, 16, MRTF, 16, MMER, 8, BA2C, 8, LFCC, 16, BTSN, 16, BTDC, 16, BTDV, 16, BTMN, 8, Offset (0x93), BTST, 8, Offset (0x9D), OSTP, 1, Offset (0xA0), ABMD, 8, ABTS, 1, ABFC, 1, , 4, ABDX, 1, ABAD, 1, ABCG, 1, , 2, ABTP, 1, Offset (0xA8), ACYC, 16, ATMP, 16, ADAT, 16, ABCR, 16, ABRM, 16, ABVG, 16, ARTF, 16, AMER, 8, Offset (0xB8), AFCC, 16, ABSN, 16, ABDC, 16, ABDV, 16, ABMN, 8, Offset (0xD0), EBPL, 1, Offset (0xD1), PWRE, 1, Offset (0xD2), , 6, VAUX, 1, Offset (0xD6), DBPL, 8, Offset (0xE0), DESP, 8, DTST, 8, DE0L, 8, DE0H, 8, DE1L, 8, DE1H, 8, DE2L, 8, DE2H, 8, DE3L, 8, DE3H, 8, DE4L, 8, DE4H, 8 } Mutex (MUT1, 0x00) Mutex (MUT0, 0x00) Method (APOL, 1, NotSerialized) { Store (Arg0, DBPL) Store (0x01, EBPL) } Name (PSTA, 0x00) Method (CPOL, 1, NotSerialized) { If (LEqual (PSTA, 0x00)) { If (LNotEqual (\_SB.ECOK, 0x00)) { APOL (Arg0) Store (0x01, PSTA) } } } Method (_Q20, 0, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) If (And (SMST, 0x40)) { Store (SMAA, Local0) If (LEqual (Local0, 0x14)) { And (SMST, 0xBF, SMST) Store (PWRE, Local1) If (Local1) { Store (0x00, PWRE) Store (0x12, BFLG) CPOL (0x01) } } If (LEqual (Local0, 0x16)) { And (SMST, 0xBF, SMST) Store (0x04, \_SB.BAT1.BCRI) Notify (\_SB.BAT1, 0x80) } Else { Store (0x00, \_SB.BAT1.BCRI) } } Release (\_SB.PCI0.LPCB.EC0.MUT1) } } Method (_Q09, 0, NotSerialized) { If (\_SB.ECOK) { Store (0x00, \_SB.PCI0.LPCB.EC0.PSTA) \_SB.BAT1.Z001 () Notify (\_SB.ACAD, 0x80) Sleep (0x01F4) Notify (\_SB.BAT1, 0x80) If (\_SB.BAT1.BTCH) { \_SB.BAT1.UBIF () Notify (\_SB.BAT1, 0x81) Store (0x00, \_SB.BAT1.BTCH) } } } Method (_Q0D, 0, NotSerialized) { Notify (\_SB.SLPB, 0x80) } Method (_Q9F, 0, NotSerialized) { If (\_SB.PCI0.MCHC.PEGA) {} Else { Store (0x01, TLST) HKDS (0x0A) } } Method (_Q90, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x01, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q91, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x02, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q92, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x03, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q93, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x04, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q8E, 0, NotSerialized) { Store (0x86, BRUD) _Q8F () Store (0x00, BRUD) } Method (_Q8F, 0, NotSerialized) { If (LLess (OSYS, 0x07D6)) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x05, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) Sleep (0xC8) } } Store (0x00, Local1) Store (0x03, BOWN) Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BLVL, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LNotEqual (Local1, 0x55)) { \_SB.WMID.Z002 (Local0) } Store (Local0, BRTN) Store (0x00, BOWN) } Method (_Q94, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x09, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x82) } } Method (_Q95, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x08, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x82) } } Method (_Q8A, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x0B, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q8B, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x0C, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q9D, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x0F, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_Q9E, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x10, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_QA0, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x0D, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } Method (_QA1, 0, NotSerialized) { If (LEqual (\_SB.WMID.BAEF, 0x01)) { Store (0x0E, \_SB.WMID.WMIQ) Notify (\_SB.WMID, 0x80) } } } Device (CIR) { Method (_HID, 0, NotSerialized) { If (LLess (OSYS, 0x07D6)) { Return (0x2310A35C) } Else { Return (0x2010A35C) } } OperationRegion (WBIO, SystemIO, 0x2E, 0x02) Field (WBIO, ByteAcc, NoLock, Preserve) { INDX, 8, DATA, 8 } Mutex (WBMX, 0x00) IndexField (INDX, DATA, ByteAcc, NoLock, Preserve) { Offset (0x07), LDN, 8, Offset (0x30), ACTR, 1, Offset (0x60), IOAH, 8, IOAL, 8, Offset (0x70), INTR, 8 } Method (ENFG, 1, NotSerialized) { Acquire (WBMX, 0xFFFF) Store (0x07, INDX) Store (Arg0, DATA) } Method (EXFG, 0, NotSerialized) { Release (WBMX) } Method (_STA, 0, NotSerialized) { ENFG (0x03) Store (ACTR, Local0) EXFG () If (Local0) { Store (0x0F, Local0) } Else { Store (0x0D, Local0) \_SB.PCI0.LPCB.CIR._DIS () } If (LLess (OSYS, 0x07D6)) { ENFG (0x03) Store (0x00, IOAH) Store (0x00, IOAL) EXFG () } Return (Local0) } Method (_DIS, 0, NotSerialized) { ENFG (0x03) Store (0x00, ACTR) Store (0x00, IOAH) Store (0x00, IOAL) Store (0x00, INTR) EXFG () ENFG (0x04) Store (0x00, ACTR) Store (0x00, IOAH) Store (0x00, IOAL) EXFG () Store (0x00, \_SB.PCI0.LPCB.Z000) } Method (_PRS, 0, NotSerialized) { Name (PRS1, ResourceTemplate () { StartDependentFnNoPri () { IO (Decode16, 0x0600, // Range Minimum 0x0600, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0620, // Range Minimum 0x0620, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {4} } EndDependentFn () /*** Disassembler: inserted missing EndDependentFn () ***/ }) Name (PRS2, ResourceTemplate () { StartDependentFnNoPri () { IO (Decode16, 0x0620, // Range Minimum 0x0620, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {4} } EndDependentFn () /*** Disassembler: inserted missing EndDependentFn () ***/ }) If (LLess (OSYS, 0x07D6)) { Return (PRS2) } Else { Return (PRS1) } } Method (_CRS, 0, NotSerialized) { Name (DCRS, ResourceTemplate () { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {7} }) Name (CRS1, ResourceTemplate () { IO (Decode16, 0x0600, // Range Minimum 0x0600, // Range Maximum 0x01, // Alignment 0x08, // Length ) IO (Decode16, 0x0620, // Range Minimum 0x0620, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {4} }) Name (CRS2, ResourceTemplate () { IO (Decode16, 0x0620, // Range Minimum 0x0620, // Range Maximum 0x01, // Alignment 0x20, // Length ) IRQNoFlags () {4} }) ENFG (0x03) Store (ACTR, Local0) EXFG () If (Local0) { If (LLess (OSYS, 0x07D6)) { Return (CRS2) } Else { Return (CRS1) } } Else { Return (DCRS) } } Method (_SRS, 1, NotSerialized) { If (LLess (OSYS, 0x07D6)) { CreateByteField (Arg0, 0x02, IO1L) CreateByteField (Arg0, 0x03, IO1H) CreateWordField (Arg0, 0x09, IRQX) FindSetRightBit (IRQX, Local0) Decrement (Local0) ENFG (0x03) Store (0x00, INTR) Store (0x00, IOAH) Store (0x00, IOAL) Store (0x01, ACTR) EXFG () ENFG (0x04) Store (Local0, INTR) Store (IO1H, IOAH) Store (IO1L, IOAL) Store (0x01, ACTR) EXFG () } Else { CreateByteField (Arg0, 0x02, AD1L) CreateByteField (Arg0, 0x03, AD1H) CreateByteField (Arg0, 0x0A, AD2L) CreateByteField (Arg0, 0x0B, AD2H) CreateWordField (Arg0, 0x11, IRQM) FindSetRightBit (IRQM, Local0) Decrement (Local0) ENFG (0x03) Store (Local0, INTR) Store (AD1H, IOAH) Store (AD1L, IOAL) Store (0x01, ACTR) EXFG () ENFG (0x04) Store (0x00, INTR) Store (AD2H, IOAH) Store (AD2L, IOAL) Store (0x01, ACTR) EXFG () } Store (0x01, \_SB.PCI0.LPCB.Z000) } } Device (PS2K) { Name (_HID, EisaId ("PNP0303")) Name (_CRS, ResourceTemplate () { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQ (Edge, ActiveHigh, Exclusive, ) {1} }) } Device (PS2M) { Name (_HID, EisaId ("SYN1B03")) Name (_CID, Package (0x03) { 0x001B2E4F, 0x02002E4F, 0x130FD041 }) Name (_CRS, ResourceTemplate () { IRQ (Edge, ActiveHigh, Exclusive, ) {12} }) } } Device (PATA) { Name (_ADR, 0x001F0001) OperationRegion (PACS, PCI_Config, 0x40, 0xC0) Field (PACS, DWordAcc, NoLock, Preserve) { PRIT, 16, Offset (0x04), PSIT, 4, Offset (0x08), SYNC, 4, Offset (0x0A), SDT0, 2, , 2, SDT1, 2, Offset (0x14), ICR0, 4, ICR1, 4, ICR2, 4, ICR3, 4, ICR4, 4, ICR5, 4 } Device (PRID) { Name (_ADR, 0x00) Method (_GTM, 0, NotSerialized) { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) Store (GETP (PRIT), PIO0) Store (GDMA (And (SYNC, 0x01), And (ICR3, 0x01), And (ICR0, 0x01), SDT0, And (ICR1, 0x01)), DMA0) If (LEqual (DMA0, 0xFFFFFFFF)) { Store (PIO0, DMA0) } If (And (PRIT, 0x4000)) { If (LEqual (And (PRIT, 0x90), 0x80)) { Store (0x0384, PIO1) } Else { Store (GETT (PSIT), PIO1) } } Else { Store (0xFFFFFFFF, PIO1) } Store (GDMA (And (SYNC, 0x02), And (ICR3, 0x02), And (ICR0, 0x02), SDT1, And (ICR1, 0x02)), DMA1) If (LEqual (DMA1, 0xFFFFFFFF)) { Store (PIO1, DMA1) } Store (GETF (And (SYNC, 0x01), And (SYNC, 0x02), PRIT), FLAG) If (And (LEqual (PIO0, 0xFFFFFFFF), LEqual (DMA0, 0xFFFFFFFF))) { Store (0x78, PIO0) Store (0x14, DMA0) Store (0x03, FLAG) } Return (PBUF) } Method (_STM, 3, NotSerialized) { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) If (LEqual (SizeOf (Arg1), 0x0200)) { And (PRIT, 0xC0F0, PRIT) And (SYNC, 0x02, SYNC) Store (0x00, SDT0) And (ICR0, 0x02, ICR0) And (ICR1, 0x02, ICR1) And (ICR3, 0x02, ICR3) And (ICR5, 0x02, ICR5) CreateWordField (Arg1, 0x62, W490) CreateWordField (Arg1, 0x6A, W530) CreateWordField (Arg1, 0x7E, W630) CreateWordField (Arg1, 0x80, W640) CreateWordField (Arg1, 0xB0, W880) CreateWordField (Arg1, 0xBA, W930) Or (PRIT, 0x8004, PRIT) If (LAnd (And (FLAG, 0x02), And (W490, 0x0800))) { Or (PRIT, 0x02, PRIT) } Or (PRIT, SETP (PIO0, W530, W640), PRIT) If (And (FLAG, 0x01)) { Or (SYNC, 0x01, SYNC) Store (SDMA (DMA0), SDT0) If (LLess (DMA0, 0x1E)) { Or (ICR3, 0x01, ICR3) } If (LLess (DMA0, 0x3C)) { Or (ICR0, 0x01, ICR0) } If (And (W930, 0x2000)) { Or (ICR1, 0x01, ICR1) } } } If (LEqual (SizeOf (Arg2), 0x0200)) { And (PRIT, 0xBF0F, PRIT) Store (0x00, PSIT) And (SYNC, 0x01, SYNC) Store (0x00, SDT1) And (ICR0, 0x01, ICR0) And (ICR1, 0x01, ICR1) And (ICR3, 0x01, ICR3) And (ICR5, 0x01, ICR5) CreateWordField (Arg2, 0x62, W491) CreateWordField (Arg2, 0x6A, W531) CreateWordField (Arg2, 0x7E, W631) CreateWordField (Arg2, 0x80, W641) CreateWordField (Arg2, 0xB0, W881) CreateWordField (Arg2, 0xBA, W931) Or (PRIT, 0x8040, PRIT) If (LAnd (And (FLAG, 0x08), And (W491, 0x0800))) { Or (PRIT, 0x20, PRIT) } If (And (FLAG, 0x10)) { Or (PRIT, 0x4000, PRIT) If (LGreater (PIO1, 0xF0)) { Or (PRIT, 0x80, PRIT) } Else { Or (PRIT, 0x10, PRIT) Store (SETT (PIO1, W531, W641), PSIT) } } If (And (FLAG, 0x04)) { Or (SYNC, 0x02, SYNC) Store (SDMA (DMA1), SDT1) If (LLess (DMA1, 0x1E)) { Or (ICR3, 0x02, ICR3) } If (LLess (DMA1, 0x3C)) { Or (ICR0, 0x02, ICR0) } If (And (W931, 0x2000)) { Or (ICR1, 0x02, ICR1) } } } } Device (P_D0) { Name (_ADR, 0x00) Method (_GTF, 0, NotSerialized) { Name (PIB0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF }) CreateByteField (PIB0, 0x01, PMD0) CreateByteField (PIB0, 0x08, DMD0) If (And (PRIT, 0x02)) { If (LEqual (And (PRIT, 0x09), 0x08)) { Store (0x08, PMD0) } Else { Store (0x0A, PMD0) ShiftRight (And (PRIT, 0x0300), 0x08, Local0) ShiftRight (And (PRIT, 0x3000), 0x0C, Local1) Add (Local0, Local1, Local2) If (LEqual (0x03, Local2)) { Store (0x0B, PMD0) } If (LEqual (0x05, Local2)) { Store (0x0C, PMD0) } } } Else { Store (0x01, PMD0) } If (And (SYNC, 0x01)) { Store (Or (SDT0, 0x40), DMD0) If (And (ICR1, 0x01)) { If (And (ICR0, 0x01)) { Add (DMD0, 0x02, DMD0) } If (And (ICR3, 0x01)) { Store (0x45, DMD0) } } } Else { Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) } Return (PIB0) } } Device (P_D1) { Name (_ADR, 0x01) Method (_GTF, 0, NotSerialized) { Name (PIB1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF }) CreateByteField (PIB1, 0x01, PMD1) CreateByteField (PIB1, 0x08, DMD1) If (And (PRIT, 0x20)) { If (LEqual (And (PRIT, 0x90), 0x80)) { Store (0x08, PMD1) } Else { Add (And (PSIT, 0x03), ShiftRight (And (PSIT, 0x0C), 0x02), Local0) If (LEqual (0x05, Local0)) { Store (0x0C, PMD1) } Else { If (LEqual (0x03, Local0)) { Store (0x0B, PMD1) } Else { Store (0x0A, PMD1) } } } } Else { Store (0x01, PMD1) } If (And (SYNC, 0x02)) { Store (Or (SDT1, 0x40), DMD1) If (And (ICR1, 0x02)) { If (And (ICR0, 0x02)) { Add (DMD1, 0x02, DMD1) } If (And (ICR3, 0x02)) { Store (0x45, DMD1) } } } Else { Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) } Return (PIB1) } } } } Device (SATA) { Name (_ADR, 0x001F0002) OperationRegion (SACS, PCI_Config, 0x40, 0xC0) Field (SACS, DWordAcc, NoLock, Preserve) { PRIT, 16, SECT, 16, PSIT, 4, SSIT, 4, Offset (0x08), SYNC, 4, Offset (0x0A), SDT0, 2, , 2, SDT1, 2, Offset (0x0B), SDT2, 2, , 2, SDT3, 2, Offset (0x14), ICR0, 4, ICR1, 4, ICR2, 4, ICR3, 4, ICR4, 4, ICR5, 4, Offset (0x50), MAPV, 2 } } Device (SBUS) { Name (_ADR, 0x001F0003) OperationRegion (SMBP, PCI_Config, 0x40, 0xC0) Field (SMBP, DWordAcc, NoLock, Preserve) { , 2, I2CE, 1 } OperationRegion (SMBI, SystemIO, 0x1C20, 0x10) Field (SMBI, ByteAcc, NoLock, Preserve) { HSTS, 8, Offset (0x02), HCON, 8, HCOM, 8, TXSA, 8, DAT0, 8, DAT1, 8, HBDR, 8, PECR, 8, RXSA, 8, SDAT, 16 } Method (SSXB, 2, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRXB, 1, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (0x44, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (DAT0) } Return (0xFFFF) } Method (SWRB, 3, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (Arg2, DAT0) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRDB, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x48, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (DAT0) } Return (0xFFFF) } Method (SWRW, 3, Serialized) { If (STRT ()) { Return (0x00) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) And (Arg2, 0xFF, DAT0) And (ShiftRight (Arg2, 0x08), 0xFF, DAT1) Store (0x4C, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SRDW, 2, Serialized) { If (STRT ()) { Return (0xFFFF) } Store (0x00, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x4C, HCON) If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (Or (ShiftLeft (DAT1, 0x08), DAT0)) } Return (0xFFFFFFFF) } Method (SBLW, 4, Serialized) { If (STRT ()) { Return (0x00) } Store (Arg3, I2CE) Store (0xBF, HSTS) Store (Arg0, TXSA) Store (Arg1, HCOM) Store (SizeOf (Arg2), DAT0) Store (0x00, Local1) Store (DerefOf (Index (Arg2, 0x00)), HBDR) Store (0x54, HCON) While (LGreater (SizeOf (Arg2), Local1)) { Store (0x0FA0, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) Stall (0x32) } If (LNot (Local0)) { KILL () Return (0x00) } Store (0x80, HSTS) Increment (Local1) If (LGreater (SizeOf (Arg2), Local1)) { Store (DerefOf (Index (Arg2, Local1)), HBDR) } } If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (0x01) } Return (0x00) } Method (SBLR, 3, Serialized) { Name (TBUF, Buffer (0x0100) {}) If (STRT ()) { Return (0x00) } Store (Arg2, I2CE) Store (0xBF, HSTS) Store (Or (Arg0, 0x01), TXSA) Store (Arg1, HCOM) Store (0x54, HCON) Store (0x0FA0, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) Stall (0x32) } If (LNot (Local0)) { KILL () Return (0x00) } Store (DAT0, Index (TBUF, 0x00)) Store (0x80, HSTS) Store (0x01, Local1) While (LLess (Local1, DerefOf (Index (TBUF, 0x00)))) { Store (0x0FA0, Local0) While (LAnd (LNot (And (HSTS, 0x80)), Local0)) { Decrement (Local0) Stall (0x32) } If (LNot (Local0)) { KILL () Return (0x00) } Store (HBDR, Index (TBUF, Local1)) Store (0x80, HSTS) Increment (Local1) } If (COMP ()) { Or (HSTS, 0xFF, HSTS) Return (TBUF) } Return (0x00) } Method (STRT, 0, Serialized) { Store (0xC8, Local0) While (Local0) { If (And (HSTS, 0x40)) { Decrement (Local0) Sleep (0x01) If (LEqual (Local0, 0x00)) { Return (0x01) } } Else { Store (0x00, Local0) } } Store (0x0FA0, Local0) While (Local0) { If (And (HSTS, 0x01)) { Decrement (Local0) Stall (0x32) If (LEqual (Local0, 0x00)) { KILL () } } Else { Return (0x00) } } Return (0x01) } Method (COMP, 0, Serialized) { Store (0x0FA0, Local0) While (Local0) { If (And (HSTS, 0x02)) { Return (0x01) } Else { Decrement (Local0) Stall (0x32) If (LEqual (Local0, 0x00)) { KILL () } } } Return (0x00) } Method (KILL, 0, Serialized) { Or (HCON, 0x02, HCON) Or (HSTS, 0xFF, HSTS) } } } OperationRegion (SMI0, SystemIO, 0x0000FE00, 0x00000002) Field (SMI0, AnyAcc, NoLock, Preserve) { SMIC, 8 } OperationRegion (SMI1, SystemMemory, 0x7F6E0E2D, 0x00000120) Field (SMI1, AnyAcc, NoLock, Preserve) { BCMD, 8, DID, 32, INF, 8 } Field (SMI1, AnyAcc, NoLock, Preserve) { Offset (0x50), BLK0, 64, BLK1, 64, BLK2, 64, BLK3, 64, BLK4, 64, Offset (0x110), BTEN, 1, WLAN, 1, DOCK, 1, IDEC, 1, TPMS, 1, EX3G, 1 } Mutex (PSMX, 0x00) Method (PHSR, 2, NotSerialized) { Acquire (\_SB.PSMX, 0xFFFF) Store (0x90, BCMD) Store (Arg0, DID) Store (Arg1, INF) Store (Zero, SMIC) Store (INF, Local0) Release (\_SB.PSMX) Return (Local0) } Device (ACAD) { Name (_HID, "ACPI0003") Name (_PCL, Package (0x01) { \_SB }) Name (ACST, 0x00) Method (_PSR, 0, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.ACDF, ACST) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x01, ACST) } If (ACST) { Store (0x01, Local0) Store (0x00, \_SB.BAT1.BCRI) } Else { Store (0x00, Local0) } Return (Local0) } } Device (BAT1) { Name (_HID, EisaId ("PNP0C0A")) Name (_UID, 0x01) Name (CBTI, 0x00) Name (PBTI, 0x00) Name (BTIN, 0x00) Name (BTCH, 0x00) Name (BIFI, 0x00) Name (SEL0, 0x00) Name (BCRI, 0x00) Name (PBIF, Package (0x0D) { 0x01, 0x1130, 0x1130, 0x01, 0x2B5C, 0x012C, 0x84, 0x20, 0x20, "BAT1 ", "11 ", "11 ", "11 " }) Name (PBST, Package (0x04) { 0x00, 0xFFFFFFFF, 0xFFFFFFFF, 0x2710 }) Name (ERRC, 0x00) Name (_PCL, Package (0x01) { \_SB }) Method (_STA, 0, NotSerialized) { If (BTIN) { Return (0x1F) } Else { Return (0x0F) } } Method (_BIF, 0, NotSerialized) { If (LEqual (BIFI, 0x00)) { \_SB.BAT1.UBIF () Store (0x01, BIFI) } Return (PBIF) } Name (LFCC, 0x1130) Method (UBIF, 0, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BTDC, Local0) Store (\_SB.PCI0.LPCB.EC0.LFCC, Local1) Store (\_SB.PCI0.LPCB.EC0.BTDV, Local2) Store (\_SB.PCI0.LPCB.EC0.BTMD, Local3) Store (\_SB.PCI0.LPCB.EC0.BTMN, Local4) Store (\_SB.PCI0.LPCB.EC0.BTSN, Local5) Store (\_SB.PCI0.LPCB.EC0.LION, Local6) Release (\_SB.PCI0.LPCB.EC0.MUT1) Store (Local0, Index (PBIF, 0x01)) Store (Local1, Index (PBIF, 0x02)) Store (Local2, Index (PBIF, 0x04)) Store (Local1, LFCC) Multiply (Local1, 0x04, Local7) Divide (Local7, 0x64, , Local7) Store (Local7, Index (PBIF, 0x06)) If (Local6) { Store ("NiMH", Index (PBIF, 0x0B)) } Else { Store ("LION", Index (PBIF, 0x0B)) } And (Local3, 0x0F, Local3) Store ("Chapala", Index (PBIF, 0x09)) If (LEqual (Local4, 0x08)) { Store ("MOTOROLA", Index (PBIF, 0x0C)) } Else { If (LEqual (Local4, 0x07)) { Store ("SIMPLO", Index (PBIF, 0x0C)) } Else { If (LEqual (Local4, 0x03)) { Store ("SANYO", Index (PBIF, 0x0C)) } Else { If (LEqual (Local4, 0x04)) { Store ("SONY", Index (PBIF, 0x0C)) } Else { If (LEqual (Local4, 0x05)) { Store ("PANASONIC", Index (PBIF, 0x0C)) } Else { Store ("UNKNOWN", Index (PBIF, 0x0C)) } } } } } Store (ITOS (ToBCD (Local5)), Index (PBIF, 0x0A)) } } Name (RCAP, 0x00) Method (_BST, 0, NotSerialized) { If (LEqual (BTIN, 0x00)) { Store (0x00, Index (PBST, 0x00)) Store (0xFFFFFFFF, Index (PBST, 0x01)) Store (0xFFFFFFFF, Index (PBST, 0x02)) Store (0xFFFFFFFF, Index (PBST, 0x03)) Return (PBST) } If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MBTC, Local0) Store (\_SB.PCI0.LPCB.EC0.MBRM, Local1) Store (\_SB.PCI0.LPCB.EC0.MBVG, Local2) Store (\_SB.PCI0.LPCB.EC0.MCUR, Local3) Store (\_SB.PCI0.LPCB.EC0.BTST, Local4) Store (\_SB.PCI0.LPCB.EC0.MBTF, Local5) Store (\_SB.PCI0.LPCB.EC0.ACDF, Local6) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (Local6) { If (LEqual (Local5, 0x01)) { Store (0x00, Local7) Store (LFCC, Local1) } Else { If (LEqual (Local0, 0x01)) { Store (0x02, Local7) } Else { Store (0x00, Local7) } } } Else { If (LAnd (Local4, 0x01)) { Store (0x01, Local7) } Else { Store (0x00, Local7) } } And (Local4, 0x04, Local4) If (LEqual (Local4, 0x04)) { Or (Local7, Local4, Local7) } Store (Local7, Index (PBST, 0x00)) If (LNot (And (Local1, 0x8000))) { Store (Local1, Index (PBST, 0x02)) } If (LNot (And (Local2, 0x8000))) { Store (Local2, Index (PBST, 0x03)) } If (LAnd (Local3, 0x8000)) { If (LNotEqual (Local3, 0xFFFF)) { Not (Local3, Local3) Increment (Local3) And (Local3, 0xFFFF, Local3) } } Store (Local3, Index (PBST, 0x01)) } Return (PBST) } Method (Z001, 0, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MBTS, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) If (LEqual (Local0, 0x01)) { If (LEqual (\_SB.BAT1.BTIN, 0x00)) { Store (0x01, \_SB.BAT1.BTCH) Store (0x00, \_SB.BAT1.BIFI) } Store (0x01, \_SB.BAT1.BTIN) } Else { If (LEqual (\_SB.BAT1.BTIN, 0x01)) { Store (0x01, \_SB.BAT1.BTCH) Store (0x00, \_SB.BAT1.BIFI) } Store (0x00, \_SB.BAT1.BTIN) } } } } Device (LID) { Name (_HID, EisaId ("PNP0C0D")) Method (_INI, 0, NotSerialized) { Store (0x01, \SLID) } Method (_LID, 0, NotSerialized) { Store (0x01, \SLID) If (SLID) { If (\LIDP) { Store (0x01, Local0) Store (0x01, \LIDI) } Else { Store (0x00, Local0) Store (0x00, \LIDI) } XOr (\LIDP, 0x01, \LIDP) } Else { Store (\LIDP, Local0) } Return (Local0) } Scope (\_GPE) { Method (_L16, 0, NotSerialized) { Notify (\_SB.LID, 0x80) } } } Device (PWRB) { Name (_HID, EisaId ("PNP0C0C")) } Device (SLPB) { Name (_HID, EisaId ("PNP0C0E")) } Scope (\_SB) { Device (WMID) { Name (_HID, "PNP0C14") Name (_UID, 0x00) Name (WMIQ, 0x00) Name (ERRD, 0x00010000) Name (BUFF, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) CreateByteField (BUFF, 0x00, BF00) CreateByteField (BUFF, 0x01, BF01) CreateByteField (BUFF, 0x02, BF02) CreateByteField (BUFF, 0x03, BF03) Name (AADS, Buffer (0x04) { 0x00 }) CreateField (AADS, 0x00, 0x04, AS00) CreateField (AADS, 0x04, 0x01, AS01) CreateField (AADS, 0x05, 0x01, AS02) CreateField (AADS, 0x10, 0x10, AS03) CreateField (AADS, 0x00, 0x10, AS04) Name (BAEF, 0x00) Name (BADF, 0x00) Name (BADG, Package (0x03) { 0x00010000, 0x00010000, 0x00010000 }) Name (BADS, Package (0x04) { 0x01, 0x01, 0x01, 0x01 }) Name (WLDS, 0x00) Name (WLED, 0x00) Name (BTDS, 0x00) Name (BTED, 0x00) Name (BLDS, 0x00) Name (BLED, 0x00) Name (NTDC, 0x00) Name (WLSD, 0x0100) Name (WLSE, 0x0101) Name (BLTD, 0x0200) Name (BLTE, 0x0201) Name (LBL0, 0x0300) Name (LBL1, 0x0301) Name (LBL2, 0x0302) Name (LBL3, 0x0303) Name (LBL4, 0x0304) Name (LBL5, 0x0305) Name (LBL6, 0x0306) Name (LBL7, 0x0307) Name (LBL8, 0x0308) Name (LBL9, 0x0309) Name (LBLA, 0x030A) Name (LBLB, 0x030B) Name (LBLC, 0x030C) Name (LBLD, 0x030D) Name (LBLE, 0x030E) Name (LBLF, 0x030F) Name (CADI, 0x0401) Name (CADO, 0x0400) Name (LOWG, 0x0501) Name (HIHG, 0x0502) Name (VAPO, 0x0600) Name (VAPI, 0x0601) Name (WBAT, 0x0700) Name (WADA, 0x0701) Name (DS3G, 0x0800) Name (EN3G, 0x0801) Name (LANI, 0x0900) Name (LANO, 0x0901) Name (MNOF, 0x0A00) Name (MNON, 0x0A01) Name (BBSB, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) CreateField (BBSB, 0x00, 0x10, BBD0) CreateField (BBSB, 0x10, 0x10, BBD1) Name (TLS0, 0x00) Name (TLS1, 0x01) Name (TLS2, 0x02) Name (TLS3, 0x03) Name (TLS4, 0x04) Name (TLS5, 0x05) Name (TLS6, 0x06) Name (TLS7, 0x07) Name (BBPD, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateByteField (BBPD, 0x00, BBP0) CreateByteField (BBPD, 0x04, BBP1) CreateByteField (BBPD, 0x08, BBP2) CreateByteField (BBPD, 0x0C, BBP3) CreateByteField (BBPD, 0x10, BBP4) Name (BBAR, Buffer (0x08) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) CreateByteField (BBAR, 0x00, BBA0) CreateByteField (BBAR, 0x04, BBA1) Name (BCDS, Package (0x0D) { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 }) Name (BDDS, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) CreateField (BDDS, 0x00, 0x10, BDD0) CreateField (BDDS, 0x10, 0x10, BDD1) Name (DSY0, Buffer (0x28) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Name (DSY1, Buffer (0x18) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Name (DSY2, Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Name (DSY3, Buffer (0x18) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Name (DSY4, Buffer (0x10) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) Name (DSY5, Buffer (0x28) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }) CreateField (DSY0, 0x00, 0x40, DY00) CreateField (DSY0, 0x40, 0x40, DY01) CreateField (DSY0, 0x80, 0x40, DY02) CreateField (DSY0, 0xC0, 0x40, DY03) CreateField (DSY0, 0x0100, 0x40, DY04) CreateField (DSY1, 0x00, 0x40, DY10) CreateField (DSY1, 0x40, 0x40, DY11) CreateField (DSY1, 0x80, 0x40, DY12) CreateField (DSY2, 0x00, 0x40, DY20) CreateField (DSY2, 0x40, 0x10, DY21) CreateField (DSY2, 0x50, 0x10, DY22) CreateField (DSY0, 0x00, 0xC0, DSX4) Name (BEDS, Package (0x10) { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 }) Name (WIT0, 0x00) Name (DSY6, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateField (DSY6, 0x00, 0x20, DY60) CreateField (DSY6, 0x20, 0x20, DY61) CreateField (DSY6, 0x40, 0x20, DY62) CreateField (DSY6, 0x60, 0x20, DY63) CreateField (DSY6, 0x80, 0x20, DY64) Name (WPRW, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateField (WPRW, 0x00, 0x08, WWD0) CreateField (WPRW, 0x08, 0x08, WWD1) CreateField (WPRW, 0x10, 0x08, WWD2) CreateField (WPRW, 0x18, 0x08, WWD3) CreateField (WPRW, 0x20, 0x08, WWD4) CreateField (WPRW, 0x28, 0x20, WWD5) Name (WPCI, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) CreateField (WPCI, 0x00, 0x08, WPIR) CreateField (WPCI, 0x08, 0x03, WPIF) CreateField (WPCI, 0x0B, 0x05, WPID) CreateField (WPCI, 0x10, 0x08, WPIB) Name (BFDS, Package (0x04) { 0x02, 0x02, 0x02, 0x02 }) Name (GSTS, 0x00) Name (BFEF, 0x00) Name (BGEF, 0x00) Name (BGDS, Package (0x01) { 0x01 }) Method (PHSR, 2, NotSerialized) { Acquire (\_SB.PSMX, 0xFFFF) Store (0x91, BCMD) Store (Arg0, DID) Store (Arg1, INF) Store (Zero, SMIC) Store (DID, Local0) Release (\_SB.PSMX) Return (Local0) } Method (AAF1, 0, NotSerialized) { Store (\_SB.WMID.PHSR (0x00, 0x00), AS04) Store (0x00, AS02) Store (0x00, AS03) } Method (Z003, 1, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg0, _T_0) If (LEqual (_T_0, 0x01)) { Store (\_SB.WMID.PHSR (0x01, 0x00), BUFF) } Else { If (LEqual (_T_0, 0x02)) { Store (\_SB.WMID.PHSR (0x01, 0x01), BUFF) } Else { If (LEqual (_T_0, 0x03)) { Store (\_SB.WMID.PHSR (0x01, 0x02), BUFF) } Else { If (LEqual (_T_0, 0x08)) { Store (\_SB.WMID.PHSR (0x01, 0x03), BUFF) } Else { If (LEqual (_T_0, 0x09)) { Store (\_SB.WMID.PHSR (0x01, 0x04), BUFF) } Else { If (LEqual (_T_0, 0x0A)) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.ED3G, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x01, Local0) } Store (And (Local0, 0x01), BUFF) } Else { If (LEqual (_T_0, 0x0C)) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.LANC, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x01, Local0) } Store (And (Local0, 0x01), BUFF) } Else { If (LEqual (_T_0, 0x0D)) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MNST, Local0) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x01, Local0) } Store (And (Local0, 0x01), BUFF) } Else { Store (0x00010000, BUFF) } } } } } } } } Break } } Method (Z004, 2, NotSerialized) { Store (Arg1, BUFF) If (LEqual (BF00, 0x00)) { Store (0x00, Local0) } Else { Store (0x01, Local0) } While (One) { Name (_T_0, 0x00) Store (Arg0, _T_0) If (LEqual (_T_0, 0x04)) { Or (Local0, 0x10, Local0) Store (\_SB.WMID.PHSR (0x02, Local0), BUFF) Store (0x00, BUFF) } Else { If (LEqual (_T_0, 0x05)) { Or (Local0, 0x20, Local0) Store (\_SB.WMID.PHSR (0x02, Local0), BUFF) Store (0x00, BUFF) } Else { If (LEqual (_T_0, 0x06)) { If (LEqual (\BOWN, 0x00)) { Store (BF00, Local1) Or (BF00, 0x40, Local0) Store (\_SB.WMID.PHSR (0x02, Local0), BUFF) Store (0x02, \BOWN) Store (Local1, Local0) Sleep (0x01F4) Z002 (Local0) Store (Local0, BRTN) } Else { Store (0x00, \BOWN) } Store (0x00, \BOWN) Store (0x00, BUFF) } Else { If (LEqual (_T_0, 0x0B)) { Or (Local0, 0x80, Local0) Store (\_SB.WMID.PHSR (0x02, Local0), BUFF) Store (0x00, BUFF) } Else { Store (0x00010000, BUFF) } } } } Break } } Method (Z005, 0, NotSerialized) { Store (\_SB.WMID.WMIQ, Local0) Store (0x00, \_SB.WMID.WMIQ) While (One) { Name (_T_0, 0x00) Store (Local0, _T_0) If (LEqual (_T_0, 0x01)) { Return (WLSE) } Else { If (LEqual (_T_0, 0x02)) { Return (WLSD) } Else { If (LEqual (_T_0, 0x03)) { Return (BLTE) } Else { If (LEqual (_T_0, 0x04)) { Return (BLTD) } Else { If (LEqual (_T_0, 0x05)) { Store (\_SB.WMID.PHSR (0x01, 0x02), Local1) And (Local1, 0x0F, Local1) And (LBL0, 0x0F00, LBL0) Or (Local1, LBL0, LBL0) Return (LBL0) } Else { If (LEqual (_T_0, 0x06)) { Return (LOWG) } Else { If (LEqual (_T_0, 0x07)) { Return (HIHG) } Else { If (LEqual (_T_0, 0x08)) { Return (VAPO) } Else { If (LEqual (_T_0, 0x09)) { Return (VAPI) } Else { If (LEqual (_T_0, 0x0A)) { Return (LOWG) } Else { If (LEqual (_T_0, 0x0B)) { Return (LANI) } Else { If (LEqual (_T_0, 0x0C)) { Return (LANO) } Else { If (LEqual (_T_0, 0x0D)) { Return (EN3G) } Else { If (LEqual (_T_0, 0x0E)) { Return (DS3G) } Else { If (LEqual (_T_0, 0x0F)) { Return (MNON) } Else { If (LEqual (_T_0, 0x10)) { Return (MNOF) } Else { Return (0xFFFF) } } } } } } } } } } } } } } } } Break } } Method (Z006, 2, NotSerialized) { Store (Arg1, BUFF) And (BF00, 0x0F, Local0) If (LEqual (Arg0, 0x02)) { ShiftLeft (Local0, 0x01, Local0) Or (Local0, 0x10, Local0) } Store (\_SB.WMID.PHSR (0x03, Local0), BBSB) } Method (Z007, 1, NotSerialized) { Store (\_SB.WMID.PHSR (0x10, Arg0), BUFF) Store (BF00, BBP0) Store (BF01, BBP1) Store (BF02, BBP2) Store (And (BF03, 0x0F), BBP3) Store (ShiftRight (And (BF03, 0xF0), 0x04), BBP4) } Method (Z008, 2, NotSerialized) { } Method (Z009, 1, NotSerialized) { \_SB.WMID.PHSR (0x04, Arg0) Store (BLK0, DY00) Store (BLK1, DY01) Store (BLK2, DY02) Store (BLK3, DY03) Store (0x00, DY04) } Method (Z00A, 1, NotSerialized) { Store (DY10, BLK0) If (LEqual (Arg0, 0x03)) { Store (DY11, BLK1) Store (DY12, BLK2) } Store (\_SB.WMID.PHSR (0x05, Arg0), Local0) Store (BLK0, DY10) Store (BLK1, DY11) If (Local0) { Store (0x01, DY12) } Else { Store (0x00, DY12) } } Method (Z00B, 1, NotSerialized) { Store (\_SB.WMID.PHSR (0x06, Arg0), BUFF) } Method (Z00C, 0, NotSerialized) { } Method (Z00D, 2, NotSerialized) { Store (DSY4, DSY2) Store (0x01, DY22) If (LEqual (Arg0, 0x08)) {} Else { } } Method (Z00E, 0, NotSerialized) { Store (\_SB.WMID.PHSR (0x07, 0x00), BUFF) } Method (Z00F, 1, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg0, _T_0) If (LEqual (_T_0, 0x01)) { Store (\_SB.BAT1._STA (), Local0) If (And (Local0, 0x10)) { Store (0x00, BUFF) } Else { Store (0x00020000, BUFF) } } Else { If (LEqual (_T_0, 0x02)) { Store (0x00010000, BUFF) } Else { Store (0x00010000, BUFF) } } Break } } Method (Z00G, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MTMP, Local0) Store (\_SB.PCI0.LPCB.EC0.ATMP, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x1388, Local0) Store (0x1388, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00I, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MCUR, Local0) Store (\_SB.PCI0.LPCB.EC0.ABCR, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00J, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MBVG, Local0) Store (\_SB.PCI0.LPCB.EC0.ABVG, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00K, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MBRM, Local0) Store (\_SB.PCI0.LPCB.EC0.ABRM, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00L, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.LFCC, Local0) Store (\_SB.PCI0.LPCB.EC0.AFCC, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00M, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MCYC, Local0) Store (\_SB.PCI0.LPCB.EC0.ACYC, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00N, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BTDC, Local0) Store (\_SB.PCI0.LPCB.EC0.ABDC, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00O, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BTDV, Local0) Store (\_SB.PCI0.LPCB.EC0.ABDV, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00P, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.MDAT, Local0) Store (\_SB.PCI0.LPCB.EC0.ADAT, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00Q, 1, NotSerialized) { If (\_SB.ECOK) { Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF) Store (\_SB.PCI0.LPCB.EC0.BTSN, Local0) Store (\_SB.PCI0.LPCB.EC0.ABSN, Local1) Release (\_SB.PCI0.LPCB.EC0.MUT1) } Else { Store (0x00, Local0) Store (0x00, Local1) } Z00H (Arg0, Local0, Local1) } Method (Z00H, 3, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg0, _T_0) If (LEqual (_T_0, 0x01)) { Store (\_SB.BAT1._STA (), Local2) If (And (Local2, 0x10)) { Store (Arg1, Local3) } Else { Store (0xFFFF, Local3) } } Else { If (LEqual (_T_0, 0x02)) { Store (\_SB.BAT1._STA (), Local2) If (And (Local2, 0x10)) { Store (Arg2, Local3) } Else { Store (0xFFFF, Local3) } } Else { Store (Arg1, Local3) } } Break } If (LEqual (Local3, 0xFFFF)) { Store (0x00020000, BUFF) } Else { Store (Local3, Index (BEDS, 0x01)) Store (DerefOf (Index (BEDS, 0x01)), BUFF) } } Method (Z00R, 1, NotSerialized) { Store (And (Arg0, 0x01), Local0) If (LLessEqual (Local0, 0x01)) { Store (\_SB.WMID.PHSR (0x08, Arg0), BUFF) } Else { Store (0x02, BUFF) } } Method (Z00S, 1, NotSerialized) { Store (\_SB.WMID.PHSR (0x09, Arg0), BUFF) } Method (Z00T, 1, NotSerialized) { Store (And (Arg0, 0x01), Local0) If (LLessEqual (Local0, 0x01)) { Store (\_SB.WMID.PHSR (0x0A, Arg0), BUFF) } Else { Store (0x02, BUFF) } } Method (Z00U, 1, NotSerialized) { Store (\_SB.WMID.PHSR (0x0B, Arg0), BUFF) } Method (Z00V, 1, NotSerialized) { Store (Arg0, Local0) If (LEqual (Local0, 0x01)) { \_SB.WMID.PHSR (0x0D, Local0) } Store (0x00, BUFF) } Method (Z00W, 1, NotSerialized) { Store (\_SB.WMID.PHSR (0x0E, Arg0), BUFF) } Method (Z00X, 0, NotSerialized) { Store (\_SB.WMID.PHSR (0x0F, 0x00), BUFF) } Method (Z002, 1, NotSerialized) { Store (Arg0, Local0) If (LGreater (Local0, BRTN)) { If (\_SB.PCI0.MCHC.PEGA) { Notify (\_SB.PCI0.PEGP.VGA.LCD, 0x86) } Else { Notify (\_SB.PCI0.GFX0.DD03, 0x86) } } Else { If (LLess (Local0, BRTN)) { If (\_SB.PCI0.MCHC.PEGA) { Notify (\_SB.PCI0.PEGP.VGA.LCD, 0x87) } Else { Notify (\_SB.PCI0.GFX0.DD03, 0x87) } } } } Name (_WDG, Buffer (0xDC) { /* 0000 */ 0x09, 0x4E, 0x76, 0x95, 0x56, 0xFB, 0x83, 0x4E, /* 0008 */ 0xB3, 0x1A, 0x37, 0x76, 0x1F, 0x60, 0x99, 0x4A, /* 0010 */ 0x41, 0x41, 0x01, 0x01, 0x58, 0xF2, 0xF4, 0x6A, /* 0018 */ 0x01, 0xB4, 0xFD, 0x42, 0xBE, 0x91, 0x3D, 0x4A, /* 0020 */ 0xC2, 0xD7, 0xC0, 0xD3, 0x42, 0x41, 0x01, 0x02, /* 0028 */ 0xAC, 0x61, 0x1A, 0xCC, 0x56, 0x42, 0xA3, 0x41, /* 0030 */ 0xB9, 0xE0, 0x05, 0xA4, 0x45, 0xAD, 0xE2, 0xF5, /* 0038 */ 0x80, 0x00, 0x01, 0x08, 0x53, 0x44, 0x8C, 0xE7, /* 0040 */ 0x27, 0x02, 0x61, 0x48, 0x9E, 0xDE, 0xF5, 0x60, /* 0048 */ 0x0B, 0x4A, 0x3D, 0x39, 0x42, 0x42, 0x01, 0x02, /* 0050 */ 0x7B, 0x4F, 0xE0, 0xAA, 0xC5, 0xB3, 0x65, 0x48, /* 0058 */ 0x95, 0xD6, 0x9F, 0xAC, 0x7F, 0xF3, 0xE9, 0x2B, /* 0060 */ 0x42, 0x43, 0x01, 0x02, 0x79, 0x4C, 0xF9, 0xCF, /* 0068 */ 0x77, 0x6C, 0xF7, 0x4A, 0xAC, 0x56, 0x7D, 0xD0, /* 0070 */ 0xCE, 0x01, 0xC9, 0x97, 0x42, 0x44, 0x01, 0x02, /* 0078 */ 0xC5, 0x2E, 0x77, 0x79, 0xB1, 0x04, 0xFD, 0x4B, /* 0080 */ 0x84, 0x3C, 0x61, 0xE7, 0xF7, 0x7B, 0x6C, 0xC9, /* 0088 */ 0x42, 0x45, 0x01, 0x02, 0xB7, 0xA0, 0xC9, 0xA7, /* 0090 */ 0x9D, 0x4C, 0x72, 0x4C, 0x83, 0xBB, 0x53, 0xA3, /* 0098 */ 0x45, 0x91, 0x71, 0xDF, 0x42, 0x46, 0x01, 0x02, /* 00A0 */ 0x4F, 0x06, 0x3A, 0x65, 0x3A, 0xA2, 0x5F, 0x48, /* 00A8 */ 0xB3, 0xD9, 0x13, 0xF6, 0x53, 0x2A, 0x01, 0x82, /* 00B0 */ 0x42, 0x47, 0x01, 0x02, 0xA7, 0xB1, 0x85, 0xDB, /* 00B8 */ 0x9A, 0x06, 0xBB, 0x4A, 0xA2, 0xB5, 0xD1, 0x86, /* 00C0 */ 0xA2, 0x1B, 0x80, 0xF1, 0x81, 0x00, 0x01, 0x08, /* 00C8 */ 0x91, 0x6B, 0x91, 0x36, 0x64, 0x1A, 0x83, 0x45, /* 00D0 */ 0x84, 0xD0, 0x53, 0x83, 0x0F, 0xB9, 0x10, 0x8D, /* 00D8 */ 0x82, 0x00, 0x01, 0x08 }) Method (WQAA, 1, NotSerialized) { AAF1 () Store (AADS, BUFF) Return (BUFF) } Method (WMBA, 3, NotSerialized) { If (LEqual (Arg1, 0x0D)) { Z003 (Arg1) Return (BUFF) } If (LEqual (Arg1, 0x0C)) { Z003 (Arg1) Return (BUFF) } If (LLess (Arg1, 0x04)) { Z003 (Arg1) Return (BUFF) } If (LAnd (LGreaterEqual (Arg1, 0x08), LLessEqual (Arg1, 0x0A))) { Z003 (Arg1) Return (BUFF) } If (LEqual (Arg1, 0x07)) { Store (Arg2, BUFF) If (BF00) { Store (0x01, BAEF) } Else { Store (0x00, BAEF) } Store (0x00, BUFF) Return (BUFF) } Z004 (Arg1, Arg2) Return (BUFF) } Method (_WED, 1, NotSerialized) { If (LEqual (Arg0, 0x81)) { Return (Z005 ()) } Else { If (LEqual (BAEF, 0x01)) { If (LOr (LEqual (Arg0, 0x80), LEqual (Arg0, 0x82))) { Return (Z005 ()) } } } Return (0xFFFF) } Method (WMBB, 3, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg1, _T_0) If (LNotEqual (Match (Package (0x02) { 0x01, 0x02 }, MEQ, _T_0, MTR, 0x00, 0x00), Ones)) { Z006 (Arg1, Arg2) Store (BBSB, BUFF) Return (BUFF) } Else { Store (0x1000, BUFF) Return (BUFF) } Break } } Method (WMBC, 3, NotSerialized) { Z008 (Arg1, Arg2) If (LLess (Arg1, 0x0A)) { Subtract (Arg1, 0x01, Local0) Store (DerefOf (Index (BCDS, Subtract (Arg1, 0x01))), BUFF) } Else { ShiftRight (DerefOf (Index (BCDS, Subtract (Arg1, 0x0A))), 0x10, BUFF) } Return (BUFF) } Method (WMBD, 3, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg1, _T_0) If (LEqual (_T_0, 0x01)) { Store (Arg2, BUFF) Z009 (BF00) Return (DSY0) } Else { If (LNotEqual (Match (Package (0x02) { 0x02, 0x03 }, MEQ, _T_0, MTR, 0x00, 0x00), Ones)) { If (LEqual (Arg1, 0x02)) { Store (Arg2, DY10) } Else { Store (Arg2, DSY1) } Z00A (Arg1) Return (DSY1) } Else { If (LNotEqual (Match (Package (0x02) { 0x04, 0x05 }, MEQ, _T_0, MTR, 0x00, 0x00), Ones)) { Store (Arg1, Local0) If (LEqual (Local0, 0x04)) { Store (Arg2, BUFF) If (LEqual (BF00, 0x01)) { Or (Local0, 0x10, Local0) } } Z00B (Local0) If (LNotEqual (BF01, 0x00)) { If (LEqual (Arg1, 0x04)) { Store (0x01, BUFF) } } Return (BUFF) } Else { If (LEqual (_T_0, 0x07)) { Store (\_TZ.THRM._TMP (), Local0) Divide (Local0, 0x0A, , Local0) Store (Local0, Index (BCDS, 0x0B)) Store (DerefOf (Index (BCDS, 0x0B)), BUFF) Return (BUFF) } Else { If (LEqual (_T_0, 0x0A)) { Z00E () Return (BUFF) } Else { If (LEqual (_T_0, 0x0B)) { Store (Arg2, BBAR) Store (ShiftLeft (And (BBA1, 0x0F), 0x04), Local1) Or (And (BBA0, 0x0F), Local1, Local1) Store (Local1, P80H) Z007 (Local1) Return (BBPD) } Else { } } } } } } Break } } Method (WMBE, 3, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg1, _T_0) If (LEqual (_T_0, 0x01)) { Z00F (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x02)) { Z00G (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x03)) { Z00J (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x04)) { Z00I (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x05)) { Z00K (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x06)) { Z00L (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x07)) { Z00M (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x08)) { Z00N (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x09)) { Z00O (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x0A)) { Z00P (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x0B)) { Z00Q (Arg2) Return (BUFF) } Else { If (LEqual (_T_0, 0x11)) { Store (\_SB.WMID.PHSR (0x0C, 0x00), BUFF) Return (BUFF) } Else { If (LEqual (_T_0, 0x12)) { Store (\_SB.WMID.PHSR (0x0C, 0x01), BUFF) Return (BUFF) } Else { Store (0x00010000, BUFF) Return (BUFF) } } } } } } } } } } } } } Break } } Method (WMBF, 3, NotSerialized) { Store (Arg2, BUFF) While (One) { Name (_T_0, 0x00) Store (Arg1, _T_0) If (LEqual (_T_0, 0x01)) { Z00R (BF00) } Else { If (LEqual (_T_0, 0x02)) { Z00S (BF00) } Else { If (LEqual (_T_0, 0x03)) { Z00T (BF00) } Else { If (LEqual (_T_0, 0x05)) { Z00V (BF00) } Else { Store (0x02, BF00) } } } } Break } Store (0x00, BF01) Store (0x00, BF02) Store (0x00, BF03) Return (BUFF) } Method (WMBG, 3, NotSerialized) { While (One) { Name (_T_0, 0x00) Store (Arg1, _T_0) If (LEqual (_T_0, 0x01)) { Store (Arg2, BUFF) Z00W (BF00) } Else { If (LEqual (_T_0, 0x02)) { Z00X () } Else { Store (0x00010000, BUFF) } } Break } Store (0x00, BF01) Store (0x00, BF02) Store (0x00, BF03) Return (BUFF) } } } } Scope (\_SB.PCI0.SATA) { Device (PRID) { Name (_ADR, 0x00) Method (_GTM, 0, NotSerialized) { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateDWordField (PBUF, 0x00, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) Store (GETP (PRIT), PIO0) Store (GDMA (And (SYNC, 0x01), And (ICR3, 0x01), And (ICR0, 0x01), SDT0, And (ICR1, 0x01)), DMA0) If (LEqual (DMA0, 0xFFFFFFFF)) { Store (PIO0, DMA0) } If (And (PRIT, 0x4000)) { If (LEqual (And (PRIT, 0x90), 0x80)) { Store (0x0384, PIO1) } Else { Store (GETT (PSIT), PIO1) } } Else { Store (0xFFFFFFFF, PIO1) } Store (GDMA (And (SYNC, 0x02), And (ICR3, 0x02), And (ICR0, 0x02), SDT1, And (ICR1, 0x02)), DMA1) If (LEqual (DMA1, 0xFFFFFFFF)) { Store (PIO1, DMA1) } Store (GETF (And (SYNC, 0x01), And (SYNC, 0x02), PRIT), FLAG) Return (PBUF) } Method (_STM, 3, NotSerialized) { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) If (LEqual (SizeOf (Arg1), 0x0200)) { And (PRIT, 0xC0F0, PRIT) And (SYNC, 0x0E, SYNC) Store (0x00, SDT0) And (ICR0, 0x0E, ICR0) And (ICR1, 0x0E, ICR1) And (ICR3, 0x0E, ICR3) And (ICR5, 0x0E, ICR5) CreateWordField (Arg1, 0x62, W490) CreateWordField (Arg1, 0x6A, W530) CreateWordField (Arg1, 0x7E, W630) CreateWordField (Arg1, 0x80, W640) CreateWordField (Arg1, 0xB0, W880) CreateWordField (Arg1, 0xBA, W930) Or (PRIT, 0x8004, PRIT) If (LAnd (And (FLAG, 0x02), And (W490, 0x0800))) { Or (PRIT, 0x02, PRIT) } Or (PRIT, SETP (PIO0, W530, W640), PRIT) If (And (FLAG, 0x01)) { Or (SYNC, 0x01, SYNC) Store (SDMA (DMA0), SDT0) If (LLess (DMA0, 0x1E)) { Or (ICR3, 0x01, ICR3) } If (LLess (DMA0, 0x3C)) { Or (ICR0, 0x01, ICR0) } Or (ICR1, 0x01, ICR1) } } If (LEqual (SizeOf (Arg2), 0x0200)) { And (PRIT, 0xBF0F, PRIT) Store (0x00, PSIT) And (SYNC, 0x0D, SYNC) Store (0x00, SDT1) And (ICR0, 0x0D, ICR0) And (ICR1, 0x0D, ICR1) And (ICR3, 0x0D, ICR3) And (ICR5, 0x0D, ICR5) CreateWordField (Arg2, 0x62, W491) CreateWordField (Arg2, 0x6A, W531) CreateWordField (Arg2, 0x7E, W631) CreateWordField (Arg2, 0x80, W641) CreateWordField (Arg2, 0xB0, W881) CreateWordField (Arg2, 0xBA, W931) Or (PRIT, 0x8040, PRIT) If (LAnd (And (FLAG, 0x08), And (W491, 0x0800))) { Or (PRIT, 0x20, PRIT) } If (And (FLAG, 0x10)) { Or (PRIT, 0x4000, PRIT) If (LGreater (PIO1, 0xF0)) { Or (PRIT, 0x80, PRIT) } Else { Or (PRIT, 0x10, PRIT) Store (SETT (PIO1, W531, W641), PSIT) } } If (And (FLAG, 0x04)) { Or (SYNC, 0x02, SYNC) Store (SDMA (DMA1), SDT1) If (LLess (DMA1, 0x1E)) { Or (ICR3, 0x02, ICR3) } If (LLess (DMA1, 0x3C)) { Or (ICR0, 0x02, ICR0) } Or (ICR1, 0x02, ICR1) } } } Device (P_D0) { Name (_ADR, 0x00) Method (_GTF, 0, NotSerialized) { Name (PIB0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF }) CreateByteField (PIB0, 0x01, PMD0) CreateByteField (PIB0, 0x08, DMD0) If (And (PRIT, 0x02)) { If (LEqual (And (PRIT, 0x09), 0x08)) { Store (0x08, PMD0) } Else { Store (0x0A, PMD0) ShiftRight (And (PRIT, 0x0300), 0x08, Local0) ShiftRight (And (PRIT, 0x3000), 0x0C, Local1) Add (Local0, Local1, Local2) If (LEqual (0x03, Local2)) { Store (0x0B, PMD0) } If (LEqual (0x05, Local2)) { Store (0x0C, PMD0) } } } Else { Store (0x01, PMD0) } If (And (SYNC, 0x01)) { Store (Or (SDT0, 0x40), DMD0) If (And (ICR1, 0x01)) { If (And (ICR0, 0x01)) { Add (DMD0, 0x02, DMD0) } If (And (ICR3, 0x01)) { Store (0x45, DMD0) } } } Else { Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) } Return (PIB0) } } Device (P_D1) { Name (_ADR, 0x01) Method (_GTF, 0, NotSerialized) { Name (PIB1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF }) CreateByteField (PIB1, 0x01, PMD1) CreateByteField (PIB1, 0x08, DMD1) If (And (PRIT, 0x20)) { If (LEqual (And (PRIT, 0x90), 0x80)) { Store (0x08, PMD1) } Else { Add (And (PSIT, 0x03), ShiftRight (And (PSIT, 0x0C), 0x02), Local0) If (LEqual (0x05, Local0)) { Store (0x0C, PMD1) } Else { If (LEqual (0x03, Local0)) { Store (0x0B, PMD1) } Else { Store (0x0A, PMD1) } } } } Else { Store (0x01, PMD1) } If (And (SYNC, 0x02)) { Store (Or (SDT1, 0x40), DMD1) If (And (ICR1, 0x02)) { If (And (ICR0, 0x02)) { Add (DMD1, 0x02, DMD1) } If (And (ICR3, 0x02)) { Store (0x45, DMD1) } } } Else { Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) } Return (PIB1) } } } } Scope (\_SB.PCI0.SATA) { Device (SECD) { Name (_ADR, 0x01) Method (_GTM, 0, NotSerialized) { Name (SBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00 }) CreateDWordField (SBUF, 0x00, PIO0) CreateDWordField (SBUF, 0x04, DMA0) CreateDWordField (SBUF, 0x08, PIO1) CreateDWordField (SBUF, 0x0C, DMA1) CreateDWordField (SBUF, 0x10, FLAG) Store (GETP (SECT), PIO0) Store (GDMA (And (SYNC, 0x04), And (ICR3, 0x04), And (ICR0, 0x04), SDT2, And (ICR1, 0x04)), DMA0) If (LEqual (DMA0, 0xFFFFFFFF)) { Store (PIO0, DMA0) } If (And (SECT, 0x4000)) { If (LEqual (And (SECT, 0x90), 0x80)) { Store (0x0384, PIO1) } Else { Store (GETT (SSIT), PIO1) } } Else { Store (0xFFFFFFFF, PIO1) } Store (GDMA (And (SYNC, 0x08), And (ICR3, 0x08), And (ICR0, 0x08), SDT3, And (ICR1, 0x08)), DMA1) If (LEqual (DMA1, 0xFFFFFFFF)) { Store (PIO1, DMA1) } Store (GETF (And (SYNC, 0x04), And (SYNC, 0x08), SECT), FLAG) If (And (LEqual (PIO0, 0xFFFFFFFF), LEqual (DMA0, 0xFFFFFFFF))) { Store (0x78, PIO0) Store (0x14, DMA0) Store (0x03, FLAG) } Return (SBUF) } Method (_STM, 3, NotSerialized) { CreateDWordField (Arg0, 0x00, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) If (LEqual (SizeOf (Arg1), 0x0200)) { And (SECT, 0xC0F0, SECT) And (SYNC, 0x0B, SYNC) Store (0x00, SDT2) And (ICR0, 0x0B, ICR0) And (ICR1, 0x0B, ICR1) And (ICR3, 0x0B, ICR3) And (ICR5, 0x0B, ICR5) CreateWordField (Arg1, 0x62, W490) CreateWordField (Arg1, 0x6A, W530) CreateWordField (Arg1, 0x7E, W630) CreateWordField (Arg1, 0x80, W640) CreateWordField (Arg1, 0xB0, W880) CreateWordField (Arg1, 0xBA, W930) Or (SECT, 0x8004, SECT) If (LAnd (And (FLAG, 0x02), And (W490, 0x0800))) { Or (SECT, 0x02, SECT) } Or (SECT, SETP (PIO0, W530, W640), SECT) If (And (FLAG, 0x01)) { Or (SYNC, 0x04, SYNC) Store (SDMA (DMA0), SDT2) If (LLess (DMA0, 0x1E)) { Or (ICR3, 0x04, ICR3) } If (LLess (DMA0, 0x3C)) { Or (ICR0, 0x04, ICR0) } If (And (W930, 0x2000)) { Or (ICR1, 0x04, ICR1) } } } If (LEqual (SizeOf (Arg2), 0x0200)) { And (SECT, 0xBF0F, SECT) Store (0x00, SSIT) And (SYNC, 0x07, SYNC) Store (0x00, SDT3) And (ICR0, 0x07, ICR0) And (ICR1, 0x07, ICR1) And (ICR3, 0x07, ICR3) And (ICR5, 0x07, ICR5) CreateWordField (Arg2, 0x62, W491) CreateWordField (Arg2, 0x6A, W531) CreateWordField (Arg2, 0x7E, W631) CreateWordField (Arg2, 0x80, W641) CreateWordField (Arg2, 0xB0, W881) CreateWordField (Arg2, 0xBA, W931) Or (SECT, 0x8040, SECT) If (LAnd (And (FLAG, 0x08), And (W491, 0x0800))) { Or (SECT, 0x20, SECT) } If (And (FLAG, 0x10)) { Or (SECT, 0x4000, SECT) If (LGreater (PIO1, 0xF0)) { Or (SECT, 0x80, SECT) } Else { Or (SECT, 0x10, SECT) Store (SETT (PIO1, W531, W641), SSIT) } } If (And (FLAG, 0x04)) { Or (SYNC, 0x08, SYNC) Store (SDMA (DMA1), SDT3) If (LLess (DMA1, 0x1E)) { Or (ICR3, 0x08, ICR3) } If (LLess (DMA1, 0x3C)) { Or (ICR0, 0x08, ICR0) } If (And (W931, 0x2000)) { Or (ICR1, 0x08, ICR1) } } } } Device (S_D0) { Name (_ADR, 0x00) Method (_RMV, 0, NotSerialized) { Return (0x01) } Method (_GTF, 0, NotSerialized) { Name (SIB0, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF }) CreateByteField (SIB0, 0x01, PMD0) CreateByteField (SIB0, 0x08, DMD0) If (And (SECT, 0x02)) { If (LEqual (And (SECT, 0x09), 0x08)) { Store (0x08, PMD0) } Else { Store (0x0A, PMD0) ShiftRight (And (SECT, 0x0300), 0x08, Local0) ShiftRight (And (SECT, 0x3000), 0x0C, Local1) Add (Local0, Local1, Local2) If (LEqual (0x03, Local2)) { Store (0x0B, PMD0) } If (LEqual (0x05, Local2)) { Store (0x0C, PMD0) } } } Else { Store (0x01, PMD0) } If (And (SYNC, 0x04)) { Store (Or (SDT2, 0x40), DMD0) If (And (ICR1, 0x04)) { If (And (ICR0, 0x04)) { Add (DMD0, 0x02, DMD0) } If (And (ICR3, 0x04)) { Store (0x45, DMD0) } } } Else { Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) } Return (SIB0) } } Device (S_D1) { Name (_ADR, 0x01) Method (_GTF, 0, NotSerialized) { Name (SIB1, Buffer (0x0E) { /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF }) CreateByteField (SIB1, 0x01, PMD1) CreateByteField (SIB1, 0x08, DMD1) If (And (SECT, 0x20)) { If (LEqual (And (SECT, 0x90), 0x80)) { Store (0x08, PMD1) } Else { Add (And (SSIT, 0x03), ShiftRight (And (SSIT, 0x0C), 0x02), Local0) If (LEqual (0x05, Local0)) { Store (0x0C, PMD1) } Else { If (LEqual (0x03, Local0)) { Store (0x0B, PMD1) } Else { Store (0x0A, PMD1) } } } } Else { Store (0x01, PMD1) } If (And (SYNC, 0x08)) { Store (Or (SDT3, 0x40), DMD1) If (And (ICR1, 0x08)) { If (And (ICR0, 0x08)) { Add (DMD1, 0x02, DMD1) } If (And (ICR3, 0x08)) { Store (0x45, DMD1) } } } Else { Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) } Return (SIB1) } } } } Scope (\_PR.CPU0) { Name (_TPC, 0x00) Method (_PTC, 0, NotSerialized) { If (And (PDC0, 0x04)) { Return (Package (0x02) { ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x00, // Bit Width 0x00, // Bit Offset 0x0000000000000000, // Address ,) } }) } Return (Package (0x02) { ResourceTemplate () { Register (SystemIO, 0x04, // Bit Width 0x01, // Bit Offset 0x0000000000001010, // Address ,) }, ResourceTemplate () { Register (SystemIO, 0x04, // Bit Width 0x01, // Bit Offset 0x0000000000001010, // Address ,) } }) } Name (TSSI, Package (0x08) { Package (0x05) { 0x64, 0x03E8, 0x00, 0x00, 0x00 }, Package (0x05) { 0x58, 0x036B, 0x00, 0x0F, 0x00 }, Package (0x05) { 0x4B, 0x02EE, 0x00, 0x0E, 0x00 }, Package (0x05) { 0x3F, 0x0271, 0x00, 0x0D, 0x00 }, Package (0x05) { 0x32, 0x01F4, 0x00, 0x0C, 0x00 }, Package (0x05) { 0x26, 0x0177, 0x00, 0x0B, 0x00 }, Package (0x05) { 0x19, 0xFA, 0x00, 0x0A, 0x00 }, Package (0x05) { 0x0D, 0x7D, 0x00, 0x09, 0x00 } }) Name (TSSM, Package (0x08) { Package (0x05) { 0x64, 0x03E8, 0x00, 0x00, 0x00 }, Package (0x05) { 0x58, 0x036B, 0x00, 0x1E, 0x00 }, Package (0x05) { 0x4B, 0x02EE, 0x00, 0x1C, 0x00 }, Package (0x05) { 0x3F, 0x0271, 0x00, 0x1A, 0x00 }, Package (0x05) { 0x32, 0x01F4, 0x00, 0x18, 0x00 }, Package (0x05) { 0x26, 0x0177, 0x00, 0x16, 0x00 }, Package (0x05) { 0x19, 0xFA, 0x00, 0x14, 0x00 }, Package (0x05) { 0x0D, 0x7D, 0x00, 0x12, 0x00 } }) Name (TSSF, 0x00) Method (_TSS, 0, NotSerialized) { If (LAnd (LNot (TSSF), CondRefOf (_PSS))) { Store (_PSS, Local0) Store (SizeOf (Local0), Local1) Decrement (Local1) Store (DerefOf (Index (DerefOf (Index (Local0, Local1)), 0x01)), Local2) Store (0x00, Local3) While (LLess (Local3, SizeOf (TSSI))) { Store (Divide (Multiply (Local2, Subtract (0x08, Local3)), 0x08, ), Local4) Store (Local4, Index (DerefOf (Index (TSSI, Local3)), 0x01)) Store (Local4, Index (DerefOf (Index (TSSM, Local3)), 0x01)) Increment (Local3) } Store (Ones, TSSF) } If (And (PDC0, 0x04)) { Return (TSSM) } Return (TSSI) } Method (_TSD, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC0, 0x04 )))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, 0x02 } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFC, 0x01 } }) } } Scope (\_PR.CPU1) { Name (_TPC, 0x00) Method (_PTC, 0, NotSerialized) { Return (\_PR.CPU0._PTC ()) } Method (_TSS, 0, NotSerialized) { Return (\_PR.CPU0._TSS ()) } Method (_TSD, 0, NotSerialized) { If (LAnd (And (CFGD, 0x01000000), LNot (And (PDC1, 0x04 )))) { Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00, 0xFD, 0x02 } }) } Return (Package (0x01) { Package (0x05) { 0x05, 0x00, 0x01, 0xFC, 0x01 } }) } } Scope (\) { Name (SSDT, Package (0x0C) { "CPU0IST ", 0x7F6D3E0C, 0x000001F6, "CPU1IST ", 0x7F6D4002, 0x000000C8, "CPU0CST ", 0x7F6D3790, 0x000005F7, "CPU1CST ", 0x7F6D3D87, 0x00000085 }) Name (CFGD, 0x113769F1) Name (\PDC0, 0x80000000) Name (\PDC1, 0x80000000) Name (\SDTL, 0x00) } Scope (\_PR.CPU0) { Name (HI0, 0x00) Name (HC0, 0x00) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, REVS) CreateDWordField (Arg0, 0x04, SIZE) Store (SizeOf (Arg0), Local0) Store (Subtract (Local0, 0x08), Local1) CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) Name (STS0, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) Concatenate (STS0, TEMP, Local2) _OSC (Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }, REVS, SIZE, Local2) } Method (_OSC, 4, NotSerialized) { CreateDWordField (Arg3, 0x00, STS0) CreateDWordField (Arg3, 0x04, CAP0) CreateDWordField (Arg0, 0x00, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID0, Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }) CreateDWordField (UID0, 0x00, EID0) CreateDWordField (UID0, 0x04, EID1) CreateDWordField (UID0, 0x08, EID2) CreateDWordField (UID0, 0x0C, EID3) If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3))))) { Store (0x06, STS0) Return (Arg3) } If (LNotEqual (Arg1, 0x01)) { Store (0x0A, STS0) Return (Arg3) } If (And (STS0, 0x01)) { And (CAP0, 0x0BFF, CAP0) Return (Arg3) } Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0) Store (And (PDC0, 0xFF), PCP0) If (And (CFGD, 0x01)) { If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC0, 0x09), 0x09)), LNot (And (SDTL, 0x01)))) { Or (SDTL, 0x01, SDTL) OperationRegion (IST0, SystemMemory, DerefOf (Index (SSDT, 0x01)), DerefOf (Index (SSDT, 0x02 ))) Load (IST0, HI0) } } If (And (CFGD, 0xF0)) { If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC0, 0x18 )), LNot (And (SDTL, 0x02)))) { Or (SDTL, 0x02, SDTL) OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08 ))) Load (CST0, HC0) } } Return (Arg3) } } Scope (\_PR.CPU1) { Name (HI1, 0x00) Name (HC1, 0x00) Method (_PDC, 1, NotSerialized) { CreateDWordField (Arg0, 0x00, REVS) CreateDWordField (Arg0, 0x04, SIZE) Store (SizeOf (Arg0), Local0) Store (Subtract (Local0, 0x08), Local1) CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP) Name (STS1, Buffer (0x04) { 0x00, 0x00, 0x00, 0x00 }) Concatenate (STS1, TEMP, Local2) _OSC (Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }, REVS, SIZE, Local2) } Method (_OSC, 4, NotSerialized) { CreateDWordField (Arg3, 0x00, STS1) CreateDWordField (Arg3, 0x04, CAP1) CreateDWordField (Arg0, 0x00, IID0) CreateDWordField (Arg0, 0x04, IID1) CreateDWordField (Arg0, 0x08, IID2) CreateDWordField (Arg0, 0x0C, IID3) Name (UID1, Buffer (0x10) { /* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47, /* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53 }) CreateDWordField (UID1, 0x00, EID0) CreateDWordField (UID1, 0x04, EID1) CreateDWordField (UID1, 0x08, EID2) CreateDWordField (UID1, 0x0C, EID3) If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)), LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3))))) { Store (0x06, STS1) Return (Arg3) } If (LNotEqual (Arg1, 0x01)) { Store (0x0A, STS1) Return (Arg3) } If (And (STS1, 0x01)) { And (CAP1, 0x0BFF, CAP1) Return (Arg3) } Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1) Store (And (PDC1, 0xFF), PCP1) If (And (CFGD, 0x01)) { If (LAnd (LAnd (And (CFGD, 0x01000000), LEqual (And (PDC1, 0x09), 0x09)), LNot (And (SDTL, 0x10)))) { Or (SDTL, 0x10, SDTL) OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05 ))) Load (IST1, HI1) } } If (And (CFGD, 0xF0)) { If (LAnd (LAnd (And (CFGD, 0x01000000), And (PDC1, 0x18 )), LNot (And (SDTL, 0x20)))) { Or (SDTL, 0x20, SDTL) OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B ))) Load (CST1, HC1) } } Return (Arg3) } } } ------=_Part_84305_766717363.1211305358202-- From owner-freebsd-acpi@FreeBSD.ORG Tue May 20 21:27:40 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7BF081065679 for ; Tue, 20 May 2008 21:27:40 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from a1.com.ua (158-103-207-82.ip.ukrtel.net [82.207.103.158]) by mx1.freebsd.org (Postfix) with ESMTP id 1C81A8FC1F for ; Tue, 20 May 2008 21:27:39 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from localhost ([127.0.0.1] helo=serge.a1.lan ident=nobody) by a1.com.ua with esmtp (Exim 4.68 (FreeBSD)) (envelope-from ) id 1JyYxB-0002qG-E6; Wed, 21 May 2008 00:01:01 +0300 Message-ID: <48333C08.2020001@a-1.com.ua> Date: Wed, 21 May 2008 00:00:56 +0300 From: Serge Semenenko User-Agent: Thunderbird 2.0.0.12 (X11/20080404) MIME-Version: 1.0 To: Mario Pavlov References: <1749772363.84307.1211305358208.JavaMail.apache@mail54.abv.bg> In-Reply-To: <1749772363.84307.1211305358208.JavaMail.apache@mail54.abv.bg> Content-Type: multipart/mixed; boundary="------------040707000509030408020108" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: serge@a-1.com.ua X-SA-Exim-Scanned: No (on a1.com.ua); SAEximRunCond expanded to false Cc: freebsd-acpi@freebsd.org Subject: Re: PCI bridge with I/O decode 0x0-0x0 X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 May 2008 21:27:40 -0000 This is a multi-part message in MIME format. --------------040707000509030408020108 Content-Type: text/plain; charset=KOI8-U; format=flowed Content-Transfer-Encoding: 7bit Hi Have the same problem with my Acer 6292... But at the same time there are no problems on my friend's EX5620G. I've spent some time trying to fix aml code but with no success. May be I'm not too good in that or the problem might be somewhere else... Anyway, it seems that somewhere during acpi initialization PCI Config space of PCI bridges gets corrupted. So, to get my network cards working as a temporary solution I use the patch attached. Memory ranges I've found while booting with acpi disabled. I know that's not a solution but at least I could send now this message through built-in wifi card :) Regards, Serge --------------040707000509030408020108 Content-Type: text/plain; name="acpi_pcib_pci.c.pci_bridge_resource_brute_fix" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="acpi_pcib_pci.c.pci_bridge_resource_brute_fix" --- acpi_pcib_pci.c.orig 2008-02-28 00:55:04.000000000 +0200 +++ acpi_pcib_pci.c 2008-02-28 23:51:16.000000000 +0200 @@ -133,6 +133,22 @@ ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); + if (device_get_unit(dev)==2){ + pci_write_config(dev, PCIR_COMMAND, PCIM_CMD_MEMEN | PCIM_CMD_PORTEN, 1); + pci_enable_busmaster(dev); + pci_write_config(dev, PCIR_IOBASEL_1, 0xf0, 1); + pci_write_config(dev, PCIR_MEMBASE_1, 0xf020, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0xf020, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xfff1, 2); + } + if (device_get_unit(dev)==3){ + pci_write_config(dev, PCIR_COMMAND, PCIM_CMD_MEMEN | PCIM_CMD_PORTEN, 1); + pci_enable_busmaster(dev); + pci_write_config(dev, PCIR_IOBASEL_1, 0xf0, 1); + pci_write_config(dev, PCIR_MEMBASE_1, 0xf030, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0xf030, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xfff1, 2); + } pcib_attach_common(dev); sc = device_get_softc(dev); sc->ap_handle = acpi_get_handle(dev); --------------040707000509030408020108-- From owner-freebsd-acpi@FreeBSD.ORG Wed May 21 05:18:34 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EEC61106564A for ; Wed, 21 May 2008 05:18:34 +0000 (UTC) (envelope-from sarumont@mail.sigil.org) Received: from mail.sigil.org (mail.sigil.org [69.13.51.5]) by mx1.freebsd.org (Postfix) with ESMTP id CFA9D8FC0C for ; Wed, 21 May 2008 05:18:34 +0000 (UTC) (envelope-from sarumont@mail.sigil.org) Received: from localhost (localhost [127.0.0.1]) by mail.sigil.org (Postfix) with ESMTP id 54AFB50975 for ; Tue, 20 May 2008 23:58:48 -0500 (CDT) X-Virus-Scanned: amavisd-new at sigil.org Received: from mail.sigil.org ([127.0.0.1]) by localhost (mail.sigil.org [127.0.0.1]) (amavisd-new, port 10024) with LMTP id yssUsGPcRqgJ for ; Tue, 20 May 2008 23:58:43 -0500 (CDT) Received: by mail.sigil.org (Postfix, from userid 1001) id E032350974; Tue, 20 May 2008 23:58:43 -0500 (CDT) Date: Tue, 20 May 2008 23:58:43 -0500 From: Richard Kolkovich To: freebsd-acpi@freebsd.org Message-ID: <20080521045843.GC18427@snobol> References: <20080407145115.GA11167@snobol> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="8NvZYKFJsRX2Djef" Content-Disposition: inline In-Reply-To: <20080407145115.GA11167@snobol> X-OS: FreeBSD snobol 7.0-STABLE i386 X-Composed-With: vim X-PGP-Key: http://sarumont.sigil.org/pubkey.asc User-Agent: Mutt/1.5.17 (2007-11-01) Subject: Re: Thinkpad t43p suspend/resume only once X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2008 05:18:35 -0000 --8NvZYKFJsRX2Djef Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Apr 07, 2008 at 09:51:15AM -0500, Richard Kolkovich wrote: > Hi, >=20 > On my T43p, I can suspend to RAM (S3) and resume once. After this, nothi= ng > happens when I close the lid (until a reboot). I started digging into th= is > today, and it looks like the acpi device is in a bad state after the resu= me. > Running devd -dD from a terminal shows no output from ACPI buttons after = the > resume. >=20 > I discovered today, however, that I can run acpiconf -s S3 to regain my a= bility > to sleep/resume. This will suspend the machine and immediately resume it= , after > which devd shows output again. >=20 > I'm running RELENG_7 as of about March 25th. I've only run 7.0 on this l= aptop, > so I've always had this problem. I've just now gotten a chance to work on > finding a fix. >=20 > Please CC me, as I'm not subscribed to freebsd-acpi. Thanks, >=20 > --=20 >=20 > Richard Kolkovich > sarumont@sigil.org >=20 FWIW - I just discovered that disabling APIC resolves this issue. =20 Thanks, --=20 Richard Kolkovich sarumont@sigil.org --8NvZYKFJsRX2Djef Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.8 (FreeBSD) iEYEARECAAYFAkgzrAMACgkQfXtD1KVAIbAFzQCgkWDRU5zeq9rS6ZzC+DSgz2GY mBIAniG4P9Q9g8jcreD7x1PXhln0k+Zu =/hNY -----END PGP SIGNATURE----- --8NvZYKFJsRX2Djef-- From owner-freebsd-acpi@FreeBSD.ORG Wed May 21 05:25:16 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3BEFA106564A for ; Wed, 21 May 2008 05:25:16 +0000 (UTC) (envelope-from freebsd@abv.bg) Received: from smtp-out.abv.bg (smtp-out.abv.bg [194.153.145.99]) by mx1.freebsd.org (Postfix) with ESMTP id E549D8FC15 for ; Wed, 21 May 2008 05:25:15 +0000 (UTC) (envelope-from freebsd@abv.bg) Received: from mail54.abv.bg (mail54.ni.bg [192.168.151.57]) by smtp-out.abv.bg (Postfix) with ESMTP id 2F392EB2A5; Wed, 21 May 2008 08:25:14 +0300 (EEST) DomainKey-Signature: a=rsa-sha1; s=smtp-out; d=abv.bg; c=simple; q=dns; b=E4W9/F3gnYFQIq95/yBaFJmGkJtBUP3OKgAQdSCmqoyK4jsalAM8n8UIJVSx2Tf4t 0Ia32/lueUD84u5QMte9K09Lwln8DOfeyicXckdxC6ubf7KaDRTzeDaDGJWuabCPLbm m1IE3ID0MlgAiktnnRzu5JvsBL/EQD6JFVL5/9w= DKIM-Signature: v=1; a=rsa-sha1; c=simple/simple; d=abv.bg; s=smtp-out; t=1211347514; bh=j+COJ5NkoA+6kFD9MGc1707paKk=; h=Received:Date:From: To:Cc:Message-ID:Subject:MIME-Version:Content-Type: Content-Transfer-Encoding:X-Priority:X-Mailer:X-Originating-IP: DomainKey; b=Wa8dpADo4axdUxDtfiH1tVsZIYU3D56w+ElNznxAQCSo32P4aywym 1c0tqPDMheFLmcs59PzxcljBkADWt5q6yak1Ov0T/0pX0a8LR+tuFvx2ftRAONsqrJC Q0jC7JixxqvpOS2sNGp8o6v6E3SQMvlJCbVqZ+ZjYITiphkUjm8= Received: from mail54.abv.bg (localhost [127.0.0.1]) by mail54.abv.bg (Postfix) with ESMTP id 13A241A261A; Wed, 21 May 2008 08:25:14 +0300 (EEST) Date: Wed, 21 May 2008 08:25:14 +0300 (EEST) From: Mario Pavlov To: Serge Semenenko Message-ID: <1312312888.89527.1211347514074.JavaMail.apache@mail54.abv.bg> MIME-Version: 1.0 Content-Type: text/plain; charset="windows-1251" Content-Transfer-Encoding: 8bit X-Priority: 3 X-Mailer: AbvMail 1.0 X-Originating-IP: 78.128.21.208 Cc: freebsd-acpi@freebsd.org Subject: Re: Re: PCI bridge with I/O decode 0x0-0x0 X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2008 05:25:16 -0000 >Hi > >Have the same problem with my Acer 6292... But at the same time there >are no problems on my friend's EX5620G. I've spent some time trying to >fix aml code but with no success. May be I'm not too good in that or the >problem might be somewhere else... Anyway, it seems that somewhere >during acpi initialization PCI Config space of PCI bridges gets >corrupted. So, to get my network cards working as a temporary solution I >use the patch attached. Memory ranges I've found while booting with acpi >disabled. I know that's not a solution but at least I could send now >this message through built-in wifi card :) > >Regards, >Serge Hi Serge, nice hack ;) I may also try something like that... however why don't you post your ASL and also your friend's ASL and lets see what we can do together we may also get some help from the ACPI gurus here. thanks Regards MGP ----------------------------------------------------------------- Òúðñè ñå äâîéíèê! http://zoom.bg/page.php?bid=6 From owner-freebsd-acpi@FreeBSD.ORG Wed May 21 13:22:00 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C86601065675 for ; Wed, 21 May 2008 13:22:00 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id 28B4D8FC23 for ; Wed, 21 May 2008 13:21:59 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4LCwLsu012355 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 21 May 2008 16:58:24 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1Jyntc-000KTz-R8; Wed, 21 May 2008 16:58:20 +0400 From: Vladimir Grebenschikov To: takawata@init-main.com In-Reply-To: <200805131125.m4DBPu1q092741@sana.init-main.com> References: <200805131125.m4DBPu1q092741@sana.init-main.com> Content-Type: text/plain Content-Transfer-Encoding: 7bit Organization: SWsoft Date: Wed, 21 May 2008 16:58:20 +0400 Message-Id: <1211374700.1566.27.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2008 13:22:00 -0000 On Tue, 2008-05-13 at 20:25 +0900, takawata@init-main.com wrote: I've tried to build patch with recent CURRENT and get SMP redefined for acpi.c and acpi_wakeup.c Was it expected ? I have options SMP # Symmetric MultiProcessor Kernel in my kernel configuration. (notebook: ThinkPad T60) > Hi, I managed to make suspend and resume work on SMP system. > The patch following is a bit crude patch, but it begin > to work on my ThinkPad X61 (core2duo system). > > TODO: > 1. Suspend/resume path it self is simular to AP boot path. > Some of code may be integrated. > 2. More context, like MTRR or npx context should be saved on > suspend. > 3. Make acpi suspend resume path more ABI aware: needless > register recoverly or special register context saving > (the value itself is usually constant) should be removed. > 4. Make same binary module work on both UP or SMP case. > (Or is it time to give up using acpi module on also on i386?) > > > > > > Index: i386/acpica/acpi_wakeup.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/acpica/acpi_wakeup.c,v > retrieving revision 1.47 > diff -u -r1.47 acpi_wakeup.c > --- i386/acpica/acpi_wakeup.c 16 Mar 2008 10:58:03 -0000 1.47 > +++ i386/acpica/acpi_wakeup.c 13 May 2008 09:12:18 -0000 > @@ -27,6 +27,7 @@ > > #include > __FBSDID("$FreeBSD: src/sys/i386/acpica/acpi_wakeup.c,v 1.47 2008/03/16 10:58:03 rwatson Exp $"); > +#define SMP > > #include > #include > @@ -49,6 +50,11 @@ > > #include > #include > +#include > +#include > +#include > +#include > +#include > > #include "acpi_wakecode.h" > > @@ -71,7 +77,9 @@ > > static uint16_t r_cs, r_ds, r_es, r_fs, r_gs, r_ss, r_tr; > static uint32_t r_esp; > - > +extern void *bootstacks[]; > +static char *bootSTK; > +void restore_sub(void); > static void acpi_printcpu(void); > static void acpi_realmodeinst(void *arg, bus_dma_segment_t *segs, > int nsegs, int error); > @@ -80,6 +88,7 @@ > /* XXX shut gcc up */ > extern int acpi_savecpu(void); > extern int acpi_restorecpu(void); > +extern void acpi_kicksub(void); > > #ifdef __GNUCLIKE_ASM > __asm__(" \n\ > @@ -104,6 +113,15 @@ > movl %eax,(%esp) \n\ > xorl %eax,%eax \n\ > ret \n\ > + \n\ > + .text \n\ > + .p2align 2, 0x90 \n\ > + .type acpi_kicksub, @function \n\ > +acpi_kicksub: \n\ > + .align 4 \n\ > + movl bootSTK,%esp \n\ > + jmp restore_sub \n\ > + ret \n\ > \n\ > .text \n\ > .p2align 2, 0x90 \n\ > @@ -149,6 +167,24 @@ > ret \n\ > "); > #endif /* __GNUCLIKE_ASM */ > +int acpi_cpu_resumed[MAXCPU]; > +int acpi_curcpu; > +extern int switch_debug; > + > +void restore_sub() > +{ > + ACPI_DISABLE_IRQS(); > + printf("RESTORE_SUB\n"); > + lapic_disable(); > + printf("LAPIC_SETUP\n"); > + lapic_setup(0); > + lapic_dump("RESTORE_SUB"); > + printf("RESTORE_SUB2\n"); > + ACPI_ENABLE_IRQS(); > + > + acpi_cpu_resumed[acpi_curcpu]= 1; > + acpi_restorecpu(); > +} > > static void > acpi_printcpu(void) > @@ -187,6 +223,119 @@ > outb(0x61, inb(0x61) & ~0x3); > } > > + > +int resume_other_cpu(struct acpi_softc *sc, int cpu); > +int resume_other_cpu(struct acpi_softc *sc, int cpu) > +{ > + int ms; > + int apic_id = cpu_apic_ids[cpu]; > + int gsel_tss; > + > + gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); > + acpi_curcpu = cpu; > + bootSTK= (char *)bootstacks[cpu] + KSTACK_PAGES * PAGE_SIZE - 4; > + printf("%p\n", bootSTK); > + p_gdt = (struct region_descriptor *) > + (sc->acpi_wakeaddr + physical_gdt); > + saved_gdt.rd_limit = NGDT * sizeof(gdt[0]) -1; > + saved_gdt.rd_base = (int )&gdt[cpu*NGDT]; > + p_gdt->rd_limit = saved_gdt.rd_limit; > + p_gdt->rd_base = vtophys(saved_gdt.rd_base); > + r_esp = stoppcbs[cpu].pcb_esp; > + r_ebp = stoppcbs[cpu].pcb_ebp; > + r_esi = stoppcbs[cpu].pcb_esi; > + r_edi = stoppcbs[cpu].pcb_edi; > + r_efl = stoppcbs[cpu].pcb_psl; > + ret_addr = stoppcbs[cpu].pcb_eip; > + WAKECODE_FIXUP(physical_esp, uint32_t, vtophys(bootSTK) ); > + WAKECODE_FIXUP(previous_cr0, uint32_t, r_cr0); > + WAKECODE_FIXUP(previous_cr2, uint32_t, r_cr2); > + WAKECODE_FIXUP(previous_cr3, uint32_t, r_cr3); > + WAKECODE_FIXUP(previous_cr4, uint32_t, r_cr4); > + > + WAKECODE_FIXUP(resume_beep, uint32_t, 0); > + WAKECODE_FIXUP(reset_video, uint32_t, 0); > + > + WAKECODE_FIXUP(previous_tr, uint16_t, gsel_tss); > + WAKECODE_BCOPY(previous_gdt, struct region_descriptor, saved_gdt); > + WAKECODE_FIXUP(previous_ldt, uint16_t, saved_ldt); > + WAKECODE_BCOPY(previous_idt, struct region_descriptor, saved_idt); > + > + WAKECODE_FIXUP(where_to_recover, void *, acpi_kicksub); > + > + WAKECODE_FIXUP(previous_ds, uint16_t, r_ds); > + WAKECODE_FIXUP(previous_es, uint16_t, r_es); > + WAKECODE_FIXUP(previous_fs, uint16_t, r_fs); > + WAKECODE_FIXUP(previous_gs, uint16_t, 0); > + WAKECODE_FIXUP(previous_ss, uint16_t, r_ss); > + > + /* do an INIT IPI: assert RESET */ > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_ASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, apic_id); > + > + /* wait for pending status end */ > + lapic_ipi_wait(-1); > + > + /* do an INIT IPI: deassert RESET */ > + lapic_ipi_raw(APIC_DEST_ALLESELF | APIC_TRIGMOD_LEVEL | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, 0); > + > + /* wait for pending status end */ > + DELAY(10000); /* wait ~10mS */ > + lapic_ipi_wait(-1); > + /* > + * next we do a STARTUP IPI: the previous INIT IPI might still be > + * latched, (P5 bug) this 1st STARTUP would then terminate > + * immediately, and the previously started INIT IPI would continue. OR > + * the previous INIT IPI has already run. and this STARTUP IPI will > + * run. OR the previous INIT IPI was ignored. and this STARTUP IPI > + * will run. > + */ > + > + /* do a STARTUP IPI */ > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > + lapic_ipi_wait(-1); > + DELAY(200); /* wait ~200uS */ > + > + /* > + * finally we do a 2nd STARTUP IPI: this 2nd STARTUP IPI should run IF > + * the previous STARTUP IPI was cancelled by a latched INIT IPI. OR > + * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is > + * recognized after hardware RESET or INIT IPI. > + */ > + > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > + lapic_ipi_wait(-1); > + DELAY(200); /* wait ~200uS */ > + > + /* Wait up to 5 seconds for it to start. */ > + for (ms = 0; ms < 5000; ms++) { > + if(acpi_cpu_resumed[cpu]){ > + acpi_cpu_resumed[cpu]= 0; > + return 0; > + } > + DELAY(1000); > + } > + return -1; /* return FAILURE */ > + > +} > +int resume_other_cpus(struct acpi_softc *sc); > +int resume_other_cpus(struct acpi_softc *sc) > +{ > + int i; > + printf("RESUME_OTHER_CPUS"); > + *((volatile u_short *) 0x467) = 0; > + *((volatile u_short *) 0x468) = (sc->acpi_wakephys&0xffff0)>>4; > + > + for(i = 1; i < mp_ncpus; i++){ > + resume_other_cpu(sc, i); > + } > + return 0; > +} > int > acpi_sleep_machdep(struct acpi_softc *sc, int state) > { > @@ -270,14 +419,15 @@ > for (;;) ; > } else { > /* Execute Wakeup */ > - intr_resume(); > - > if (bootverbose) { > acpi_savecpu(); > acpi_printcpu(); > } > + resume_other_cpus(sc); > + restart_cpus(stopped_cpus); > + intr_resume(); > + lapic_dump("MAIN"); > } > - > out: > load_cr3(cr3); > write_eflags(ef); > @@ -285,7 +435,7 @@ > /* If we beeped, turn it off after a delay. */ > if (acpi_resume_beep) > timeout(acpi_stop_beep, NULL, 3 * hz); > - > + printf("FUGAFUGA\n"); > return (ret); > } > > Index: i386/i386/io_apic.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/io_apic.c,v > retrieving revision 1.35 > diff -u -r1.35 io_apic.c > --- i386/i386/io_apic.c 5 Jun 2007 18:57:48 -0000 1.35 > +++ i386/i386/io_apic.c 13 May 2008 08:22:55 -0000 > @@ -444,8 +444,9 @@ > struct ioapic *io = (struct ioapic *)pic; > int i; > > - for (i = 0; i < io->io_numintr; i++) > + for (i = 0; i < io->io_numintr; i++){ > ioapic_program_intpin(&io->io_pins[i]); > + } > } > > /* > Index: i386/i386/mp_machdep.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/mp_machdep.c,v > retrieving revision 1.286 > diff -u -r1.286 mp_machdep.c > --- i386/i386/mp_machdep.c 10 Apr 2008 18:38:31 -0000 1.286 > +++ i386/i386/mp_machdep.c 13 May 2008 07:08:29 -0000 > @@ -1299,18 +1299,19 @@ > int cpu = PCPU_GET(cpuid); > int cpumask = PCPU_GET(cpumask); > > - savectx(&stoppcbs[cpu]); > - > - /* Indicate that we are stopped */ > - atomic_set_int(&stopped_cpus, cpumask); > + if(savectx(&stoppcbs[cpu])){ > + /* Indicate that we are stopped */ > + atomic_set_int(&stopped_cpus, cpumask); > + wbinvd(); > + } > > /* Wait for restart */ > - while (!(started_cpus & cpumask)) > - ia32_pause(); > - > + while (!(started_cpus & cpumask)){ > + ia32_pause(); > + } > atomic_clear_int(&started_cpus, cpumask); > atomic_clear_int(&stopped_cpus, cpumask); > - > + > if (cpu == 0 && cpustop_restartfunc != NULL) { > cpustop_restartfunc(); > cpustop_restartfunc = NULL; > Index: i386/i386/swtch.s > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v > retrieving revision 1.156 > diff -u -r1.156 swtch.s > --- i386/i386/swtch.s 22 Aug 2007 05:06:14 -0000 1.156 > +++ i386/i386/swtch.s 9 May 2008 15:16:03 -0000 > @@ -413,6 +413,6 @@ > 1: > popfl > #endif /* DEV_NPX */ > - > + movl $1, %eax > ret > END(savectx) > Index: i386/include/pcb.h > =================================================================== > RCS file: /home/ncvs/src/sys/i386/include/pcb.h,v > retrieving revision 1.56 > diff -u -r1.56 pcb.h > --- i386/include/pcb.h 29 Dec 2005 13:23:48 -0000 1.56 > +++ i386/include/pcb.h 24 Apr 2008 06:46:59 -0000 > @@ -81,7 +81,7 @@ > struct trapframe; > > void makectx(struct trapframe *, struct pcb *); > -void savectx(struct pcb *); > +int savectx(struct pcb *); > #endif > > #endif /* _I386_PCB_H_ */ > Index: dev/acpica/acpi.c > =================================================================== > RCS file: /home/ncvs/src/sys/dev/acpica/acpi.c,v > retrieving revision 1.247 > diff -u -r1.247 acpi.c > --- dev/acpica/acpi.c 13 Mar 2008 20:39:03 -0000 1.247 > +++ dev/acpica/acpi.c 30 Apr 2008 13:14:48 -0000 > @@ -29,7 +29,7 @@ > > #include > __FBSDID("$FreeBSD: src/sys/dev/acpica/acpi.c,v 1.247 2008/03/13 20:39:03 jhb Exp $"); > - > +#define SMP > #include "opt_acpi.h" > #include > #include > @@ -47,6 +47,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -2339,6 +2340,8 @@ > * drivers need this. > */ > mtx_lock(&Giant); > + sched_bind(curthread, 0); > + stop_cpus(PCPU_GET(other_cpus)); > slp_state = ACPI_SS_NONE; > switch (state) { > case ACPI_STATE_S1: > @@ -2430,13 +2433,16 @@ > acpi_wake_prep_walk(state); > sc->acpi_sstate = ACPI_STATE_S0; > } > + printf("PREP WALK\n"); > if (slp_state >= ACPI_SS_SLP_PREP) > AcpiLeaveSleepState(state); > + printf("LEAVE_SLEEP_STATE\n"); > if (slp_state >= ACPI_SS_DEV_SUSPEND) > DEVICE_RESUME(root_bus); > + printf("DEVICE_RESUME\n"); > if (slp_state >= ACPI_SS_SLEPT) > acpi_enable_fixed_events(sc); > - > + printf("ENABLE_FIXED_EVENT\n"); > /* Allow another sleep request after a while. */ > if (state != ACPI_STATE_S5) > timeout(acpi_sleep_enable, sc, hz * ACPI_MINIMUM_AWAKETIME); > @@ -2445,6 +2451,7 @@ > acpi_UserNotify("Resume", ACPI_ROOT_OBJECT, state); > > mtx_unlock(&Giant); > + sched_unbind(curthread); > return_ACPI_STATUS (status); > } > > Index: dev/acpica/acpi_ec.c > =================================================================== > RCS file: /home/ncvs/src/sys/dev/acpica/acpi_ec.c,v > retrieving revision 1.80 > diff -u -r1.80 acpi_ec.c > --- dev/acpica/acpi_ec.c 8 Nov 2007 21:20:34 -0000 1.80 > +++ dev/acpica/acpi_ec.c 7 May 2008 17:07:11 -0000 > @@ -747,7 +747,7 @@ > * If booting, check if we need to run the query handler. If so, we > * we call it directly here since our thread taskq is not active yet. > */ > - if (cold || rebooting) { > + if (cold || rebooting||sc->ec_suspending) { > if ((EC_GET_CSR(sc) & EC_EVENT_SCI)) { > CTR0(KTR_ACPI, "ec running gpe handler directly"); > EcGpeQueryHandler(sc); > _______________________________________________ > freebsd-acpi@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-acpi > To unsubscribe, send any mail to "freebsd-acpi-unsubscribe@freebsd.org" -- Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Wed May 21 14:22:06 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 45E4A1065670 for ; Wed, 21 May 2008 14:22:06 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id 96C628FC32 for ; Wed, 21 May 2008 14:22:04 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4LELu9C005149 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 21 May 2008 18:22:00 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1JypCW-0001RU-3X; Wed, 21 May 2008 18:21:56 +0400 From: Vladimir Grebenschikov To: takawata@init-main.com In-Reply-To: <200805131125.m4DBPu1q092741@sana.init-main.com> References: <200805131125.m4DBPu1q092741@sana.init-main.com> Content-Type: text/plain Content-Transfer-Encoding: 7bit Organization: SWsoft Date: Wed, 21 May 2008 18:21:55 +0400 Message-Id: <1211379715.2851.2.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2008 14:22:06 -0000 On Tue, 2008-05-13 at 20:25 +0900, takawata@init-main.com wrote: > Hi, I managed to make suspend and resume work on SMP system. > The patch following is a bit crude patch, but it begin > to work on my ThinkPad X61 (core2duo system). Tried patch on T60, from text console, on acpiconf -s3 it shows multiple times "forward_wakeup: Idle processor not found" on console and then friezed hard (even DDB does not works). But nothing was suspended actually ( before system goes to sleep but did not awakes) Any hints ? > TODO: > 1. Suspend/resume path it self is simular to AP boot path. > Some of code may be integrated. > 2. More context, like MTRR or npx context should be saved on > suspend. > 3. Make acpi suspend resume path more ABI aware: needless > register recoverly or special register context saving > (the value itself is usually constant) should be removed. > 4. Make same binary module work on both UP or SMP case. > (Or is it time to give up using acpi module on also on i386?) > > > > > > Index: i386/acpica/acpi_wakeup.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/acpica/acpi_wakeup.c,v > retrieving revision 1.47 > diff -u -r1.47 acpi_wakeup.c > --- i386/acpica/acpi_wakeup.c 16 Mar 2008 10:58:03 -0000 1.47 > +++ i386/acpica/acpi_wakeup.c 13 May 2008 09:12:18 -0000 > @@ -27,6 +27,7 @@ > > #include > __FBSDID("$FreeBSD: src/sys/i386/acpica/acpi_wakeup.c,v 1.47 2008/03/16 10:58:03 rwatson Exp $"); > +#define SMP > > #include > #include > @@ -49,6 +50,11 @@ > > #include > #include > +#include > +#include > +#include > +#include > +#include > > #include "acpi_wakecode.h" > > @@ -71,7 +77,9 @@ > > static uint16_t r_cs, r_ds, r_es, r_fs, r_gs, r_ss, r_tr; > static uint32_t r_esp; > - > +extern void *bootstacks[]; > +static char *bootSTK; > +void restore_sub(void); > static void acpi_printcpu(void); > static void acpi_realmodeinst(void *arg, bus_dma_segment_t *segs, > int nsegs, int error); > @@ -80,6 +88,7 @@ > /* XXX shut gcc up */ > extern int acpi_savecpu(void); > extern int acpi_restorecpu(void); > +extern void acpi_kicksub(void); > > #ifdef __GNUCLIKE_ASM > __asm__(" \n\ > @@ -104,6 +113,15 @@ > movl %eax,(%esp) \n\ > xorl %eax,%eax \n\ > ret \n\ > + \n\ > + .text \n\ > + .p2align 2, 0x90 \n\ > + .type acpi_kicksub, @function \n\ > +acpi_kicksub: \n\ > + .align 4 \n\ > + movl bootSTK,%esp \n\ > + jmp restore_sub \n\ > + ret \n\ > \n\ > .text \n\ > .p2align 2, 0x90 \n\ > @@ -149,6 +167,24 @@ > ret \n\ > "); > #endif /* __GNUCLIKE_ASM */ > +int acpi_cpu_resumed[MAXCPU]; > +int acpi_curcpu; > +extern int switch_debug; > + > +void restore_sub() > +{ > + ACPI_DISABLE_IRQS(); > + printf("RESTORE_SUB\n"); > + lapic_disable(); > + printf("LAPIC_SETUP\n"); > + lapic_setup(0); > + lapic_dump("RESTORE_SUB"); > + printf("RESTORE_SUB2\n"); > + ACPI_ENABLE_IRQS(); > + > + acpi_cpu_resumed[acpi_curcpu]= 1; > + acpi_restorecpu(); > +} > > static void > acpi_printcpu(void) > @@ -187,6 +223,119 @@ > outb(0x61, inb(0x61) & ~0x3); > } > > + > +int resume_other_cpu(struct acpi_softc *sc, int cpu); > +int resume_other_cpu(struct acpi_softc *sc, int cpu) > +{ > + int ms; > + int apic_id = cpu_apic_ids[cpu]; > + int gsel_tss; > + > + gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); > + acpi_curcpu = cpu; > + bootSTK= (char *)bootstacks[cpu] + KSTACK_PAGES * PAGE_SIZE - 4; > + printf("%p\n", bootSTK); > + p_gdt = (struct region_descriptor *) > + (sc->acpi_wakeaddr + physical_gdt); > + saved_gdt.rd_limit = NGDT * sizeof(gdt[0]) -1; > + saved_gdt.rd_base = (int )&gdt[cpu*NGDT]; > + p_gdt->rd_limit = saved_gdt.rd_limit; > + p_gdt->rd_base = vtophys(saved_gdt.rd_base); > + r_esp = stoppcbs[cpu].pcb_esp; > + r_ebp = stoppcbs[cpu].pcb_ebp; > + r_esi = stoppcbs[cpu].pcb_esi; > + r_edi = stoppcbs[cpu].pcb_edi; > + r_efl = stoppcbs[cpu].pcb_psl; > + ret_addr = stoppcbs[cpu].pcb_eip; > + WAKECODE_FIXUP(physical_esp, uint32_t, vtophys(bootSTK) ); > + WAKECODE_FIXUP(previous_cr0, uint32_t, r_cr0); > + WAKECODE_FIXUP(previous_cr2, uint32_t, r_cr2); > + WAKECODE_FIXUP(previous_cr3, uint32_t, r_cr3); > + WAKECODE_FIXUP(previous_cr4, uint32_t, r_cr4); > + > + WAKECODE_FIXUP(resume_beep, uint32_t, 0); > + WAKECODE_FIXUP(reset_video, uint32_t, 0); > + > + WAKECODE_FIXUP(previous_tr, uint16_t, gsel_tss); > + WAKECODE_BCOPY(previous_gdt, struct region_descriptor, saved_gdt); > + WAKECODE_FIXUP(previous_ldt, uint16_t, saved_ldt); > + WAKECODE_BCOPY(previous_idt, struct region_descriptor, saved_idt); > + > + WAKECODE_FIXUP(where_to_recover, void *, acpi_kicksub); > + > + WAKECODE_FIXUP(previous_ds, uint16_t, r_ds); > + WAKECODE_FIXUP(previous_es, uint16_t, r_es); > + WAKECODE_FIXUP(previous_fs, uint16_t, r_fs); > + WAKECODE_FIXUP(previous_gs, uint16_t, 0); > + WAKECODE_FIXUP(previous_ss, uint16_t, r_ss); > + > + /* do an INIT IPI: assert RESET */ > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_ASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, apic_id); > + > + /* wait for pending status end */ > + lapic_ipi_wait(-1); > + > + /* do an INIT IPI: deassert RESET */ > + lapic_ipi_raw(APIC_DEST_ALLESELF | APIC_TRIGMOD_LEVEL | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, 0); > + > + /* wait for pending status end */ > + DELAY(10000); /* wait ~10mS */ > + lapic_ipi_wait(-1); > + /* > + * next we do a STARTUP IPI: the previous INIT IPI might still be > + * latched, (P5 bug) this 1st STARTUP would then terminate > + * immediately, and the previously started INIT IPI would continue. OR > + * the previous INIT IPI has already run. and this STARTUP IPI will > + * run. OR the previous INIT IPI was ignored. and this STARTUP IPI > + * will run. > + */ > + > + /* do a STARTUP IPI */ > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > + lapic_ipi_wait(-1); > + DELAY(200); /* wait ~200uS */ > + > + /* > + * finally we do a 2nd STARTUP IPI: this 2nd STARTUP IPI should run IF > + * the previous STARTUP IPI was cancelled by a latched INIT IPI. OR > + * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is > + * recognized after hardware RESET or INIT IPI. > + */ > + > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > + lapic_ipi_wait(-1); > + DELAY(200); /* wait ~200uS */ > + > + /* Wait up to 5 seconds for it to start. */ > + for (ms = 0; ms < 5000; ms++) { > + if(acpi_cpu_resumed[cpu]){ > + acpi_cpu_resumed[cpu]= 0; > + return 0; > + } > + DELAY(1000); > + } > + return -1; /* return FAILURE */ > + > +} > +int resume_other_cpus(struct acpi_softc *sc); > +int resume_other_cpus(struct acpi_softc *sc) > +{ > + int i; > + printf("RESUME_OTHER_CPUS"); > + *((volatile u_short *) 0x467) = 0; > + *((volatile u_short *) 0x468) = (sc->acpi_wakephys&0xffff0)>>4; > + > + for(i = 1; i < mp_ncpus; i++){ > + resume_other_cpu(sc, i); > + } > + return 0; > +} > int > acpi_sleep_machdep(struct acpi_softc *sc, int state) > { > @@ -270,14 +419,15 @@ > for (;;) ; > } else { > /* Execute Wakeup */ > - intr_resume(); > - > if (bootverbose) { > acpi_savecpu(); > acpi_printcpu(); > } > + resume_other_cpus(sc); > + restart_cpus(stopped_cpus); > + intr_resume(); > + lapic_dump("MAIN"); > } > - > out: > load_cr3(cr3); > write_eflags(ef); > @@ -285,7 +435,7 @@ > /* If we beeped, turn it off after a delay. */ > if (acpi_resume_beep) > timeout(acpi_stop_beep, NULL, 3 * hz); > - > + printf("FUGAFUGA\n"); > return (ret); > } > > Index: i386/i386/io_apic.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/io_apic.c,v > retrieving revision 1.35 > diff -u -r1.35 io_apic.c > --- i386/i386/io_apic.c 5 Jun 2007 18:57:48 -0000 1.35 > +++ i386/i386/io_apic.c 13 May 2008 08:22:55 -0000 > @@ -444,8 +444,9 @@ > struct ioapic *io = (struct ioapic *)pic; > int i; > > - for (i = 0; i < io->io_numintr; i++) > + for (i = 0; i < io->io_numintr; i++){ > ioapic_program_intpin(&io->io_pins[i]); > + } > } > > /* > Index: i386/i386/mp_machdep.c > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/mp_machdep.c,v > retrieving revision 1.286 > diff -u -r1.286 mp_machdep.c > --- i386/i386/mp_machdep.c 10 Apr 2008 18:38:31 -0000 1.286 > +++ i386/i386/mp_machdep.c 13 May 2008 07:08:29 -0000 > @@ -1299,18 +1299,19 @@ > int cpu = PCPU_GET(cpuid); > int cpumask = PCPU_GET(cpumask); > > - savectx(&stoppcbs[cpu]); > - > - /* Indicate that we are stopped */ > - atomic_set_int(&stopped_cpus, cpumask); > + if(savectx(&stoppcbs[cpu])){ > + /* Indicate that we are stopped */ > + atomic_set_int(&stopped_cpus, cpumask); > + wbinvd(); > + } > > /* Wait for restart */ > - while (!(started_cpus & cpumask)) > - ia32_pause(); > - > + while (!(started_cpus & cpumask)){ > + ia32_pause(); > + } > atomic_clear_int(&started_cpus, cpumask); > atomic_clear_int(&stopped_cpus, cpumask); > - > + > if (cpu == 0 && cpustop_restartfunc != NULL) { > cpustop_restartfunc(); > cpustop_restartfunc = NULL; > Index: i386/i386/swtch.s > =================================================================== > RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v > retrieving revision 1.156 > diff -u -r1.156 swtch.s > --- i386/i386/swtch.s 22 Aug 2007 05:06:14 -0000 1.156 > +++ i386/i386/swtch.s 9 May 2008 15:16:03 -0000 > @@ -413,6 +413,6 @@ > 1: > popfl > #endif /* DEV_NPX */ > - > + movl $1, %eax > ret > END(savectx) > Index: i386/include/pcb.h > =================================================================== > RCS file: /home/ncvs/src/sys/i386/include/pcb.h,v > retrieving revision 1.56 > diff -u -r1.56 pcb.h > --- i386/include/pcb.h 29 Dec 2005 13:23:48 -0000 1.56 > +++ i386/include/pcb.h 24 Apr 2008 06:46:59 -0000 > @@ -81,7 +81,7 @@ > struct trapframe; > > void makectx(struct trapframe *, struct pcb *); > -void savectx(struct pcb *); > +int savectx(struct pcb *); > #endif > > #endif /* _I386_PCB_H_ */ > Index: dev/acpica/acpi.c > =================================================================== > RCS file: /home/ncvs/src/sys/dev/acpica/acpi.c,v > retrieving revision 1.247 > diff -u -r1.247 acpi.c > --- dev/acpica/acpi.c 13 Mar 2008 20:39:03 -0000 1.247 > +++ dev/acpica/acpi.c 30 Apr 2008 13:14:48 -0000 > @@ -29,7 +29,7 @@ > > #include > __FBSDID("$FreeBSD: src/sys/dev/acpica/acpi.c,v 1.247 2008/03/13 20:39:03 jhb Exp $"); > - > +#define SMP > #include "opt_acpi.h" > #include > #include > @@ -47,6 +47,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -2339,6 +2340,8 @@ > * drivers need this. > */ > mtx_lock(&Giant); > + sched_bind(curthread, 0); > + stop_cpus(PCPU_GET(other_cpus)); > slp_state = ACPI_SS_NONE; > switch (state) { > case ACPI_STATE_S1: > @@ -2430,13 +2433,16 @@ > acpi_wake_prep_walk(state); > sc->acpi_sstate = ACPI_STATE_S0; > } > + printf("PREP WALK\n"); > if (slp_state >= ACPI_SS_SLP_PREP) > AcpiLeaveSleepState(state); > + printf("LEAVE_SLEEP_STATE\n"); > if (slp_state >= ACPI_SS_DEV_SUSPEND) > DEVICE_RESUME(root_bus); > + printf("DEVICE_RESUME\n"); > if (slp_state >= ACPI_SS_SLEPT) > acpi_enable_fixed_events(sc); > - > + printf("ENABLE_FIXED_EVENT\n"); > /* Allow another sleep request after a while. */ > if (state != ACPI_STATE_S5) > timeout(acpi_sleep_enable, sc, hz * ACPI_MINIMUM_AWAKETIME); > @@ -2445,6 +2451,7 @@ > acpi_UserNotify("Resume", ACPI_ROOT_OBJECT, state); > > mtx_unlock(&Giant); > + sched_unbind(curthread); > return_ACPI_STATUS (status); > } > > Index: dev/acpica/acpi_ec.c > =================================================================== > RCS file: /home/ncvs/src/sys/dev/acpica/acpi_ec.c,v > retrieving revision 1.80 > diff -u -r1.80 acpi_ec.c > --- dev/acpica/acpi_ec.c 8 Nov 2007 21:20:34 -0000 1.80 > +++ dev/acpica/acpi_ec.c 7 May 2008 17:07:11 -0000 > @@ -747,7 +747,7 @@ > * If booting, check if we need to run the query handler. If so, we > * we call it directly here since our thread taskq is not active yet. > */ > - if (cold || rebooting) { > + if (cold || rebooting||sc->ec_suspending) { > if ((EC_GET_CSR(sc) & EC_EVENT_SCI)) { > CTR0(KTR_ACPI, "ec running gpe handler directly"); > EcGpeQueryHandler(sc); > _______________________________________________ > freebsd-acpi@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-acpi > To unsubscribe, send any mail to "freebsd-acpi-unsubscribe@freebsd.org" -- Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Wed May 21 17:23:39 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A09EF106564A for ; Wed, 21 May 2008 17:23:39 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id 41E758FC1A for ; Wed, 21 May 2008 17:23:36 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4LHNSAK015070 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 21 May 2008 21:23:32 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1Jys2A-0000kR-Co; Wed, 21 May 2008 21:23:26 +0400 From: Vladimir Grebenschikov To: takawata@init-main.com In-Reply-To: <1211379715.2851.2.camel@localhost> References: <200805131125.m4DBPu1q092741@sana.init-main.com> <1211379715.2851.2.camel@localhost> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Organization: SWsoft Date: Wed, 21 May 2008 21:23:25 +0400 Message-Id: <1211390605.1794.15.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 May 2008 17:23:39 -0000 On Wed, 2008-05-21 at 18:21 +0400, Vladimir Grebenschikov wrote: > On Tue, 2008-05-13 at 20:25 +0900, takawata@init-main.com wrote: > > Hi, I managed to make suspend and resume work on SMP system. > > The patch following is a bit crude patch, but it begin=20 > > to work on my ThinkPad X61 (core2duo system). >=20 > Tried patch on T60, from text console,=20 > on acpiconf -s3 > it shows multiple times "forward_wakeup: Idle processor not found" on > console and then friezed hard (even DDB does not works). But nothing was > suspended actually ( before system goes to sleep but did not awakes) >=20 > Any hints ? In some conditions (single-user, no additional drivers) it shows: forward_wakeup: Idle processor not found PREP_WALK LEAVE_SLEEP_STATE DEVICE_RESUME =EF=BB=BFforward_wakeup: Idle processor not found ENABLE_FIXED_EVENT =EF=BB=BFforward_wakeup: Idle processor not found =EF=BB=BFforward_wakeup: Idle processor not found =EF=BB=BFforward_wakeup: Idle processor not found =EF=BB=BFforward_wakeup: Idle processor not found =EF=BB=BFforward_wakeup: Idle processor not found ... etc ... sometimes it shows just many =EF=BB=BFforward_wakeup: Idle processor not found and in any case locks hard and did not enter S3 But RELENG_7 (without patch) normally enters to S3, but failed to wake. > > TODO: > > 1. Suspend/resume path it self is simular to AP boot path. > > Some of code may be integrated. > > 2. More context, like MTRR or npx context should be saved on=20 > > suspend. > > 3. Make acpi suspend resume path more ABI aware: needless=20 > > register recoverly or special register context saving=20 > > (the value itself is usually constant) should be removed. > > 4. Make same binary module work on both UP or SMP case. > > (Or is it time to give up using acpi module on also on i386?) > >=20 > >=20 > >=20 > >=20 > >=20 > > Index: i386/acpica/acpi_wakeup.c > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/i386/acpica/acpi_wakeup.c,v > > retrieving revision 1.47 > > diff -u -r1.47 acpi_wakeup.c > > --- i386/acpica/acpi_wakeup.c 16 Mar 2008 10:58:03 -0000 1.47 > > +++ i386/acpica/acpi_wakeup.c 13 May 2008 09:12:18 -0000 > > @@ -27,6 +27,7 @@ > > =20 > > #include > > __FBSDID("$FreeBSD: src/sys/i386/acpica/acpi_wakeup.c,v 1.47 2008/03/1= 6 10:58:03 rwatson Exp $"); > > +#define SMP > > =20 > > #include > > #include > > @@ -49,6 +50,11 @@ > > =20 > > #include > > #include > > +#include > > +#include > > +#include > > +#include > > +#include > > =20 > > #include "acpi_wakecode.h" > > =20 > > @@ -71,7 +77,9 @@ > > =20 > > static uint16_t r_cs, r_ds, r_es, r_fs, r_gs, r_ss, r_tr; > > static uint32_t r_esp; > > - > > +extern void *bootstacks[]; > > +static char *bootSTK; > > +void restore_sub(void); > > static void acpi_printcpu(void); > > static void acpi_realmodeinst(void *arg, bus_dma_segment_t *segs, > > int nsegs, int error); > > @@ -80,6 +88,7 @@ > > /* XXX shut gcc up */ > > extern int acpi_savecpu(void); > > extern int acpi_restorecpu(void); > > +extern void acpi_kicksub(void); > > =20 > > #ifdef __GNUCLIKE_ASM > > __asm__(" \n\ > > @@ -104,6 +113,15 @@ > > movl %eax,(%esp) \n\ > > xorl %eax,%eax \n\ > > ret \n\ > > + \n\ > > + .text \n\ > > + .p2align 2, 0x90 \n\ > > + .type acpi_kicksub, @function \n\ > > +acpi_kicksub: \n\ > > + .align 4 \n\ > > + movl bootSTK,%esp \n\ > > + jmp restore_sub \n\ > > + ret \n\ > > \n\ > > .text \n\ > > .p2align 2, 0x90 \n\ > > @@ -149,6 +167,24 @@ > > ret \n\ > > "); > > #endif /* __GNUCLIKE_ASM */ > > +int acpi_cpu_resumed[MAXCPU]; > > +int acpi_curcpu; > > +extern int switch_debug; > > + > > +void restore_sub() > > +{ > > + ACPI_DISABLE_IRQS(); > > + printf("RESTORE_SUB\n"); > > + lapic_disable();=09 > > + printf("LAPIC_SETUP\n"); > > + lapic_setup(0);=09 > > + lapic_dump("RESTORE_SUB"); > > + printf("RESTORE_SUB2\n"); > > + ACPI_ENABLE_IRQS(); > > + > > + acpi_cpu_resumed[acpi_curcpu]=3D 1; > > + acpi_restorecpu(); > > +} > > =20 > > static void > > acpi_printcpu(void) > > @@ -187,6 +223,119 @@ > > outb(0x61, inb(0x61) & ~0x3); > > } > > =20 > > + > > +int resume_other_cpu(struct acpi_softc *sc, int cpu); > > +int resume_other_cpu(struct acpi_softc *sc, int cpu) > > +{ > > + int ms; > > + int apic_id =3D cpu_apic_ids[cpu]; > > + int gsel_tss; > > + > > + gsel_tss =3D GSEL(GPROC0_SEL, SEL_KPL); > > + acpi_curcpu =3D cpu; > > + bootSTK=3D (char *)bootstacks[cpu] + KSTACK_PAGES * PAGE_SIZE - 4; > > + printf("%p\n", bootSTK);=09 > > + p_gdt =3D (struct region_descriptor *) > > + (sc->acpi_wakeaddr + physical_gdt); > > + saved_gdt.rd_limit =3D NGDT * sizeof(gdt[0]) -1; > > + saved_gdt.rd_base =3D (int )&gdt[cpu*NGDT]; > > + p_gdt->rd_limit =3D saved_gdt.rd_limit; > > + p_gdt->rd_base =3D vtophys(saved_gdt.rd_base); > > + r_esp =3D stoppcbs[cpu].pcb_esp; > > + r_ebp =3D stoppcbs[cpu].pcb_ebp; > > + r_esi =3D stoppcbs[cpu].pcb_esi; > > + r_edi =3D stoppcbs[cpu].pcb_edi; > > + r_efl =3D stoppcbs[cpu].pcb_psl; > > + ret_addr =3D stoppcbs[cpu].pcb_eip; > > + WAKECODE_FIXUP(physical_esp, uint32_t, vtophys(bootSTK) ); > > + WAKECODE_FIXUP(previous_cr0, uint32_t, r_cr0); > > + WAKECODE_FIXUP(previous_cr2, uint32_t, r_cr2); > > + WAKECODE_FIXUP(previous_cr3, uint32_t, r_cr3); > > + WAKECODE_FIXUP(previous_cr4, uint32_t, r_cr4); > > +=09 > > + WAKECODE_FIXUP(resume_beep, uint32_t, 0); > > + WAKECODE_FIXUP(reset_video, uint32_t, 0); > > +=09 > > + WAKECODE_FIXUP(previous_tr, uint16_t, gsel_tss); > > + WAKECODE_BCOPY(previous_gdt, struct region_descriptor, saved_gdt); > > + WAKECODE_FIXUP(previous_ldt, uint16_t, saved_ldt); > > + WAKECODE_BCOPY(previous_idt, struct region_descriptor, saved_idt); > > +=09 > > + WAKECODE_FIXUP(where_to_recover, void *, acpi_kicksub); > > +=09 > > + WAKECODE_FIXUP(previous_ds, uint16_t, r_ds); > > + WAKECODE_FIXUP(previous_es, uint16_t, r_es); > > + WAKECODE_FIXUP(previous_fs, uint16_t, r_fs); > > + WAKECODE_FIXUP(previous_gs, uint16_t, 0); > > + WAKECODE_FIXUP(previous_ss, uint16_t, r_ss); > > + > > + /* do an INIT IPI: assert RESET */ > > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > > + APIC_LEVEL_ASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, apic_i= d); > > + > > + /* wait for pending status end */ > > + lapic_ipi_wait(-1); > > + > > + /* do an INIT IPI: deassert RESET */ > > + lapic_ipi_raw(APIC_DEST_ALLESELF | APIC_TRIGMOD_LEVEL | > > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_INIT, 0); > > + > > + /* wait for pending status end */ > > + DELAY(10000); /* wait ~10mS */ > > + lapic_ipi_wait(-1); > > + /* > > + * next we do a STARTUP IPI: the previous INIT IPI might still be > > + * latched, (P5 bug) this 1st STARTUP would then terminate > > + * immediately, and the previously started INIT IPI would continue. O= R > > + * the previous INIT IPI has already run. and this STARTUP IPI will > > + * run. OR the previous INIT IPI was ignored. and this STARTUP IPI > > + * will run. > > + */ > > + > > + /* do a STARTUP IPI */ > > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > > + lapic_ipi_wait(-1); > > + DELAY(200); /* wait ~200uS */ > > + > > + /* > > + * finally we do a 2nd STARTUP IPI: this 2nd STARTUP IPI should run I= F > > + * the previous STARTUP IPI was cancelled by a latched INIT IPI. OR > > + * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is > > + * recognized after hardware RESET or INIT IPI. > > + */ > > + > > + lapic_ipi_raw(APIC_DEST_DESTFLD | APIC_TRIGMOD_EDGE | > > + APIC_LEVEL_DEASSERT | APIC_DESTMODE_PHY | APIC_DELMODE_STARTUP | > > + ((sc->acpi_wakephys >>12)&0xff), apic_id); > > + lapic_ipi_wait(-1); > > + DELAY(200); /* wait ~200uS */ > > + > > + /* Wait up to 5 seconds for it to start. */ > > + for (ms =3D 0; ms < 5000; ms++) { > > + if(acpi_cpu_resumed[cpu]){ > > + acpi_cpu_resumed[cpu]=3D 0; > > + return 0; > > + } > > + DELAY(1000); > > + } > > + return -1; /* return FAILURE */ > > + > > +} > > +int resume_other_cpus(struct acpi_softc *sc); > > +int resume_other_cpus(struct acpi_softc *sc) > > +{ > > + int i; > > + printf("RESUME_OTHER_CPUS"); > > + *((volatile u_short *) 0x467) =3D 0; > > + *((volatile u_short *) 0x468) =3D (sc->acpi_wakephys&0xffff0)>>4; > > + > > + for(i =3D 1; i < mp_ncpus; i++){ > > + resume_other_cpu(sc, i); > > + } > > + return 0; > > +} > > int > > acpi_sleep_machdep(struct acpi_softc *sc, int state) > > { > > @@ -270,14 +419,15 @@ > > for (;;) ; > > } else { > > /* Execute Wakeup */ > > - intr_resume(); > > - > > if (bootverbose) { > > acpi_savecpu(); > > acpi_printcpu(); > > } > > + resume_other_cpus(sc); > > + restart_cpus(stopped_cpus); > > + intr_resume(); > > + lapic_dump("MAIN"); > > } > > - > > out: > > load_cr3(cr3); > > write_eflags(ef); > > @@ -285,7 +435,7 @@ > > /* If we beeped, turn it off after a delay. */ > > if (acpi_resume_beep) > > timeout(acpi_stop_beep, NULL, 3 * hz); > > - > > + printf("FUGAFUGA\n"); > > return (ret); > > } > > =20 > > Index: i386/i386/io_apic.c > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/i386/i386/io_apic.c,v > > retrieving revision 1.35 > > diff -u -r1.35 io_apic.c > > --- i386/i386/io_apic.c 5 Jun 2007 18:57:48 -0000 1.35 > > +++ i386/i386/io_apic.c 13 May 2008 08:22:55 -0000 > > @@ -444,8 +444,9 @@ > > struct ioapic *io =3D (struct ioapic *)pic; > > int i; > > =20 > > - for (i =3D 0; i < io->io_numintr; i++) > > + for (i =3D 0; i < io->io_numintr; i++){ > > ioapic_program_intpin(&io->io_pins[i]); > > + } > > } > > =20 > > /* > > Index: i386/i386/mp_machdep.c > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/i386/i386/mp_machdep.c,v > > retrieving revision 1.286 > > diff -u -r1.286 mp_machdep.c > > --- i386/i386/mp_machdep.c 10 Apr 2008 18:38:31 -0000 1.286 > > +++ i386/i386/mp_machdep.c 13 May 2008 07:08:29 -0000 > > @@ -1299,18 +1299,19 @@ > > int cpu =3D PCPU_GET(cpuid); > > int cpumask =3D PCPU_GET(cpumask); > > =20 > > - savectx(&stoppcbs[cpu]); > > - > > - /* Indicate that we are stopped */ > > - atomic_set_int(&stopped_cpus, cpumask); > > + if(savectx(&stoppcbs[cpu])){ > > + /* Indicate that we are stopped */ > > + atomic_set_int(&stopped_cpus, cpumask); > > + wbinvd(); > > + } > > =20 > > /* Wait for restart */ > > - while (!(started_cpus & cpumask)) > > - ia32_pause(); > > - > > + while (!(started_cpus & cpumask)){ > > + ia32_pause(); > > + } > > atomic_clear_int(&started_cpus, cpumask); > > atomic_clear_int(&stopped_cpus, cpumask); > > - > > +=09 > > if (cpu =3D=3D 0 && cpustop_restartfunc !=3D NULL) { > > cpustop_restartfunc(); > > cpustop_restartfunc =3D NULL; > > Index: i386/i386/swtch.s > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v > > retrieving revision 1.156 > > diff -u -r1.156 swtch.s > > --- i386/i386/swtch.s 22 Aug 2007 05:06:14 -0000 1.156 > > +++ i386/i386/swtch.s 9 May 2008 15:16:03 -0000 > > @@ -413,6 +413,6 @@ > > 1: > > popfl > > #endif /* DEV_NPX */ > > - > > + movl $1, %eax > > ret > > END(savectx) > > Index: i386/include/pcb.h > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/i386/include/pcb.h,v > > retrieving revision 1.56 > > diff -u -r1.56 pcb.h > > --- i386/include/pcb.h 29 Dec 2005 13:23:48 -0000 1.56 > > +++ i386/include/pcb.h 24 Apr 2008 06:46:59 -0000 > > @@ -81,7 +81,7 @@ > > struct trapframe; > > =20 > > void makectx(struct trapframe *, struct pcb *); > > -void savectx(struct pcb *); > > +int savectx(struct pcb *); > > #endif > > =20 > > #endif /* _I386_PCB_H_ */ > > Index: dev/acpica/acpi.c > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/dev/acpica/acpi.c,v > > retrieving revision 1.247 > > diff -u -r1.247 acpi.c > > --- dev/acpica/acpi.c 13 Mar 2008 20:39:03 -0000 1.247 > > +++ dev/acpica/acpi.c 30 Apr 2008 13:14:48 -0000 > > @@ -29,7 +29,7 @@ > > =20 > > #include > > __FBSDID("$FreeBSD: src/sys/dev/acpica/acpi.c,v 1.247 2008/03/13 20:39= :03 jhb Exp $"); > > - > > +#define SMP > > #include "opt_acpi.h" > > #include > > #include > > @@ -47,6 +47,7 @@ > > #include > > #include > > #include > > +#include > > =20 > > #include > > #include > > @@ -2339,6 +2340,8 @@ > > * drivers need this. > > */ > > mtx_lock(&Giant); > > + sched_bind(curthread, 0); > > + stop_cpus(PCPU_GET(other_cpus)); > > slp_state =3D ACPI_SS_NONE; > > switch (state) { > > case ACPI_STATE_S1: > > @@ -2430,13 +2433,16 @@ > > acpi_wake_prep_walk(state); > > sc->acpi_sstate =3D ACPI_STATE_S0; > > } > > + printf("PREP WALK\n"); > > if (slp_state >=3D ACPI_SS_SLP_PREP) > > AcpiLeaveSleepState(state); > > + printf("LEAVE_SLEEP_STATE\n"); > > if (slp_state >=3D ACPI_SS_DEV_SUSPEND) > > DEVICE_RESUME(root_bus); > > + printf("DEVICE_RESUME\n"); > > if (slp_state >=3D ACPI_SS_SLEPT) > > acpi_enable_fixed_events(sc); > > - > > + printf("ENABLE_FIXED_EVENT\n"); > > /* Allow another sleep request after a while. */ > > if (state !=3D ACPI_STATE_S5) > > timeout(acpi_sleep_enable, sc, hz * ACPI_MINIMUM_AWAKETIME); > > @@ -2445,6 +2451,7 @@ > > acpi_UserNotify("Resume", ACPI_ROOT_OBJECT, state); > > =20 > > mtx_unlock(&Giant); > > + sched_unbind(curthread); > > return_ACPI_STATUS (status); > > } > > =20 > > Index: dev/acpica/acpi_ec.c > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > RCS file: /home/ncvs/src/sys/dev/acpica/acpi_ec.c,v > > retrieving revision 1.80 > > diff -u -r1.80 acpi_ec.c > > --- dev/acpica/acpi_ec.c 8 Nov 2007 21:20:34 -0000 1.80 > > +++ dev/acpica/acpi_ec.c 7 May 2008 17:07:11 -0000 > > @@ -747,7 +747,7 @@ > > * If booting, check if we need to run the query handler. If so, = we > > * we call it directly here since our thread taskq is not active y= et. > > */ > > - if (cold || rebooting) { > > + if (cold || rebooting||sc->ec_suspending) { > > if ((EC_GET_CSR(sc) & EC_EVENT_SCI)) { > > CTR0(KTR_ACPI, "ec running gpe handler directly"); > > EcGpeQueryHandler(sc); > > _______________________________________________ > > freebsd-acpi@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-acpi > > To unsubscribe, send any mail to "freebsd-acpi-unsubscribe@freebsd.org" --=20 Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Thu May 22 04:01:19 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BF2BD106567E for ; Thu, 22 May 2008 04:01:19 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from sana.init-main.com (unknown [IPv6:2001:240:28::1]) by mx1.freebsd.org (Postfix) with ESMTP id 5DA328FC0C for ; Thu, 22 May 2008 04:01:19 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from ns.init-main.com (localhost [127.0.0.1]) by sana.init-main.com (8.14.1/8.13.8) with ESMTP id m4M3dF2q033762; Thu, 22 May 2008 12:39:17 +0900 (JST) (envelope-from takawata@ns.init-main.com) Message-Id: <200805220339.m4M3dF2q033762@sana.init-main.com> To: vova@fbsd.ru In-reply-to: Your message of "Wed, 21 May 2008 21:23:25 +0400." <1211390605.1794.15.camel@localhost> Date: Thu, 22 May 2008 12:39:15 +0900 From: Takanori Watanabe Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 May 2008 04:01:19 -0000 >I've tried to build patch with recent CURRENT and get >SMP redefined for acpi.c and acpi_wakeup.c > >Was it expected ? Expected. I tested with kernel module, so I define directly for now. I want to make it work without SMP defined by cleaning up and moving the smp dependent code to mp_machdep.c . >On Wed, 2008-05-21 at 18:21 +0400, Vladimir Grebenschikov wrote: >> On Tue, 2008-05-13 at 20:25 +0900, takawata@init-main.com wrote: >> > Hi, I managed to make suspend and resume work on SMP system. >> > The patch following is a bit crude patch, but it begin=20 >> > to work on my ThinkPad X61 (core2duo system). >>=20 >> Tried patch on T60, from text console,=20 >> on acpiconf -s3 >> it shows multiple times "forward_wakeup: Idle processor not found" on >> console and then friezed hard (even DDB does not works). But nothing was >> suspended actually ( before system goes to sleep but did not awakes) >>=20 >> Any hints ? > >In some conditions (single-user, no additional drivers) it shows: > >forward_wakeup: Idle processor not found >PREP_WALK >LEAVE_SLEEP_STATE >DEVICE_RESUME >=EF=BB=BFforward_wakeup: Idle processor not found >ENABLE_FIXED_EVENT >=EF=BB=BFforward_wakeup: Idle processor not found >=EF=BB=BFforward_wakeup: Idle processor not found >=EF=BB=BFforward_wakeup: Idle processor not found >=EF=BB=BFforward_wakeup: Idle processor not found >=EF=BB=BFforward_wakeup: Idle processor not found >... etc ... > >sometimes it shows just many >=EF=BB=BFforward_wakeup: Idle processor not found > > >and in any case locks hard and did not enter S3 > >But RELENG_7 (without patch) normally enters to S3, but failed to wake. I tested it on sched_ule. So I know littele about sched_4bsd. The message may caused on forward_wakeup on sched_4bsd, so how about kern.sched.ipiwakeup.forward_wakeup set to 0. From owner-freebsd-acpi@FreeBSD.ORG Thu May 22 10:30:26 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 768B3106564A for ; Thu, 22 May 2008 10:30:26 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id E68E18FC2A for ; Thu, 22 May 2008 10:30:24 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4MAUD9X021296 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 22 May 2008 14:30:19 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1Jz83p-0001Ib-Kg; Thu, 22 May 2008 14:30:13 +0400 From: Vladimir Grebenschikov To: Takanori Watanabe In-Reply-To: <200805220339.m4M3dF2q033762@sana.init-main.com> References: <200805220339.m4M3dF2q033762@sana.init-main.com> Content-Type: text/plain Content-Transfer-Encoding: 7bit Organization: SWsoft Date: Thu, 22 May 2008 14:30:13 +0400 Message-Id: <1211452213.2647.1.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 May 2008 10:30:26 -0000 On Thu, 2008-05-22 at 12:39 +0900, Takanori Watanabe wrote: > >But RELENG_7 (without patch) normally enters to S3, but failed to wake. > > I tested it on sched_ule. So I know littele about sched_4bsd. > The message may caused on forward_wakeup on sched_4bsd, so > how about kern.sched.ipiwakeup.forward_wakeup set to 0. Just test it on SCHED_ULE. Now it does not write anything on console, just turn off console and hardlock. No actual enter to sleep (I assume that by indication lamps). I've booted as 'boot -sv' and tried to go to sleep from single-user mode. -- Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Thu May 22 14:21:17 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D83791065684 for ; Thu, 22 May 2008 14:21:17 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from sana.init-main.com (unknown [IPv6:2001:240:28::1]) by mx1.freebsd.org (Postfix) with ESMTP id 83C098FC1B for ; Thu, 22 May 2008 14:21:17 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from ns.init-main.com (localhost [127.0.0.1]) by sana.init-main.com (8.14.1/8.13.8) with ESMTP id m4MDxRs9042493; Thu, 22 May 2008 22:59:28 +0900 (JST) (envelope-from takawata@ns.init-main.com) Message-Id: <200805221359.m4MDxRs9042493@sana.init-main.com> To: vova@fbsd.ru In-reply-to: Your message of "Thu, 22 May 2008 14:30:13 +0400." <1211452213.2647.1.camel@localhost> Date: Thu, 22 May 2008 22:59:27 +0900 From: Takanori Watanabe Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 May 2008 14:21:17 -0000 In message <1211452213.2647.1.camel@localhost>, Vladimir Grebenschikov wrote: >On Thu, 2008-05-22 at 12:39 +0900, Takanori Watanabe wrote: > >> >But RELENG_7 (without patch) normally enters to S3, but failed to wake. >> >> I tested it on sched_ule. So I know littele about sched_4bsd. >> The message may caused on forward_wakeup on sched_4bsd, so >> how about kern.sched.ipiwakeup.forward_wakeup set to 0. > >Just test it on SCHED_ULE. >Now it does not write anything on console, just turn off console and >hardlock. >No actual enter to sleep (I assume that by indication lamps). > >I've booted as 'boot -sv' and tried to go to sleep from single-user >mode. In RELENG_7, some more patch should be merged from HEAD, so that preserver identity mapping. BTW, did you make sure UP kernel successfully suspend and resume on your machine? From owner-freebsd-acpi@FreeBSD.ORG Thu May 22 21:14:22 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1B3751065671 for ; Thu, 22 May 2008 21:14:22 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from a1.com.ua (158-103-207-82.ip.ukrtel.net [82.207.103.158]) by mx1.freebsd.org (Postfix) with ESMTP id 93E838FC24 for ; Thu, 22 May 2008 21:14:19 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from localhost ([127.0.0.1] helo=serge.a1.lan ident=nobody) by a1.com.ua with esmtp (Exim 4.68 (FreeBSD)) (envelope-from ) id 1JzI77-000KR3-9S for freebsd-acpi@freebsd.org; Fri, 23 May 2008 00:14:17 +0300 Message-ID: <4835E224.5090000@a-1.com.ua> Date: Fri, 23 May 2008 00:14:12 +0300 From: Serge Semenenko User-Agent: Thunderbird 2.0.0.12 (X11/20080404) MIME-Version: 1.0 To: freebsd-acpi@freebsd.org References: <1312312888.89527.1211347514074.JavaMail.apache@mail54.abv.bg> In-Reply-To: <1312312888.89527.1211347514074.JavaMail.apache@mail54.abv.bg> Content-Type: multipart/mixed; boundary="------------040407010801020901010805" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: serge@a-1.com.ua X-SA-Exim-Scanned: No (on a1.com.ua); SAEximRunCond expanded to false X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Subject: Re: PCI bridge with I/O decode 0x0-0x0 X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 May 2008 21:14:22 -0000 This is a multi-part message in MIME format. --------------040407010801020901010805 Content-Type: text/plain; charset=KOI8-U; format=flowed Content-Transfer-Encoding: 8bit Mario Pavlov wrote: > >Hi > > > >Have the same problem with my Acer 6292... But at the same time there > >are no problems on my friend's EX5620G. I've spent some time trying to > >fix aml code but with no success. May be I'm not too good in that or the > >problem might be somewhere else... Anyway, it seems that somewhere > >during acpi initialization PCI Config space of PCI bridges gets > >corrupted. So, to get my network cards working as a temporary solution I > >use the patch attached. Memory ranges I've found while booting with acpi > >disabled. I know that's not a solution but at least I could send now > >this message through built-in wifi card :) > > > >Regards, > >Serge > > Hi Serge, > nice hack ;) > I may also try something like that... > however why don't you post your ASL and also your friend's ASL > and lets see what we can do together > we may also get some help from the ACPI gurus here. > thanks > > Regards > MGP > > ----------------------------------------------------------------- > ôßÒÓÉ ÓÅ Ä×ÏÊÎÉË! > http://zoom.bg/page.php?bid=6 > Well.. let's try... Please find attached both my (6292) and my friend's (5620G) asl code. Regards, Serge --------------040407010801020901010805-- From owner-freebsd-acpi@FreeBSD.ORG Thu May 22 21:42:58 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0D4E7106567D for ; Thu, 22 May 2008 21:42:58 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from a1.com.ua (158-103-207-82.ip.ukrtel.net [82.207.103.158]) by mx1.freebsd.org (Postfix) with ESMTP id ABDC78FC12 for ; Thu, 22 May 2008 21:42:57 +0000 (UTC) (envelope-from serge@a-1.com.ua) Received: from localhost ([127.0.0.1] helo=serge.a1.lan ident=nobody) by a1.com.ua with esmtp (Exim 4.68 (FreeBSD)) (envelope-from ) id 1JzIYq-000Kbk-EK for freebsd-acpi@freebsd.org; Fri, 23 May 2008 00:42:56 +0300 Message-ID: <4835E8DB.7020200@a-1.com.ua> Date: Fri, 23 May 2008 00:42:51 +0300 From: Serge Semenenko User-Agent: Thunderbird 2.0.0.12 (X11/20080404) MIME-Version: 1.0 To: freebsd-acpi@freebsd.org References: <1312312888.89527.1211347514074.JavaMail.apache@mail54.abv.bg> In-Reply-To: <1312312888.89527.1211347514074.JavaMail.apache@mail54.abv.bg> Content-Type: text/plain; charset=KOI8-U; format=flowed Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: serge@a-1.com.ua X-SA-Exim-Scanned: No (on a1.com.ua); SAEximRunCond expanded to false Subject: Re: PCI bridge with I/O decode 0x0-0x0 X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 May 2008 21:42:58 -0000 Hm... Can't figure out how to use attachments in this list... May be URLs would be better?.. http://www.a1.com.ua/files/5620G.asl http://www.a1.com.ua/files/6292.asl From owner-freebsd-acpi@FreeBSD.ORG Fri May 23 11:14:44 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AB74A1065677 for ; Fri, 23 May 2008 11:14:44 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id 09D618FC0C for ; Fri, 23 May 2008 11:14:43 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4NBEZQ8023263 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 23 May 2008 15:14:38 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1JzVEJ-0000gc-Nb; Fri, 23 May 2008 15:14:35 +0400 From: Vladimir Grebenschikov To: Takanori Watanabe In-Reply-To: <200805221359.m4MDxRs9042493@sana.init-main.com> References: <200805221359.m4MDxRs9042493@sana.init-main.com> Content-Type: text/plain Content-Transfer-Encoding: 7bit Organization: SWsoft Date: Fri, 23 May 2008 15:14:35 +0400 Message-Id: <1211541275.1857.3.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 May 2008 11:14:44 -0000 On Thu, 2008-05-22 at 22:59 +0900, Takanori Watanabe wrote: > In RELENG_7, some more patch should be merged from HEAD, so that > preserver identity mapping. > BTW, did you make sure UP kernel successfully suspend and resume > on your machine? Both 8-CURRENT UP and 8-CURRENT SMP without patches Does go to sleep on acpiconf -s3, but did not awakes (actually its HDD lamp flash several times, but sleep lamp did not turned off and it have not awaken) With patches it even did not go to sleep. -- Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Fri May 23 11:23:32 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2401A106567A for ; Fri, 23 May 2008 11:23:32 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from sana.init-main.com (unknown [IPv6:2001:240:28::1]) by mx1.freebsd.org (Postfix) with ESMTP id B2EBC8FC14 for ; Fri, 23 May 2008 11:23:31 +0000 (UTC) (envelope-from takawata@init-main.com) Received: from ns.init-main.com (localhost [127.0.0.1]) by sana.init-main.com (8.14.1/8.13.8) with ESMTP id m4NB1F5k007720; Fri, 23 May 2008 20:01:15 +0900 (JST) (envelope-from takawata@ns.init-main.com) Message-Id: <200805231101.m4NB1F5k007720@sana.init-main.com> To: vova@fbsd.ru In-reply-to: Your message of "Fri, 23 May 2008 15:14:35 +0400." <1211541275.1857.3.camel@localhost> Date: Fri, 23 May 2008 20:01:15 +0900 From: Takanori Watanabe Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 May 2008 11:23:32 -0000 In message <1211541275.1857.3.camel@localhost>, Vladimir Grebenschikov wrote: >> In RELENG_7, some more patch should be merged from HEAD, so that >> preserver identity mapping. >> BTW, did you make sure UP kernel successfully suspend and resume >> on your machine? > >Both 8-CURRENT UP and 8-CURRENT SMP without patches >Does go to sleep on acpiconf -s3, but did not awakes >(actually its HDD lamp flash several times, but sleep lamp did not >turned off and it have not awaken) > >With patches it even did not go to sleep. Hmm, so it may have to investigate why UP kernel fail to resume. From owner-freebsd-acpi@FreeBSD.ORG Fri May 23 13:08:01 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 230ED1065672 for ; Fri, 23 May 2008 13:08:01 +0000 (UTC) (envelope-from vova@sw.ru) Received: from relay.sw.ru (mailhub.sw.ru [195.214.232.25]) by mx1.freebsd.org (Postfix) with ESMTP id 996678FC17 for ; Fri, 23 May 2008 13:08:00 +0000 (UTC) (envelope-from vova@sw.ru) Received: from vbook.fbsd.ru ([10.30.1.111]) (authenticated bits=0) by relay.sw.ru (8.13.4/8.13.4) with ESMTP id m4ND7rs8018502 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 23 May 2008 17:07:57 +0400 (MSD) Received: from vova by vbook.fbsd.ru with local (Exim 4.69 (FreeBSD)) (envelope-from ) id 1JzWzx-00035h-3t; Fri, 23 May 2008 17:07:53 +0400 From: Vladimir Grebenschikov To: Takanori Watanabe In-Reply-To: <200805231101.m4NB1F5k007720@sana.init-main.com> References: <200805231101.m4NB1F5k007720@sana.init-main.com> Content-Type: text/plain Content-Transfer-Encoding: 7bit Organization: SWsoft Date: Fri, 23 May 2008 17:07:52 +0400 Message-Id: <1211548072.1857.11.camel@localhost> Mime-Version: 1.0 X-Mailer: Evolution 2.22.1 FreeBSD GNOME Team Port Sender: Vladimir Grebenschikov Cc: freebsd-acpi@freebsd.org Subject: Re: SMP suspend/resume. X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: vova@fbsd.ru List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 May 2008 13:08:01 -0000 On Fri, 2008-05-23 at 20:01 +0900, Takanori Watanabe wrote: > In message <1211541275.1857.3.camel@localhost>, Vladimir Grebenschikov wrote: > >> In RELENG_7, some more patch should be merged from HEAD, so that > >> preserver identity mapping. > >> BTW, did you make sure UP kernel successfully suspend and resume > >> on your machine? > > > >Both 8-CURRENT UP and 8-CURRENT SMP without patches > >Does go to sleep on acpiconf -s3, but did not awakes > >(actually its HDD lamp flash several times, but sleep lamp did not > >turned off and it have not awaken) > > > >With patches it even did not go to sleep. > > Hmm, so it may have to investigate why UP kernel fail to resume. Can you suggest some steps do find the reason ? -- Vladimir B. Grebenschikov vova@fbsd.ru From owner-freebsd-acpi@FreeBSD.ORG Fri May 23 15:13:42 2008 Return-Path: Delivered-To: freebsd-acpi@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2BC951065675; Fri, 23 May 2008 15:13:42 +0000 (UTC) (envelope-from gahr@FreeBSD.org) Received: from cpanel03.rubas-s03.net (cpanel03.rubas-s03.net [195.182.222.73]) by mx1.freebsd.org (Postfix) with ESMTP id DA4D18FC24; Fri, 23 May 2008 15:13:41 +0000 (UTC) (envelope-from gahr@FreeBSD.org) Received: from [213.142.183.219] (helo=gahrtop.localhost) by cpanel03.rubas-s03.net with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.68) (envelope-from ) id 1JzYSa-0006g7-A3; Fri, 23 May 2008 16:41:32 +0200 Message-ID: <4836D795.6030804@FreeBSD.org> Date: Fri, 23 May 2008 16:41:25 +0200 From: Pietro Cerutti Organization: The FreeBSD Project User-Agent: Thunderbird 2.0.0.14 (X11/20080505) MIME-Version: 1.0 To: freebsd-acpi@freebsd.org, njl@freebsd.org X-Enigmail-Version: 0.95.6 OpenPGP: id=9571F78E; url=http://gahr.ch/pgp/ Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - cpanel03.rubas-s03.net X-AntiAbuse: Original Domain - freebsd.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - FreeBSD.org X-Source: X-Source-Args: X-Source-Dir: Cc: Martin Wilke Subject: [patch] acpi_battery -- notify critical 'life' via devd(8) X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 May 2008 15:13:42 -0000 -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Hi Nate, list, pre-everything: my knowledge of the ACPI subsystem is very limited, as is my understanding of general kernel mechanisms. --> if this patch is crap, please be patient with me :) reason: I want my laptop to notify me when the battery life reaches a certain critical low level (say, 5%). solution: I've implemented a kernel process in acpi_battery which notifies devd(8) when the critical level is reached. For this, I've added the following sysctl OIDs to the hw.acpi.battery tree: polling_rate: in seconds, self explaining... critical_level: in percent, also self explaining... questions: I've chosen a notify of 0x80 for this event. The reason just being that I've seen acpi_thermal starting its own notify values with this number. Is there any guidelines for Notify values? devd: This patch allows for a devd.conf(5) entry such as: notify 10 { match "system" "ACPI"; match "subsystem" "Battery"; match "notify" "0x80"; action "logger -p kern.emerg 'WARNING: low battery!'"; }; the patch: http://gahr.ch/FreeBSD/patches/_pending/acpi_battery.c.diff Any comments, tests, bug-reports, ... welcome! Thanks! P.S. please CC me as I don't follow freebsd-acpi@ (yet).$ - -- Pietro Cerutti gahr@FreeBSD.org PGP Public Key: http://gahr.ch/pgp -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (FreeBSD) iEYEAREKAAYFAkg215QACgkQwMJqmJVx9451lQCfZuNpsOOvalRvKrlu1VcQtP0M aAoAn2iXdHxrCzeAy+8qj5vMPgO9xCn4 =UIgG -----END PGP SIGNATURE----- From owner-freebsd-acpi@FreeBSD.ORG Fri May 23 22:32:39 2008 Return-Path: Delivered-To: freebsd-acpi@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6D74E1065670; Fri, 23 May 2008 22:32:39 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from mail16.syd.optusnet.com.au (mail16.syd.optusnet.com.au [211.29.132.197]) by mx1.freebsd.org (Postfix) with ESMTP id DD0358FC1F; Fri, 23 May 2008 22:32:38 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from server.vk2pj.dyndns.org (c122-106-215-175.belrs3.nsw.optusnet.com.au [122.106.215.175]) by mail16.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id m4NMWatL031650 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sat, 24 May 2008 08:32:37 +1000 Received: from server.vk2pj.dyndns.org (localhost.vk2pj.dyndns.org [127.0.0.1]) by server.vk2pj.dyndns.org (8.14.2/8.14.2) with ESMTP id m4NMWZkb083807; Sat, 24 May 2008 08:32:35 +1000 (EST) (envelope-from peter@server.vk2pj.dyndns.org) Received: (from peter@localhost) by server.vk2pj.dyndns.org (8.14.2/8.14.2/Submit) id m4NMWZv3083806; Sat, 24 May 2008 08:32:35 +1000 (EST) (envelope-from peter) Date: Sat, 24 May 2008 08:32:34 +1000 From: Peter Jeremy To: Ariff Abdullah Message-ID: <20080523223234.GB1469@server.vk2pj.dyndns.org> References: <20080428112623.GA99757@server.vk2pj.dyndns.org> <20080516202242.3992b284.ariff@FreeBSD.org> <20080517073716.GF80125@server.vk2pj.dyndns.org> <20080517194326.420ceb81.ariff@FreeBSD.org> <20080518030528.GA1099@server.vk2pj.dyndns.org> <20080519110954.09c2d42f.ariff@FreeBSD.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Mh8CTEa8Ax54aLHp" Content-Disposition: inline In-Reply-To: <20080519110954.09c2d42f.ariff@FreeBSD.org> X-PGP-Key: http://members.optusnet.com.au/peterjeremy/pubkey.asc User-Agent: Mutt/1.5.17 (2007-11-01) Cc: freebsd-acpi@FreeBSD.org Subject: Re: BIOS Regression on HP/Compaq [d]v6000 series notebooks X-BeenThere: freebsd-acpi@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: ACPI and power management development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 May 2008 22:32:39 -0000 --Mh8CTEa8Ax54aLHp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2008-May-19 11:09:54 +0800, Ariff Abdullah wrote: >I've been thinking on taking a different stab by hijacking cpu_idle*() >functions instead. Please disregard all previous quirks and get either >of these: > >http://people.freebsd.org/~ariff/misc/k8c1e/current_k8c1e_idle_hlt.diff > >http://people.freebsd.org/~ariff/misc/k8c1e/releng6-7_k8c1e_idle_hlt.diff That sounds like an eminently sensible approach. I've tried the releng6 version of that patch (which isn't at the above URL but looking in the k8c1e directory made it obvious) and the laptop now works correctly when you apply or remove power. There is an issue with booting on battery and I need to do some more investigating to determine whether this is a side-effect of the patch (which I don't believe) or something else. --=20 Peter Jeremy Please excuse any delays as the result of my ISP's inability to implement an MTA that is either RFC2821-compliant or matches their claimed behaviour. --Mh8CTEa8Ax54aLHp Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.9 (FreeBSD) iEYEARECAAYFAkg3RgIACgkQ/opHv/APuIfgFgCeIfiKorlhlD5Ms+Q3d00KgNm0 pS0An0AxkL6rn+8wJDHJa2F9Oz/MmL/q =pu/H -----END PGP SIGNATURE----- --Mh8CTEa8Ax54aLHp--