From owner-freebsd-arm@FreeBSD.ORG Mon Jul 13 08:39:31 2009 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0AEFC10656C0; Mon, 13 Jul 2009 08:39:31 +0000 (UTC) (envelope-from mih@semihalf.com) Received: from smtp.semihalf.com (smtp.semihalf.com [213.17.239.109]) by mx1.freebsd.org (Postfix) with ESMTP id B084F8FC0A; Mon, 13 Jul 2009 08:39:30 +0000 (UTC) (envelope-from mih@semihalf.com) Received: from [10.0.0.43] (cardhu.semihalf.com [213.17.239.108]) by smtp.semihalf.com (Postfix) with ESMTPSA id 2C620C3AAA; Mon, 13 Jul 2009 10:36:23 +0200 (CEST) Message-ID: <4A5AF2DA.9050101@semihalf.com> Date: Mon, 13 Jul 2009 10:39:54 +0200 From: Michal Hajduk User-Agent: Mozilla-Thunderbird 2.0.0.19 (X11/20090103) MIME-Version: 1.0 To: Mark Tinguely References: <200907101454.n6AEs7nJ087492@casselton.net> In-Reply-To: <200907101454.n6AEs7nJ087492@casselton.net> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Cc: freebsd-arm@freebsd.org Subject: Re: pmap problem in FreeBSD current - PS X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Jul 2009 08:39:31 -0000 Hi Mark, I've corrected busdma_machdep instead of adding this PVF_REF flag to arm pmap code and it works good. My patch: =========================================================== diff --git a/sys/arm/arm/busdma_machdep.c b/sys/arm/arm/busdma_machdep.c index a8b2de9..b55a714 100644 --- a/sys/arm/arm/busdma_machdep.c +++ b/sys/arm/arm/busdma_machdep.c @@ -631,10 +631,10 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, ((vm_offset_t)*vaddr & PAGE_MASK)); newmap->origbuffer = *vaddr; newmap->allocbuffer = tmpaddr; - cpu_idcache_wbinv_range((vm_offset_t)*vaddr, - dmat->maxsize); - cpu_l2cache_wbinv_range((vm_offset_t)*vaddr, - dmat->maxsize); + cpu_idcache_wbinv_range((vm_offset_t)*vaddr & + ~PAGE_MASK, PAGE_SIZE); + cpu_l2cache_wbinv_range((vm_offset_t)*vaddr & + ~PAGE_MASK, PAGE_SIZE); *vaddr = tmpaddr; } else newmap->origbuffer = newmap->allocbuffer = NULL; ============================================================ While debugging this problem we've found another in pmap_kremove(). There was an invalidation on va + PAGE_SIZE instead of page which contains va address. My patch: ===================================================== diff --git a/sys/arm/arm/pmap.c b/sys/arm/arm/pmap.c index 3cdab65..7988f40 100644 --- a/sys/arm/arm/pmap.c +++ b/sys/arm/arm/pmap.c @@ -2984,8 +2984,8 @@ pmap_kremove(vm_offset_t va) pmap_free_pv_entry(pve); PMAP_UNLOCK(pmap_kernel()); vm_page_unlock_queues(); - cpu_dcache_wbinv_range(va, PAGE_SIZE); - cpu_l2cache_wbinv_range(va, PAGE_SIZE); + cpu_dcache_wbinv_range(va & ~PAGE_MASK, PAGE_SIZE); + cpu_l2cache_wbinv_range(va & ~PAGE_MASK, PAGE_SIZE); cpu_tlb_flushD_SE(va); cpu_cpwait(); *pte = 0; ===================================================== I suggest, that maybe for now we should only change the cpu_(l2)idcache_wbinv_range() routines by adding simple check: If the va address is page aligned and size is equal to PAGE_SIZE we should write-back and invalidate whole page. Otherwise we should invalidate line by line. I've also checked your patch and it didn't help (I had a panic) ... uhub0: 1 port with 1 removable, self powered Root mount waiting for: usbus0 panic: blockable sleep lock (sleep mutex) vm page queue mutex @ /home/mih/git/marvell-current/sys/arm/arm/pmap.c:1947 KDB: enter: panic [thread pid 15 tid 100028 ] Stopped at $d: ldrb r15, [r15, r15, ror r15]! Many thanks, Michał Hajduk