From owner-freebsd-hackers@FreeBSD.ORG Sun Aug 30 15:40:19 2009 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E24A410656CF for ; Sun, 30 Aug 2009 15:40:18 +0000 (UTC) (envelope-from junichi@junichi.org) Received: from niseko.junichi.org (niseko.v6.junichi.org [IPv6:2001:268:313::53:2]) by mx1.freebsd.org (Postfix) with ESMTP id 2DD7D8FC1D for ; Sun, 30 Aug 2009 15:40:17 +0000 (UTC) Received: from norn.pn.junichi.org (norn.junichi.org [IPv6:2001:268:313:1000:220:edff:fe61:47d]) by niseko.junichi.org (8.14.3/8.14.3/niseko) with ESMTP id n7UFeFp2065299 for ; Mon, 31 Aug 2009 00:40:15 +0900 (JST) (envelope-from junichi@junichi.org) Received: from localhost (localhost.pn.junichi.org [127.0.0.1]) by norn.pn.junichi.org (8.14.1/8.13.8) with ESMTP id n7UFeFVp001953 for ; Mon, 31 Aug 2009 00:40:15 +0900 (JST) (envelope-from junichi@junichi.org) Date: Mon, 31 Aug 2009 00:40:15 +0900 (JST) Message-Id: <20090831.004015.74756379.junichi@junichi.org> To: freebsd-hackers@freebsd.org From: Junichi Satoh X-Mailer: Mew version 5.2 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Subject: Frequency and core voltage adjustment for AMD CPUs. X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 Aug 2009 15:40:19 -0000 Hello, I did functionality expansion of cpufreq driver for AMD CPUs, "powernow.c" and "hwpstate.c". It can change frequency and core voltage from default in each P-states by definition of device.hints. Patch file against cpufreq driver: http://configure.sh/FreeBSD/cpufreq.html http://configure.sh/FreeBSD/cpufreq-j.html (Japanese) At least, it works well with my FreeBSD box, HP ProLiant ML115 G5. But, I don't know whether it works with other hardwares. Can anyone test this patch? Any comments and suggestions are welcome. - How to change frequency or core voltage. Define difference value from default in /boot/device.hints as follows. hint.{drivername}.0.adjfreq=XXX CPU frequency(MHz) of difference from default in all P-states. hint.{drivername}.0.adjfreqN=XXX CPU frequency(MHz) of difference from default in P-state N. hint.{drivername}.0.adjvcore=XXX CPU core voltage(mV) of difference from default in all P-states. hint.{drivername}.0.adjvcoreN=XXX CPU core voltage(mV) of difference from default in P-state N. *{drivername} is "powernow" or "hwpstate". Frequency and core voltage can be defined by an arbitrary value, but it is adjusted automatically by the nearest value that CPU allows. For example, the driver sets +100MHz if you define "adjfreq=110" when frequency step that specified by CPU is 100MHz. - Example 1 OS : FreeBSD 8.0-BETA2 H/W: HP ProLiant ML115 G5 CPU: Athlon 1640B (2.7GHz) /boot/device.hints: ======================================================================== hint.powernow.0.adjvcore="-200" -> Core voltage is set to -200mV from default in all P-states. hint.powernow.0.adjfreq="-100" -> Frequency is set to -100MHz from default in all P-states. hint.powernow.0.adjfreq0="0 -> Frequency is set to default in P-state0. ======================================================================== dmesg: ======================================================================== Copyright (c) 1992-2009 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 8.0-BETA2 #56: Sun Aug 23 10:34:37 JST 2009 junichi@shiga.pn.junichi.org:/usr/src/sys/amd64/compile/SHIGA WARNING: WITNESS option enabled, expect reduced performance. Timecounter "i8254" frequency 1193182 Hz quality 0 CPU: AMD Athlon(tm) Processor 1640B (2700.02-MHz K8-class CPU) Origin = "AuthenticAMD" Id = 0x70ff2 Stepping = 2 Features=0x78bfbff Features2=0x2001 AMD Features=0xea500800 AMD Features2=0x11d real memory = 2147483648 (2048 MB) avail memory = 4105457664 (3915 MB) ACPI APIC Table: ioapic0 irqs 0-23 on motherboard kbd1 at kbdmux0 acpi0: on motherboard acpi0: [ITHREAD] acpi0: Power Button (fixed) acpi0: reservation of fec00000, 1000 (3) failed acpi0: reservation of fee00000, 1000 (3) failed Timecounter "ACPI-fast" frequency 3579545 Hz quality 1000 acpi_timer0: <24-bit timer at 3.579545MHz> port 0x2008-0x200b on acpi0 acpi_hpet0: iomem 0xfed00000-0xfed003ff on acpi0 Timecounter "HPET" frequency 25000000 Hz quality 900 .... cpu0: on acpi0 powernow0: on cpu0 powernow0: P-state0: 2700MHz->2700MHz, 1350mV->1150mV powernow0: P-state1: 2600MHz->2500MHz, 1325mV->1125mV powernow0: P-state2: 2400MHz->2300MHz, 1275mV->1075mV powernow0: P-state3: 2200MHz->2100MHz, 1225mV->1025mV powernow0: P-state4: 2000MHz->1900MHz, 1175mV->975mV powernow0: P-state5: 1800MHz->1700MHz, 1125mV->925mV powernow0: P-state6: 1000MHz->900MHz, 1100mV->900mV ... ======================================================================== Result of "sysctl dev.cpu.0.freq_levels": ======================================================================== dev.cpu.0.freq_levels: 2700/50000 2500/46381 2300/39643 2100/33545 1900/28057 1700/23148 900/12249 ======================================================================== - Example 2 OS: FreeBSD 8.0-BETA3 H/W: HP ProLiant ML115 G5 CPU: Phenom 9850 Black Edition (2.5GHz) /boot/device.hints: ======================================================================== hint.hwpstate.0.adjfreq0="200" -> Frequency is set to +200MHz(over clock) from default in P-state0. hint.hwpstate.0.adjfreq1="-350" -> Frequency is set to -350MHz from default in P-state1. hint.hwpstate.0.adjvcore1="-175" -> Core voltage is set to -175mV from default in P-state1. ======================================================================== dmesg: ======================================================================== Copyright (c) 1992-2009 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 8.0-BETA3 #0: Mon Aug 24 23:29:36 JST 2009 junichi@shiga.pn.junichi.org:/usr/src/sys/amd64/compile/SHIGA WARNING: WITNESS option enabled, expect reduced performance. Timecounter "i8254" frequency 1193182 Hz quality 0 CPU: AMD Phenom(tm) 9850 Quad-Core Processor (2500.02-MHz K8-class CPU) Origin = "AuthenticAMD" Id = 0x100f23 Stepping = 3 Features=0x178bfbff Features2=0x802009 AMD Features=0xee500800 AMD Features2=0x7ff TSC: P-state invariant real memory = 5100273664 (4864 MB) avail memory = 4105482240 (3915 MB) ACPI APIC Table: FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs FreeBSD/SMP: 1 package(s) x 4 core(s) cpu0 (BSP): APIC ID: 0 cpu1 (AP): APIC ID: 1 cpu2 (AP): APIC ID: 2 cpu3 (AP): APIC ID: 3 ioapic0 irqs 0-23 on motherboard kbd1 at kbdmux0 acpi0: on motherboard acpi0: [ITHREAD] acpi0: Power Button (fixed) acpi0: reservation of fec00000, 1000 (3) failed acpi0: reservation of fee00000, 1000 (3) failed Timecounter "ACPI-fast" frequency 3579545 Hz quality 1000 acpi_timer0: <24-bit timer at 3.579545MHz> port 0x2008-0x200b on acpi0 acpi_hpet0: iomem 0xfed00000-0xfed003ff on acpi0 Timecounter "HPET" frequency 25000000 Hz quality 900 ... cpu0: on acpi0 hwpstate0: P-state0: 2500MHz->2700MHz, 1300mV->1300mV hwpstate0: P-state1: 1250MHz->900MHz, 1050mV->875mV hwpstate0: on cpu0 cpu1: on acpi0 cpu2: on acpi0 cpu3: on acpi0 ... ======================================================================== Result of "sysctl dev.cpu.0.freq_levels": ======================================================================== dev.cpu.0.freq_levels: 2700/30940 900/1848 ======================================================================== --- Junichi Satoh