From owner-svn-src-stable-6@FreeBSD.ORG Tue Nov 2 12:42:47 2010 Return-Path: Delivered-To: svn-src-stable-6@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id F2BBC1065695; Tue, 2 Nov 2010 12:42:46 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id DEFE18FC16; Tue, 2 Nov 2010 12:42:46 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id oA2CgkUK045843; Tue, 2 Nov 2010 12:42:46 GMT (envelope-from jhb@svn.freebsd.org) Received: (from jhb@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id oA2CgkIh045841; Tue, 2 Nov 2010 12:42:46 GMT (envelope-from jhb@svn.freebsd.org) Message-Id: <201011021242.oA2CgkIh045841@svn.freebsd.org> From: John Baldwin Date: Tue, 2 Nov 2010 12:42:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-6@freebsd.org X-SVN-Group: stable-6 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r214674 - stable/6/sys/dev/ata X-BeenThere: svn-src-stable-6@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 6-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Nov 2010 12:42:47 -0000 Author: jhb Date: Tue Nov 2 12:42:46 2010 New Revision: 214674 URL: http://svn.freebsd.org/changeset/base/214674 Log: MFC: Use the 'cfg2' value for Intel chipsets to limit the number of channels for non-SATA controllers. Specifically, limit the non-AHCI ICH7, 63XXESB2, and ICHM8 controllers to a single channel. Modified: stable/6/sys/dev/ata/ata-chipset.c Modified: stable/6/sys/dev/ata/ata-chipset.c ============================================================================== --- stable/6/sys/dev/ata/ata-chipset.c Tue Nov 2 12:40:13 2010 (r214673) +++ stable/6/sys/dev/ata/ata-chipset.c Tue Nov 2 12:42:46 2010 (r214674) @@ -1762,58 +1762,58 @@ ata_intel_ident(device_t dev) { struct ata_pci_controller *ctlr = device_get_softc(dev); static struct ata_chip_id ids[] = - {{ ATA_I82371FB, 0, 0, 0x00, ATA_WDMA2, "PIIX" }, - { ATA_I82371SB, 0, 0, 0x00, ATA_WDMA2, "PIIX3" }, - { ATA_I82371AB, 0, 0, 0x00, ATA_UDMA2, "PIIX4" }, - { ATA_I82443MX, 0, 0, 0x00, ATA_UDMA2, "PIIX4" }, - { ATA_I82451NX, 0, 0, 0x00, ATA_UDMA2, "PIIX4" }, - { ATA_I82801AB, 0, 0, 0x00, ATA_UDMA2, "ICH0" }, - { ATA_I82801AA, 0, 0, 0x00, ATA_UDMA4, "ICH" }, - { ATA_I82372FB, 0, 0, 0x00, ATA_UDMA4, "ICH" }, - { ATA_I82801BA, 0, 0, 0x00, ATA_UDMA5, "ICH2" }, - { ATA_I82801BA_1, 0, 0, 0x00, ATA_UDMA5, "ICH2" }, - { ATA_I82801CA, 0, 0, 0x00, ATA_UDMA5, "ICH3" }, - { ATA_I82801CA_1, 0, 0, 0x00, ATA_UDMA5, "ICH3" }, - { ATA_I82801DB, 0, 0, 0x00, ATA_UDMA5, "ICH4" }, - { ATA_I82801DB_1, 0, 0, 0x00, ATA_UDMA5, "ICH4" }, - { ATA_I82801EB, 0, 0, 0x00, ATA_UDMA5, "ICH5" }, - { ATA_I82801EB_S1, 0, 0, 0x00, ATA_SA150, "ICH5" }, - { ATA_I82801EB_R1, 0, 0, 0x00, ATA_SA150, "ICH5" }, - { ATA_I6300ESB, 0, 0, 0x00, ATA_UDMA5, "6300ESB" }, - { ATA_I6300ESB_S1, 0, 0, 0x00, ATA_SA150, "6300ESB" }, - { ATA_I6300ESB_R1, 0, 0, 0x00, ATA_SA150, "6300ESB" }, - { ATA_I82801FB, 0, 0, 0x00, ATA_UDMA5, "ICH6" }, - { ATA_I82801FB_S1, 0, AHCI, 0x00, ATA_SA150, "ICH6" }, - { ATA_I82801FB_R1, 0, AHCI, 0x00, ATA_SA150, "ICH6" }, - { ATA_I82801FBM, 0, AHCI, 0x00, ATA_SA150, "ICH6M" }, - { ATA_I82801GB, 0, 0, 0x00, ATA_UDMA5, "ICH7" }, - { ATA_I82801GB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH7" }, - { ATA_I82801GB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH7" }, - { ATA_I82801GB_AH, 0, AHCI, 0x00, ATA_SA300, "ICH7" }, - { ATA_I82801GBM_S1, 0, AHCI, 0x00, ATA_SA300, "ICH7M" }, - { ATA_I82801GBM_R1, 0, AHCI, 0x00, ATA_SA300, "ICH7M" }, - { ATA_I82801GBM_AH, 0, AHCI, 0x00, ATA_SA300, "ICH7M" }, - { ATA_I63XXESB2, 0, 0, 0x00, ATA_UDMA5, "63XXESB2" }, - { ATA_I63XXESB2_S1, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" }, - { ATA_I63XXESB2_S2, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" }, - { ATA_I63XXESB2_R1, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" }, - { ATA_I63XXESB2_R2, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" }, - { ATA_I82801HB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH8" }, - { ATA_I82801HB_S2, 0, AHCI, 0x00, ATA_SA300, "ICH8" }, - { ATA_I82801HB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH8" }, - { ATA_I82801HB_AH4, 0, AHCI, 0x00, ATA_SA300, "ICH8" }, - { ATA_I82801HB_AH6, 0, AHCI, 0x00, ATA_SA300, "ICH8" }, - { ATA_I82801HBM, 0, 0, 0x00, ATA_UDMA5, "ICH8M" }, - { ATA_I82801HBM_S1, 0, 0, 0x00, ATA_SA150, "ICH8M" }, - { ATA_I82801HBM_S2, 0, AHCI, 0x00, ATA_SA300, "ICH8M" }, - { ATA_I82801HBM_S3, 0, AHCI, 0x00, ATA_SA300, "ICH8M" }, - { ATA_I82801IB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I82801IB_S2, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I82801IB_AH2, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I82801IB_AH4, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I82801IB_AH6, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I82801IB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH9" }, - { ATA_I31244, 0, 0, 0x00, ATA_SA150, "31244" }, + {{ ATA_I82371FB, 0, 0, 2, ATA_WDMA2, "PIIX" }, + { ATA_I82371SB, 0, 0, 2, ATA_WDMA2, "PIIX3" }, + { ATA_I82371AB, 0, 0, 2, ATA_UDMA2, "PIIX4" }, + { ATA_I82443MX, 0, 0, 2, ATA_UDMA2, "PIIX4" }, + { ATA_I82451NX, 0, 0, 2, ATA_UDMA2, "PIIX4" }, + { ATA_I82801AB, 0, 0, 2, ATA_UDMA2, "ICH0" }, + { ATA_I82801AA, 0, 0, 2, ATA_UDMA4, "ICH" }, + { ATA_I82372FB, 0, 0, 2, ATA_UDMA4, "ICH" }, + { ATA_I82801BA, 0, 0, 2, ATA_UDMA5, "ICH2" }, + { ATA_I82801BA_1, 0, 0, 2, ATA_UDMA5, "ICH2" }, + { ATA_I82801CA, 0, 0, 2, ATA_UDMA5, "ICH3" }, + { ATA_I82801CA_1, 0, 0, 2, ATA_UDMA5, "ICH3" }, + { ATA_I82801DB, 0, 0, 2, ATA_UDMA5, "ICH4" }, + { ATA_I82801DB_1, 0, 0, 2, ATA_UDMA5, "ICH4" }, + { ATA_I82801EB, 0, 0, 2, ATA_UDMA5, "ICH5" }, + { ATA_I82801EB_S1, 0, 0, 2, ATA_SA150, "ICH5" }, + { ATA_I82801EB_R1, 0, 0, 2, ATA_SA150, "ICH5" }, + { ATA_I6300ESB, 0, 0, 2, ATA_UDMA5, "6300ESB" }, + { ATA_I6300ESB_S1, 0, 0, 2, ATA_SA150, "6300ESB" }, + { ATA_I6300ESB_R1, 0, 0, 2, ATA_SA150, "6300ESB" }, + { ATA_I82801FB, 0, 0, 2, ATA_UDMA5, "ICH6" }, + { ATA_I82801FB_S1, 0, AHCI, 0, ATA_SA150, "ICH6" }, + { ATA_I82801FB_R1, 0, AHCI, 0, ATA_SA150, "ICH6" }, + { ATA_I82801FBM, 0, AHCI, 0, ATA_SA150, "ICH6M" }, + { ATA_I82801GB, 0, 0, 1, ATA_UDMA5, "ICH7" }, + { ATA_I82801GB_S1, 0, AHCI, 0, ATA_SA300, "ICH7" }, + { ATA_I82801GB_R1, 0, AHCI, 0, ATA_SA300, "ICH7" }, + { ATA_I82801GB_AH, 0, AHCI, 0, ATA_SA300, "ICH7" }, + { ATA_I82801GBM_S1, 0, AHCI, 0, ATA_SA300, "ICH7M" }, + { ATA_I82801GBM_R1, 0, AHCI, 0, ATA_SA300, "ICH7M" }, + { ATA_I82801GBM_AH, 0, AHCI, 0, ATA_SA300, "ICH7M" }, + { ATA_I63XXESB2, 0, 0, 1, ATA_UDMA5, "63XXESB2" }, + { ATA_I63XXESB2_S1, 0, AHCI, 0, ATA_SA300, "63XXESB2" }, + { ATA_I63XXESB2_S2, 0, AHCI, 0, ATA_SA300, "63XXESB2" }, + { ATA_I63XXESB2_R1, 0, AHCI, 0, ATA_SA300, "63XXESB2" }, + { ATA_I63XXESB2_R2, 0, AHCI, 0, ATA_SA300, "63XXESB2" }, + { ATA_I82801HB_S1, 0, AHCI, 0, ATA_SA300, "ICH8" }, + { ATA_I82801HB_S2, 0, AHCI, 0, ATA_SA300, "ICH8" }, + { ATA_I82801HB_R1, 0, AHCI, 0, ATA_SA300, "ICH8" }, + { ATA_I82801HB_AH4, 0, AHCI, 0, ATA_SA300, "ICH8" }, + { ATA_I82801HB_AH6, 0, AHCI, 0, ATA_SA300, "ICH8" }, + { ATA_I82801HBM, 0, 0, 1, ATA_UDMA5, "ICH8M" }, + { ATA_I82801HBM_S1, 0, 0, 0, ATA_SA150, "ICH8M" }, + { ATA_I82801HBM_S2, 0, AHCI, 0, ATA_SA300, "ICH8M" }, + { ATA_I82801HBM_S3, 0, AHCI, 0, ATA_SA300, "ICH8M" }, + { ATA_I82801IB_S1, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I82801IB_S2, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I82801IB_AH2, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I82801IB_AH4, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I82801IB_AH6, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I82801IB_R1, 0, AHCI, 0, ATA_SA300, "ICH9" }, + { ATA_I31244, 0, 0, 2, ATA_SA150, "31244" }, { 0, 0, 0, 0, 0, 0}}; if (!(ctlr->chip = ata_match_chip(dev, ids))) @@ -1855,6 +1855,7 @@ ata_intel_chipinit(device_t dev) /* non SATA intel chips goes here */ else if (ctlr->chip->max_dma < ATA_SA150) { + ctlr->channels = ctlr->chip->cfg2; ctlr->allocate = ata_intel_allocate; ctlr->setmode = ata_intel_new_setmode; } From owner-svn-src-stable-6@FreeBSD.ORG Wed Nov 3 01:32:50 2010 Return-Path: Delivered-To: svn-src-stable-6@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A893D1065794; Wed, 3 Nov 2010 01:32:50 +0000 (UTC) (envelope-from edwin@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 7B47B8FC16; Wed, 3 Nov 2010 01:32:50 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id oA31Wonk002993; Wed, 3 Nov 2010 01:32:50 GMT (envelope-from edwin@svn.freebsd.org) Received: (from edwin@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id oA31Wo58002991; Wed, 3 Nov 2010 01:32:50 GMT (envelope-from edwin@svn.freebsd.org) Message-Id: <201011030132.oA31Wo58002991@svn.freebsd.org> From: Edwin Groothuis Date: Wed, 3 Nov 2010 01:32:50 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-6@freebsd.org X-SVN-Group: stable-6 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r214725 - stable/6/share/zoneinfo X-BeenThere: svn-src-stable-6@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 6-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Nov 2010 01:32:50 -0000 Author: edwin Date: Wed Nov 3 01:32:50 2010 New Revision: 214725 URL: http://svn.freebsd.org/changeset/base/214725 Log: MFC of r214722, tzdata2010o: - Fiji goes into DST three weeks earlier in 2011. Modified: stable/6/share/zoneinfo/australasia Directory Properties: stable/6/share/zoneinfo/ (props changed) Modified: stable/6/share/zoneinfo/australasia ============================================================================== --- stable/6/share/zoneinfo/australasia Wed Nov 3 01:32:44 2010 (r214724) +++ stable/6/share/zoneinfo/australasia Wed Nov 3 01:32:50 2010 (r214725) @@ -1,5 +1,5 @@ # 
-# @(#)australasia	8.18
+# @(#)australasia	8.20
 # This file is in the public domain, so clarified as of
 # 2009-05-17 by Arthur David Olson.
 
@@ -284,13 +284,26 @@ Zone	Indian/Cocos	6:27:40	-	LMT	1900
 # http://www.timeanddate.com/news/time/fiji-dst-ends-march-2010.html
 # 
 
+# From Alexander Krivenyshev (2010-10-24):
+# According to Radio Fiji and Fiji Times online, Fiji will end DST 3 
+# weeks earlier than expected - on March 6, 2011, not March 27, 2011...
+# Here is confirmation from Government of the Republic of the Fiji Islands, 
+# Ministry of Information (fiji.gov.fj) web site:
+# 
+# http://www.fiji.gov.fj/index.php?option=com_content&view=article&id=2608:daylight-savings&catid=71:press-releases&Itemid=155
+# 
+# or
+# 
+# http://www.worldtimezone.com/dst_news/dst_news_fiji04.html
+# 
+
 # Rule	NAME	FROM	TO	TYPE	IN	ON	AT	SAVE	LETTER/S
 Rule	Fiji	1998	1999	-	Nov	Sun>=1	2:00	1:00	S
 Rule	Fiji	1999	2000	-	Feb	lastSun	3:00	0	-
 Rule	Fiji	2009	only	-	Nov	29	2:00	1:00	S
 Rule	Fiji	2010	only	-	Mar	lastSun	3:00	0	-
 Rule	Fiji	2010	only	-	Oct	24	2:00	1:00	S
-Rule	Fiji	2011	only	-	Mar	lastSun 3:00	0	-
+Rule	Fiji	2011	only	-	Mar	Sun>=1	3:00	0	-
 # Zone	NAME		GMTOFF	RULES	FORMAT	[UNTIL]
 Zone	Pacific/Fiji	11:53:40 -	LMT	1915 Oct 26	# Suva
 			12:00	Fiji	FJ%sT	# Fiji Time
@@ -487,11 +500,21 @@ Zone Pacific/Pago_Pago	 12:37:12 -	LMT	1
 # http://www.parliament.gov.ws/documents/acts/Daylight%20Saving%20Act%20%202009%20%28English%29%20-%20Final%207-7-091.pdf
 # 
 
+# From Raymond Hughes (2010-10-07):
+# Please see
+# 
+# http://www.mcil.gov.ws
+# ,
+# the Ministry of Commerce, Industry and Labour (sideframe) "Last Sunday
+# September 2010 (26/09/10) - adjust clocks forward from 12:00 midnight
+# to 01:00am and First Sunday April 2011 (03/04/11) - adjust clocks
+# backwards from 1:00am to 12:00am"
+
 Zone Pacific/Apia	 12:33:04 -	LMT	1879 Jul  5
 			-11:26:56 -	LMT	1911
 			-11:30	-	SAMT	1950		# Samoa Time
 			-11:00	-	WST	2010 Sep 26
-			-11:00	1:00	WSDT	2011 Apr 3
+			-11:00	1:00	WSDT	2011 Apr 3 1:00
 			-11:00	-	WST
 
 # Solomon Is