From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 00:37:07 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id ED0AA106566C for ; Mon, 14 Feb 2011 00:37:07 +0000 (UTC) (envelope-from corky1951@comcast.net) Received: from qmta02.emeryville.ca.mail.comcast.net (qmta02.emeryville.ca.mail.comcast.net [76.96.30.24]) by mx1.freebsd.org (Postfix) with ESMTP id D01618FC17 for ; Mon, 14 Feb 2011 00:37:07 +0000 (UTC) Received: from omta03.emeryville.ca.mail.comcast.net ([76.96.30.27]) by qmta02.emeryville.ca.mail.comcast.net with comcast id 7c4o1g0050b6N64A2cd7uG; Mon, 14 Feb 2011 00:37:07 +0000 Received: from comcast.net ([98.203.142.76]) by omta03.emeryville.ca.mail.comcast.net with comcast id 7cd51g00A1f6R9u8Pcd5Tu; Mon, 14 Feb 2011 00:37:06 +0000 Received: by comcast.net (sSMTP sendmail emulation); Sun, 13 Feb 2011 16:37:04 -0800 Date: Sun, 13 Feb 2011 16:37:04 -0800 From: Charlie Kester To: freebsd-stable@freebsd.org Message-ID: <20110214003704.GA2049@comcast.net> Mail-Followup-To: freebsd-stable@freebsd.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline User-Agent: Mutt/1.4.2.3i X-Mailer: Mutt 1.4.2.3i X-Composer: Vim 7.3 Subject: 8.2-PRERELEASE generating warnings re my hard drive X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 00:37:08 -0000 I'm running 8-STABLE, i386 architecture, and yesterday I updated to the latest version with cvsup. After installing the kernel and rebooting, I see the following messages on the console: ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel reset ad4: interrupt on idle channel ignored ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel reset ad4: interrupt on idle channel ignored (repeated several times, and then the following:) ad4: WARNING - SETFEATURES SET TRANSFER MODE taskqueue timeout - completing request directly ad4: 238475MB at ata2-master UDMA100 SATA 1.5Gb/s (shortly afterwards, I see this:) Trying to mount root from ufs:/dev/ad4s1a ad4: WARNING - READ_DMA requeued due to channel reset LBA=33963227 ata2: FAILURE - already active DMA on this device ata2: setting up DMA failed g_vfs_done():ad4s1f[READ(offset=12103825408, length=2048)]error = 5 ad4: WARNING - READ_DMA requeued due to channel reset LBA=705199 ata2: FAILURE - already active DMA on this device ata2: setting up DMA failed (which then repeats many times with different LBA and offset values.) Similar messages appear after bootup is completed and I've logged in. They seem to appear whenever any process accesses the hard drive. I reverted back to my previous build of the kernel, dated 3 Feb 2011, and these messages no longer appear. smartctl reports that the drive is running without any errors or incipient failures. So my question is, what's going on here? Is this something I should worry about? If it's a problem with my kernel config, what parameters should I be looking at? Motherboard: Intel DM510 with builtin IDE controller. From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 01:00:24 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1CC9106564A for ; Mon, 14 Feb 2011 01:00:24 +0000 (UTC) (envelope-from corky1951@comcast.net) Received: from qmta03.westchester.pa.mail.comcast.net (qmta03.westchester.pa.mail.comcast.net [76.96.62.32]) by mx1.freebsd.org (Postfix) with ESMTP id 930C68FC12 for ; Mon, 14 Feb 2011 01:00:24 +0000 (UTC) Received: from omta18.westchester.pa.mail.comcast.net ([76.96.62.90]) by qmta03.westchester.pa.mail.comcast.net with comcast id 7cGA1g0061wpRvQ53cn9C9; Mon, 14 Feb 2011 00:47:09 +0000 Received: from comcast.net ([98.203.142.76]) by omta18.westchester.pa.mail.comcast.net with comcast id 7cn71g00e1f6R9u3ecn7wB; Mon, 14 Feb 2011 00:47:09 +0000 Received: by comcast.net (sSMTP sendmail emulation); Sun, 13 Feb 2011 16:47:00 -0800 Date: Sun, 13 Feb 2011 16:47:00 -0800 From: Charlie Kester To: freebsd-stable@freebsd.org Message-ID: <20110214004700.GB2049@comcast.net> Mail-Followup-To: freebsd-stable@freebsd.org References: <20110214003704.GA2049@comcast.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20110214003704.GA2049@comcast.net> User-Agent: Mutt/1.4.2.3i X-Mailer: Mutt 1.4.2.3i X-Composer: Vim 7.3 Subject: Re: 8.2-PRERELEASE generating warnings re my hard drive X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 01:00:24 -0000 On Sun 13 Feb 2011 at 16:37:04 PST Charlie Kester wrote: > >Motherboard: Intel DM510 with builtin IDE controller. Oops, I shouldn't have tried to write that from memory. It's actually an Intel D510MO mobo, which uses the NM10 chipset for I/O. From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 17:10:07 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BA759106564A; Mon, 14 Feb 2011 17:10:07 +0000 (UTC) (envelope-from bz@FreeBSD.org) Received: from mail.cksoft.de (mail.cksoft.de [IPv6:2001:4068:10::3]) by mx1.freebsd.org (Postfix) with ESMTP id 495318FC0A; Mon, 14 Feb 2011 17:10:07 +0000 (UTC) Received: from localhost (amavis.fra.cksoft.de [192.168.74.71]) by mail.cksoft.de (Postfix) with ESMTP id 3679941C7A6; Mon, 14 Feb 2011 18:10:06 +0100 (CET) X-Virus-Scanned: amavisd-new at cksoft.de Received: from mail.cksoft.de ([192.168.74.103]) by localhost (amavis.fra.cksoft.de [192.168.74.71]) (amavisd-new, port 10024) with ESMTP id jh-nA9ITjuLM; Mon, 14 Feb 2011 18:10:05 +0100 (CET) Received: by mail.cksoft.de (Postfix, from userid 66) id C392241C7AF; Mon, 14 Feb 2011 18:10:05 +0100 (CET) Received: from maildrop.int.zabbadoz.net (maildrop.int.zabbadoz.net [10.111.66.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.int.zabbadoz.net (Postfix) with ESMTP id 1C59B4448F3; Mon, 14 Feb 2011 17:07:49 +0000 (UTC) Date: Mon, 14 Feb 2011 17:07:49 +0000 (UTC) From: "Bjoern A. Zeeb" X-X-Sender: bz@maildrop.int.zabbadoz.net To: freebsd-net@freebsd.org, freebsd-atm@freebsd.org Message-ID: <20110214170214.Y13400@maildrop.int.zabbadoz.net> X-OpenPGP-Key: 0x14003F198FEFA3E77207EE8D2B58B8F83CCF1842 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: freebsd-stable@freebsd.org Subject: NATM still scheduled for removal - please follow up to keep it in-tree X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 17:10:07 -0000 Hi, now that stable/8 (not part of the upcoming 8.2-R) once again has support for NATM I'd like to remind people of http://lists.freebsd.org/pipermail/freebsd-net/2010-December/027215.html especially: :: 1) the extra couple of months; this will not prevent the evitable removal :: yet only defer it. :: :: 2) If anyone of you is using (or want to be able to (continue to) use) NATM :: or can test things, I re-enabled it with most of the code in HEAD and :: the patch is available for 8,x as well but need to work with somoene :: to make sure it'll really work. I am willing to spend more time on it :: if you send me an email. So if anyone of you is still using NATM, please follow-up with me to keep your functionality. If there is no feedback NATM is still scheduled for removal. Thank you. /bz -- Bjoern A. Zeeb You have to have visions! Stop bit received. Insert coin for new address family. ---------- Forwarded message ---------- Date: Mon, 14 Feb 2011 16:54:03 +0000 (UTC) From: Bjoern A. Zeeb To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org Subject: svn commit: r218684 - in stable/8/sys: conf netinet Author: bz Date: Mon Feb 14 16:54:03 2011 New Revision: 218684 URL: http://svn.freebsd.org/changeset/base/218684 Log: MFC r216466: Bring back (most of) NATM to avoid further bitrot after r186119. Keep three lines disabled which I am unsure if they had been used at all. This will allow us to seek testers and possibly bring it all back. Discussed with: rwatson Modified: stable/8/sys/conf/NOTES stable/8/sys/netinet/if_atm.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 17:39:46 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 499541065670 for ; Mon, 14 Feb 2011 17:39:46 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id 320508FC0A for ; Mon, 14 Feb 2011 17:39:45 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1EHdjg7047811; Mon, 14 Feb 2011 09:39:45 -0800 (PST) (envelope-from faber@isi.edu) Date: Mon, 14 Feb 2011 09:39:44 -0800 From: Ted Faber To: Warren Block Message-ID: <20110214173943.GA47006@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="8t9RHnE3ZwKMSgU+" Content-Disposition: inline In-Reply-To: X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 17:39:46 -0000 --8t9RHnE3ZwKMSgU+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Feb 12, 2011 at 03:20:54PM -0700, Warren Block wrote: > On Fri, 11 Feb 2011, Ted Faber wrote: >=20 > > For the last couple weeks (maybe more) I've been having an intermittent > > problem on my Thinkpad T42 where exiting X causes my screen to lock up > > and the system seems to stop doing anything. Lately it's happening > > about every 3rd time. >=20 > My T42 is months out of date and needs updating, but I haven't seen that= =20 > issue before. Have you made any changes to xorg-related stuff lately?=20 > There are some things in your xorg.conf Device section that might be=20 > questionable, but if it was working before... I commented all the options out and still see the problem. What did you see that looked suspect? --=20 Ted Faber http://www.isi.edu/~faber PGP: http://www.isi.edu/~faber/pubkeys.= asc Unexpected attachment on this mail? See http://www.isi.edu/~faber/FAQ.html#= SIG --8t9RHnE3ZwKMSgU+ Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iEYEARECAAYFAk1ZaN8ACgkQaUz3f+Zf+XtkdACcCwc2pSSstRi5VKQBZnh7UWTE 95UAoNE/D+0z2fWUrde6J4un84y2ek/V =8rmj -----END PGP SIGNATURE----- --8t9RHnE3ZwKMSgU+-- From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 18:22:12 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 60A66106566B for ; Mon, 14 Feb 2011 18:22:12 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id 487188FC0A for ; Mon, 14 Feb 2011 18:22:12 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1EILxu9057756; Mon, 14 Feb 2011 10:22:00 -0800 (PST) (envelope-from faber@isi.edu) Date: Mon, 14 Feb 2011 10:21:59 -0800 From: Ted Faber To: Chris H Message-ID: <20110214182159.GB47006@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="yNb1oOkm5a9FJOVX" Content-Disposition: inline In-Reply-To: <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 18:22:12 -0000 --yNb1oOkm5a9FJOVX Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Feb 11, 2011 at 10:52:43PM -0800, Chris H wrote: > I noticed a potential issue in the output of your attached Xorg.conf. Can you tell me what looked fishy? I'm happy to poke it it. > Bottom line (for me anyway) has been that if I disable hald(8), I have ne= arly > no (video related) issues. This is both on x86 && amd64 systems. When I turn off hald, X xan no longer find the mouse and keyboard. I can probably hard wire them down, but I get the impression that lots of other gnome-ish things will get confused w/o hald. --=20 Ted Faber http://www.isi.edu/~faber PGP: http://www.isi.edu/~faber/pubkeys.= asc Unexpected attachment on this mail? See http://www.isi.edu/~faber/FAQ.html#= SIG --yNb1oOkm5a9FJOVX Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iEYEARECAAYFAk1ZcscACgkQaUz3f+Zf+XuefwCfdUeMaoHiDxEcVVG2jOKsgh5+ tjgAnji/cwh1gTkGIVlvcFp8XKrmgzVo =xLsx -----END PGP SIGNATURE----- --yNb1oOkm5a9FJOVX-- From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 21:11:44 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B49FF106564A for ; Mon, 14 Feb 2011 21:11:44 +0000 (UTC) (envelope-from chris#@1command.com) Received: from mail.1command.com (mail.1command.com [168.103.150.6]) by mx1.freebsd.org (Postfix) with ESMTP id 5C2548FC08 for ; Mon, 14 Feb 2011 21:11:43 +0000 (UTC) Received: from webmail.1command.com (localhost.1command.com [127.0.0.1]) by mail.1command.com (8.13.3/8.13.3) with ESMTP id p1ELB5YZ095440; Mon, 14 Feb 2011 13:11:12 -0800 (PST) (envelope-from chris#@1command.com) Received: from udns0.ultimatedns.net ([168.103.150.26]) (Local authenticated user inf0s) by webmail.1command.com with HTTP; Mon, 14 Feb 2011 13:11:42 -0800 (PST) Message-ID: In-Reply-To: <20110214182159.GB47006@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> Date: Mon, 14 Feb 2011 13:11:42 -0800 (PST) From: "Chris H" To: freebsd-stable@freebsd.org User-Agent: HRC Internet Messaging/1.5.2 [SVN] MIME-Version: 1.0 Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: 8bit Cc: faber@isi.edu Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 21:11:44 -0000 On Mon, February 14, 2011 10:21 am, Ted Faber wrote: > On Fri, Feb 11, 2011 at 10:52:43PM -0800, Chris H wrote: > >> I noticed a potential issue in the output of your attached Xorg.conf. >> > > Can you tell me what looked fishy? I'm happy to poke it it. > > >> Bottom line (for me anyway) has been that if I disable hald(8), I have nearly >> no (video related) issues. This is both on x86 && amd64 systems. > > When I turn off hald, X xan no longer find the mouse and keyboard. I > can probably hard wire them down, but I get the impression that lots of other > gnome-ish things will get confused w/o hald. dbus is still available, and should help here (still enabled). I'm /not/ on a GENERIC kernel, but here are some relevant pieces from my setup that might help; rc.conf(5) hald_enable="NO" dbus_enable="YES" xorg.conf(5) Section "ServerLayout" Identifier "X.org Configured" ... InputDevice "Mouse0" "CorePointer" InputDevice "Keyboard0" "CoreKeyboard" Section "ServerFlags" Option "AllowEmptyInput" "false" Option "AutoAddDevices" "true" Option "AutoEnableDevices" "true" ... Section "InputDevice" Identifier "Keyboard0" Driver "kbd" EndSection Section "InputDevice" Identifier "Mouse0" Driver "mouse" Option "Protocol" "auto" Option "Device" "/dev/sysmouse" Option "ZAxisMapping" "4 5 6 7 8" ... I run Gnome && KDE(4.x) w/o any issues using this setup (no hald(8). I don't have your dmesg(8) output in front of me, at the momment. So I can't comment on what I felt might be "suspect". I might also note, that for awhile there, there were issues on laptops w/FreeBSD. I can't remember exactly, but I think it was related to (ACPI?). Essentially, it's related to the suspend/resume support in the FreeBSD kernel. Perhaps some additional "tweaks" might be found in the laptop section(s) in the FreeBSD docs, or list(s). HTH --Chris OH, one other thing that comes to mind; Did you let Xorg(1) create your xorg.conf(8) file? and if so (you /should/ have), what was the output? Again, if so, is that the conf file you're using now? > > -- > Ted Faber > http://www.isi.edu/~faber PGP: http://www.isi.edu/~faber/pubkeys.asc > Unexpected attachment on this mail? See http://www.isi.edu/~faber/FAQ.html#SIG > > -- From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 22:35:25 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BD16D1065674 for ; Mon, 14 Feb 2011 22:35:25 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 7A3018FC13 for ; Mon, 14 Feb 2011 22:35:25 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1EMZHXg012761; Mon, 14 Feb 2011 15:35:17 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1EMZGMS012758; Mon, 14 Feb 2011 15:35:16 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Mon, 14 Feb 2011 15:35:16 -0700 (MST) From: Warren Block To: Chris H In-Reply-To: Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Mon, 14 Feb 2011 15:35:17 -0700 (MST) Cc: faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 22:35:25 -0000 On Mon, 14 Feb 2011, Chris H wrote: > I'm /not/ on a GENERIC kernel, but here are some relevant pieces from > my setup that might help; > rc.conf(5) > hald_enable="NO" > dbus_enable="YES" Half a dozen machines here (roughly, it varies) say that hal is fine. One of those machines is a T42, but needs updating to the latest 8-stable. Apparently I put the significant files on the FLCL site a while back: http://laptop.bsdgroup.de/freebsd/index.html?action=show_laptop_detail&laptop=12947 > xorg.conf(5) > Section "ServerLayout" > Identifier "X.org Configured" > ... > InputDevice "Mouse0" "CorePointer" > InputDevice "Keyboard0" "CoreKeyboard" > > Section "ServerFlags" > Option "AllowEmptyInput" "false" No, please stop doing that. See http://www.wonkity.com/~wblock/docs/html/aei.html > Option "AutoAddDevices" "true" > Option "AutoEnableDevices" "true" These are defaults. > OH, one other thing that comes to mind; > Did you let Xorg(1) create your xorg.conf(8) file? and if so (you /should/ have), > what was the output? Again, if so, is that the conf file you're using now? Sorry, must disagree with that. -configure creates outmoded xorg.conf files, with older options that are either no longer needed or outright obsolete. It also leaves out useful settings. From owner-freebsd-stable@FreeBSD.ORG Mon Feb 14 22:41:29 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E96AA106566B for ; Mon, 14 Feb 2011 22:41:29 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id A7FD78FC1D for ; Mon, 14 Feb 2011 22:41:29 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1EMfTiF012800; Mon, 14 Feb 2011 15:41:29 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1EMfTVO012797; Mon, 14 Feb 2011 15:41:29 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Mon, 14 Feb 2011 15:41:29 -0700 (MST) From: Warren Block To: Ted Faber In-Reply-To: <20110214173943.GA47006@zod.isi.edu> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <20110214173943.GA47006@zod.isi.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Mon, 14 Feb 2011 15:41:29 -0700 (MST) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Feb 2011 22:41:30 -0000 On Mon, 14 Feb 2011, Ted Faber wrote: > On Sat, Feb 12, 2011 at 03:20:54PM -0700, Warren Block wrote: >> >> My T42 is months out of date and needs updating, but I haven't seen that >> issue before. Have you made any changes to xorg-related stuff lately? >> There are some things in your xorg.conf Device section that might be >> questionable, but if it was working before... > > I commented all the options out and still see the problem. > > What did you see that looked suspect? AGPMode, GARTSize, ColorTiling. But if they were working before, they should not suddenly be a new problem. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 03:58:32 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A1203106566C for ; Tue, 15 Feb 2011 03:58:32 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 3FCF48FC12 for ; Tue, 15 Feb 2011 03:58:31 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1F3wV6V013749; Mon, 14 Feb 2011 20:58:31 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1F3wV7E013746; Mon, 14 Feb 2011 20:58:31 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Mon, 14 Feb 2011 20:58:31 -0700 (MST) From: Warren Block To: Ted Faber In-Reply-To: <20110211191232.GA2073@zod.isi.edu> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; CHARSET=US-ASCII; format=flowed Content-ID: Content-Disposition: INLINE X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Mon, 14 Feb 2011 20:58:31 -0700 (MST) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 03:58:32 -0000 Updated the T42 tonight, which has the same video. -STABLE as of today, all ports updated as of today, and it seems fine. At least no lock up on restarting X or shutting down. Your xorg.conf had some interesting things, including XAA acceleration, which I didn't notice before. Here's the one from this machine, comments stripped. Composite enabled does not provide composite, but otherwise no problems noticed: Section "ServerLayout" Identifier "Manually Configured" Screen 0 "Screen0" 0 0 Option "DontZap" "Off" EndSection Section "Files" ModulePath "/usr/local/lib/xorg/modules" FontPath "/usr/local/lib/X11/fonts/misc/" FontPath "/usr/local/lib/X11/fonts/TTF/" FontPath "/usr/local/lib/X11/fonts/OTF" FontPath "/usr/local/lib/X11/fonts/Type1/" FontPath "/usr/local/lib/X11/fonts/100dpi/" FontPath "/usr/local/lib/X11/fonts/75dpi/" FontPath "/usr/local/lib/X11/fonts/bitstream-vera/" EndSection Section "DRI" Group 0 Mode 0660 EndSection Section "Extensions" Option "Composite" "Enable" EndSection Section "Device" Identifier "Card0" Driver "radeon" VendorName "ATI Technologies Inc" BoardName "Radeon Mobility M7 LW [Radeon Mobility 7500]" BusID "PCI:1:0:0" Option "AccelMethod" "EXA" Option "EXAVSync" "On" EndSection Section "Screen" Identifier "Screen0" Device "Card0" Monitor "Monitor0" SubSection "Display" Virtual 1024 768 Modes "1024x768" EndSubSection EndSection From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 06:03:55 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 749711065670 for ; Tue, 15 Feb 2011 06:03:55 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id 548FF8FC18 for ; Tue, 15 Feb 2011 06:03:55 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1F63n9q065169; Mon, 14 Feb 2011 22:03:50 -0800 (PST) (envelope-from faber@isi.edu) Date: Mon, 14 Feb 2011 22:03:40 -0800 From: Ted Faber To: Warren Block Message-ID: <20110215060336.GA1817@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="BwCQnh7xodEAoBMC" Content-Disposition: inline In-Reply-To: X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 06:03:55 -0000 --BwCQnh7xodEAoBMC Content-Type: multipart/mixed; boundary="LQksG6bCIzRHxTLp" Content-Disposition: inline --LQksG6bCIzRHxTLp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 14, 2011 at 08:58:31PM -0700, Warren Block wrote: > Updated the T42 tonight, which has the same video. -STABLE as of today,= =20 > all ports updated as of today, and it seems fine. At least no lock up=20 > on restarting X or shutting down. Your xorg.conf had some interesting=20 > things, including XAA acceleration, which I didn't notice before.=20 > Here's the one from this machine, comments stripped. Composite enabled= =20 > does not provide composite, but otherwise no problems noticed: I tried that xorg.conf, and still got the lockups. The acceleration was less effective as well. I've attached the xorg.conf I'm using, which is pretty close to the one you sent, as well as the log from /var/log/Xorg.0.log I still see the lockups. --=20 http://www.lunabase.org/~faber Unexpected attachment? http://www.lunabase.org/~faber/FAQ.html#SIG --LQksG6bCIzRHxTLp Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="xorg.conf" Section "ServerLayout" Identifier "X.org Configured" Screen 0 "Screen0" 0 0 # InputDevice "Mouse0" "CorePointer" # InputDevice "Keyboard0" "CoreKeyboard" EndSection Section "ServerFlags" # Option "AutoAddDevices" "Off" # Option "AutoEnableDevices" "Off" # Option "AllowEmptyInput" "Off" EndSection Section "Files" #RgbPath "/usr/local/share/X11/rgb" ModulePath "/usr/local/lib/xorg/modules" FontPath "/usr/local/lib/X11/fonts/misc/" FontPath "/usr/local/lib/X11/fonts/TTF/" FontPath "/usr/local/lib/X11/fonts/OTF" FontPath "/usr/local/lib/X11/fonts/Type1/" FontPath "/usr/local/lib/X11/fonts/100dpi/" FontPath "/usr/local/lib/X11/fonts/75dpi/" EndSection Section "Module" Load "extmod" # Load "record" Load "dbe" Load "glx" Load "GLcore" Load "xtrap" Load "dri" Load "freetype" Load "type1" EndSection #Section "InputDevice" # Identifier "Keyboard0" # Driver "kbd" #EndSection #Section "InputDevice" # Identifier "Mouse0" # Driver "mouse" # Option "Protocol" "auto" # Option "Device" "/dev/sysmouse" # Option "ZAxisMapping" "4 5 6 7" #EndSection Section "Monitor" Identifier "Monitor0" VendorName "Monitor Vendor" ModelName "Monitor Model" EndSection Section "Device" ### Available Driver options are:- ### Values: : integer, : float, : "True"/"False", ### : "String", : " Hz/kHz/MHz" ### [arg]: arg optional #Option "NoAccel" # [] #Option "SWcursor" # [] #Option "Dac6Bit" # [] #Option "Dac8Bit" # [] #Option "BusType" # [] #Option "CPPIOMode" # [] #Option "CPusecTimeout" # #Option "AGPMode" # #Option "AGPFastWrite" # [] #Option "AGPSize" # #Option "GARTSize" # #Option "RingSize" # #Option "BufferSize" # #Option "EnableDepthMoves" # [] #Option "EnablePageFlip" # [] #Option "NoBackBuffer" # [] #Option "DMAForXv" # [] #Option "FBTexPercent" # #Option "DepthBits" # #Option "PCIAPERSize" # #Option "AccelDFS" # [] #Option "DDCMode" # [] #Option "IgnoreEDID" # [] #Option "DisplayPriority" # [] #Option "PanelSize" # [] #Option "ForceMinDotClock" # #Option "ColorTiling" # [] #Option "VideoKey" # #Option "RageTheatreCrystal" # #Option "RageTheatreTunerPort" # #Option "RageTheatreCompositePort" # #Option "RageTheatreSVideoPort" # #Option "TunerType" # #Option "RageTheatreMicrocPath" # #Option "RageTheatreMicrocType" # #Option "ScalerWidth" # #Option "RenderAccel" # [] #Option "SubPixelOrder" # [] #Option "ShowCache" # [] #Option "DynamicClocks" # [] #Option "VGAAccess" # [] #Option "ReverseDDC" # [] #Option "LVDSProbePLL" # [] #Option "AccelMethod" # #Option "DRI" # [] #Option "ConnectorTable" # #Option "DefaultConnectorTable" # [] #Option "DefaultTMDSPLL" # [] #Option "TVDACLoadDetect" # [] #Option "ForceTVOut" # [] #Option "TVStandard" # #Option "IgnoreLidStatus" # [] #Option "DefaultTVDACAdj" # [] #Option "Int10" # [] Identifier "Card0" Driver "radeon" VendorName "ATI Technologies Inc" BoardName "Radeon Mobility M7 LW [Radeon Mobility 7500]" BusID "PCI:1:0:0" # Option "AccelMethod" "EXA" # Java requires this... # Option "AccelMethod" "XAA" #Option "EXANoComposite" "false" #Option "FBTexPercent" "50" #Option "MigrationHeuristic" "greedy" Option "DRI" "true" #Option "GARTSize" "32" #Option "AGPMode" "4" #Option "Colortiling" "On" EndSection Section "Screen" Identifier "Screen0" Device "Card0" Monitor "Monitor0" SubSection "Display" Viewport 0 0 Depth 1 EndSubSection SubSection "Display" Viewport 0 0 Depth 4 EndSubSection SubSection "Display" Viewport 0 0 Depth 8 EndSubSection SubSection "Display" Viewport 0 0 Depth 15 EndSubSection SubSection "Display" Viewport 0 0 Depth 16 EndSubSection SubSection "Display" Viewport 0 0 Depth 24 EndSubSection EndSection Section "Extensions" Option "Composite" "Enable" EndSection Section "DRI" Mode 0666 EndSection --LQksG6bCIzRHxTLp Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="Xorg.0.log" Content-Transfer-Encoding: quoted-printable X.Org X Server 1.7.5 Release Date: 2010-02-16 X Protocol Version 11, Revision 0 Build Operating System: FreeBSD 8.2-PRERELEASE i386=20 Current Operating System: FreeBSD praxis.lunabase.org 8.2-PRERELEASE FreeBS= D 8.2-PRERELEASE #62: Sun Feb 6 18:02:17 PST 2011 root@praxis.lunabase= =2Eorg:/usr/obj/usr/src/sys/GENERIC i386 Build Date: 16 December 2010 09:56:25AM =20 Current version of pixman: 0.18.4 Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (=3D=3D) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (=3D=3D) Log file: "/var/log/Xorg.0.log", Time: Mon Feb 14 21:58:26 2011 (=3D=3D) Using config file: "/etc/X11/xorg.conf" (=3D=3D) ServerLayout "X.org Configured" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "Monitor0" (**) | |-->Device "Card0" (=3D=3D) Automatically adding devices (=3D=3D) Automatically enabling devices (**) FontPath set to: /usr/local/lib/X11/fonts/misc/, /usr/local/lib/X11/fonts/TTF/, /usr/local/lib/X11/fonts/OTF, /usr/local/lib/X11/fonts/Type1/, /usr/local/lib/X11/fonts/100dpi/, /usr/local/lib/X11/fonts/75dpi/, /usr/local/lib/X11/fonts/misc/, /usr/local/lib/X11/fonts/TTF/, /usr/local/lib/X11/fonts/OTF, /usr/local/lib/X11/fonts/Type1/, /usr/local/lib/X11/fonts/100dpi/, /usr/local/lib/X11/fonts/75dpi/ (**) ModulePath set to "/usr/local/lib/xorg/modules" (**) Extension "Composite" is enabled (II) Cannot locate a core pointer device. (II) Cannot locate a core keyboard device. (II) The server relies on HAL to provide the list of input devices. If no devices become available, reconfigure HAL or disable AutoAddDevices. (II) Loader magic: 0x81def20 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 6.0 X.Org XInput driver : 7.0 X.Org Server Extension : 2.0 (--) Using syscons driver with X support (version 2.0) (--) using VT number 9 (--) PCI:*(0:1:0:0) 1002:4c57:1014:0530 ATI Technologies Inc Radeon Mobilit= y M7 LW [Radeon Mobility 7500] rev 0, Mem @ 0xe0000000/134217728, 0xc010000= 0/65536, I/O @ 0x00003000/256, BIOS @ 0x????????/65536 (II) "extmod" will be loaded. This was enabled by default and also specifie= d in the config file. (II) "dbe" will be loaded. This was enabled by default and also specified i= n the config file. (II) "glx" will be loaded. This was enabled by default and also specified i= n the config file. (II) "record" will be loaded by default. (II) "dri" will be loaded. This was enabled by default and also specified i= n the config file. (II) "dri2" will be loaded by default. (II) LoadModule: "extmod" (II) Loading /usr/local/lib/xorg/modules/extensions/libextmod.so (II) Module extmod: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "dbe" (II) Loading /usr/local/lib/xorg/modules/extensions/libdbe.so (II) Module dbe: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "glx" (II) Loading /usr/local/lib/xorg/modules/extensions/libglx.so (II) Module glx: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 ABI class: X.Org Server Extension, version 2.0 (=3D=3D) AIGLX disabled (II) Loading extension GLX (II) LoadModule: "xtrap" (WW) Warning, couldn't open module xtrap (II) UnloadModule: "xtrap" (EE) Failed to load module "xtrap" (module does not exist, 0) (II) LoadModule: "dri" (II) Loading /usr/local/lib/xorg/modules/extensions/libdri.so (II) Module dri: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension XFree86-DRI (II) LoadModule: "record" (II) Loading /usr/local/lib/xorg/modules/extensions/librecord.so (II) Module record: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 2.0 (II) Loading extension RECORD (II) LoadModule: "dri2" (II) Loading /usr/local/lib/xorg/modules/extensions/libdri2.so (II) Module dri2: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.1.0 ABI class: X.Org Server Extension, version 2.0 (II) Loading extension DRI2 (II) LoadModule: "radeon" (II) Loading /usr/local/lib/xorg/modules/drivers/radeon_drv.so (II) Module radeon: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 6.13.2 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 6.0 (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI), ATI Radeon Mobility X300 (M24) 3152 (PCIE), ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI), ATI Radeon X600 (RV380) 3E50 (PCIE), ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136, ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP), ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP), ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP), ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP), ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP), ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP), ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650, ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237, ATI Radeon 8500 AIW BB (AGP), ATI Radeon 8500 AIW BC (AGP), ATI Radeon IGP320M (U1) 4336, ATI Radeon IGP330M/340M/350M (U2) 4337, ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI), ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP), ATI Radeon X800PRO (R420) JI (AGP), ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP), ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP), ATI Radeon Mobility 9800 (M18) JN (AGP), ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP), ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP), ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP), ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP), ATI Radeon Mobility M7 LW (AGP), ATI Mobility FireGL 7800 M7 LX (AGP), ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP), ATI FireGL Mobility 9000 (M9) Ld (AGP), ATI Radeon Mobility 9000 (M9) Lf (AGP), ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP), ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP), ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP), ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP), ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP), ATI Radeon Mobility 9600 (M10) NQ (AGP), ATI Radeon Mobility 9600 (M11) NR (AGP), ATI Radeon Mobility 9600 (M10) NS (AGP), ATI FireGL Mobility T2 (M10) NT (AGP), ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP), ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI), ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI), ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI), ATI Radeon Mobility X300 (M22) 5460 (PCIE), ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE), ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE), ATI Radeon X800PRO (R423) UI (PCIE), ATI Radeon X800LE (R423) UJ (PCIE), ATI Radeon X800SE (R423) UK (PCIE), ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE), ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE), ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE), ATI FireGL unknown (R423) UR (PCIE), ATI FireGL unknown (R423) UT (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility FireGL V5000 (M26) (PCIE), ATI Mobility Radeon X700 XL (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Mobility Radeon X700 (M26) (PCIE), ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834, ATI Radeon Mobility 9100 IGP (U3) 5835, ATI Radeon XPRESS 200 5954 (PCIE), ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP), ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP), ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI), ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE), ATI Radeon XPRESS 200M 5975 (PCIE), ATI Radeon XPRESS 200 5A41 (PCIE), ATI Radeon XPRESS 200M 5A42 (PCIE), ATI Radeon XPRESS 200 5A61 (PCIE), ATI Radeon XPRESS 200M 5A62 (PCIE), ATI Radeon X300 (RV370) 5B60 (PCIE), ATI Radeon X600 (RV370) 5B62 (PCIE), ATI Radeon X550 (RV370) 5B63 (PCIE), ATI FireGL V3100 (RV370) 5B64 (PCIE), ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE), ATI Radeon Mobility 9200 (M9+) 5C61 (AGP), ATI Radeon Mobility 9200 (M9+) 5C63 (AGP), ATI Mobility Radeon X800 XT (M28) (PCIE), ATI Mobility FireGL V5100 (M28) (PCIE), ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE), ATI Radeon X850 XT PE (R480) (PCIE), ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE), ATI unknown Radeon / FireGL (R480) 5D50 (PCIE), ATI Radeon X850 XT (R480) (PCIE), ATI Radeon X800XT (R423) 5D57 (PCIE), ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE), ATI Radeon X700 PRO (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE), ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800, ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800, ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300, ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505, ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL, ATI Mobility Radeon X1400, ATI Radeon X1300/X1550, ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300, ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350, ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550, ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450, ATI Radeon X1300/X1550, ATI Mobility Radeon X2300, ATI Mobility Radeon X2300, ATI Mobility Radeon X1350, ATI Mobility Radeon X1350, ATI Mobility Radeon X1450, ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350, ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600, ATI Mobility FireGL V5200, ATI Mobility Radeon X1600, ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400, ATI Mobility FireGL V5250, ATI Mobility Radeon X1700, ATI Mobility Radeon X1700 XT, ATI FireGL V5200, ATI Mobility Radeon X1700, ATI Radeon X2300HD, ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950, ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560, ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400, ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560, ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740, ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT, ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600, ATI Radeon 4800 Series, ATI Radeon HD 4870 x2, ATI Radeon 4800 Series, ATI Radeon HD 4850 x2, ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL), ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2, ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270, AMD FireStream 9250, ATI FirePro V8700 (FireGL), ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98, ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series, ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98, ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP), ATI Mobility Radeon HD 4670, ATI FirePro M5750, ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP), ATI RV730XT [Radeon HD 4670], ATI RADEON E4600, ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650], ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL), ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830, ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740, ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770, ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT, ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000, ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT, ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610, ATI FireMV 2260, ATI RV670, ATI Radeon HD3870, ATI Mobility Radeon HD 3850, ATI Radeon HD3850, ATI Mobility Radeon HD 3850 X2, ATI RV670, ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2, ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850, ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550, ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710, ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series, ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series, ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630, ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT, ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP, ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630, ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600, ATI FireGL V3600, ATI Radeon HD 2600 LE, ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470, ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series, ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430, ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450, ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series, ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO, ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO, ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670, ATI Mobility FireGL V5700, ATI Mobility FireGL V5725, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics, ATI Radeon 3000 Graphics, ATI Radeon HD 4200, ATI Radeon 4100, ATI Mobility Radeon HD 4200, ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4290, CYPRESS, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370, AMD Firestream 9350, ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series, ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series, ATI Mobility Radeon HD 5800 Series, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro (FireGL) Graphics Adapter, ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series, ATI Radeon HD 5700 Series, ATI Radeon HD 5700 Series, ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670, ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD, ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics, ATI Mobility Radeon Graphics, CEDAR, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR, ATI Radeon HD 5450, CEDAR (II) Primary Device is: PCI 01@00:00:0 (WW) VGA arbiter: cannot open kernel arbiter, no multi-card support (II) RADEON(0): TOTO SAYS 00000000c0100000 (II) RADEON(0): MMIO registers at 0x00000000c0100000: size 64KB (II) RADEON(0): PCI bus 1 card 0 func 0 (=3D=3D) RADEON(0): Depth 24, (--) framebuffer bpp 32 (II) RADEON(0): Pixel depth =3D 24 bits stored in 4 bytes (32 bpp pixmaps) (=3D=3D) RADEON(0): Default visual is TrueColor (**) RADEON(0): Option "DRI" "true" (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/local/lib/xorg/modules/libvgahw.so (II) Module vgahw: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 0.1.0 ABI class: X.Org Video Driver, version 6.0 (II) RADEON(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x= 0000 (=3D=3D) RADEON(0): RGB weight 888 (II) RADEON(0): Using 8 bits per RGB (8 bit DAC) (--) RADEON(0): Chipset: "ATI Radeon Mobility M7 LW (AGP)" (ChipID =3D 0x4c= 57) (--) RADEON(0): Linear framebuffer at 0x00000000e0000000 (II) RADEON(0): AGP card detected (II) Loading sub module "int10" (II) LoadModule: "int10" (II) Loading /usr/local/lib/xorg/modules/libint10.so (II) Module int10: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 ABI class: X.Org Video Driver, version 6.0 (II) RADEON(0): initializing int10 (=3D=3D) RADEON(0): Write-combining range (0xa0000,0x20000) was already cle= ar (=3D=3D) RADEON(0): Write-combining range (0xc0000,0x40000) was already cle= ar (II) RADEON(0): Primary V_BIOS segment is: 0xc000 (=3D=3D) RADEON(0): Write-combining range (0x0,0x1000) was already clear (II) RADEON(0): Legacy BIOS detected drmOpenDevice: node name is /dev/dri/card0 Failed to change owner or group for file /dev/dri! 2: No such file or direc= tory Failed to change owner or group for file /dev/dri/card0! 2: No such file or= directory drmOpenDevice: open result is -1, (No such file or directory) Failed to change owner or group for file /dev/dri/card0! 2: No such file or= directory drmOpenDevice: open result is -1, (No such file or directory) drmOpenDevice: Open failed drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 8, (OK) drmOpenByBusid: drmOpenMinor returns 8 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) RADEON(0): [dri] Found DRI library version 1.3.0 and kernel module ver= sion 1.31.0 (=3D=3D) RADEON(0): Page Flipping disabled (II) RADEON(0): Will try to use DMA for Xv image transfers (II) RADEON(0): Detected total video RAM=3D32768K, accessible=3D65536K (PCI= BAR=3D131072K) (--) RADEON(0): Mapped VideoRAM: 32768 kByte (64 bit DDR SDRAM) (II) RADEON(0): Color tiling enabled by default (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) RADEON(0): ref_freq: 2700, min_out_pll: 12000, max_out_pll: 35000, min= _in_pll: 40, max_in_pll: 3000, xclk: 18300, sclk: 260.000000, mclk: 183.000= 000 (II) RADEON(0): PLL parameters: rf=3D2700 rd=3D12 min=3D12000 max=3D35000; = xclk=3D18300 (II) RADEON(0): DFP table revision: 2 (II) RADEON(0): Panel ID string: 1024x768 =20 (II) RADEON(0): Panel Size from BIOS: 1024x768 (II) RADEON(0): BIOS provided dividers will be used. (WW) RADEON(0): LVDS Info: XRes: 1024, YRes: 768, DotClock: 65000 HBlank: 320, HOverPlus: 16, HSyncWidth: 136 VBlank: 38, VOverPlus: 2, VSyncWidth: 6 (II) RADEON(0): Output VGA-0 using monitor section Monitor0 (II) RADEON(0): I2C bus "VGA-0" initialized. (II) RADEON(0): Output DVI-0 has no monitor section (II) RADEON(0): I2C bus "DVI-0" initialized. (II) RADEON(0): Output LVDS has no monitor section (II) RADEON(0): Output S-video has no monitor section (II) RADEON(0): Default TV standard: NTSC (II) RADEON(0): TV standards supported by chip: NTSC PAL NTSC-J=20 (II) RADEON(0): Port0: XRANDR name: VGA-0 Connector: VGA CRT1: INTERNAL_DAC1 DDC reg: 0x60 (II) RADEON(0): Port1: XRANDR name: DVI-0 Connector: DVI-D DFP1: INTERNAL_TMDS1 DDC reg: 0x64 (II) RADEON(0): Port2: XRANDR name: LVDS Connector: LVDS LCD1: INTERNAL_LVDS DDC reg: 0x0 (II) RADEON(0): Port3: XRANDR name: S-video Connector: S-video TV1: INTERNAL_DAC2 DDC reg: 0x0 (II) RADEON(0): I2C device "VGA-0:ddc2" registered at address 0xA0. (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 finished output detect: 0 (II) RADEON(0): I2C device "DVI-0:ddc2" registered at address 0xA0. (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 finished output detect: 1 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 finished output detect: 2 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 finished output detect: 3 finished all detect (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output VGA-0 disconnected (II) RADEON(0): Output DVI-0 disconnected (II) RADEON(0): Output LVDS connected (II) RADEON(0): Output S-video disconnected (II) RADEON(0): Using exact sizes for initial modes (II) RADEON(0): Output LVDS using initial mode 1024x768 (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise sta= ted. (=3D=3D) RADEON(0): DPI set to (96, 96) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/local/lib/xorg/modules/libfb.so (II) Module fb: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (=3D=3D) RADEON(0): Using XAA acceleration architecture (II) Loading sub module "xaa" (II) LoadModule: "xaa" (II) Loading /usr/local/lib/xorg/modules/libxaa.so (II) Module xaa: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.2.1 ABI class: X.Org Video Driver, version 6.0 (=3D=3D) RADEON(0): Assuming overlay scaler buffer width is 1536 (II) RADEON(0): No MM_TABLE found - assuming CARD is not TV-in capable. (=3D=3D) RADEON(0): Write-combining range (0x0,0x1000) was already clear (!!) RADEON(0): MergedFB support has been removed and replaced with xrandr = 1.2 support (--) Depth 24 pixmap format is 32 bpp (II) RADEON(0): RADEONScreenInit e0000000 0 0 (=3D=3D) RADEON(0): Write-combining range (0xa0000,0x10000) was already cle= ar Entering TV Save Save TV timing tables saveTimingTables: reading timing tables TV Save done (II) RADEON(0): Dynamic Power Management Disabled (=3D=3D) RADEON(0): Using 24 bit depth buffer (II) RADEON(0): RADEONInitMemoryMap() :=20 (II) RADEON(0): mem_size : 0x04000000 (II) RADEON(0): MC_FB_LOCATION : 0xe3ffe000 (II) RADEON(0): MC_AGP_LOCATION : 0xffffffc0 (II) RADEON(0): Depth moves disabled by default (II) RADEON(0): Using 8 MB GART aperture (II) RADEON(0): Using 1 MB for the ring buffer (II) RADEON(0): Using 2 MB for vertex/indirect buffers (II) RADEON(0): Using 5 MB for GART textures (II) RADEON(0): Memory manager initialized to (0,0) (1024,8191) (II) RADEON(0): Reserved area from (0,1024) to (1024,1026) (II) RADEON(0): Largest offscreen area available: 1024 x 7165 (II) RADEON(0): Will use front buffer at offset 0x0 (II) RADEON(0): Will use back buffer at offset 0x800000 (II) RADEON(0): Will use depth buffer at offset 0xc00000 (II) RADEON(0): Will use 16384 kb for textures at offset 0x1000000 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 8, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 8, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 8, (OK) drmOpenByBusid: drmOpenMinor returns 8 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) [drm] DRM interface version 1.2 (II) [drm] DRM open master succeeded. (II) RADEON(0): [drm] Using the DRM lock SAREA also for drawables. (II) RADEON(0): [drm] framebuffer handle =3D 0xe0000000 (II) RADEON(0): [drm] added 1 reserved context for kernel (II) RADEON(0): X context handle =3D 0x1 (II) RADEON(0): [drm] installed DRM signal handler (=3D=3D) RADEON(0): Using AGP 4x (II) RADEON(0): [agp] Mode 0x1f000207 [AGP 0x0000/0x0000; Card 0x1002/0x4c5= 7 0x1014/0x0530] (II) RADEON(0): [agp] 8192 kB allocated with handle 0xc5e14540 (II) RADEON(0): [agp] ring handle =3D 0xd0000000 (II) RADEON(0): [agp] Ring mapped at 0x28ab0000 (II) RADEON(0): [agp] ring read ptr handle =3D 0xd0101000 (II) RADEON(0): [agp] Ring read ptr mapped at 0x286ff000 (II) RADEON(0): [agp] vertex/indirect buffers handle =3D 0xd0102000 (II) RADEON(0): [agp] Vertex/indirect buffers mapped at 0x2ac00000 (II) RADEON(0): [agp] GART texture map handle =3D 0xd0302000 (II) RADEON(0): [agp] GART Texture map mapped at 0x2ae00000 (II) RADEON(0): [drm] register handle =3D 0xc0100000 (II) RADEON(0): [dri] Visual configs initialized (II) RADEON(0): RADEONRestoreMemMapRegisters() :=20 (II) RADEON(0): MC_FB_LOCATION : 0xe3ffe000 0x1fff0000 (II) RADEON(0): MC_AGP_LOCATION : 0xffffffc0 (=3D=3D) RADEON(0): Backing store disabled (II) RADEON(0): [DRI] installation complete (II) RADEON(0): [drm] Added 32 65536 byte vertex/indirect buffers (II) RADEON(0): [drm] Mapped 32 vertex/indirect buffers (II) RADEON(0): [drm] dma control initialized, using IRQ 11 (II) RADEON(0): [drm] Initialized kernel GART heap manager, 5111808 (WW) RADEON(0): DRI init changed memory map, adjusting ... (WW) RADEON(0): MC_FB_LOCATION was: 0xe3ffe000 is: 0xe3ffe000 (WW) RADEON(0): MC_AGP_LOCATION was: 0xffffffc0 is: 0xd07fd000 (II) RADEON(0): RADEONRestoreMemMapRegisters() :=20 (II) RADEON(0): MC_FB_LOCATION : 0xe3ffe000 0xe3ffe000 (II) RADEON(0): MC_AGP_LOCATION : 0xd07fd000 (II) RADEON(0): Direct rendering enabled (II) RADEON(0): Render acceleration disabled (II) RADEON(0): Using XFree86 Acceleration Architecture (XAA) Screen to screen bit blits Solid filled rectangles 8x8 mono pattern filled rectangles Indirect CPU to Screen color expansion Solid Lines Scanline Image Writes Setting up tile and stipple cache: 32 128x128 slots 32 256x256 slots 16 512x512 slots (II) RADEON(0): Acceleration enabled (=3D=3D) RADEON(0): DPMS enabled (=3D=3D) RADEON(0): Silken mouse enabled (II) RADEON(0): Will use 32 kb for hardware cursor 0 at offset 0x00402000 (II) RADEON(0): Will use 32 kb for hardware cursor 1 at offset 0x00406000 (II) RADEON(0): Largest offscreen area available: 1024 x 7157 (II) RADEON(0): Detected Radeon Mobility M7, disabling multimedia i2c (II) Loading sub module "theatre_detect" (II) LoadModule: "theatre_detect" (II) Loading /usr/local/lib/xorg/modules/multimedia/theatre_detect_drv.so (II) Module theatre_detect: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.0.0 ABI class: X.Org Video Driver, version 6.0 (II) RADEON(0): no multimedia table present, disabling Rage Theatre. (II) RADEON(0): Set up overlay video (II) RADEON(0): Set up textured video disable primary dac disable FP1 disable TV init memmap init common init crtc1 init pll1 restore memmap (II) RADEON(0): RADEONRestoreMemMapRegisters() :=20 (II) RADEON(0): MC_FB_LOCATION : 0xe3ffe000 0xe3ffe000 (II) RADEON(0): MC_AGP_LOCATION : 0xd07fd000 restore common restore crtc1 restore pll1 set RMX set LVDS enable LVDS disable primary dac disable FP1 disable TV (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled mess= age. (--) RandR disabled (II) Initializing built-in extension Generic Event Extension (II) Initializing built-in extension SHAPE (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension BIG-REQUESTS (II) Initializing built-in extension SYNC (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-MISC (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE record: RECORD extension enabled at configure time. record: This extension is known to be broken, disabling extension now.. record: http://bugs.freedesktop.org/show_bug.cgi?id=3D20500 (II) AIGLX: Loaded and initialized /usr/local/lib/dri/swrast_dri.so (II) GLX: Initialized DRISWRAST GL provider for screen 0 (II) RADEON(0): Setting screen physical size to 270 x 203 (II) config/hal: Adding input device AT Keyboard (II) LoadModule: "kbd" (II) Loading /usr/local/lib/xorg/modules/input/kbd_drv.so (II) Module kbd: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.4.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 7.0 (**) AT Keyboard: always reports core events (**) Option "Protocol" "standard" (**) AT Keyboard: Protocol: standard (**) Option "XkbRules" "base" (**) AT Keyboard: XkbRules: "base" (**) Option "XkbModel" "pc105" (**) AT Keyboard: XkbModel: "pc105" (**) Option "XkbLayout" "us" (**) AT Keyboard: XkbLayout: "us" (**) Option "CustomKeycodes" "off" (**) AT Keyboard: CustomKeycodes disabled (II) XINPUT: Adding extended input device "AT Keyboard" (type: KEYBOARD) (II) config/hal: Adding input device PS/2 Mouse (II) LoadModule: "mouse" (II) Loading /usr/local/lib/xorg/modules/input/mouse_drv.so (II) Module mouse: vendor=3D"X.Org Foundation" compiled for 1.7.5, module version =3D 1.5.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 7.0 (**) PS/2 Mouse: Device: "/dev/sysmouse" (=3D=3D) PS/2 Mouse: Protocol: "Auto" (**) PS/2 Mouse: always reports core events (**) Option "Device" "/dev/sysmouse" (=3D=3D) PS/2 Mouse: Emulate3Buttons, Emulate3Timeout: 50 (**) PS/2 Mouse: ZAxisMapping: buttons 4 and 5 (**) PS/2 Mouse: Buttons: 9 (**) PS/2 Mouse: Sensitivity: 1 (II) XINPUT: Adding extended input device "PS/2 Mouse" (type: MOUSE) (**) PS/2 Mouse: (accel) keeping acceleration scheme 1 (**) PS/2 Mouse: (accel) acceleration profile 0 (II) PS/2 Mouse: SetupAuto: hw.iftype is 4, hw.model is 0 (II) PS/2 Mouse: SetupAuto: protocol is SysMouse (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) RADEON(0): Output: VGA-0, Detected Monitor Type: 0 (II) RADEON(0): Output: DVI-0, Detected Monitor Type: 0 (II) RADEON(0): Output: LVDS, Detected Monitor Type: 2 (II) RADEON(0): Added native panel mode: 1024x768 (II) RADEON(0): Output: S-video, Detected Monitor Type: 0 (II) 3rd Button detected: disabling emulate3Button --LQksG6bCIzRHxTLp-- --BwCQnh7xodEAoBMC Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iD8DBQFNWhc4aUz3f+Zf+XsRAn2fAJ0f9rp2FiTZDTKjwVmxxzMZA5GEKwCfTV5B 5j9YK9w665qpaG33VxwEzuw= =2iOu -----END PGP SIGNATURE----- --BwCQnh7xodEAoBMC-- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 06:40:02 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9053A1065674 for ; Tue, 15 Feb 2011 06:40:02 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 48DD18FC16 for ; Tue, 15 Feb 2011 06:40:01 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1F6e1mm014142; Mon, 14 Feb 2011 23:40:01 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1F6e1Mk014139; Mon, 14 Feb 2011 23:40:01 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Mon, 14 Feb 2011 23:40:01 -0700 (MST) From: Warren Block To: Ted Faber In-Reply-To: <20110215060336.GA1817@zod.isi.edu> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <20110215060336.GA1817@zod.isi.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; format=flowed; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Mon, 14 Feb 2011 23:40:01 -0700 (MST) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 06:40:02 -0000 On Mon, 14 Feb 2011, Ted Faber wrote: > On Mon, Feb 14, 2011 at 08:58:31PM -0700, Warren Block wrote: >> Updated the T42 tonight, which has the same video. -STABLE as of today, >> all ports updated as of today, and it seems fine. At least no lock up >> on restarting X or shutting down. Your xorg.conf had some interesting >> things, including XAA acceleration, which I didn't notice before. >> Here's the one from this machine, comments stripped. Composite enabled >> does not provide composite, but otherwise no problems noticed: > > I tried that xorg.conf, and still got the lockups. The acceleration was > less effective as well. EXA is what it picks by default, and I did find that composite works now. The ChipID matches yours, 0x4c57. The BIOS on this system is 3.23 (1RETDRWW), it has 1.5G of RAM. I have dbus, hal, and moused enabled in rc.conf. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 08:17:01 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0A2081065670 for ; Tue, 15 Feb 2011 08:17:01 +0000 (UTC) (envelope-from ohartman@mail.zedat.fu-berlin.de) Received: from outpost1.zedat.fu-berlin.de (outpost1.zedat.fu-berlin.de [130.133.4.66]) by mx1.freebsd.org (Postfix) with ESMTP id B962F8FC19 for ; Tue, 15 Feb 2011 08:17:00 +0000 (UTC) Received: from inpost2.zedat.fu-berlin.de ([130.133.4.69]) by outpost1.zedat.fu-berlin.de (Exim 4.69) with esmtp (envelope-from ) id <1PpFnM-0006Ej-1k>; Tue, 15 Feb 2011 08:58:00 +0100 Received: from e178020229.adsl.alicedsl.de ([85.178.20.229] helo=thor.walstatt.dyndns.org) by inpost2.zedat.fu-berlin.de (Exim 4.69) with esmtpsa (envelope-from ) id <1PpFnL-0003br-V3>; Tue, 15 Feb 2011 08:58:00 +0100 Message-ID: <4D5A3207.1090302@mail.zedat.fu-berlin.de> Date: Tue, 15 Feb 2011 08:57:59 +0100 From: "O. Hartmann" User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20110212 Lightning/1.0b2 Thunderbird/3.1.7 MIME-Version: 1.0 To: Ted Faber References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> In-Reply-To: <20110214182159.GB47006@zod.isi.edu> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: 85.178.20.229 Cc: freebsd-stable@freebsd.org, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 08:17:01 -0000 On 02/14/11 19:21, Ted Faber wrote: > On Fri, Feb 11, 2011 at 10:52:43PM -0800, Chris H wrote: >> I noticed a potential issue in the output of your attached Xorg.conf. > > Can you tell me what looked fishy? I'm happy to poke it it. > >> Bottom line (for me anyway) has been that if I disable hald(8), I have nearly >> no (video related) issues. This is both on x86&& amd64 systems. > > When I turn off hald, X xan no longer find the mouse and keyboard. I > can probably hard wire them down, but I get the impression that lots of > other gnome-ish things will get confused w/o hald. > I have a same issue on two different boxes with three different AMD HD4XXX graphics boards and radeon/radeonhd driver (running FBSD 9.0-CUR, 8.1 and 8.2-STABLE, all mad64). I reported this phenomenon here, it is still present. With HALD and DBUS enabled and an automatic generated xorg.conf file only HD4830 works, but it locks up/freezes the box when exiting Xorg/xdm. With HD4770 and HD4670, only hardwiring keyboard and mouse, disabling HALD and DBUS works, otherwise the Xorg server freezes the box immediately after starting. Also, with the hardwireddown xorg.conf file, exiting a session/resetting Xorg renders the box frozen. Oliver From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 09:23:22 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4FB4C106564A for ; Tue, 15 Feb 2011 09:23:22 +0000 (UTC) (envelope-from chris#@1command.com) Received: from mail.1command.com (mail.1command.com [168.103.150.6]) by mx1.freebsd.org (Postfix) with ESMTP id 8A3068FC16 for ; Tue, 15 Feb 2011 09:23:21 +0000 (UTC) Received: from webmail.1command.com (localhost.1command.com [127.0.0.1]) by mail.1command.com (8.13.3/8.13.3) with ESMTP id p1F9MgLU097454; Tue, 15 Feb 2011 01:22:48 -0800 (PST) (envelope-from chris#@1command.com) Received: from udns0.ultimatedns.net ([168.103.150.26]) (Local authenticated user inf0s) by webmail.1command.com with HTTP; Tue, 15 Feb 2011 01:23:19 -0800 (PST) Message-ID: <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> In-Reply-To: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> Date: Tue, 15 Feb 2011 01:23:19 -0800 (PST) From: "Chris H" To: freebsd-stable@freebsd.org User-Agent: HRC Internet Messaging/1.5.2 [SVN] MIME-Version: 1.0 Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: 8bit Cc: wblock@wonkity.com, faber@isi.edu Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 09:23:22 -0000 On Mon, February 14, 2011 2:35 pm, Warren Block wrote: > On Mon, 14 Feb 2011, Chris H wrote: > > >> I'm /not/ on a GENERIC kernel, but here are some relevant pieces from >> my setup that might help; rc.conf(5) hald_enable="NO" dbus_enable="YES" > > Half a dozen machines here (roughly, it varies) say that hal is fine. > One of those machines is a T42, but needs updating to the latest > 8-stable. Apparently I put the significant files on the FLCL site a > while back: > http://laptop.bsdgroup.de/freebsd/index.html?action=show_laptop_detail&laptop=1 > 2947 > > >> xorg.conf(5) Section "ServerLayout" >> Identifier "X.org Configured" >> ... >> InputDevice "Mouse0" "CorePointer" >> InputDevice "Keyboard0" "CoreKeyboard" >> >> >> Section "ServerFlags" >> Option "AllowEmptyInput" "false" >> > > No, please stop doing that. See > http://www.wonkity.com/~wblock/docs/html/aei.html > > >> Option "AutoAddDevices" "true" >> Option "AutoEnableDevices" "true" >> > > These are defaults. > > >> OH, one other thing that comes to mind; >> Did you let Xorg(1) create your xorg.conf(8) file? and if so (you /should/ >> have), what was the output? Again, if so, is that the conf file you're using >> now? > > Sorry, must disagree with that. -configure creates outmoded xorg.conf > files, with older options that are either no longer needed or outright obsolete. > It also leaves out useful settings. So basically, Your saying it's all a "crap shoot", a "roll of the dice". The rule is; there is no rule. RTFM does not apply here. I was only speaking from my own experiences with this same problem. I own, and operate 30 FreeBSD boxes here. They range from 7.x-8.x, with the exception of 1 6.x. This problem began at RELENG_7 for me. I wrestled with it for quite some time - much of it on this mailing list. The only consistent thing I could find, was that DISabling hald(8) eliminated most of the issues I ran into. I discovered this was the same for many others, while reading about others with similar problems on the nVidia/ATI news forums. In fact the same consensus was had on the freebsd forums as well. As far as the Xorg(1) -configure goes. It's interesting that when I choose nvidia-xconfig to create the xorg.conf(5) file, with the exception of the additional nVidia specific options added, the rest looks nearly identical to those produced by Xorg(1) -configure. Well, that's how it all works out for me. Just thought I'd mention it. --Chris > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > > -- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 10:08:55 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DF62C106566B for ; Tue, 15 Feb 2011 10:08:55 +0000 (UTC) (envelope-from egrosbein@rdtc.ru) Received: from eg.sd.rdtc.ru (eg.sd.rdtc.ru [62.231.161.221]) by mx1.freebsd.org (Postfix) with ESMTP id 4DA018FC18 for ; Tue, 15 Feb 2011 10:08:54 +0000 (UTC) Received: from eg.sd.rdtc.ru (localhost [127.0.0.1]) by eg.sd.rdtc.ru (8.14.4/8.14.4) with ESMTP id p1FA8qbl045759 for ; Tue, 15 Feb 2011 16:08:52 +0600 (NOVT) (envelope-from egrosbein@rdtc.ru) Message-ID: <4D5A50AF.9040409@rdtc.ru> Date: Tue, 15 Feb 2011 16:08:47 +0600 From: Eugene Grosbein User-Agent: Mozilla/5.0 (X11; U; FreeBSD i386; ru-RU; rv:1.9.2.13) Gecko/20110112 Thunderbird/3.1.7 MIME-Version: 1.0 To: stable@freebsd.org Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: Subject: System does not boot without console X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 10:08:56 -0000 Hi! I have ASUS P7H55 (no integrated video) motherboard that boots FreeBSD 8.2-PRERELEASE just fine even when I do not plug any video card in its PCIEx16 slot. System boots and works just fine without video and keyboard but with default /boot/device.hints only. It does NOT boot if I make the change: --- /boot/device.hints.orig 2011-02-15 15:58:11.000000000 +0600 +++ /boot/device.hints 2011-02-15 15:58:17.000000000 +0600 @@ -25,7 +25,7 @@ hint.apm.0.flags="0x20" hint.uart.0.at="isa" hint.uart.0.port="0x3F8" -hint.uart.0.flags="0x10" +hint.uart.0.flags="0x0" hint.uart.0.irq="4" hint.uart.1.at="isa" hint.uart.1.port="0x2F8" If I power the box down thereafter, insert video card and boot it again, it boots and I see it did not mount root file system, it's clean. Normally it takes a munute to boot this system and I waited for hours to test. It does not boot without video card if I additionally write "-m" (without quotes) to /boot.config and "console=nullconsole" to /boot/loader.conf Is it supposed behavour? Motivation: I need the only PCIEx16 slot for Intel dualport gigabit ethernet network adapter and want to have common NanoBSD image for boxes like this and other boxes having IPMI card and want to have hint.uart.2.flags="0x10" in /boot/loader.conf Eugene Grosbein From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 13:56:29 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 46DD4106564A for ; Tue, 15 Feb 2011 13:56:29 +0000 (UTC) (envelope-from avg@freebsd.org) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id 8B3A38FC0C for ; Tue, 15 Feb 2011 13:56:28 +0000 (UTC) Received: from odyssey.starpoint.kiev.ua (alpha-e.starpoint.kiev.ua [212.40.38.101]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id PAA19884; Tue, 15 Feb 2011 15:38:31 +0200 (EET) (envelope-from avg@freebsd.org) Message-ID: <4D5A81D7.4080905@freebsd.org> Date: Tue, 15 Feb 2011 15:38:31 +0200 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20101213 Lightning/1.0b2 Thunderbird/3.1.7 MIME-Version: 1.0 To: Bartosz Stec References: <4D401192.3030400@it4pro.pl> <201101261235.56856.jhb@freebsd.org> <20110126180402.GA17271@tolstoy.tols.org> <201101261344.50756.jhb@freebsd.org> <4D40C355.6070306@it4pro.pl> <20110127032142.GA19946@icarus.home.lan> <4D417931.1060009@it4pro.pl> <4D429C71.6000100@it4pro.pl> In-Reply-To: <4D429C71.6000100@it4pro.pl> X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: freebsd-stable@freebsd.org Subject: Re: top shows only part of available physmem X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 13:56:29 -0000 on 28/01/2011 12:37 Bartosz Stec said the following: > Day 2 after reboot: > Mem: 100M Active, 415M Inact, 969M Wired, 83M Cache, 199M Buf, 21M Free > Sum: 1588MB > 1/4 of total RAM disappeared already. > Anyone knows what possibly happening here or maybe I should hire some voodoo > shaman to expel memory-eating-ghost from the machine ;)? Bartosz, just in case, have you noticed a separate (later) discussion of this issue and its (relatively recent) resolution by Kostik Belousov (kib@)? -- Andriy Gapon From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 14:31:41 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DC8BB106566B for ; Tue, 15 Feb 2011 14:31:41 +0000 (UTC) (envelope-from roberto@keltia.freenix.fr) Received: from keltia.net (centre.keltia.net [IPv6:2a01:240:fe5c::41]) by mx1.freebsd.org (Postfix) with ESMTP id 871E98FC12 for ; Tue, 15 Feb 2011 14:31:41 +0000 (UTC) Received: from roberto-al.eurocontrol.fr (aran.keltia.net [88.191.250.24]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: roberto) by keltia.net (Postfix/TLS) with ESMTPSA id E5F58A8EE for ; Tue, 15 Feb 2011 15:31:39 +0100 (CET) Date: Tue, 15 Feb 2011 15:31:37 +0100 From: Ollivier Robert To: freebsd-stable@freebsd.org Message-ID: <20110215143137.GB12068@roberto-al.eurocontrol.fr> References: <4D4F4544.3010606@csub.edu> <20110207045802.GB15568@icarus.home.lan> <4D4F8E34.7030904@FreeBSD.org> <4D4F927C.7040103@csub.edu> <20110210224703.GB57818@lonrach.keltia.net> <44cfde0a1632dfe8d5684c35929c3252.HRCIM@webmail.1command.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <44cfde0a1632dfe8d5684c35929c3252.HRCIM@webmail.1command.com> X-Operating-System: MacOS X / Macbook Pro - FreeBSD 7.2 / Dell D820 SMP User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.3 (keltia.net); Tue, 15 Feb 2011 15:31:40 +0100 (CET) Subject: Re: bind 9.6.2 dnssec validation bug X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 14:31:42 -0000 According to Chris H: > Unless you need/allow recursion for your internal || stealth || seconds/slaves > > In fact, that's the _only_ reason I haven't already switched to unbound. I must be missing something, you can restrict/allow recursion. -- Ollivier ROBERT -=- FreeBSD: The Power to Serve! -=- roberto@keltia.net In memoriam to Ondine, our 2nd child: http://ondine.keltia.net/ From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 14:34:10 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 81B46106566C for ; Tue, 15 Feb 2011 14:34:10 +0000 (UTC) (envelope-from spawk@acm.poly.edu) Received: from acm.poly.edu (acm.poly.edu [128.238.9.200]) by mx1.freebsd.org (Postfix) with ESMTP id 34C7B8FC0C for ; Tue, 15 Feb 2011 14:34:09 +0000 (UTC) Received: (qmail 54356 invoked from network); 15 Feb 2011 14:34:09 -0000 Received: from unknown (HELO ?192.168.1.144?) (spawk@66.206.120.2) by acm.poly.edu with CAMELLIA256-SHA encrypted SMTP; 15 Feb 2011 14:34:09 -0000 Message-ID: <4D5A8EE3.7050207@acm.poly.edu> Date: Tue, 15 Feb 2011 09:34:11 -0500 From: Boris Kochergin User-Agent: Mozilla/5.0 (X11; U; FreeBSD i386; en-US; rv:1.9.2.12) Gecko/20101106 Thunderbird/3.1.6 MIME-Version: 1.0 To: Chris H References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> In-Reply-To: <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: wblock@wonkity.com, faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 14:34:10 -0000 On 02/15/11 04:23, Chris H wrote: > On Mon, February 14, 2011 2:35 pm, Warren Block wrote: >> On Mon, 14 Feb 2011, Chris H wrote: >> >> >>> I'm /not/ on a GENERIC kernel, but here are some relevant pieces from >>> my setup that might help; rc.conf(5) hald_enable="NO" dbus_enable="YES" >> Half a dozen machines here (roughly, it varies) say that hal is fine. >> One of those machines is a T42, but needs updating to the latest >> 8-stable. Apparently I put the significant files on the FLCL site a >> while back: >> http://laptop.bsdgroup.de/freebsd/index.html?action=show_laptop_detail&laptop=1 >> 2947 >> >> >>> xorg.conf(5) Section "ServerLayout" >>> Identifier "X.org Configured" >>> ... >>> InputDevice "Mouse0" "CorePointer" >>> InputDevice "Keyboard0" "CoreKeyboard" >>> >>> >>> Section "ServerFlags" >>> Option "AllowEmptyInput" "false" >>> >> No, please stop doing that. See >> http://www.wonkity.com/~wblock/docs/html/aei.html >> >> >>> Option "AutoAddDevices" "true" >>> Option "AutoEnableDevices" "true" >>> >> These are defaults. >> >> >>> OH, one other thing that comes to mind; >>> Did you let Xorg(1) create your xorg.conf(8) file? and if so (you /should/ >>> have), what was the output? Again, if so, is that the conf file you're using >>> now? >> Sorry, must disagree with that. -configure creates outmoded xorg.conf >> files, with older options that are either no longer needed or outright obsolete. >> It also leaves out useful settings. > So basically, Your saying it's all a "crap shoot", a "roll of the dice". > The rule is; there is no rule. RTFM does not apply here. > > I was only speaking from my own experiences with this same problem. > I own, and operate 30 FreeBSD boxes here. They range from 7.x-8.x, with the > exception of 1 6.x. This problem began at RELENG_7 for me. I wrestled with > it for quite some time - much of it on this mailing list. The only consistent > thing I could find, was that DISabling hald(8) eliminated most of the issues > I ran into. I discovered this was the same for many others, while reading > about others with similar problems on the nVidia/ATI news forums. In fact > the same consensus was had on the freebsd forums as well. As far as the > Xorg(1) -configure goes. It's interesting that when I choose nvidia-xconfig > to create the xorg.conf(5) file, with the exception of the additional > nVidia specific options added, the rest looks nearly identical to those > produced by Xorg(1) -configure. > > Well, that's how it all works out for me. > Just thought I'd mention it. > > --Chris Ahoy. Just thought I'd add what I've observed about the problem. Back when I first encountered it on a T42, in the 7.x or 8.x days, it would manifest itself reliably on X shutdown, but only when X was shut down for the second time since the machine had been booted (ditching the ATI driver in favor of VESA was a workaround). Nowadays, on T40s and T42s running -CURRENT, it is sporadic, but much more frequent when the laptops are running on battery as opposed to AC power. Whether or not HAL is present doesn't seem to affect it. -Boris From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 15:09:23 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0B6F1106564A for ; Tue, 15 Feb 2011 15:09:23 +0000 (UTC) (envelope-from roberto@keltia.freenix.fr) Received: from keltia.net (centre.keltia.net [IPv6:2a01:240:fe5c::41]) by mx1.freebsd.org (Postfix) with ESMTP id A87938FC1D for ; Tue, 15 Feb 2011 15:09:22 +0000 (UTC) Received: from roberto-al.eurocontrol.fr (aran.keltia.net [88.191.250.24]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: roberto) by keltia.net (Postfix/TLS) with ESMTPSA id AA79EA939 for ; Tue, 15 Feb 2011 16:09:21 +0100 (CET) Date: Tue, 15 Feb 2011 16:09:19 +0100 From: Ollivier Robert To: freebsd-stable@freebsd.org Message-ID: <20110215150919.GC12068@roberto-al.eurocontrol.fr> References: <1297026074.23922.8.camel@ubuntu> <20110207045501.GA15568@icarus.home.lan> <1297065041.754.12.camel@ubuntu> <20110207085537.GA20545@icarus.home.lan> <6E948342-DEFF-4DEB-B0DC-990B647549EB@punkt.de> <16407D66-5303-4FF1-85D1-9372B4135C5A@punkt.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <16407D66-5303-4FF1-85D1-9372B4135C5A@punkt.de> X-Operating-System: MacOS X / Macbook Pro - FreeBSD 7.2 / Dell D820 SMP User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.3 (keltia.net); Tue, 15 Feb 2011 16:09:21 +0100 (CET) Subject: Re: 8.1 amd64 lockup (maybe zfs or disk related) X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 15:09:23 -0000 According to Patrick M. Hausen: > And with the very same settings on our bigger backup box I really need to > improve performance somehow. We are backing up >50 hosts nightly with > Amanda. I got from this post that I definitely should increase memory on > this machine: The rule of thumb I saw on the opensolaris lists back a year or two was that you need approx. one GB of RAM per TB of data. Now, if you have a high I/O rate, the more you have is better. -- Ollivier ROBERT -=- FreeBSD: The Power to Serve! -=- roberto@keltia.net In memoriam to Ondine, our 2nd child: http://ondine.keltia.net/ From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 16:08:50 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id ABBB2106566C for ; Tue, 15 Feb 2011 16:08:50 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 4DBB98FC08 for ; Tue, 15 Feb 2011 16:08:49 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1FG8guZ016184; Tue, 15 Feb 2011 09:08:42 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1FG8gFf016181; Tue, 15 Feb 2011 09:08:42 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Tue, 15 Feb 2011 09:08:42 -0700 (MST) From: Warren Block To: Chris H In-Reply-To: <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Tue, 15 Feb 2011 09:08:42 -0700 (MST) Cc: faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 16:08:50 -0000 On Tue, 15 Feb 2011, Chris H wrote: > On Mon, February 14, 2011 2:35 pm, Warren Block wrote: >> On Mon, 14 Feb 2011, Chris H wrote: >> >>> OH, one other thing that comes to mind; >>> Did you let Xorg(1) create your xorg.conf(8) file? and if so (you /should/ >>> have), what was the output? Again, if so, is that the conf file you're using >>> now? >> >> Sorry, must disagree with that. -configure creates outmoded xorg.conf >> files, with older options that are either no longer needed or outright obsolete. >> It also leaves out useful settings. > So basically, Your saying it's all a "crap shoot", a "roll of the dice". > The rule is; there is no rule. RTFM does not apply here. No, I did not say or mean to imply any of that. To be specific, I would like to see the -configure option rewritten to only generate an entry for a 24-bit depth, and to not include all the modules it loads by default anyway. That is generally useless stuff that obscures the more important entries. > I was only speaking from my own experiences with this same problem. > I own, and operate 30 FreeBSD boxes here. They range from 7.x-8.x, with the > exception of 1 6.x. This problem began at RELENG_7 for me. I wrestled with > it for quite some time - much of it on this mailing list. The only consistent > thing I could find, was that DISabling hald(8) eliminated most of the issues > I ran into. I discovered this was the same for many others, while reading > about others with similar problems on the nVidia/ATI news forums. In fact > the same consensus was had on the freebsd forums as well. There are people who have difficulty with hal, and a much larger number who dislike it. I'd contend that problems with hal are not very widespread, or there would be a call for the Handbook X11 configuration section to change. > As far as the Xorg(1) -configure goes. It's interesting that when I > choose nvidia-xconfig to create the xorg.conf(5) file, with the > exception of the additional nVidia specific options added, the rest > looks nearly identical to those produced by Xorg(1) -configure. They probably followed the original as an example. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 16:17:54 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8AB73106566C for ; Tue, 15 Feb 2011 16:17:54 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 4711A8FC13 for ; Tue, 15 Feb 2011 16:17:53 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1FGHfhT016214; Tue, 15 Feb 2011 09:17:41 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1FGHfTw016211; Tue, 15 Feb 2011 09:17:41 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Tue, 15 Feb 2011 09:17:41 -0700 (MST) From: Warren Block To: Boris Kochergin In-Reply-To: <4D5A8EE3.7050207@acm.poly.edu> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <4D5A8EE3.7050207@acm.poly.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Tue, 15 Feb 2011 09:17:41 -0700 (MST) Cc: freebsd-stable@freebsd.org, faber@isi.edu, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 16:17:54 -0000 On Tue, 15 Feb 2011, Boris Kochergin wrote: > > Ahoy. Just thought I'd add what I've observed about the problem. Back when I > first encountered it on a T42, in the 7.x or 8.x days, it would manifest > itself reliably on X shutdown, but only when X was shut down for the second > time since the machine had been booted (ditching the ATI driver in favor of > VESA was a workaround). Nowadays, on T40s and T42s running -CURRENT, it is > sporadic, but much more frequent when the laptops are running on battery as > opposed to AC power. Whether or not HAL is present doesn't seem to affect it. Maybe ACPI related. I haven't seen the problem at all (ever, that I can recall), but haven't been testing on battery. Still using xf86-video-ati-6.13.2 on this one, but the new 6.14.0 might make a difference. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 17:16:05 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A35C4106566B for ; Tue, 15 Feb 2011 17:16:05 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id 881C68FC1D for ; Tue, 15 Feb 2011 17:16:05 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1FHG4L7071771; Tue, 15 Feb 2011 09:16:04 -0800 (PST) (envelope-from faber@isi.edu) Date: Tue, 15 Feb 2011 09:15:57 -0800 From: Ted Faber To: Warren Block Message-ID: <20110215171556.GA1866@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> <20110215060336.GA1817@zod.isi.edu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="lrZ03NoBR/3+SXJZ" Content-Disposition: inline In-Reply-To: X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 17:16:05 -0000 --lrZ03NoBR/3+SXJZ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 14, 2011 at 11:40:01PM -0700, Warren Block wrote: > On Mon, 14 Feb 2011, Ted Faber wrote: >=20 > > On Mon, Feb 14, 2011 at 08:58:31PM -0700, Warren Block wrote: > >> Updated the T42 tonight, which has the same video. -STABLE as of toda= y, > >> all ports updated as of today, and it seems fine. At least no lock up > >> on restarting X or shutting down. Your xorg.conf had some interesting > >> things, including XAA acceleration, which I didn't notice before. > >> Here's the one from this machine, comments stripped. Composite enabled > >> does not provide composite, but otherwise no problems noticed: > > > > I tried that xorg.conf, and still got the lockups. The acceleration was > > less effective as well. >=20 > EXA is what it picks by default, and I did find that composite works=20 > now. The ChipID matches yours, 0x4c57. The BIOS on this system is 3.23= =20 > (1RETDRWW), it has 1.5G of RAM. I have dbus, hal, and moused enabled in= =20 > rc.conf. All that is the same as mine (down to the 1.5 G of RAM (!)). I do have an IBM wireless card in it that didn't come with the box but is one of the models that thinkwiki.org recommends. I also have an SSD in for the disk, but that's the extent of the oddness (I hope). --=20 http://www.lunabase.org/~faber Unexpected attachment? http://www.lunabase.org/~faber/FAQ.html#SIG --lrZ03NoBR/3+SXJZ Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iD8DBQFNWrTMaUz3f+Zf+XsRAm2PAKC1QVIJQAgCbMJ/B61P2oeS3cQAMQCg32HI itGFg0JVTwJLYYWgkhtBciQ= =FVFw -----END PGP SIGNATURE----- --lrZ03NoBR/3+SXJZ-- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 17:19:24 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 022BF106564A for ; Tue, 15 Feb 2011 17:19:24 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id BBF4F8FC08 for ; Tue, 15 Feb 2011 17:19:23 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1FHJBxV071790; Tue, 15 Feb 2011 09:19:11 -0800 (PST) (envelope-from faber@isi.edu) Date: Tue, 15 Feb 2011 09:19:10 -0800 From: Ted Faber To: Warren Block Message-ID: <20110215171910.GB1866@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <4D5A8EE3.7050207@acm.poly.edu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="6sX45UoQRIJXqkqR" Content-Disposition: inline In-Reply-To: X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Boris Kochergin , freebsd-stable@freebsd.org, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 17:19:24 -0000 --6sX45UoQRIJXqkqR Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 15, 2011 at 09:17:41AM -0700, Warren Block wrote: > On Tue, 15 Feb 2011, Boris Kochergin wrote: > > > > Ahoy. Just thought I'd add what I've observed about the problem. Back w= hen I=20 > > first encountered it on a T42, in the 7.x or 8.x days, it would manifes= t=20 > > itself reliably on X shutdown, but only when X was shut down for the se= cond=20 > > time since the machine had been booted (ditching the ATI driver in favo= r of=20 > > VESA was a workaround). Nowadays, on T40s and T42s running -CURRENT, it= is=20 > > sporadic, but much more frequent when the laptops are running on batter= y as=20 > > opposed to AC power. Whether or not HAL is present doesn't seem to affe= ct it. >=20 > Maybe ACPI related. I haven't seen the problem at all (ever, that I can= =20 > recall), but haven't been testing on battery. Still using=20 > xf86-video-ati-6.13.2 on this one, but the new 6.14.0 might make a=20 > difference. FWIW, I'm using xf86-video-ati-6.13.2 as well. I also have a slow resume problem, so ACPI problems are a possibility. There's an ACPI error in the boot log of my initial message. --=20 http://www.lunabase.org/~faber Unexpected attachment? http://www.lunabase.org/~faber/FAQ.html#SIG --6sX45UoQRIJXqkqR Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iD8DBQFNWrWOaUz3f+Zf+XsRAlyXAKCAslIQFjA3cFSAQb2DpaiGNfyAdgCgh0pK WvHxZhzk/+Kzu/C8V02DUQM= =OoHZ -----END PGP SIGNATURE----- --6sX45UoQRIJXqkqR-- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 17:55:04 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 86707106566B for ; Tue, 15 Feb 2011 17:55:04 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 395988FC15 for ; Tue, 15 Feb 2011 17:55:03 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1FHstUm016527; Tue, 15 Feb 2011 10:54:55 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1FHssK1016524; Tue, 15 Feb 2011 10:54:54 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Tue, 15 Feb 2011 10:54:54 -0700 (MST) From: Warren Block To: Ted Faber In-Reply-To: <20110215171910.GB1866@zod.isi.edu> Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <4D5A8EE3.7050207@acm.poly.edu> <20110215171910.GB1866@zod.isi.edu> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Tue, 15 Feb 2011 10:54:55 -0700 (MST) Cc: Boris Kochergin , freebsd-stable@freebsd.org, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 17:55:04 -0000 On Tue, 15 Feb 2011, Ted Faber wrote: > FWIW, I'm using xf86-video-ati-6.13.2 as well. I also have a slow > resume problem, so ACPI problems are a possibility. There's an ACPI > error in the boot log of my initial message. Do you have the lockup-on-shutdown problem if there have been no suspend/resume actions? From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 18:15:51 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3CE55106564A for ; Tue, 15 Feb 2011 18:15:51 +0000 (UTC) (envelope-from spawk@acm.poly.edu) Received: from acm.poly.edu (acm.poly.edu [128.238.9.200]) by mx1.freebsd.org (Postfix) with ESMTP id C92C58FC16 for ; Tue, 15 Feb 2011 18:15:48 +0000 (UTC) Received: (qmail 59198 invoked from network); 15 Feb 2011 18:15:48 -0000 Received: from unknown (HELO ?192.168.1.144?) (spawk@66.206.120.2) by acm.poly.edu with CAMELLIA256-SHA encrypted SMTP; 15 Feb 2011 18:15:48 -0000 Message-ID: <4D5AC2D2.6040901@acm.poly.edu> Date: Tue, 15 Feb 2011 13:15:46 -0500 From: Boris Kochergin User-Agent: Mozilla/5.0 (X11; U; FreeBSD i386; en-US; rv:1.9.2.12) Gecko/20101106 Thunderbird/3.1.6 MIME-Version: 1.0 To: Ted Faber References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <4D5A8EE3.7050207@acm.poly.edu> <20110215171910.GB1866@zod.isi.edu> In-Reply-To: <20110215171910.GB1866@zod.isi.edu> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Warren Block , freebsd-stable@freebsd.org, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 18:15:51 -0000 On 02/15/11 12:19, Ted Faber wrote: > On Tue, Feb 15, 2011 at 09:17:41AM -0700, Warren Block wrote: >> On Tue, 15 Feb 2011, Boris Kochergin wrote: >>> Ahoy. Just thought I'd add what I've observed about the problem. Back when I >>> first encountered it on a T42, in the 7.x or 8.x days, it would manifest >>> itself reliably on X shutdown, but only when X was shut down for the second >>> time since the machine had been booted (ditching the ATI driver in favor of >>> VESA was a workaround). Nowadays, on T40s and T42s running -CURRENT, it is >>> sporadic, but much more frequent when the laptops are running on battery as >>> opposed to AC power. Whether or not HAL is present doesn't seem to affect it. >> Maybe ACPI related. I haven't seen the problem at all (ever, that I can >> recall), but haven't been testing on battery. Still using >> xf86-video-ati-6.13.2 on this one, but the new 6.14.0 might make a >> difference. > FWIW, I'm using xf86-video-ati-6.13.2 as well. I also have a slow > resume problem, so ACPI problems are a possibility. There's an ACPI > error in the boot log of my initial message Regarding just the error messages, they are also present on a T43p I have running 8.1, which does not exhibit the problem. Of course, it also has a different ATI video card. T43p (8.1): ACPI Warning: 32/64X length mismatch in Gpe1Block: 0/32 (20100331/tbfadt-625) ACPI Warning: Optional field Gpe1Block has zero address or length: 0x 0 102C/0x0 (20100331/tbfadt-655) ... acpi0: reservation of 0, a0000 (3) failed acpi0: reservation of 100000, 7ff00000 (3) failed T42 (CURRENT): ACPI Warning: 32/64X length mismatch in Gpe1Block: 0/32 (20101209/tbfadt-625) ACPI Warning: Optional field Gpe1Block has zero address or length: 0x000000000000102C/0x0 (20101209/tbfadt-655) ... acpi0: reservation of 0, a0000 (3) failed acpi0: reservation of 100000, 5ff00000 (3) failed -Boris From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 18:53:46 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0AD4E1065670 for ; Tue, 15 Feb 2011 18:53:46 +0000 (UTC) (envelope-from krz@cis.rit.edu) Received: from saturn.cis.rit.edu (saturn.cis.rit.edu [129.21.57.10]) by mx1.freebsd.org (Postfix) with SMTP id BE30C8FC20 for ; Tue, 15 Feb 2011 18:53:45 +0000 (UTC) Received: (qmail 15099 invoked from network); 15 Feb 2011 18:27:03 -0000 Received: from localhost (HELO rtfm.cis.rit.edu) (127.0.0.1) by saturn.cis.rit.edu with SMTP; 15 Feb 2011 18:27:03 -0000 Date: Tue, 15 Feb 2011 13:27:03 -0500 From: Bob Krzaczek To: freebsd-stable@freebsd.org Message-ID: <20110215182703.GB14715@rtfm.cis.rit.edu> Mail-Followup-To: freebsd-stable@freebsd.org References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <4D5A3207.1090302@mail.zedat.fu-berlin.de> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="A6N2fC+uXW/VQSAv" Content-Disposition: inline In-Reply-To: <4D5A3207.1090302@mail.zedat.fu-berlin.de> User-Agent: Mutt/1.4.2.3i X-My-Loop: At night, the ice weasels come. Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 18:53:46 -0000 --A6N2fC+uXW/VQSAv Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 15, 2011 at 08:57:59AM +0100, O. Hartmann wrote: > On 02/14/11 19:21, Ted Faber wrote: > >On Fri, Feb 11, 2011 at 10:52:43PM -0800, Chris H wrote: > >>Bottom line (for me anyway) has been that if I disable hald(8), I have > >>nearly no (video related) issues. This is both on x86&& amd64 systems. > > > >When I turn off hald, X xan no longer find the mouse and keyboard. I can > >probably hard wire them down, but I get the impression that lots of other > >gnome-ish things will get confused w/o hald. >=20 > With HALD and DBUS enabled and an automatic generated xorg.conf file only > HD4830 works, but it locks up/freezes the box when exiting Xorg/xdm. I just want to add my experiences here as well, which are quite similar. FreeBSD 8.1-RELEASE on i386 (not amd64 at the time), xorg 7.5, at the time = the latest NVidia driver for GTX-285M hardware, on a Clevo W870-CU laptop. The system worked fine, but when I added hald to the existing configuration, I'= d get a very nasty hang of the whole system when the X server exited. Eventually, it was as simple as 1) with hald, hang 2) without hald, fine I will investigate the links embedded in other emails I've seen recently, a= bout not allowing empty devices and other hacks that I seem to have needed in my xorg.conf. If something useful comes of that, I'll post more data. Otherw= ise, I'd just like to add that this behavior is not limited to ThinkPads or ATI hardware. Bob --=20 Bob Krzaczek, Chester F. Carlson Center for Imaging Science, RIT phone +1-585-4757196, email krz@cis.rit.edu, icbm 43.0858N 77.6774W --A6N2fC+uXW/VQSAv Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (FreeBSD) iEYEARECAAYFAk1axXcACgkQrNMt0DutorwD5gCg1apAQeAAntCIPBBNh1d5RwjJ RC4An0qBv0IkeVIBQ56Cr1edf/NPBs9Q =pGr2 -----END PGP SIGNATURE----- --A6N2fC+uXW/VQSAv-- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 19:05:18 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 40806106564A for ; Tue, 15 Feb 2011 19:05:18 +0000 (UTC) (envelope-from faber@isi.edu) Received: from zod.isi.edu (zod.isi.edu [128.9.168.221]) by mx1.freebsd.org (Postfix) with ESMTP id 1FEB38FC15 for ; Tue, 15 Feb 2011 19:05:17 +0000 (UTC) Received: from zod.isi.edu (localhost [127.0.0.1]) by zod.isi.edu (8.14.4/8.14.4) with ESMTP id p1FJ4gnh072622; Tue, 15 Feb 2011 11:05:05 -0800 (PST) (envelope-from faber@isi.edu) Date: Tue, 15 Feb 2011 11:04:32 -0800 From: Ted Faber To: Warren Block Message-ID: <20110215190432.GA12062@zod.isi.edu> References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <4D5A8EE3.7050207@acm.poly.edu> <20110215171910.GB1866@zod.isi.edu> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="WIyZ46R2i8wDzkSu" Content-Disposition: inline In-Reply-To: X-url: http://www.isi.edu/~faber User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Boris Kochergin , freebsd-stable@freebsd.org, Chris H Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 19:05:18 -0000 --WIyZ46R2i8wDzkSu Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 15, 2011 at 10:54:54AM -0700, Warren Block wrote: > On Tue, 15 Feb 2011, Ted Faber wrote: >=20 > > FWIW, I'm using xf86-video-ati-6.13.2 as well. I also have a slow > > resume problem, so ACPI problems are a possibility. There's an ACPI > > error in the boot log of my initial message. >=20 > Do you have the lockup-on-shutdown problem if there have been no=20 > suspend/resume actions? Yes. --=20 http://www.lunabase.org/~faber Unexpected attachment? http://www.lunabase.org/~faber/FAQ.html#SIG --WIyZ46R2i8wDzkSu Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (FreeBSD) iD8DBQFNWs5AaUz3f+Zf+XsRAt1DAKD3xbJ6Rz0S0dBaQoCwgLLAPsrtZgCfZqPD ZSUzeGAhZi2c01qPIUXTwt8= =O1r+ -----END PGP SIGNATURE----- --WIyZ46R2i8wDzkSu-- From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 20:21:24 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3E92A106566C for ; Tue, 15 Feb 2011 20:21:24 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id EF08B8FC19 for ; Tue, 15 Feb 2011 20:21:23 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1FKLGhC016908; Tue, 15 Feb 2011 13:21:16 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1FKLFvu016905; Tue, 15 Feb 2011 13:21:16 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Tue, 15 Feb 2011 13:21:15 -0700 (MST) From: Warren Block To: Chris H In-Reply-To: Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Tue, 15 Feb 2011 13:21:16 -0700 (MST) Cc: faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 20:21:24 -0000 On Tue, 15 Feb 2011, Warren Block wrote: > There are people who have difficulty with hal, and a much larger number who > dislike it. I'd contend that problems with hal are not very widespread, or > there would be a call for the Handbook X11 configuration section to change. Just to add something I should have mentioned in the first message: One reason for problems with hal is the use of AllowEmptyInput "Off". Usually it causes the "sticky mouse pointer" problem, but not always. So many people were using AEI that I decided to write an article about it: http://www.wonkity.com/~wblock/docs/html/aei.html The short version of that: don't use AEI at all. If you want to disable hal device detection in xorg, use AutoAddDevices Off, or build xorg-server without hal support. If anyone has the lockup-on-x-exit problem and is using AEI Off, please change it to AutoAddDevices Off and see if it makes a difference. It may also be due to window manager/desktop environment, or 32- or 64-bit OS. Mine have mostly been xfce4 on 32-bit 8-stable, which may be why I haven't seen it. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 21:28:05 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EBA7A1065672 for ; Tue, 15 Feb 2011 21:28:05 +0000 (UTC) (envelope-from SRS0=p8lU6x5b=VM=beatsnet.com=beat.siegenthaler@beatsnet.com) Received: from vulcan.beatsnet.com (sigi.broker.freenet6.net [IPv6:2001:5c0:1400:b::2a7]) by mx1.freebsd.org (Postfix) with ESMTP id 7119A8FC14 for ; Tue, 15 Feb 2011 21:28:05 +0000 (UTC) Received: from Beat-Siegenthalers-MacBook-Pro.local (zux165-132.adsl.green.ch [80.254.165.132]) (authenticated bits=0) by vulcan.beatsnet.com (8.14.4/8.14.4) with ESMTP id p1FLS2WQ001520 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=OK) for ; Tue, 15 Feb 2011 22:28:03 +0100 (CET) (envelope-from beat.siegenthaler@beatsnet.com) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=beatsnet.com; s=VULCAN_DKIM; t=1297805283; bh=ocnomHXB8XALhKVcx87aiszKds1tWtU6Tx1wQbuyHv0=; h=Message-ID:Date:From:MIME-Version:To:Subject:References: In-Reply-To:Content-Type:Content-Transfer-Encoding; b=Ejkw7hDIF+UOU67Nm2Z3788a0hrB+wdclvlafelLCPKwg1yKVGBUILdWStp6amime UlsmnfTEI4Ghu//oIdAnHiIB4OYzHwLYKXfcsJ+Skq6x+45YAYKV7ESzl/sSSikLT1 0/osRejxSWW15YBBe1Tt6IEf/sp/Z758dBw8LIDo= Message-ID: <4D5AEFDC.9010508@beatsnet.com> Date: Tue, 15 Feb 2011 22:27:56 +0100 From: Beat Siegenthaler User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Lightning/1.0b2 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: <4D49B924.2020809@omnilan.de> <4D4C2C40.5030302@omnilan.de> <4D4C76EF.8010108@omnilan.de> <4D4C7E3C.6050609@omnilan.de> In-Reply-To: <4D4C7E3C.6050609@omnilan.de> X-Enigmail-Version: 1.1.1 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (vulcan.beatsnet.com [193.138.215.102]); Tue, 15 Feb 2011 22:28:03 +0100 (CET) X-Virus-Scanned: clamav-milter 0.97 at vulcan.beatsnet.com X-Virus-Status: Clean Subject: Re: Solution [Was: Re: ahci.ko and IXP700/800 -> no disk found] X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 21:28:06 -0000 On 04.02.11 23:31, Harald Schmalzbauer wrote: > Will there be a errata for 8.2 regarding that issue? > Anybody unpacking a HP N36L will probably think the controller is not > working... > Exactly... found this after my odyssey with my N36L ahci/zfs-mirror . Not exactly the same issue but similar a ahci failure. 8.2-PRERELEASE FreeBSD 8.2-PRERELEASE #1: Sun Feb 13 02:02:04 CET 2011 With ahci loaded "dbench 1000" or copy a 20G file ends with timeouts on ahcich0 and ahcich1 and a complete unresponsive system. No way to recover. Only rebooting helps. There is no damage seen on zfs. But anyway it's not really usable for production. Now running ata again... FreeBSD 8.2-PRERELEASE #1: Sun Feb 13 02:02:04 CET 2011 root@abcd.xyz.com:/usr/obj/usr/src/sys/ATOM_amd64 amd64 Timecounter "i8254" frequency 1193182 Hz quality 0 CPU: AMD Athlon(tm) II Neo N36L Dual-Core Processor (1297.85-MHz K8-class CPU) Origin = "AuthenticAMD" Id = 0x100f63 Family = 10 Model = 6 Stepping = 3 Features=0x178bfbff Features2=0x802009 AMD Features=0xee500800 AMD Features2=0x8377f> TSC: P-state invariant real memory = 8589934592 (8192 MB) avail memory = 8120823808 (7744 MB) ACPI APIC Table: FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs FreeBSD/SMP: 1 package(s) x 2 core(s) cpu0 (BSP): APIC ID: 0 cpu1 (AP): APIC ID: 1 atapci0: port 0xd000-0xd007,0xc000-0xc003,0xb000-0xb007,0xa000-0xa003,0x9000-0x900f mem 0xfe6ffc00-0xfe6fffff irq 19 at device 17.0 on pci0 atapci1: port 0x1f0-0x1f7,0x3f6,0x170-0x177,0x376,0xff00-0xff0f at device 20.1 on pci0 ad4: 1430799MB at ata2-master UDMA100 SATA 3Gb/s ad6: 1430799MB at ata3-master UDMA100 SATA 3Gb/s From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 22:00:38 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8AF021065741 for ; Tue, 15 Feb 2011 22:00:38 +0000 (UTC) (envelope-from rodrigo@bebik.net) Received: from smtpfb1-g21.free.fr (smtpfb1-g21.free.fr [212.27.42.9]) by mx1.freebsd.org (Postfix) with ESMTP id 88FF68FC17 for ; Tue, 15 Feb 2011 22:00:35 +0000 (UTC) Received: from smtp3-g21.free.fr (smtp3-g21.free.fr [212.27.42.3]) by smtpfb1-g21.free.fr (Postfix) with ESMTP id 3435A2D52D for ; Tue, 15 Feb 2011 22:45:29 +0100 (CET) Received: from [192.168.0.4] (hodja.bebik.net [82.227.164.69]) by smtp3-g21.free.fr (Postfix) with ESMTP id DFF77A6236 for ; Tue, 15 Feb 2011 22:45:21 +0100 (CET) Message-ID: <4D5AF421.10102@bebik.net> Date: Tue, 15 Feb 2011 22:46:09 +0100 From: Rodrigo OSORIO User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20110120 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Freezes on FreeBSD Stable X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 22:00:38 -0000 Hi, A few days ago I update my box to 8-STABLE (RELENG_8) and start experience freezes using the VLC application. Of course no crashdump or trace to help diagnos the problem, so I start enabling some extra debug features in the kernel (kernel debug in the dev handbook) for ddb and so on. At this point there is no result so if there is some extra stuffs I can use to allow verbosity and understand the problem, I'll try it. regards Rodrigo See bellow some information for the system %uname -a FreeBSD home 8.2-PRERELEASE FreeBSD 8.2-PRERELEASE #2: Tue Feb 15 20:17:19 CET 2011 rodrigo@home:/usr/obj/usr/src/sys/GENERIC amd64 %kldstat Id Refs Address Size Name 1 32 0xffffffff80100000 dde628 kernel 2 1 0xffffffff80edf000 da5420 nvidia.ko 3 3 0xffffffff81c85000 424e8 linux.ko 4 1 0xffffffff81cc8000 24dd0 snd_hda.ko 5 2 0xffffffff81ced000 755e0 sound.ko 6 3 0xffffffff81d63000 45ed0 vboxdrv.ko 7 1 0xffffffff81e22000 3edc linprocfs.ko 8 2 0xffffffff81e26000 28ae vboxnetflt.ko 9 2 0xffffffff81e29000 8d44 netgraph.ko 10 1 0xffffffff81e32000 1532 ng_ether.ko 11 1 0xffffffff81e34000 d0c vboxnetadp.ko From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 22:14:22 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 14F03106566B for ; Tue, 15 Feb 2011 22:14:22 +0000 (UTC) (envelope-from corky1951@comcast.net) Received: from qmta10.emeryville.ca.mail.comcast.net (qmta10.emeryville.ca.mail.comcast.net [76.96.30.17]) by mx1.freebsd.org (Postfix) with ESMTP id ED86A8FC0A for ; Tue, 15 Feb 2011 22:14:21 +0000 (UTC) Received: from omta18.emeryville.ca.mail.comcast.net ([76.96.30.74]) by qmta10.emeryville.ca.mail.comcast.net with comcast id 8Mzh1g0081bwxycAANEMGh; Tue, 15 Feb 2011 22:14:21 +0000 Received: from comcast.net ([98.203.142.76]) by omta18.emeryville.ca.mail.comcast.net with comcast id 8NEJ1g01C1f6R9u8eNEJiS; Tue, 15 Feb 2011 22:14:21 +0000 Received: by comcast.net (sSMTP sendmail emulation); Tue, 15 Feb 2011 14:14:18 -0800 Date: Tue, 15 Feb 2011 14:14:17 -0800 From: Charlie Kester To: freebsd-stable@freebsd.org Message-ID: <20110215221417.GC2049@comcast.net> Mail-Followup-To: freebsd-stable@freebsd.org References: <20110214003704.GA2049@comcast.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20110214003704.GA2049@comcast.net> User-Agent: Mutt/1.4.2.3i X-Mailer: Mutt 1.4.2.3i X-Composer: Vim 7.3 Subject: Re: 8.2-PRERELEASE generating warnings re my hard drive X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 22:14:22 -0000 On Sun 13 Feb 2011 at 16:37:04 PST Charlie Kester wrote: >I'm running 8-STABLE, i386 architecture, and yesterday I updated to the >latest version with cvsup. > >After installing the kernel and rebooting, I see the following messages on >the console: > >ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel reset >ad4: interrupt on idle channel ignored >ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel reset >ad4: interrupt on idle channel ignored > >(repeated several times, and then the following:) > >ad4: WARNING - SETFEATURES SET TRANSFER MODE taskqueue timeout - completing >request directly ad4: 238475MB at ata2-master >UDMA100 SATA 1.5Gb/s > >(shortly afterwards, I see this:) > >Trying to mount root from ufs:/dev/ad4s1a >ad4: WARNING - READ_DMA requeued due to channel reset LBA=33963227 >ata2: FAILURE - already active DMA on this device >ata2: setting up DMA failed >g_vfs_done():ad4s1f[READ(offset=12103825408, length=2048)]error = 5 >ad4: WARNING - READ_DMA requeued due to channel reset LBA=705199 >ata2: FAILURE - already active DMA on this device >ata2: setting up DMA failed > >(which then repeats many times with different LBA and offset values.) > >Similar messages appear after bootup is completed and I've logged in. >They seem to appear whenever any process accesses the hard drive. > >I reverted back to my previous build of the kernel, dated 3 Feb 2011, >and these messages no longer appear. > >smartctl reports that the drive is running without any errors or >incipient failures. > >So my question is, what's going on here? Is this something I should >worry about? If it's a problem with my kernel config, what parameters >should I be looking at? > >Motherboard: Intel D510MO with builtin IDE controller (NM10). Anyone? If this isn't the best forum for this question, I'd appreciate a redirection. From owner-freebsd-stable@FreeBSD.ORG Tue Feb 15 23:53:09 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3E431106566B for ; Tue, 15 Feb 2011 23:53:09 +0000 (UTC) (envelope-from chris#@1command.com) Received: from mail.1command.com (mail.1command.com [168.103.150.6]) by mx1.freebsd.org (Postfix) with ESMTP id D5EF78FC0C for ; Tue, 15 Feb 2011 23:53:08 +0000 (UTC) Received: from webmail.1command.com (localhost.1command.com [127.0.0.1]) by mail.1command.com (8.13.3/8.13.3) with ESMTP id p1FNqSSK008657; Tue, 15 Feb 2011 15:52:34 -0800 (PST) (envelope-from chris#@1command.com) Received: from udns0.ultimatedns.net ([168.103.150.26]) (Local authenticated user inf0s) by webmail.1command.com with HTTP; Tue, 15 Feb 2011 15:53:05 -0800 (PST) Message-ID: In-Reply-To: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> Date: Tue, 15 Feb 2011 15:53:05 -0800 (PST) From: "Chris H" To: freebsd-stable@freebsd.org User-Agent: HRC Internet Messaging/1.5.2 [SVN] MIME-Version: 1.0 Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: 8bit Cc: wblock@wonkity.com, faber@isi.edu Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 15 Feb 2011 23:53:09 -0000 On Tue, February 15, 2011 12:21 pm, Warren Block wrote: > On Tue, 15 Feb 2011, Warren Block wrote: > > >> There are people who have difficulty with hal, and a much larger number who >> dislike it. I'd contend that problems with hal are not very widespread, or >> there would be a call for the Handbook X11 configuration section to change. > > Just to add something I should have mentioned in the first message: > > > One reason for problems with hal is the use of AllowEmptyInput "Off". > Usually it causes the "sticky mouse pointer" problem, but not always. > So many people were using AEI that I decided to write an article about > it: http://www.wonkity.com/~wblock/docs/html/aei.html Fun reading, thanks for sharing. :) purely a question of semantics; I notice you consistently use "On" || "Off" Xorg(1) -configure emits "true"||"false" Do you, or anyone else know conclusively whether it's simply a matter of: On||Off||true||false||1||0 or is it /only/ one, or more of the above pairs? Just curious. In your defense to an earlier comment I made; it essentially /is/ a "crap shoot" when it comes to setting up Xorg(1). While Xorg(1) -configure is intended to get a "functional" version of X(7) up, and running. Hardware, is not Hardware, is not Hardware. So a lot of "trial, and error" /will/ be required to obtain an "optimal" X(7) environment for a specific combination of hardware. :) --Chris > > > The short version of that: don't use AEI at all. If you want to > disable hal device detection in xorg, use AutoAddDevices Off, or build > xorg-server without hal support. > > If anyone has the lockup-on-x-exit problem and is using AEI Off, please > change it to AutoAddDevices Off and see if it makes a difference. It may also be > due to window manager/desktop environment, or 32- or 64-bit OS. Mine have > mostly been xfce4 on 32-bit 8-stable, which may be why I haven't seen it. > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > > -- From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 00:06:05 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1E326106564A for ; Wed, 16 Feb 2011 00:06:04 +0000 (UTC) (envelope-from wblock@wonkity.com) Received: from wonkity.com (wonkity.com [67.158.26.137]) by mx1.freebsd.org (Postfix) with ESMTP id 7BA898FC14 for ; Wed, 16 Feb 2011 00:06:04 +0000 (UTC) Received: from wonkity.com (localhost [127.0.0.1]) by wonkity.com (8.14.4/8.14.4) with ESMTP id p1G05uuj017652; Tue, 15 Feb 2011 17:05:56 -0700 (MST) (envelope-from wblock@wonkity.com) Received: from localhost (wblock@localhost) by wonkity.com (8.14.4/8.14.4/Submit) with ESMTP id p1G05uKF017649; Tue, 15 Feb 2011 17:05:56 -0700 (MST) (envelope-from wblock@wonkity.com) Date: Tue, 15 Feb 2011 17:05:56 -0700 (MST) From: Warren Block To: Chris H In-Reply-To: Message-ID: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (wonkity.com [127.0.0.1]); Tue, 15 Feb 2011 17:05:56 -0700 (MST) Cc: faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 00:06:05 -0000 On Tue, 15 Feb 2011, Chris H wrote: > On Tue, February 15, 2011 12:21 pm, Warren Block wrote: >> So many people were using AEI that I decided to write an article about >> it: http://www.wonkity.com/~wblock/docs/html/aei.html > Fun reading, thanks for sharing. :) Thanks! > purely a question of semantics; I notice you consistently use > "On" || "Off" > Xorg(1) -configure emits "true"||"false" > Do you, or anyone else know conclusively whether it's simply a matter of: > On||Off||true||false||1||0 > or is it /only/ one, or more of the above pairs? Just curious. "On" and "Off" are more readable to me, but you can use any of those. See % man xorg.conf | less +/Boolean > In your defense to an earlier comment I made; it essentially /is/ > a "crap shoot" when it comes to setting up Xorg(1). While Xorg(1) -configure > is intended to get a "functional" version of X(7) up, and running. Hardware, > is not Hardware, is not Hardware. So a lot of "trial, and error" /will/ be > required to obtain an "optimal" X(7) environment for a specific combination > of hardware. :) Agreed, particularly for older hardware like this Dell 4300 with a GeForce 440 card in it. From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 00:19:34 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 50CA41065693 for ; Wed, 16 Feb 2011 00:19:34 +0000 (UTC) (envelope-from chris#@1command.com) Received: from mail.1command.com (mail.1command.com [168.103.150.6]) by mx1.freebsd.org (Postfix) with ESMTP id E718F8FC18 for ; Wed, 16 Feb 2011 00:19:33 +0000 (UTC) Received: from webmail.1command.com (localhost.1command.com [127.0.0.1]) by mail.1command.com (8.13.3/8.13.3) with ESMTP id p1G0JQ4n008766; Tue, 15 Feb 2011 16:19:32 -0800 (PST) (envelope-from chris#@1command.com) Received: from udns0.ultimatedns.net ([168.103.150.26]) (Local authenticated user inf0s) by webmail.1command.com with HTTP; Tue, 15 Feb 2011 16:19:33 -0800 (PST) Message-ID: <7d01a57e34352957dfddc3748af2ffa0.HRCIM@webmail.1command.com> In-Reply-To: References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> Date: Tue, 15 Feb 2011 16:19:33 -0800 (PST) From: "Chris H" To: freebsd-stable@freebsd.org User-Agent: HRC Internet Messaging/1.5.2 [SVN] MIME-Version: 1.0 Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: 8bit Cc: wblock@wonkity.com, faber@isi.edu Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 00:19:34 -0000 On Tue, February 15, 2011 4:05 pm, Warren Block wrote: > On Tue, 15 Feb 2011, Chris H wrote: > > >> On Tue, February 15, 2011 12:21 pm, Warren Block wrote: >> >>> So many people were using AEI that I decided to write an article about >>> it: http://www.wonkity.com/~wblock/docs/html/aei.html >>> >> Fun reading, thanks for sharing. :) >> > > Thanks! > > >> purely a question of semantics; I notice you consistently use "On" || "Off" >> Xorg(1) -configure emits "true"||"false" >> Do you, or anyone else know conclusively whether it's simply a matter of: >> On||Off||true||false||1||0 >> or is it /only/ one, or more of the above pairs? Just curious. > > "On" and "Off" are more readable to me, but you can use any of those. See > % man xorg.conf | less +/Boolean > > >> In your defense to an earlier comment I made; it essentially /is/ >> a "crap shoot" when it comes to setting up Xorg(1). While Xorg(1) -configure is >> intended to get a "functional" version of X(7) up, and running. Hardware, is >> not Hardware, is not Hardware. So a lot of "trial, and error" /will/ be >> required to obtain an "optimal" X(7) environment for a specific combination of >> hardware. :) > > Agreed, particularly for older hardware like this Dell 4300 with a > GeForce 440 card in it. Well, the box I'm writing this message from is running a G98 [GeForce 8400 GS] + 3Gb videoram, while not the "latest and greatest", it isn't really "legacy" either. I was /sure/ it'd be a "snap" to setup, but while "functional", it isn't the optimal experience I had hoped for. I guess that's the price one pays for choosing a "closed source" piece of hardware. :( --Chris > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > > -- From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 03:15:26 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BED651065670 for ; Wed, 16 Feb 2011 03:15:26 +0000 (UTC) (envelope-from illoai@gmail.com) Received: from mail-fx0-f54.google.com (mail-fx0-f54.google.com [209.85.161.54]) by mx1.freebsd.org (Postfix) with ESMTP id 52A538FC0A for ; Wed, 16 Feb 2011 03:15:25 +0000 (UTC) Received: by fxm16 with SMTP id 16so932752fxm.13 for ; Tue, 15 Feb 2011 19:15:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:content-type:content-transfer-encoding; bh=nXx5ex0nr5bVzP1mjfnZXur6tqztuZ4+4plytj7lyFU=; b=PoCREJlFcSBF6LEZd3Z6OtfL4JE/nwZTH/IY9RC9Yz026Mf1+t+pkYbIn6Gx3lb1wZ 8nvntXobwRg4xfBgWWa4t9uHOBKFgG54Zi7r+Iy0On+jelH+2M/YY8IeEaJUBg32QE20 k4q9D/qfGeq7glkd+NcC0j1RyI/Tj3fJmcJHE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:content-transfer-encoding; b=B/vkor4/0J0e/7N6xOlvujQtpTZBGgQPdpssnKIkWf3FBM3E+ebX5IekRgAFKH+sXf IeQ/Nm2wdnfQkJWAX1lRDkdO21/E5DjxTc91bS3W91PDCdGDWK0y4e4xpesn7d/xPg1b +uBzKMa4ypqreHZtK1Pf7McEqAwUfjD5N5kcI= MIME-Version: 1.0 Received: by 10.223.118.136 with SMTP id v8mr29004faq.90.1297824612857; Tue, 15 Feb 2011 18:50:12 -0800 (PST) Received: by 10.223.103.4 with HTTP; Tue, 15 Feb 2011 18:50:12 -0800 (PST) In-Reply-To: <20110215221417.GC2049@comcast.net> References: <20110214003704.GA2049@comcast.net> <20110215221417.GC2049@comcast.net> Date: Tue, 15 Feb 2011 21:50:12 -0500 Message-ID: From: "illoai@gmail.com" To: freebsd-stable@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: 8.2-PRERELEASE generating warnings re my hard drive X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 03:15:26 -0000 On 15 February 2011 17:14, Charlie Kester wrote: > On Sun 13 Feb 2011 at 16:37:04 PST Charlie Kester wrote: >> >> I'm running 8-STABLE, i386 architecture, and yesterday I updated to the >> latest version with cvsup. >> >> After installing the kernel and rebooting, I see the following messages = on >> the console: >> >> ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel res= et >> =A0ad4: interrupt on idle channel ignored >> ad4: WARNING - SETFEATURES SET TRANSFER MODE requeued due to channel res= et >> ad4: interrupt on idle channel ignored >> >> (repeated several times, and then the following:) >> ad4: WARNING - SETFEATURES SET TRANSFER MODE taskqueue timeout - >> completing request directly ad4: 238475MB at >> ata2-master UDMA100 SATA 1.5Gb/s >> >> (shortly afterwards, I see this:) >> >> Trying to mount root from ufs:/dev/ad4s1a >> ad4: WARNING - READ_DMA requeued due to channel reset LBA=3D33963227 >> ata2: FAILURE - already active DMA on this device >> ata2: setting up DMA failed >> g_vfs_done():ad4s1f[READ(offset=3D12103825408, length=3D2048)]error =3D = 5 >> ad4: WARNING - READ_DMA requeued due to channel reset LBA=3D705199 >> ata2: FAILURE - already active DMA on this device >> ata2: setting up DMA failed >> >> (which then repeats many times with different LBA and offset values.) >> >> Similar messages appear after bootup is completed and I've logged in. >> They seem to appear whenever any process accesses the hard drive. >> >> I reverted back to my previous build of the kernel, dated 3 Feb 2011, >> and these messages no longer appear. >> >> smartctl reports that the drive is running without any errors or >> incipient failures. >> >> So my question is, what's going on here? =A0Is this something I should >> worry about? =A0If it's a problem with my kernel config, what parameters >> should I be looking at? >> >> Motherboard: Intel D510MO with builtin IDE controller (NM10). > > Anyone? > > If this isn't the best forum for this question, I'd appreciate a > redirection. This looks like the only change under ATA since your Feb 3rd kernel: http://svn.freebsd.org/viewvc/base/stable/8/sys/dev/ata/chipsets/ata-intel.= c?r1=3D215512&r2=3D218347 I have no idea what it means, though. --=20 -- From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 09:34:29 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B54CC106566B for ; Wed, 16 Feb 2011 09:34:29 +0000 (UTC) (envelope-from tevans.uk@googlemail.com) Received: from mail-qy0-f175.google.com (mail-qy0-f175.google.com [209.85.216.175]) by mx1.freebsd.org (Postfix) with ESMTP id 59C0F8FC15 for ; Wed, 16 Feb 2011 09:34:28 +0000 (UTC) Received: by qyk8 with SMTP id 8so2886724qyk.13 for ; Wed, 16 Feb 2011 01:34:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=vLxdoXQjB+k3ua7OMU9QisFtbzY934o/6EVt+hJ1VSE=; b=Fd3Z7CgNnCg/+sixiipcl4ysiZK2/gCUXp2yCySQOZeY+wsejailcNXek13P5q3v0x zfb3vKRUPBSYtnHdURwe0zB235LlwH1dWpVpeYvplS9+sWfpuBp1EniAIqpwIBTYN3/s Ne1cWUTKKyFAZyK4gBjD6PwuBU/1E58bC4GsE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=eeJyDQ+O1B+ydPQsyCLTWwbDIQJdwoYMfNjzSJe+1ypI6mQn3WpCJZ3vBeMnam+J/8 A5iouzovQrXPIs4I7UmpK2eXe3gb1zaf6h/N9IltiOOqJlA5jYFHb3rdnFUkeXpTmtVi eHlKMt5XY+rRS1QSvLXLaaJSf33YUZTSzGRzI= MIME-Version: 1.0 Received: by 10.229.190.204 with SMTP id dj12mr410687qcb.101.1297848868305; Wed, 16 Feb 2011 01:34:28 -0800 (PST) Received: by 10.229.246.8 with HTTP; Wed, 16 Feb 2011 01:34:28 -0800 (PST) In-Reply-To: <7d01a57e34352957dfddc3748af2ffa0.HRCIM@webmail.1command.com> References: <20110211191232.GA2073@zod.isi.edu> <86ce5acff788efe61ceabdffe9b194fd.HRCIM@webmail.1command.com> <20110214182159.GB47006@zod.isi.edu> <07d729abeedc3b764dccc00cf73b7762.HRCIM@webmail.1command.com> <7d01a57e34352957dfddc3748af2ffa0.HRCIM@webmail.1command.com> Date: Wed, 16 Feb 2011 09:34:28 +0000 Message-ID: From: Tom Evans To: Chris H Content-Type: text/plain; charset=UTF-8 Cc: wblock@wonkity.com, faber@isi.edu, freebsd-stable@freebsd.org Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 09:34:29 -0000 On Wed, Feb 16, 2011 at 12:19 AM, Chris H wrote: > Well, the box I'm writing this message from is running a > G98 [GeForce 8400 GS] + 3Gb videoram, while not the "latest and greatest", it > isn't really "legacy" either. I was /sure/ it'd be a "snap" to setup, but > while "functional", it isn't the optimal experience I had hoped for. > > I guess that's the price one pays for choosing a "closed source" piece of > hardware. :( > > --Chris > I've used this card for 2 years with FreeBSD + hald, never had the slightest issues, truly plug and play. nvidia0: on vgapci0 nvidia-driver-256.53 NVidia graphics card binary drivers Cheers Tom From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 15:48:34 2011 Return-Path: Delivered-To: freebsd-stable@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 388851065694 for ; Wed, 16 Feb 2011 15:48:34 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id B22438FC12 for ; Wed, 16 Feb 2011 15:48:33 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1GFmWF9094491 for ; Wed, 16 Feb 2011 18:48:32 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Wed, 16 Feb 2011 18:48:31 +0300 (MSK) From: Dmitry Morozovsky To: freebsd-stable@FreeBSD.org Message-ID: User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Wed, 16 Feb 2011 18:48:32 +0300 (MSK) Cc: Subject: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 15:48:34 -0000 Dear colleagues, are there any success stories with using SuperMicro LSI SAS with stable/8 ? I tried mfi drivers sources from LSI site (had to add one #include to make kdump compilation happy) with no success pciconf info is none@pci0:0:2:0: class=0x010700 card=0x00721000 chip=0x00721000 rev=0x02 hdr=0x00 vendor = 'LSI Logic (Was: Symbios Login, NCR)' class = mass storage subclass = SAS Thanks in advance! -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 16:04:15 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 63B4C106564A for ; Wed, 16 Feb 2011 16:04:15 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-yi0-f54.google.com (mail-yi0-f54.google.com [209.85.218.54]) by mx1.freebsd.org (Postfix) with ESMTP id 2B2CF8FC12 for ; Wed, 16 Feb 2011 16:04:14 +0000 (UTC) Received: by yie19 with SMTP id 19so682896yie.13 for ; Wed, 16 Feb 2011 08:04:14 -0800 (PST) Received: by 10.101.133.20 with SMTP id k20mr332465ann.250.1297872253188; Wed, 16 Feb 2011 08:04:13 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id 17sm356812anx.33.2011.02.16.08.04.11 (version=SSLv3 cipher=OTHER); Wed, 16 Feb 2011 08:04:12 -0800 (PST) Message-ID: <4D5BF579.80908@my.gd> Date: Wed, 16 Feb 2011 17:04:09 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org, marck@rinet.ru References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 16:04:15 -0000 Hi, mps0@pci0:1:0:0: class=0x010700 card=0x1f1d1028 chip=0x00721000 rev=0x02 hdr=0x00 vendor = 'LSI Logic (Was: Symbios Logic, NCR)' class = mass storage subclass = SAS bar [10] = type I/O Port, range 32, base 0xfc00, size 256, enabled bar [14] = type Memory, range 64, base 0xdf2b0000, size 65536, enabled bar [1c] = type Memory, range 64, base 0xdf2c0000, size 262144, enabled cap 01[50] = powerspec 3 supports D0 D1 D2 D3 current D0 cap 10[68] = PCI-Express 2 endpoint max data 256(4096) link x8(x8) cap 03[d0] = VPD cap 05[a8] = MSI supports 1 message, 64 bit cap 11[c0] = MSI-X supports 15 messages in map 0x14 enabled ecap 0001[100] = AER 1 0 fatal 0 non-fatal 0 corrected ecap 0004[138] = unknown 1 This is on a h200 card from dell using LSI 2008 on FreeBSD 8.2-RC3 amd64. Now, the documentation is FAR from finished but you may see a draft here: http://my.gd/bsd.htm What you want to do is : - delete your logical volume on the RAID controller - boot an MFSBSD image preloaded with a kernel containing the mps(4) module from 9.0. - this will present you the disks as /dev/da0 and /dev/da1 - setup a software mirror from there If you like, you may mail me the network configuration you'd like to get to be able to reach the host (MAC address of the NIC, IP address, mask, gateway, nameserver) and your public ssh key, and I'll generate you a MFSBSD 8.2-RC3 image preloaded with mps(4). You then boot it via PXE or inject it (install linux, download image, inject using dd). On 2/16/11 4:48 PM, Dmitry Morozovsky wrote: > Dear colleagues, > > are there any success stories with using SuperMicro LSI SAS with stable/8 ? > > I tried mfi drivers sources from LSI site (had to add one #include to make > kdump compilation happy) with no success > > pciconf info is > > none@pci0:0:2:0: class=0x010700 card=0x00721000 chip=0x00721000 > rev=0x02 hdr=0x00 > vendor = 'LSI Logic (Was: Symbios Login, NCR)' > class = mass storage > subclass = SAS > > Thanks in advance! > From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 16:13:13 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6E487106566C for ; Wed, 16 Feb 2011 16:13:13 +0000 (UTC) (envelope-from daniel@digsys.bg) Received: from smtp-sofia.digsys.bg (smtp-sofia.digsys.bg [193.68.3.230]) by mx1.freebsd.org (Postfix) with ESMTP id F10E98FC13 for ; Wed, 16 Feb 2011 16:13:12 +0000 (UTC) Received: from dcave.digsys.bg (dcave.digsys.bg [192.92.129.5]) (authenticated bits=0) by smtp-sofia.digsys.bg (8.14.4/8.14.4) with ESMTP id p1GGD2hO067736 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO) for ; Wed, 16 Feb 2011 18:13:08 +0200 (EET) (envelope-from daniel@digsys.bg) Message-ID: <4D5BF78E.7010306@digsys.bg> Date: Wed, 16 Feb 2011 18:13:02 +0200 From: Daniel Kalchev User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20101217 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 16:13:13 -0000 I have sucessfully used that motherboard with FreeBSD 9 and the mps driver. The mfi driver found on the LSI site does not support this controller. Daniel PS: My experiments were with the X8DTL-6F motherboard and Supermicro chassis with E16 expander. There is no reason the HBA chip in the single processor motherboard to be different. On 16.02.11 17:48, Dmitry Morozovsky wrote: > Dear colleagues, > > are there any success stories with using SuperMicro LSI SAS with stable/8 ? > > I tried mfi drivers sources from LSI site (had to add one #include to make > kdump compilation happy) with no success > > pciconf info is > > none@pci0:0:2:0: class=0x010700 card=0x00721000 chip=0x00721000 > rev=0x02 hdr=0x00 > vendor = 'LSI Logic (Was: Symbios Login, NCR)' > class = mass storage > subclass = SAS > > Thanks in advance! > From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 16:23:34 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B95CA106566B for ; Wed, 16 Feb 2011 16:23:34 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 3B2A38FC16 for ; Wed, 16 Feb 2011 16:23:33 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1GGNQqc095048; Wed, 16 Feb 2011 19:23:26 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Wed, 16 Feb 2011 19:23:26 +0300 (MSK) From: Dmitry Morozovsky To: Daniel Kalchev In-Reply-To: <4D5BF78E.7010306@digsys.bg> Message-ID: References: <4D5BF78E.7010306@digsys.bg> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Wed, 16 Feb 2011 19:23:26 +0300 (MSK) Cc: freebsd-stable@freebsd.org Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 16:23:34 -0000 On Wed, 16 Feb 2011, Daniel Kalchev wrote: DK> I have sucessfully used that motherboard with FreeBSD 9 and the mps driver. DK> The mfi driver found on the LSI site does not support this controller. Ah that makes sense. I'm a bit reluctant to use -current on this particular machine, so I would discuss MFCing mps driver wirh ken@ Thank you for the info! (I planned to test -current at least just booting anyway) DK> PS: My experiments were with the X8DTL-6F motherboard and Supermicro chassis DK> with E16 expander. There is no reason the HBA chip in the single processor DK> motherboard to be different. My box is actually the same (846E1) -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 16:30:47 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3D8E1106564A for ; Wed, 16 Feb 2011 16:30:47 +0000 (UTC) (envelope-from ftigeot@sekishi.zefyris.com) Received: from pizza.zefyris.com (pizza.zefyris.com [IPv6:2001:7a8:bd07:2::253]) by mx1.freebsd.org (Postfix) with ESMTP id B46548FC12 for ; Wed, 16 Feb 2011 16:30:46 +0000 (UTC) Received: from sekishi.zefyris.com (sekishi.zefyris.com [IPv6:2001:7a8:bd07:2:219:d1ff:fe81:e03]) by pizza.zefyris.com (8.14.4/8.14.4) with ESMTP id p1GGUTUg017404; Wed, 16 Feb 2011 17:30:29 +0100 (CET) Received: from sekishi.zefyris.com (localhost [127.0.0.1]) by sekishi.zefyris.com (8.14.4/8.14.1) with ESMTP id p1GGUSCt076663; Wed, 16 Feb 2011 17:30:28 +0100 (CET) Received: (from ftigeot@localhost) by sekishi.zefyris.com (8.14.4/8.14.1/Submit) id p1GGUSlu076662; Wed, 16 Feb 2011 17:30:28 +0100 (CET) Date: Wed, 16 Feb 2011 17:30:28 +0100 From: Francois Tigeot To: Dmitry Morozovsky Message-ID: <20110216163027.GA56870@sekishi.zefyris.com> References: <4D5BF78E.7010306@digsys.bg> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (pizza.zefyris.com [IPv6:2001:7a8:bd07:2::253]); Wed, 16 Feb 2011 17:30:29 +0100 (CET) Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 16:30:47 -0000 On Wed, Feb 16, 2011 at 07:23:26PM +0300, Dmitry Morozovsky wrote: > On Wed, 16 Feb 2011, Daniel Kalchev wrote: > > DK> PS: My experiments were with the X8DTL-6F motherboard and Supermicro chassis > DK> with E16 expander. There is no reason the HBA chip in the single processor > DK> motherboard to be different. > > My box is actually the same (846E1) Not exactly: with Supermicro, E1 means a SAS 3 Gb/s backplane and E16 is for SAS 6Gb/s -- Francois Tigeot From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 16:35:17 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7D38F1065670 for ; Wed, 16 Feb 2011 16:35:17 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id 1498D8FC0A for ; Wed, 16 Feb 2011 16:35:16 +0000 (UTC) Received: by bwz12 with SMTP id 12so1620366bwz.13 for ; Wed, 16 Feb 2011 08:35:16 -0800 (PST) Received: by 10.204.68.65 with SMTP id u1mr660203bki.193.1297874115869; Wed, 16 Feb 2011 08:35:15 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id a17sm259418bku.23.2011.02.16.08.35.14 (version=SSLv3 cipher=OTHER); Wed, 16 Feb 2011 08:35:14 -0800 (PST) Message-ID: <4D5BFCC1.3010404@my.gd> Date: Wed, 16 Feb 2011 17:35:13 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: <4D5BF78E.7010306@digsys.bg> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 16:35:17 -0000 On 2/16/11 5:23 PM, Dmitry Morozovsky wrote: > On Wed, 16 Feb 2011, Daniel Kalchev wrote: > > DK> I have sucessfully used that motherboard with FreeBSD 9 and the mps driver. > DK> The mfi driver found on the LSI site does not support this controller. > > Ah that makes sense. I'm a bit reluctant to use -current on this particular > machine, so I would discuss MFCing mps driver wirh ken@ > Careful, even when using the mps driver, we couldn't see the *logical* drive here, with the h200 card. We could only use the drives by setting them to passthrough on the RAID controller. From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 17:03:30 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 76C27106566B for ; Wed, 16 Feb 2011 17:03:30 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id E9E418FC08 for ; Wed, 16 Feb 2011 17:03:29 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1GH3MdJ095579; Wed, 16 Feb 2011 20:03:22 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Wed, 16 Feb 2011 20:03:22 +0300 (MSK) From: Dmitry Morozovsky To: Francois Tigeot In-Reply-To: <20110216163027.GA56870@sekishi.zefyris.com> Message-ID: References: <4D5BF78E.7010306@digsys.bg> <20110216163027.GA56870@sekishi.zefyris.com> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Wed, 16 Feb 2011 20:03:22 +0300 (MSK) Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 17:03:30 -0000 On Wed, 16 Feb 2011, Francois Tigeot wrote: FT> > DK> PS: My experiments were with the X8DTL-6F motherboard and Supermicro chassis FT> > DK> with E16 expander. There is no reason the HBA chip in the single processor FT> > DK> motherboard to be different. FT> > FT> > My box is actually the same (846E1) FT> FT> Not exactly: with Supermicro, E1 means a SAS 3 Gb/s backplane and E16 is FT> for SAS 6Gb/s Yea, you're right, it's E16 :) -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 17:04:23 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B2F671065670 for ; Wed, 16 Feb 2011 17:04:23 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 2F3668FC08 for ; Wed, 16 Feb 2011 17:04:22 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1GH4KXL095594; Wed, 16 Feb 2011 20:04:21 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Wed, 16 Feb 2011 20:04:20 +0300 (MSK) From: Dmitry Morozovsky To: Damien Fleuriot In-Reply-To: <4D5BFCC1.3010404@my.gd> Message-ID: References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Wed, 16 Feb 2011 20:04:21 +0300 (MSK) Cc: freebsd-stable@freebsd.org Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 17:04:23 -0000 On Wed, 16 Feb 2011, Damien Fleuriot wrote: DF> > DK> I have sucessfully used that motherboard with FreeBSD 9 and the mps driver. DF> > DK> The mfi driver found on the LSI site does not support this controller. DF> > DF> > Ah that makes sense. I'm a bit reluctant to use -current on this particular DF> > machine, so I would discuss MFCing mps driver wirh ken@ DF> > DF> DF> Careful, even when using the mps driver, we couldn't see the *logical* DF> drive here, with the h200 card. DF> DF> We could only use the drives by setting them to passthrough on the RAID DF> controller. I'm perfectly ready for this: it's target for ZFS ;-P -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 17:26:49 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7737D106566B; Wed, 16 Feb 2011 17:26:49 +0000 (UTC) (envelope-from aboyer@averesystems.com) Received: from zimbra.averesystems.com (75-149-8-245-Pennsylvania.hfc.comcastbusiness.net [75.149.8.245]) by mx1.freebsd.org (Postfix) with ESMTP id 304168FC12; Wed, 16 Feb 2011 17:26:48 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by zimbra.averesystems.com (Postfix) with ESMTP id D3CEF446001; Wed, 16 Feb 2011 12:07:33 -0500 (EST) X-Virus-Scanned: amavisd-new at averesystems.com Received: from zimbra.averesystems.com ([127.0.0.1]) by localhost (zimbra.averesystems.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5i6ywnZSBdXw; Wed, 16 Feb 2011 12:07:32 -0500 (EST) Received: from riven.arriad.com (fw.arriad.com [10.0.0.16]) by zimbra.averesystems.com (Postfix) with ESMTPSA id DB861446003; Wed, 16 Feb 2011 12:07:31 -0500 (EST) Mime-Version: 1.0 (Apple Message framework v1082) Content-Type: text/plain; charset=us-ascii From: Andrew Boyer In-Reply-To: <4D4A38FD.7000607@rdtc.ru> Date: Wed, 16 Feb 2011 12:08:30 -0500 Content-Transfer-Encoding: quoted-printable Message-Id: <4FD1B1C3-08A7-4F48-A30A-DE5A8F3D3834@averesystems.com> References: <4D3011DB.9050900@frasunek.com> <4D30458D.30007@sentex.net> <4D309983.70709@rdtc.ru> <201101141437.55421.jhb@freebsd.org> <4D46575A.802@rdtc.ru> <4D4670C2.4050500@freebsd.org> <4D48513C.40503@rdtc.ru> <20110201185026.GB62007@glebius.int.ru> <4D4A38FD.7000607@rdtc.ru> To: freebsd-current@freebsd.org, freebsd-stable@freebsd.org X-Mailer: Apple Mail (2.1082) Cc: Eugene Grosbein Subject: Re: About "panic: bufwrite: buffer is not busy???" X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 17:26:49 -0000 Moving this to -current and -stable and following up... Something is broken with coredumps on stable/8 amd64. I tried a vanilla = 8.2-RC3 and yesterday's csup of stable/8; neither can dump a core with = 'sysctl debug.kdb.panic=3D1'. For the 8.2-RC3 / amd64 / GENERIC install, I used the memstick image, = installed on ad7 (a 250GB SATA drive), used the default partition map, = and set dumpdev to AUTO. I added enough tracing to show that the second panic is due to the = syncer process flushing buffers to the other filesystems in parallel = with the dump. I've seen this panic and a similar one 'buffer not = locked' coming from ffs_write(). One time out of about 30 the core ran = to completion, but slowly (~1MB/sec). Other times the dump just locks = up completely with no other output. Does anyone know what might have changed to expose this problem? I don't ever see it under 7.1. Thanks, Andrew On Feb 3, 2011, at 12:11 AM, Eugene Grosbein wrote: > On 02.02.2011 00:50, Gleb Smirnoff wrote: >=20 >> E> Uptime: 8h3m51s >> E> Dumping 4087 MB (3 chunks) >> E> chunk 0: 1MB (150 pages) ... ok >> E> chunk 1: 3575MB (915088 pages) 3559 3543panic: bufwrite: buffer = is not busy??? >> E> cpuid =3D 3 >> E> Uptime: 8h3m52s >> E> Automatic reboot in 15 seconds - press a key on the console to = abort >> Can you add KDB_TRACE option to kernel? Your boxes for some reason = can't >> dump core, but with this option we will have at least trace. >=20 > I see Mike Tancsa's box has "bufwrite: buffer is not busy???" problem = too. > Has anyone a thought how to fix generation of crashdumps? >=20 > Eugene Grosbein >=20 >=20 > _______________________________________________ > freebsd-net@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-net > To unsubscribe, send any mail to "freebsd-net-unsubscribe@freebsd.org" -------------------------------------------------- Andrew Boyer aboyer@averesystems.com From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 17:37:34 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 39AE01065670 for ; Wed, 16 Feb 2011 17:37:34 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 207318FC0A for ; Wed, 16 Feb 2011 17:37:32 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1GHQhBB038284; Wed, 16 Feb 2011 10:26:43 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1GHQhRl038283; Wed, 16 Feb 2011 10:26:43 -0700 (MST) (envelope-from ken) Date: Wed, 16 Feb 2011 10:26:43 -0700 From: "Kenneth D. Merry" To: Dmitry Morozovsky Message-ID: <20110216172643.GA37858@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="6c2NcOVqGQ03X4Wi" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2i Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 17:37:34 -0000 --6c2NcOVqGQ03X4Wi Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Feb 16, 2011 at 19:23:26 +0300, Dmitry Morozovsky wrote: > On Wed, 16 Feb 2011, Daniel Kalchev wrote: > > DK> I have sucessfully used that motherboard with FreeBSD 9 and the mps driver. > DK> The mfi driver found on the LSI site does not support this controller. > > Ah that makes sense. I'm a bit reluctant to use -current on this particular > machine, so I would discuss MFCing mps driver wirh ken@ I've been planning to MFC it for a while, it has just been a time issue. There are a few outstanding issues with the driver, but even with the issues it would probably be better for people to be able to use it than have nothing to use in -stable. A few of the known issues: - Out of chain frames handling. I'm working on this one now. - No device queue freezing on errors. I'm working on this one. - No Integrated RAID handling. This will get fixed when LSI completes their version of the driver. - Firmware upgrade code doesn't work properly. This will get fixed when LSI completes their version of the driver. For the happy path, things should work well enough I suppose. I have attached a patch against -stable, try it out and let me know whether it works. If so I'll go ahead and MFC it. Ken -- Kenneth Merry ken@FreeBSD.ORG --6c2NcOVqGQ03X4Wi Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="mps_stable.20110216.2.txt" Property changes on: sys ___________________________________________________________________ Modified: svn:mergeinfo Merged /head/sys:r212420,212616,212772,212802,213535,213702,213704,213707-213708,213743,213839-213840,213882,213898,216088,216227,216363,216368 Index: sys/conf/files =================================================================== --- sys/conf/files (revision 218743) +++ sys/conf/files (working copy) @@ -1303,6 +1303,11 @@ dev/mmc/mmcbus_if.m standard dev/mmc/mmcsd.c optional mmcsd dev/mn/if_mn.c optional mn pci +dev/mps/mps.c optional mps +dev/mps/mps_pci.c optional mps pci +dev/mps/mps_sas.c optional mps +dev/mps/mps_table.c optional mps +dev/mps/mps_user.c optional mps dev/mpt/mpt.c optional mpt dev/mpt/mpt_cam.c optional mpt dev/mpt/mpt_debug.c optional mpt Index: sys/modules/mps/Makefile =================================================================== --- sys/modules/mps/Makefile (revision 212420) +++ sys/modules/mps/Makefile (working copy) @@ -4,7 +4,8 @@ KMOD= mps SRCS= mps_pci.c mps.c mps_sas.c mps_table.c mps_user.c -SRCS+= opt_mps.h opt_cam.h +SRCS+= opt_compat.h +SRCS+= opt_cam.h SRCS+= device_if.h bus_if.h pci_if.h #CFLAGS += -DMPS_DEBUG Index: sys/modules/Makefile =================================================================== --- sys/modules/Makefile (revision 218743) +++ sys/modules/Makefile (working copy) @@ -186,6 +186,7 @@ mmc \ mmcsd \ ${_mpt} \ + mps \ mqueue \ msdosfs \ msdosfs_iconv \ Index: sys/mips/mips/mp_machdep.c =================================================================== --- sys/mips/mips/mp_machdep.c (revision 218743) +++ sys/mips/mips/mp_machdep.c (working copy) @@ -165,7 +165,7 @@ #if 0 case IPI_HARDCLOCK: CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); - hardclockintr();; + hardclockintr(); break; #endif default: Index: sys/dev/sis/if_sisreg.h =================================================================== --- sys/dev/sis/if_sisreg.h (revision 218743) +++ sys/dev/sis/if_sisreg.h (working copy) @@ -497,7 +497,7 @@ int sis_tx_prod; int sis_tx_cons; int sis_tx_cnt; - int sis_rx_cons;; + int sis_rx_cons; bus_addr_t sis_rx_paddr; bus_addr_t sis_tx_paddr; struct callout sis_stat_ch; Index: sys/dev/siba/siba_bwn.c =================================================================== --- sys/dev/siba/siba_bwn.c (revision 218743) +++ sys/dev/siba/siba_bwn.c (working copy) @@ -326,7 +326,7 @@ siba_bwn_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { struct siba_dev_softc *sd; - struct siba_softc *siba;; + struct siba_softc *siba; sd = device_get_ivars(child); siba = sd->sd_bus; Index: sys/dev/mps/mps_ioctl.h =================================================================== --- sys/dev/mps/mps_ioctl.h (revision 212420) +++ sys/dev/mps/mps_ioctl.h (working copy) @@ -103,44 +103,4 @@ #define MPSIO_RAID_ACTION _IOWR('M', 205, struct mps_raid_action) #define MPSIO_MPS_COMMAND _IOWR('M', 210, struct mps_usr_command) -#if defined(__amd64__) -struct mps_cfg_page_req32 { - MPI2_CONFIG_PAGE_HEADER header; - uint32_t page_address; - uint32_t buf; - int len; - uint16_t ioc_status; -}; - -struct mps_ext_cfg_page_req32 { - MPI2_CONFIG_EXTENDED_PAGE_HEADER header; - uint32_t page_address; - uint32_t buf; - int len; - uint16_t ioc_status; -}; - -struct mps_raid_action32 { - uint8_t action; - uint8_t volume_bus; - uint8_t volume_id; - uint8_t phys_disk_num; - uint32_t action_data_word; - uint32_t buf; - int len; - uint32_t volume_status; - uint32_t action_data[4]; - uint16_t action_status; - uint16_t ioc_status; - uint8_t write; -}; - -#define MPSIO_READ_CFG_HEADER32 _IOWR('M', 100, struct mps_cfg_page_req32) -#define MPSIO_READ_CFG_PAGE32 _IOWR('M', 101, struct mps_cfg_page_req32) -#define MPSIO_READ_EXT_CFG_HEADER32 _IOWR('M', 102, struct mps_ext_cfg_page_req32) -#define MPSIO_READ_EXT_CFG_PAGE32 _IOWR('M', 103, struct mps_ext_cfg_page_req32) -#define MPSIO_WRITE_CFG_PAGE32 _IOWR('M', 104, struct mps_cfg_page_req32) -#define MPSIO_RAID_ACTION32 _IOWR('M', 105, struct mps_raid_action32) -#endif - #endif /* !_MPS_IOCTL_H_ */ Index: sys/dev/mps/mps.c =================================================================== --- sys/dev/mps/mps.c (revision 212420) +++ sys/dev/mps/mps.c (working copy) @@ -43,6 +43,7 @@ #include #include #include +#include #include #include @@ -380,7 +381,7 @@ return (0); } -static void +void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) { @@ -607,9 +608,16 @@ static int mps_alloc_replies(struct mps_softc *sc) { - int rsize; + int rsize, num_replies; - rsize = sc->facts->ReplyFrameSize * sc->num_replies * 4; + /* + * sc->num_replies should be one less than sc->fqdepth. We need to + * allocate space for sc->fqdepth replies, but only sc->num_replies + * replies can be used at once. + */ + num_replies = max(sc->fqdepth, sc->num_replies); + + rsize = sc->facts->ReplyFrameSize * num_replies * 4; if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ 4, 0, /* algnmnt, boundary */ BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ @@ -782,11 +790,19 @@ memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); + /* + * According to the spec, we need to use one less reply than we + * have space for on the queue. So sc->num_replies (the number we + * use) should be less than sc->fqdepth (allocated size). + */ if (sc->num_replies >= sc->fqdepth) return (EINVAL); - for (i = 0; i < sc->num_replies; i++) - sc->free_queue[i] = sc->reply_busaddr + i * sc->facts->ReplyFrameSize * 4; + /* + * Initialize all of the free queue entries. + */ + for (i = 0; i < sc->fqdepth; i++) + sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); sc->replyfreeindex = sc->num_replies; return (0); @@ -805,6 +821,9 @@ snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.debug_level", device_get_unit(sc->mps_dev)); TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug); + snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.allow_multiple_tm_cmds", + device_get_unit(sc->mps_dev)); + TUNABLE_INT_FETCH(tmpstr, &sc->allow_multiple_tm_cmds); mps_dprint(sc, MPS_TRACE, "%s\n", __func__); @@ -831,6 +850,11 @@ OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0, "mps debug level"); + SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), + OID_AUTO, "allow_multiple_tm_cmds", CTLFLAG_RW, + &sc->allow_multiple_tm_cmds, 0, + "allow multiple simultaneous task management cmds"); + if ((error = mps_transition_ready(sc)) != 0) return (error); @@ -873,6 +897,7 @@ sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; TAILQ_INIT(&sc->req_list); TAILQ_INIT(&sc->chain_list); + TAILQ_INIT(&sc->tm_list); if (((error = mps_alloc_queues(sc)) != 0) || ((error = mps_alloc_replies(sc)) != 0) || @@ -898,7 +923,6 @@ * replies. */ sc->replypostindex = 0; - sc->replycurindex = 0; mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); @@ -915,7 +939,10 @@ /* Attach the subsystems so they can prepare their event masks. */ /* XXX Should be dynamic so that IM/IR and user modules can attach */ if (((error = mps_attach_log(sc)) != 0) || - ((error = mps_attach_sas(sc)) != 0)) { + ((error = mps_attach_sas(sc)) != 0) || + ((error = mps_attach_user(sc)) != 0)) { + mps_printf(sc, "%s failed to attach all subsystems: error %d\n", + __func__, error); mps_free(sc); return (error); } @@ -1199,7 +1226,8 @@ desc = &sc->post_queue[pq]; flags = desc->Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; - if (flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) + if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) + || (desc->Words.High == 0xffffffff)) break; switch (flags) { @@ -1212,9 +1240,36 @@ uint32_t baddr; uint8_t *reply; + /* + * Re-compose the reply address from the address + * sent back from the chip. The ReplyFrameAddress + * is the lower 32 bits of the physical address of + * particular reply frame. Convert that address to + * host format, and then use that to provide the + * offset against the virtual address base + * (sc->reply_frames). + */ + baddr = le32toh(desc->AddressReply.ReplyFrameAddress); reply = sc->reply_frames + - sc->replycurindex * sc->facts->ReplyFrameSize * 4; - baddr = desc->AddressReply.ReplyFrameAddress; + (baddr - ((uint32_t)sc->reply_busaddr)); + /* + * Make sure the reply we got back is in a valid + * range. If not, go ahead and panic here, since + * we'll probably panic as soon as we deference the + * reply pointer anyway. + */ + if ((reply < sc->reply_frames) + || (reply > (sc->reply_frames + + (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { + printf("%s: WARNING: reply %p out of range!\n", + __func__, reply); + printf("%s: reply_frames %p, fqdepth %d, " + "frame size %d\n", __func__, + sc->reply_frames, sc->fqdepth, + sc->facts->ReplyFrameSize * 4); + printf("%s: baddr %#x,\n", __func__, baddr); + panic("Reply address out of range"); + } if (desc->AddressReply.SMID == 0) { mps_dispatch_event(sc, baddr, (MPI2_EVENT_NOTIFICATION_REPLY *) reply); @@ -1224,8 +1279,6 @@ cm->cm_reply_data = desc->AddressReply.ReplyFrameAddress; } - if (++sc->replycurindex >= sc->fqdepth) - sc->replycurindex = 0; break; } case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: @@ -1270,7 +1323,7 @@ MPI2_EVENT_NOTIFICATION_REPLY *reply) { struct mps_event_handle *eh; - int event, handled = 0;; + int event, handled = 0; event = reply->Event; TAILQ_FOREACH(eh, &sc->event_list, eh_list) { @@ -1365,118 +1418,281 @@ return (mps_update_events(sc, NULL, NULL)); } -static void -mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +/* + * Add a chain element as the next SGE for the specified command. + * Reset cm_sge and cm_sgesize to indicate all the available space. + */ +static int +mps_add_chain(struct mps_command *cm) { - MPI2_SGE_SIMPLE64 *sge; MPI2_SGE_CHAIN32 *sgc; - struct mps_softc *sc; - struct mps_command *cm; struct mps_chain *chain; - u_int i, segsleft, sglspace, dir, flags, sflags; + int space; - cm = (struct mps_command *)arg; - sc = cm->cm_sc; + if (cm->cm_sglsize < MPS_SGC_SIZE) + panic("MPS: Need SGE Error Code\n"); - segsleft = nsegs; - sglspace = cm->cm_sglsize; - sge = (MPI2_SGE_SIMPLE64 *)&cm->cm_sge->MpiSimple; + chain = mps_alloc_chain(cm->cm_sc); + if (chain == NULL) + return (ENOBUFS); + space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; + /* - * Set up DMA direction flags. Note no support for - * bi-directional transactions. + * Note: a double-linked list is used to make it easier to + * walk for debugging. */ - sflags = MPI2_SGE_FLAGS_ADDRESS_SIZE; - if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { - sflags |= MPI2_SGE_FLAGS_DIRECTION; - dir = BUS_DMASYNC_PREWRITE; - } else - dir = BUS_DMASYNC_PREREAD; + TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); + sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; + sgc->Length = space; + sgc->NextChainOffset = 0; + sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; + sgc->Address = chain->chain_busaddr; + + cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; + cm->cm_sglsize = space; + return (0); +} + +/* + * Add one scatter-gather element (chain, simple, transaction context) + * to the scatter-gather list for a command. Maintain cm_sglsize and + * cm_sge as the remaining size and pointer to the next SGE to fill + * in, respectively. + */ +int +mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) +{ + MPI2_SGE_TRANSACTION_UNION *tc = sgep; + MPI2_SGE_SIMPLE64 *sge = sgep; + int error, type; + + type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); + +#ifdef INVARIANTS + switch (type) { + case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { + if (len != tc->DetailsLength + 4) + panic("TC %p length %u or %zu?", tc, + tc->DetailsLength + 4, len); + } + break; + case MPI2_SGE_FLAGS_CHAIN_ELEMENT: + /* Driver only uses 32-bit chain elements */ + if (len != MPS_SGC_SIZE) + panic("CHAIN %p length %u or %zu?", sgep, + MPS_SGC_SIZE, len); + break; + case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: + /* Driver only uses 64-bit SGE simple elements */ + sge = sgep; + if (len != MPS_SGE64_SIZE) + panic("SGE simple %p length %u or %zu?", sge, + MPS_SGE64_SIZE, len); + if (((sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT) & + MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) + panic("SGE simple %p flags %02x not marked 64-bit?", + sge, sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT); + + break; + default: + panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); + } +#endif + /* * case 1: 1 more segment, enough room for it * case 2: 2 more segments, enough room for both * case 3: >=2 more segments, only enough room for 1 and a chain * case 4: >=1 more segment, enough room for only a chain * case 5: >=1 more segment, no room for anything (error) + */ + + /* + * There should be room for at least a chain element, or this + * code is buggy. Case (5). */ + if (cm->cm_sglsize < MPS_SGC_SIZE) + panic("MPS: Need SGE Error Code\n"); - for (i = 0; i < nsegs; i++) { - - /* Case 5 Error. This should never happen. */ - if (sglspace < MPS_SGC_SIZE) { - panic("MPS: Need SGE Error Code\n"); + if (segsleft >= 2 && + cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { + /* + * There are 2 or more segments left to add, and only + * enough room for 1 and a chain. Case (3). + * + * Mark as last element in this chain if necessary. + */ + if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { + sge->FlagsLength |= + (MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); } /* - * Case 4, Fill in a chain element, allocate a chain, - * fill in one SGE element, continue. + * Add the item then a chain. Do the chain now, + * rather than on the next iteration, to simplify + * understanding the code. */ - if ((sglspace >= MPS_SGC_SIZE) && (sglspace < MPS_SGE64_SIZE)) { - chain = mps_alloc_chain(sc); - if (chain == NULL) { - /* Resource shortage, roll back! */ - printf("out of chain frames\n"); - return; - } + cm->cm_sglsize -= len; + bcopy(sgep, cm->cm_sge, len); + cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); + return (mps_add_chain(cm)); + } - /* - * Note: a double-linked list is used to make it - * easier to walk for debugging. - */ - TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain,chain_link); + if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { + /* + * 1 or more segment, enough room for only a chain. + * Hope the previous element wasn't a Simple entry + * that needed to be marked with + * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). + */ + if ((error = mps_add_chain(cm)) != 0) + return (error); + } - sgc = (MPI2_SGE_CHAIN32 *)sge; - sgc->Length = 128; - sgc->NextChainOffset = 0; - sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; - sgc->Address = chain->chain_busaddr; +#ifdef INVARIANTS + /* Case 1: 1 more segment, enough room for it. */ + if (segsleft == 1 && cm->cm_sglsize < len) + panic("1 seg left and no room? %u versus %zu", + cm->cm_sglsize, len); - sge = (MPI2_SGE_SIMPLE64 *)&chain->chain->MpiSimple; - sglspace = 128; - } + /* Case 2: 2 more segments, enough room for both */ + if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) + panic("2 segs left and no room? %u versus %zu", + cm->cm_sglsize, len); +#endif - flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT; - sge->FlagsLength = segs[i].ds_len | - ((sflags | flags) << MPI2_SGE_FLAGS_SHIFT); - mps_from_u64(segs[i].ds_addr, &sge->Address); + if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { + /* + * Last element of the last segment of the entire + * buffer. + */ + sge->FlagsLength |= ((MPI2_SGE_FLAGS_LAST_ELEMENT | + MPI2_SGE_FLAGS_END_OF_BUFFER | + MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT); + } - /* Case 1, Fill in one SGE element and break */ - if (segsleft == 1) - break; + cm->cm_sglsize -= len; + bcopy(sgep, cm->cm_sge, len); + cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); + return (0); +} - sglspace -= MPS_SGE64_SIZE; - segsleft--; +/* + * Add one dma segment to the scatter-gather list for a command. + */ +int +mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, + int segsleft) +{ + MPI2_SGE_SIMPLE64 sge; - /* Case 3, prepare for a chain on the next loop */ - if ((segsleft > 0) && (sglspace < MPS_SGE64_SIZE)) - sge->FlagsLength |= - (MPI2_SGE_FLAGS_LAST_ELEMENT << - MPI2_SGE_FLAGS_SHIFT); + /* + * This driver always uses 64-bit address elements for + * simplicity. + */ + flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | MPI2_SGE_FLAGS_ADDRESS_SIZE; + sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); + mps_from_u64(pa, &sge.Address); - /* Advance to the next element to be filled in. */ - sge++; + return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); +} + +static void +mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + struct mps_softc *sc; + struct mps_command *cm; + u_int i, dir, sflags; + + cm = (struct mps_command *)arg; + sc = cm->cm_sc; + + /* + * In this case, just print out a warning and let the chip tell the + * user they did the wrong thing. + */ + if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { + mps_printf(sc, "%s: warning: busdma returned %d segments, " + "more than the %d allowed\n", __func__, nsegs, + cm->cm_max_segs); } - /* Last element of the last segment of the entire buffer */ - flags = MPI2_SGE_FLAGS_LAST_ELEMENT | - MPI2_SGE_FLAGS_END_OF_BUFFER | - MPI2_SGE_FLAGS_END_OF_LIST; - sge->FlagsLength |= (flags << MPI2_SGE_FLAGS_SHIFT); + /* + * Set up DMA direction flags. Note that we don't support + * bi-directional transfers, with the exception of SMP passthrough. + */ + sflags = 0; + if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { + /* + * We have to add a special case for SMP passthrough, there + * is no easy way to generically handle it. The first + * S/G element is used for the command (therefore the + * direction bit needs to be set). The second one is used + * for the reply. We'll leave it to the caller to make + * sure we only have two buffers. + */ + /* + * Even though the busdma man page says it doesn't make + * sense to have both direction flags, it does in this case. + * We have one s/g element being accessed in each direction. + */ + dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; + /* + * Set the direction flag on the first buffer in the SMP + * passthrough request. We'll clear it for the second one. + */ + sflags |= MPI2_SGE_FLAGS_DIRECTION | + MPI2_SGE_FLAGS_END_OF_BUFFER; + } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { + sflags |= MPI2_SGE_FLAGS_DIRECTION; + dir = BUS_DMASYNC_PREWRITE; + } else + dir = BUS_DMASYNC_PREREAD; + + for (i = 0; i < nsegs; i++) { + if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) + && (i != 0)) { + sflags &= ~MPI2_SGE_FLAGS_DIRECTION; + } + error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, + sflags, nsegs - i); + if (error != 0) { + /* Resource shortage, roll back! */ + mps_printf(sc, "out of chain frames\n"); + return; + } + } + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); mps_enqueue_request(sc, cm); return; } +static void +mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, + int error) +{ + mps_data_cb(arg, segs, nsegs, error); +} + +/* + * Note that the only error path here is from bus_dmamap_load(), which can + * return EINPROGRESS if it is waiting for resources. + */ int mps_map_command(struct mps_softc *sc, struct mps_command *cm) { MPI2_SGE_SIMPLE32 *sge; int error = 0; - if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { + if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { + error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, + &cm->cm_uio, mps_data_cb2, cm, 0); + } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); } else { @@ -1490,7 +1706,7 @@ MPI2_SGE_FLAGS_SHIFT; sge->Address = 0; } - mps_enqueue_request(sc, cm); + mps_enqueue_request(sc, cm); } return (error); @@ -1549,9 +1765,9 @@ cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_complete_data = params; if (params->callback != NULL) { cm->cm_complete = mps_config_complete; - cm->cm_complete_data = params; return (mps_map_command(sc, cm)); } else { cm->cm_complete = NULL; Index: sys/dev/mps/mps_sas.c =================================================================== --- sys/dev/mps/mps_sas.c (revision 212420) +++ sys/dev/mps/mps_sas.c (working copy) @@ -41,6 +41,8 @@ #include #include #include +#include +#include #include #include @@ -55,6 +57,9 @@ #include #include #include +#if __FreeBSD_version >= 900026 +#include +#endif #include #include @@ -69,9 +74,11 @@ uint16_t handle; uint8_t linkrate; uint64_t devname; + uint64_t sasaddr; uint32_t devinfo; uint16_t encl_handle; uint16_t encl_slot; + uint16_t parent_handle; int flags; #define MPSSAS_TARGET_INABORT (1 << 0) #define MPSSAS_TARGET_INRESET (1 << 1) @@ -114,6 +121,7 @@ MALLOC_DEFINE(M_MPSSAS, "MPSSAS", "MPS SAS memory"); +static __inline int mpssas_set_lun(uint8_t *lun, u_int ccblun); static struct mpssas_target * mpssas_alloc_target(struct mpssas_softc *, struct mpssas_target *); static struct mpssas_target * mpssas_find_target(struct mpssas_softc *, int, @@ -135,14 +143,64 @@ static void mpssas_scsiio_timeout(void *data); static void mpssas_abort_complete(struct mps_softc *sc, struct mps_command *cm); static void mpssas_recovery(struct mps_softc *, struct mps_command *); +static int mpssas_map_tm_request(struct mps_softc *sc, struct mps_command *cm); +static void mpssas_issue_tm_request(struct mps_softc *sc, + struct mps_command *cm); +static void mpssas_tm_complete(struct mps_softc *sc, struct mps_command *cm, + int error); +static int mpssas_complete_tm_request(struct mps_softc *sc, + struct mps_command *cm, int free_cm); static void mpssas_action_scsiio(struct mpssas_softc *, union ccb *); static void mpssas_scsiio_complete(struct mps_softc *, struct mps_command *); -static int mpssas_resetdev(struct mpssas_softc *, struct mps_command *); +#if __FreeBSD_version >= 900026 +static void mpssas_smpio_complete(struct mps_softc *sc, struct mps_command *cm); +static void mpssas_send_smpcmd(struct mpssas_softc *sassc, union ccb *ccb, + uint64_t sasaddr); +static void mpssas_action_smpio(struct mpssas_softc *sassc, union ccb *ccb); +#endif /* __FreeBSD_version >= 900026 */ +static void mpssas_resetdev(struct mpssas_softc *, struct mps_command *); static void mpssas_action_resetdev(struct mpssas_softc *, union ccb *); static void mpssas_resetdev_complete(struct mps_softc *, struct mps_command *); static void mpssas_freeze_device(struct mpssas_softc *, struct mpssas_target *); static void mpssas_unfreeze_device(struct mpssas_softc *, struct mpssas_target *) __unused; +/* + * Abstracted so that the driver can be backwards and forwards compatible + * with future versions of CAM that will provide this functionality. + */ +#define MPS_SET_LUN(lun, ccblun) \ + mpssas_set_lun(lun, ccblun) + +static __inline int +mpssas_set_lun(uint8_t *lun, u_int ccblun) +{ + uint64_t *newlun; + + newlun = (uint64_t *)lun; + *newlun = 0; + if (ccblun <= 0xff) { + /* Peripheral device address method, LUN is 0 to 255 */ + lun[1] = ccblun; + } else if (ccblun <= 0x3fff) { + /* Flat space address method, LUN is <= 16383 */ + scsi_ulto2b(ccblun, lun); + lun[0] |= 0x40; + } else if (ccblun <= 0xffffff) { + /* Extended flat space address method, LUN is <= 16777215 */ + scsi_ulto3b(ccblun, &lun[1]); + /* Extended Flat space address method */ + lun[0] = 0xc0; + /* Length = 1, i.e. LUN is 3 bytes long */ + lun[0] |= 0x10; + /* Extended Address Method */ + lun[0] |= 0x02; + } else { + return (EINVAL); + } + + return (0); +} + static struct mpssas_target * mpssas_alloc_target(struct mpssas_softc *sassc, struct mpssas_target *probe) { @@ -305,6 +363,8 @@ probe->target.devinfo = buf->DeviceInfo; probe->target.encl_handle = buf->EnclosureHandle; probe->target.encl_slot = buf->Slot; + probe->target.sasaddr = mps_to_u64(&buf->SASAddress); + probe->target.parent_handle = buf->ParentDevHandle; if (buf->DeviceInfo & MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH) { params->page_address = @@ -438,7 +498,7 @@ cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; cm->cm_complete = mpssas_remove_device; cm->cm_targ = targ; - mps_map_command(sc, cm); + mpssas_issue_tm_request(sc, cm); } static void @@ -453,6 +513,9 @@ reply = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; handle = cm->cm_targ->handle; + + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 0); + if (reply->IOCStatus != MPI2_IOCSTATUS_SUCCESS) { mps_printf(sc, "Failure 0x%x reseting device 0x%04x\n", reply->IOCStatus, handle); @@ -594,6 +657,7 @@ { struct mpssas_softc *sassc; int error = 0; + int num_sim_reqs; mps_dprint(sc, MPS_TRACE, "%s\n", __func__); @@ -603,15 +667,30 @@ sc->sassc = sassc; sassc->sc = sc; - if ((sassc->devq = cam_simq_alloc(sc->num_reqs)) == NULL) { + /* + * Tell CAM that we can handle 5 fewer requests than we have + * allocated. If we allow the full number of requests, all I/O + * will halt when we run out of resources. Things work fine with + * just 1 less request slot given to CAM than we have allocated. + * We also need a couple of extra commands so that we can send down + * abort, reset, etc. requests when commands time out. Otherwise + * we could wind up in a situation with sc->num_reqs requests down + * on the card and no way to send an abort. + * + * XXX KDM need to figure out why I/O locks up if all commands are + * used. + */ + num_sim_reqs = sc->num_reqs - 5; + + if ((sassc->devq = cam_simq_alloc(num_sim_reqs)) == NULL) { mps_dprint(sc, MPS_FAULT, "Cannot allocate SIMQ\n"); error = ENOMEM; goto out; } sassc->sim = cam_sim_alloc(mpssas_action, mpssas_poll, "mps", sassc, - device_get_unit(sc->mps_dev), &sc->mps_mtx, sc->num_reqs, sc->num_reqs, - sassc->devq); + device_get_unit(sc->mps_dev), &sc->mps_mtx, num_sim_reqs, + num_sim_reqs, sassc->devq); if (sassc->sim == NULL) { mps_dprint(sc, MPS_FAULT, "Cannot allocate SIM\n"); error = EINVAL; @@ -890,6 +969,11 @@ case XPT_SCSI_IO: mpssas_action_scsiio(sassc, ccb); return; +#if __FreeBSD_version >= 900026 + case XPT_SMP_IO: + mpssas_action_smpio(sassc, ccb); + return; +#endif /* __FreeBSD_version >= 900026 */ default: ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; break; @@ -928,6 +1012,9 @@ struct mps_softc *sc; struct mps_command *cm; struct mpssas_target *targ; +#if 0 + char cdb_str[(SCSI_MAX_CDBLEN * 3) + 1]; +#endif cm = (struct mps_command *)data; sc = cm->cm_sc; @@ -952,6 +1039,22 @@ xpt_print(ccb->ccb_h.path, "SCSI command timeout on device handle " "0x%04x SMID %d\n", targ->handle, cm->cm_desc.Default.SMID); + /* + * XXX KDM this is useful for debugging purposes, but the existing + * scsi_op_desc() implementation can't handle a NULL value for + * inq_data. So this will remain commented out until I bring in + * those changes as well. + */ +#if 0 + xpt_print(ccb->ccb_h.path, "Timed out command: %s. CDB %s\n", + scsi_op_desc((ccb->ccb_h.flags & CAM_CDB_POINTER) ? + ccb->csio.cdb_io.cdb_ptr[0] : + ccb->csio.cdb_io.cdb_bytes[0], NULL), + scsi_cdb_string((ccb->ccb_h.flags & CAM_CDB_POINTER) ? + ccb->csio.cdb_io.cdb_ptr : + ccb->csio.cdb_io.cdb_bytes, cdb_str, + sizeof(cdb_str))); +#endif /* Inform CAM about the timeout and that recovery is starting. */ #if 0 @@ -983,7 +1086,7 @@ mps_printf(sc, "%s: abort request on handle %#04x SMID %d " "complete\n", __func__, req->DevHandle, req->TaskMID); - mps_free_command(sc, cm); + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 1); } static void @@ -991,7 +1094,6 @@ { struct mps_command *cm; MPI2_SCSI_TASK_MANAGE_REQUEST *req, *orig_req; - int error; cm = mps_alloc_command(sc); if (cm == NULL) { @@ -1013,27 +1115,206 @@ cm->cm_data = NULL; cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + mpssas_issue_tm_request(sc, cm); + +} + +/* + * Can return 0 or EINPROGRESS on success. Any other value means failure. + */ +static int +mpssas_map_tm_request(struct mps_softc *sc, struct mps_command *cm) +{ + int error; + + error = 0; + + cm->cm_flags |= MPS_CM_FLAGS_ACTIVE; error = mps_map_command(sc, cm); + if ((error == 0) + || (error == EINPROGRESS)) + sc->tm_cmds_active++; - if (error != 0) { - mps_printf(sc, "%s: error mapping abort request!\n", __func__); + return (error); +} + +static void +mpssas_issue_tm_request(struct mps_softc *sc, struct mps_command *cm) +{ + int freeze_queue, send_command, error; + + freeze_queue = 0; + send_command = 0; + error = 0; + + mtx_assert(&sc->mps_mtx, MA_OWNED); + + /* + * If there are no other pending task management commands, go + * ahead and send this one. There is a small amount of anecdotal + * evidence that sending lots of task management commands at once + * may cause the controller to lock up. Or, if the user has + * configured the driver (via the allow_multiple_tm_cmds variable) to + * not serialize task management commands, go ahead and send the + * command if even other task management commands are pending. + */ + if (TAILQ_FIRST(&sc->tm_list) == NULL) { + send_command = 1; + freeze_queue = 1; + } else if (sc->allow_multiple_tm_cmds != 0) + send_command = 1; + + TAILQ_INSERT_TAIL(&sc->tm_list, cm, cm_link); + if (send_command != 0) { + /* + * Freeze the SIM queue while we issue the task management + * command. According to the Fusion-MPT 2.0 spec, task + * management requests are serialized, and so the host + * should not send any I/O requests while task management + * requests are pending. + */ + if (freeze_queue != 0) + xpt_freeze_simq(sc->sassc->sim, 1); + + error = mpssas_map_tm_request(sc, cm); + + /* + * At present, there is no error path back from + * mpssas_map_tm_request() (which calls mps_map_command()) + * when cm->cm_data == NULL. But since there is a return + * value, we check it just in case the implementation + * changes later. + */ + if ((error != 0) + && (error != EINPROGRESS)) + mpssas_tm_complete(sc, cm, + MPI2_SCSITASKMGMT_RSP_TM_FAILED); } -#if 0 - error = mpssas_reset(sc, targ, &resetcm); - if ((error != 0) && (error != EBUSY)) { - mps_printf(sc, "Error resetting device!\n"); - mps_unlock(sc); - return; - } +} - targ->flags |= MPSSAS_TARGET_INRESET; +static void +mpssas_tm_complete(struct mps_softc *sc, struct mps_command *cm, int error) +{ + MPI2_SCSI_TASK_MANAGE_REPLY *resp; - cm->cm_complete = mpssas_resettimeout_complete; - cm->cm_complete_data = cm; - mps_map_command(sassc->sc, cm); -#endif + resp = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; + + resp->ResponseCode = error; + + /* + * Call the callback for this command, it will be + * removed from the list and freed via the callback. + */ + cm->cm_complete(sc, cm); } +/* + * Complete a task management request. The basic completion operation will + * always succeed. Returns status for sending any further task management + * commands that were queued. + */ +static int +mpssas_complete_tm_request(struct mps_softc *sc, struct mps_command *cm, + int free_cm) +{ + int error; + + error = 0; + + mtx_assert(&sc->mps_mtx, MA_OWNED); + + TAILQ_REMOVE(&sc->tm_list, cm, cm_link); + cm->cm_flags &= ~MPS_CM_FLAGS_ACTIVE; + sc->tm_cmds_active--; + + if (free_cm != 0) + mps_free_command(sc, cm); + + if (TAILQ_FIRST(&sc->tm_list) == NULL) { + /* + * Release the SIM queue, we froze it when we sent the first + * task management request. + */ + xpt_release_simq(sc->sassc->sim, 1); + } else if ((sc->tm_cmds_active == 0) + || (sc->allow_multiple_tm_cmds != 0)) { + int error; + struct mps_command *cm2; + +restart_traversal: + + /* + * We don't bother using TAILQ_FOREACH_SAFE here, but + * rather use the standard version and just restart the + * list traversal if we run into the error case. + * TAILQ_FOREACH_SAFE allows safe removal of the current + * list element, but if you have a queue of task management + * commands, all of which have mapping errors, you'll end + * up with recursive calls to this routine and so you could + * wind up removing more than just the current list element. + */ + TAILQ_FOREACH(cm2, &sc->tm_list, cm_link) { + MPI2_SCSI_TASK_MANAGE_REQUEST *req; + + /* This command is active, no need to send it again */ + if (cm2->cm_flags & MPS_CM_FLAGS_ACTIVE) + continue; + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm2->cm_req; + + mps_printf(sc, "%s: sending deferred task management " + "request for handle %#04x SMID %d\n", __func__, + req->DevHandle, req->TaskMID); + + error = mpssas_map_tm_request(sc, cm2); + + /* + * Check for errors. If we had an error, complete + * this command with an error, and keep going through + * the list until we are able to send at least one + * command or all of them are completed with errors. + * + * We don't want to wind up in a situation where + * we're stalled out with no way for queued task + * management commands to complete. + * + * Note that there is not currently an error path + * back from mpssas_map_tm_request() (which calls + * mps_map_command()) when cm->cm_data == NULL. + * But we still want to check for errors here in + * case the implementation changes, or in case + * there is some reason for a data payload here. + */ + if ((error != 0) + && (error != EINPROGRESS)) { + mpssas_tm_complete(sc, cm, + MPI2_SCSITASKMGMT_RSP_TM_FAILED); + + /* + * If we don't currently have any commands + * active, go back to the beginning and see + * if there are any more that can be started. + * Otherwise, we're done here. + */ + if (sc->tm_cmds_active == 0) + goto restart_traversal; + else + break; + } + + /* + * If the user only wants one task management command + * active at a time, we're done, since we've + * already successfully sent a command at this point. + */ + if (sc->allow_multiple_tm_cmds == 0) + break; + } + } + + return (error); +} + static void mpssas_action_scsiio(struct mpssas_softc *sassc, union ccb *ccb) { @@ -1123,14 +1404,12 @@ break; } - /* XXX Need to handle multi-level LUNs */ - if (csio->ccb_h.target_lun > 255) { + if (MPS_SET_LUN(req->LUN, csio->ccb_h.target_lun) != 0) { mps_free_command(sc, cm); ccb->ccb_h.status = CAM_LUN_INVALID; xpt_done(ccb); return; } - req->LUN[1] = csio->ccb_h.target_lun; if (csio->ccb_h.flags & CAM_CDB_POINTER) bcopy(csio->cdb_io.cdb_ptr, &req->CDB.CDB32[0], csio->cdb_len); @@ -1138,6 +1417,9 @@ bcopy(csio->cdb_io.cdb_bytes, &req->CDB.CDB32[0],csio->cdb_len); req->IoFlags = csio->cdb_len; + /* + * XXX need to handle S/G lists and physical addresses here. + */ cm->cm_data = csio->data_ptr; cm->cm_length = csio->dxfer_len; cm->cm_sge = &req->SGL; @@ -1219,11 +1501,9 @@ ccb->ccb_h.status = CAM_REQ_CMP; break; case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: - /* - * XXX any way to report this? - */ + /* resid is ignored for this condition */ ccb->csio.resid = 0; - ccb->ccb_h.status = CAM_REQ_CMP; + ccb->ccb_h.status = CAM_DATA_RUN_ERR; break; case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: @@ -1304,13 +1584,335 @@ xpt_done(ccb); } +#if __FreeBSD_version >= 900026 static void +mpssas_smpio_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SMP_PASSTHROUGH_REPLY *rpl; + MPI2_SMP_PASSTHROUGH_REQUEST *req; + uint64_t sasaddr; + union ccb *ccb; + + ccb = cm->cm_complete_data; + rpl = (MPI2_SMP_PASSTHROUGH_REPLY *)cm->cm_reply; + if (rpl == NULL) { + mps_dprint(sc, MPS_INFO, "%s: NULL cm_reply!\n", __func__); + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + goto bailout; + } + + req = (MPI2_SMP_PASSTHROUGH_REQUEST *)cm->cm_req; + sasaddr = le32toh(req->SASAddress.Low); + sasaddr |= ((uint64_t)(le32toh(req->SASAddress.High))) << 32; + + if ((rpl->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS || + rpl->SASStatus != MPI2_SASSTATUS_SUCCESS) { + mps_dprint(sc, MPS_INFO, "%s: IOCStatus %04x SASStatus %02x\n", + __func__, rpl->IOCStatus, rpl->SASStatus); + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + goto bailout; + } + + mps_dprint(sc, MPS_INFO, "%s: SMP request to SAS address " + "%#jx completed successfully\n", __func__, + (uintmax_t)sasaddr); + + if (ccb->smpio.smp_response[2] == SMP_FR_ACCEPTED) + ccb->ccb_h.status = CAM_REQ_CMP; + else + ccb->ccb_h.status = CAM_SMP_STATUS_ERROR; + +bailout: + /* + * We sync in both directions because we had DMAs in the S/G list + * in both directions. + */ + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); + mps_free_command(sc, cm); + xpt_done(ccb); +} + +static void +mpssas_send_smpcmd(struct mpssas_softc *sassc, union ccb *ccb, uint64_t sasaddr) +{ + struct mps_command *cm; + uint8_t *request, *response; + MPI2_SMP_PASSTHROUGH_REQUEST *req; + struct mps_softc *sc; + struct sglist *sg; + int error; + + sc = sassc->sc; + sg = NULL; + error = 0; + + /* + * XXX We don't yet support physical addresses here. + */ + if (ccb->ccb_h.flags & (CAM_DATA_PHYS|CAM_SG_LIST_PHYS)) { + mps_printf(sc, "%s: physical addresses not supported\n", + __func__); + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + return; + } + + /* + * If the user wants to send an S/G list, check to make sure they + * have single buffers. + */ + if (ccb->ccb_h.flags & CAM_SCATTER_VALID) { + /* + * The chip does not support more than one buffer for the + * request or response. + */ + if ((ccb->smpio.smp_request_sglist_cnt > 1) + || (ccb->smpio.smp_response_sglist_cnt > 1)) { + mps_printf(sc, "%s: multiple request or response " + "buffer segments not supported for SMP\n", + __func__); + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + return; + } + + /* + * The CAM_SCATTER_VALID flag was originally implemented + * for the XPT_SCSI_IO CCB, which only has one data pointer. + * We have two. So, just take that flag to mean that we + * might have S/G lists, and look at the S/G segment count + * to figure out whether that is the case for each individual + * buffer. + */ + if (ccb->smpio.smp_request_sglist_cnt != 0) { + bus_dma_segment_t *req_sg; + + req_sg = (bus_dma_segment_t *)ccb->smpio.smp_request; + request = (uint8_t *)req_sg[0].ds_addr; + } else + request = ccb->smpio.smp_request; + + if (ccb->smpio.smp_response_sglist_cnt != 0) { + bus_dma_segment_t *rsp_sg; + + rsp_sg = (bus_dma_segment_t *)ccb->smpio.smp_response; + response = (uint8_t *)rsp_sg[0].ds_addr; + } else + response = ccb->smpio.smp_response; + } else { + request = ccb->smpio.smp_request; + response = ccb->smpio.smp_response; + } + + cm = mps_alloc_command(sc); + if (cm == NULL) { + mps_printf(sc, "%s: cannot allocate command\n", __func__); + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + } + + req = (MPI2_SMP_PASSTHROUGH_REQUEST *)cm->cm_req; + bzero(req, sizeof(*req)); + req->Function = MPI2_FUNCTION_SMP_PASSTHROUGH; + + /* Allow the chip to use any route to this SAS address. */ + req->PhysicalPort = 0xff; + + req->RequestDataLength = ccb->smpio.smp_request_len; + req->SGLFlags = + MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE | MPI2_SGLFLAGS_SGL_TYPE_MPI; + + mps_dprint(sc, MPS_INFO, "%s: sending SMP request to SAS " + "address %#jx\n", __func__, (uintmax_t)sasaddr); + + mpi_init_sge(cm, req, &req->SGL); + + /* + * Set up a uio to pass into mps_map_command(). This allows us to + * do one map command, and one busdma call in there. + */ + cm->cm_uio.uio_iov = cm->cm_iovec; + cm->cm_uio.uio_iovcnt = 2; + cm->cm_uio.uio_segflg = UIO_SYSSPACE; + + /* + * The read/write flag isn't used by busdma, but set it just in + * case. This isn't exactly accurate, either, since we're going in + * both directions. + */ + cm->cm_uio.uio_rw = UIO_WRITE; + + cm->cm_iovec[0].iov_base = request; + cm->cm_iovec[0].iov_len = req->RequestDataLength; + cm->cm_iovec[1].iov_base = response; + cm->cm_iovec[1].iov_len = ccb->smpio.smp_response_len; + + cm->cm_uio.uio_resid = cm->cm_iovec[0].iov_len + + cm->cm_iovec[1].iov_len; + + /* + * Trigger a warning message in mps_data_cb() for the user if we + * wind up exceeding two S/G segments. The chip expects one + * segment for the request and another for the response. + */ + cm->cm_max_segs = 2; + + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_complete = mpssas_smpio_complete; + cm->cm_complete_data = ccb; + + /* + * Tell the mapping code that we're using a uio, and that this is + * an SMP passthrough request. There is a little special-case + * logic there (in mps_data_cb()) to handle the bidirectional + * transfer. + */ + cm->cm_flags |= MPS_CM_FLAGS_USE_UIO | MPS_CM_FLAGS_SMP_PASS | + MPS_CM_FLAGS_DATAIN | MPS_CM_FLAGS_DATAOUT; + + /* The chip data format is little endian. */ + req->SASAddress.High = htole32(sasaddr >> 32); + req->SASAddress.Low = htole32(sasaddr); + + /* + * XXX Note that we don't have a timeout/abort mechanism here. + * From the manual, it looks like task management requests only + * work for SCSI IO and SATA passthrough requests. We may need to + * have a mechanism to retry requests in the event of a chip reset + * at least. Hopefully the chip will insure that any errors short + * of that are relayed back to the driver. + */ + error = mps_map_command(sc, cm); + if ((error != 0) && (error != EINPROGRESS)) { + mps_printf(sc, "%s: error %d returned from mps_map_command()\n", + __func__, error); + goto bailout_error; + } + + return; + +bailout_error: + mps_free_command(sc, cm); + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + +} + +static void +mpssas_action_smpio(struct mpssas_softc *sassc, union ccb *ccb) +{ + struct mps_softc *sc; + struct mpssas_target *targ; + uint64_t sasaddr = 0; + + sc = sassc->sc; + + /* + * Make sure the target exists. + */ + targ = &sassc->targets[ccb->ccb_h.target_id]; + if (targ->handle == 0x0) { + mps_printf(sc, "%s: target %d does not exist!\n", __func__, + ccb->ccb_h.target_id); + ccb->ccb_h.status = CAM_SEL_TIMEOUT; + xpt_done(ccb); + return; + } + + /* + * If this device has an embedded SMP target, we'll talk to it + * directly. + * figure out what the expander's address is. + */ + if ((targ->devinfo & MPI2_SAS_DEVICE_INFO_SMP_TARGET) != 0) + sasaddr = targ->sasaddr; + + /* + * If we don't have a SAS address for the expander yet, try + * grabbing it from the page 0x83 information cached in the + * transport layer for this target. LSI expanders report the + * expander SAS address as the port-associated SAS address in + * Inquiry VPD page 0x83. Maxim expanders don't report it in page + * 0x83. + * + * XXX KDM disable this for now, but leave it commented out so that + * it is obvious that this is another possible way to get the SAS + * address. + * + * The parent handle method below is a little more reliable, and + * the other benefit is that it works for devices other than SES + * devices. So you can send a SMP request to a da(4) device and it + * will get routed to the expander that device is attached to. + * (Assuming the da(4) device doesn't contain an SMP target...) + */ +#if 0 + if (sasaddr == 0) + sasaddr = xpt_path_sas_addr(ccb->ccb_h.path); +#endif + + /* + * If we still don't have a SAS address for the expander, look for + * the parent device of this device, which is probably the expander. + */ + if (sasaddr == 0) { + struct mpssas_target *parent_target; + + if (targ->parent_handle == 0x0) { + mps_printf(sc, "%s: handle %d does not have a valid " + "parent handle!\n", __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + parent_target = mpssas_find_target(sassc, 0, + targ->parent_handle); + + if (parent_target == NULL) { + mps_printf(sc, "%s: handle %d does not have a valid " + "parent target!\n", __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + + if ((parent_target->devinfo & + MPI2_SAS_DEVICE_INFO_SMP_TARGET) == 0) { + mps_printf(sc, "%s: handle %d parent %d does not " + "have an SMP target!\n", __func__, + targ->handle, parent_target->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + + } + + sasaddr = parent_target->sasaddr; + } + + if (sasaddr == 0) { + mps_printf(sc, "%s: unable to find SAS address for handle %d\n", + __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + mpssas_send_smpcmd(sassc, ccb, sasaddr); + + return; + +bailout: + xpt_done(ccb); + +} + +#endif /* __FreeBSD_version >= 900026 */ + +static void mpssas_action_resetdev(struct mpssas_softc *sassc, union ccb *ccb) { struct mps_softc *sc; struct mps_command *cm; struct mpssas_target *targ; - int error; sc = sassc->sc; targ = &sassc->targets[ccb->ccb_h.target_id]; @@ -1323,7 +1925,7 @@ cm = mps_alloc_command(sc); if (cm == NULL) { - mps_printf(sc, "mpssas_action_resetdev: cannot alloc command\n"); + mps_printf(sc, "%s: cannot alloc command\n", __func__); ccb->ccb_h.status = CAM_RESRC_UNAVAIL; xpt_done(ccb); return; @@ -1333,20 +1935,14 @@ cm->cm_complete = mpssas_resetdev_complete; cm->cm_complete_data = ccb; - error = mpssas_resetdev(sassc, cm); - if (error) { - ccb->ccb_h.status = CAM_RESRC_UNAVAIL; - xpt_done(ccb); - return; - } + mpssas_resetdev(sassc, cm); } -static int +static void mpssas_resetdev(struct mpssas_softc *sassc, struct mps_command *cm) { MPI2_SCSI_TASK_MANAGE_REQUEST *req; struct mps_softc *sc; - int error; mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); @@ -1363,8 +1959,7 @@ cm->cm_data = NULL; cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; - error = mps_map_command(sassc->sc, cm); - return (error); + mpssas_issue_tm_request(sc, cm); } static void @@ -1386,7 +1981,8 @@ else ccb->ccb_h.status = CAM_REQ_CMP_ERR; - mps_free_command(sc, cm); + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 1); + xpt_done(ccb); } Index: sys/dev/mps/mps_pci.c =================================================================== --- sys/dev/mps/mps_pci.c (revision 212420) +++ sys/dev/mps/mps_pci.c (working copy) @@ -38,6 +38,7 @@ #include #include #include +#include #include #include Index: sys/dev/mps/mps_user.c =================================================================== --- sys/dev/mps/mps_user.c (revision 212420) +++ sys/dev/mps/mps_user.c (working copy) @@ -33,6 +33,8 @@ #include __FBSDID("$FreeBSD$"); +#include "opt_compat.h" + #include #include #include @@ -47,6 +49,8 @@ #include #include #include +#include +#include #include #include @@ -64,17 +68,41 @@ static d_open_t mps_open; static d_close_t mps_close; -static d_ioctl_t mps_ioctl; +static d_ioctl_t mps_ioctl_devsw; static struct cdevsw mps_cdevsw = { .d_version = D_VERSION, .d_flags = 0, .d_open = mps_open, .d_close = mps_close, - .d_ioctl = mps_ioctl, + .d_ioctl = mps_ioctl_devsw, .d_name = "mps", }; +typedef int (mps_user_f)(struct mps_command *, struct mps_usr_command *); +static mps_user_f mpi_pre_ioc_facts; +static mps_user_f mpi_pre_port_facts; +static mps_user_f mpi_pre_fw_download; +static mps_user_f mpi_pre_fw_upload; +static mps_user_f mpi_pre_sata_passthrough; +static mps_user_f mpi_pre_smp_passthrough; +static mps_user_f mpi_pre_config; +static mps_user_f mpi_pre_sas_io_unit_control; + +static int mps_user_read_cfg_header(struct mps_softc *, + struct mps_cfg_page_req *); +static int mps_user_read_cfg_page(struct mps_softc *, + struct mps_cfg_page_req *, void *); +static int mps_user_read_extcfg_header(struct mps_softc *, + struct mps_ext_cfg_page_req *); +static int mps_user_read_extcfg_page(struct mps_softc *, + struct mps_ext_cfg_page_req *, void *); +static int mps_user_write_cfg_page(struct mps_softc *, + struct mps_cfg_page_req *, void *); +static int mps_user_setup_request(struct mps_command *, + struct mps_usr_command *); +static int mps_user_command(struct mps_softc *, struct mps_usr_command *); + static MALLOC_DEFINE(M_MPSUSER, "mps_user", "Buffers for mps(4) ioctls"); int @@ -294,43 +322,255 @@ return (0); } +void +mpi_init_sge(struct mps_command *cm, void *req, void *sge) +{ + int off, space; + + space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; + off = (uintptr_t)sge - (uintptr_t)req; + + KASSERT(off < space, ("bad pointers %p %p, off %d, space %d", + req, sge, off, space)); + + cm->cm_sge = sge; + cm->cm_sglsize = space - off; +} + +/* + * Prepare the mps_command for an IOC_FACTS request. + */ +static int +mpi_pre_ioc_facts(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_IOC_FACTS_REQUEST *req = (void *)cm->cm_req; + MPI2_IOC_FACTS_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * Prepare the mps_command for a PORT_FACTS request. + */ +static int +mpi_pre_port_facts(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_PORT_FACTS_REQUEST *req = (void *)cm->cm_req; + MPI2_PORT_FACTS_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * Prepare the mps_command for a FW_DOWNLOAD request. + */ +static int +mpi_pre_fw_download(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_FW_DOWNLOAD_REQUEST *req = (void *)cm->cm_req; + MPI2_FW_DOWNLOAD_REPLY *rpl; + MPI2_FW_DOWNLOAD_TCSGE tc; + int error; + + /* + * This code assumes there is room in the request's SGL for + * the TransactionContext plus at least a SGL chain element. + */ + CTASSERT(sizeof req->SGL >= sizeof tc + MPS_SGC_SIZE); + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + if (cmd->len == 0) + return (EINVAL); + + error = copyin(cmd->buf, cm->cm_data, cmd->len); + if (error != 0) + return (error); + + mpi_init_sge(cm, req, &req->SGL); + bzero(&tc, sizeof tc); + + /* + * For now, the F/W image must be provided in a single request. + */ + if ((req->MsgFlags & MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT) == 0) + return (EINVAL); + if (req->TotalImageSize != cmd->len) + return (EINVAL); + + /* + * The value of the first two elements is specified in the + * Fusion-MPT Message Passing Interface document. + */ + tc.ContextSize = 0; + tc.DetailsLength = 12; + tc.ImageOffset = 0; + tc.ImageSize = cmd->len; + + cm->cm_flags |= MPS_CM_FLAGS_DATAOUT; + + return (mps_push_sge(cm, &tc, sizeof tc, 0)); +} + +/* + * Prepare the mps_command for a FW_UPLOAD request. + */ +static int +mpi_pre_fw_upload(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_FW_UPLOAD_REQUEST *req = (void *)cm->cm_req; + MPI2_FW_UPLOAD_REPLY *rpl; + MPI2_FW_UPLOAD_TCSGE tc; + + /* + * This code assumes there is room in the request's SGL for + * the TransactionContext plus at least a SGL chain element. + */ + CTASSERT(sizeof req->SGL >= sizeof tc + MPS_SGC_SIZE); + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + if (cmd->len == 0) { + /* Perhaps just asking what the size of the fw is? */ + return (0); + } + + bzero(&tc, sizeof tc); + + /* + * The value of the first two elements is specified in the + * Fusion-MPT Message Passing Interface document. + */ + tc.ContextSize = 0; + tc.DetailsLength = 12; + /* + * XXX Is there any reason to fetch a partial image? I.e. to + * set ImageOffset to something other than 0? + */ + tc.ImageOffset = 0; + tc.ImageSize = cmd->len; + + return (mps_push_sge(cm, &tc, sizeof tc, 0)); +} + +/* + * Prepare the mps_command for a SATA_PASSTHROUGH request. + */ +static int +mpi_pre_sata_passthrough(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_SATA_PASSTHROUGH_REQUEST *req = (void *)cm->cm_req; + MPI2_SATA_PASSTHROUGH_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + return (0); +} + +/* + * Prepare the mps_command for a SMP_PASSTHROUGH request. + */ +static int +mpi_pre_smp_passthrough(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_SMP_PASSTHROUGH_REQUEST *req = (void *)cm->cm_req; + MPI2_SMP_PASSTHROUGH_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + return (0); +} + +/* + * Prepare the mps_command for a CONFIG request. + */ +static int +mpi_pre_config(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_CONFIG_REQUEST *req = (void *)cm->cm_req; + MPI2_CONFIG_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->PageBufferSGE); + return (0); +} + +/* + * Prepare the mps_command for a SAS_IO_UNIT_CONTROL request. + */ +static int +mpi_pre_sas_io_unit_control(struct mps_command *cm, + struct mps_usr_command *cmd) +{ + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * A set of functions to prepare an mps_command for the various + * supported requests. + */ struct mps_user_func { - U8 Func; - U8 SgOff; + U8 Function; + mps_user_f *f_pre; } mps_user_func_list[] = { - { MPI2_FUNCTION_IOC_FACTS, 0 }, - { MPI2_FUNCTION_PORT_FACTS, 0 }, - { MPI2_FUNCTION_FW_DOWNLOAD, offsetof(Mpi2FWDownloadRequest,SGL)}, - { MPI2_FUNCTION_FW_UPLOAD, offsetof(Mpi2FWUploadRequest_t,SGL)}, - { MPI2_FUNCTION_SATA_PASSTHROUGH,offsetof(Mpi2SataPassthroughRequest_t,SGL)}, - { MPI2_FUNCTION_SMP_PASSTHROUGH, offsetof(Mpi2SmpPassthroughRequest_t,SGL)}, - { MPI2_FUNCTION_CONFIG, offsetof(Mpi2ConfigRequest_t,PageBufferSGE)}, - { MPI2_FUNCTION_SAS_IO_UNIT_CONTROL, 0 }, -}; + { MPI2_FUNCTION_IOC_FACTS, mpi_pre_ioc_facts }, + { MPI2_FUNCTION_PORT_FACTS, mpi_pre_port_facts }, + { MPI2_FUNCTION_FW_DOWNLOAD, mpi_pre_fw_download }, + { MPI2_FUNCTION_FW_UPLOAD, mpi_pre_fw_upload }, + { MPI2_FUNCTION_SATA_PASSTHROUGH, mpi_pre_sata_passthrough }, + { MPI2_FUNCTION_SMP_PASSTHROUGH, mpi_pre_smp_passthrough}, + { MPI2_FUNCTION_CONFIG, mpi_pre_config}, + { MPI2_FUNCTION_SAS_IO_UNIT_CONTROL, mpi_pre_sas_io_unit_control }, + { 0xFF, NULL } /* list end */ +}; static int -mps_user_verify_request(MPI2_REQUEST_HEADER *hdr, MPI2_SGE_IO_UNION **psgl) +mps_user_setup_request(struct mps_command *cm, struct mps_usr_command *cmd) { - int i, err = EINVAL; + MPI2_REQUEST_HEADER *hdr = (MPI2_REQUEST_HEADER *)cm->cm_req; + struct mps_user_func *f; - for (i = 0; i < sizeof(mps_user_func_list) / - sizeof(mps_user_func_list[0]); i++ ) { - struct mps_user_func *func = &mps_user_func_list[i]; - - if (hdr->Function == func->Func) { - if (psgl != NULL) { - if (func->SgOff != 0) - *psgl = (PTR_MPI2_SGE_IO_UNION) - ((char*)hdr + func->SgOff); - else - *psgl = NULL; - err = 0; - break; - } - } - } - - return err; + for (f = mps_user_func_list; f->f_pre != NULL; f++) { + if (hdr->Function == f->Function) + return (f->f_pre(cm, cmd)); + } + return (EINVAL); } static int @@ -338,9 +578,8 @@ { MPI2_REQUEST_HEADER *hdr; MPI2_DEFAULT_REPLY *rpl; - MPI2_SGE_IO_UNION *sgl; - void *buf; - struct mps_command *cm; + void *buf = NULL; + struct mps_command *cm = NULL; int err = 0; int sz; @@ -359,16 +598,22 @@ mps_dprint(sc, MPS_INFO, "mps_user_command: req %p %d rpl %p %d\n", cmd->req, cmd->req_len, cmd->rpl, cmd->rpl_len ); - copyin(cmd->req, hdr, cmd->req_len); + if (cmd->req_len > (int)sc->facts->IOCRequestFrameSize * 4) { + err = EINVAL; + goto RetFreeUnlocked; + } + err = copyin(cmd->req, hdr, cmd->req_len); + if (err != 0) + goto RetFreeUnlocked; mps_dprint(sc, MPS_INFO, "mps_user_command: Function %02X " "MsgFlags %02X\n", hdr->Function, hdr->MsgFlags ); - err = mps_user_verify_request(hdr, &sgl); + err = mps_user_setup_request(cm, cmd); if (err != 0) { mps_printf(sc, "mps_user_command: unsupported function 0x%X\n", hdr->Function ); - goto RetFree; + goto RetFreeUnlocked; } if (cmd->len > 0) { @@ -376,24 +621,22 @@ cm->cm_data = buf; cm->cm_length = cmd->len; } else { - buf = NULL; cm->cm_data = NULL; cm->cm_length = 0; } - cm->cm_sge = sgl; - cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_WAKEUP; cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; mps_lock(sc); err = mps_map_command(sc, cm); - if (err != 0) { - mps_printf(sc, "mps_user_command: request timed out\n"); + if (err != 0 && err != EINPROGRESS) { + mps_printf(sc, "%s: invalid request: error %d\n", + __func__, err); goto Ret; } - msleep(cm, &sc->mps_mtx, 0, "mpsuser", 0); /* 30 seconds */ + msleep(cm, &sc->mps_mtx, 0, "mpsuser", 0); rpl = (MPI2_DEFAULT_REPLY *)cm->cm_reply; sz = rpl->MsgLength * 4; @@ -408,41 +651,29 @@ mps_unlock(sc); copyout(rpl, cmd->rpl, sz); - if (buf != NULL) { + if (buf != NULL) copyout(buf, cmd->buf, cmd->len); - free(buf, M_MPSUSER); - } - mps_lock(sc); - mps_dprint(sc, MPS_INFO, "mps_user_command: reply size %d\n", sz ); -RetFree: - mps_free_command(sc, cm); - +RetFreeUnlocked: + mps_lock(sc); + if (cm != NULL) + mps_free_command(sc, cm); Ret: mps_unlock(sc); - return err; + if (buf != NULL) + free(buf, M_MPSUSER); + return (err); } -#ifdef __amd64__ -#define PTRIN(p) ((void *)(uintptr_t)(p)) -#define PTROUT(v) ((u_int32_t)(uintptr_t)(v)) -#endif - static int -mps_ioctl(struct cdev *dev, u_long cmd, caddr_t arg, int flag, +mps_ioctl(struct cdev *dev, u_long cmd, void *arg, int flag, struct thread *td) { struct mps_softc *sc; struct mps_cfg_page_req *page_req; struct mps_ext_cfg_page_req *ext_page_req; void *mps_page; -#ifdef __amd64__ - struct mps_cfg_page_req32 *page_req32; - struct mps_cfg_page_req page_req_swab; - struct mps_ext_cfg_page_req32 *ext_page_req32; - struct mps_ext_cfg_page_req ext_page_req_swab; -#endif int error; mps_page = NULL; @@ -450,47 +681,12 @@ page_req = (void *)arg; ext_page_req = (void *)arg; -#ifdef __amd64__ - /* Convert 32-bit structs to native ones. */ - page_req32 = (void *)arg; - ext_page_req32 = (void *)arg; switch (cmd) { - case MPSIO_READ_CFG_HEADER32: - case MPSIO_READ_CFG_PAGE32: - case MPSIO_WRITE_CFG_PAGE32: - page_req = &page_req_swab; - page_req->header = page_req32->header; - page_req->page_address = page_req32->page_address; - page_req->buf = PTRIN(page_req32->buf); - page_req->len = page_req32->len; - page_req->ioc_status = page_req32->ioc_status; - break; - case MPSIO_READ_EXT_CFG_HEADER32: - case MPSIO_READ_EXT_CFG_PAGE32: - ext_page_req = &ext_page_req_swab; - ext_page_req->header = ext_page_req32->header; - ext_page_req->page_address = ext_page_req32->page_address; - ext_page_req->buf = PTRIN(ext_page_req32->buf); - ext_page_req->len = ext_page_req32->len; - ext_page_req->ioc_status = ext_page_req32->ioc_status; - break; - default: - return (ENOIOCTL); - } -#endif - - switch (cmd) { -#ifdef __amd64__ - case MPSIO_READ_CFG_HEADER32: -#endif case MPSIO_READ_CFG_HEADER: mps_lock(sc); error = mps_user_read_cfg_header(sc, page_req); mps_unlock(sc); break; -#ifdef __amd64__ - case MPSIO_READ_CFG_PAGE32: -#endif case MPSIO_READ_CFG_PAGE: mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK | M_ZERO); error = copyin(page_req->buf, mps_page, @@ -504,17 +700,11 @@ break; error = copyout(mps_page, page_req->buf, page_req->len); break; -#ifdef __amd64__ - case MPSIO_READ_EXT_CFG_HEADER32: -#endif case MPSIO_READ_EXT_CFG_HEADER: mps_lock(sc); error = mps_user_read_extcfg_header(sc, ext_page_req); mps_unlock(sc); break; -#ifdef __amd64__ - case MPSIO_READ_EXT_CFG_PAGE32: -#endif case MPSIO_READ_EXT_CFG_PAGE: mps_page = malloc(ext_page_req->len, M_MPSUSER, M_WAITOK|M_ZERO); error = copyin(ext_page_req->buf, mps_page, @@ -528,9 +718,6 @@ break; error = copyout(mps_page, ext_page_req->buf, ext_page_req->len); break; -#ifdef __amd64__ - case MPSIO_WRITE_CFG_PAGE32: -#endif case MPSIO_WRITE_CFG_PAGE: mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK|M_ZERO); error = copyin(page_req->buf, mps_page, page_req->len); @@ -551,33 +738,207 @@ if (mps_page != NULL) free(mps_page, M_MPSUSER); - if (error) - return (error); + return (error); +} -#ifdef __amd64__ - /* Convert native structs to 32-bit ones. */ - switch (cmd) { +#ifdef COMPAT_FREEBSD32 + +/* Macros from compat/freebsd32/freebsd32.h */ +#define PTRIN(v) (void *)(uintptr_t)(v) +#define PTROUT(v) (uint32_t)(uintptr_t)(v) + +#define CP(src,dst,fld) do { (dst).fld = (src).fld; } while (0) +#define PTRIN_CP(src,dst,fld) \ + do { (dst).fld = PTRIN((src).fld); } while (0) +#define PTROUT_CP(src,dst,fld) \ + do { (dst).fld = PTROUT((src).fld); } while (0) + +struct mps_cfg_page_req32 { + MPI2_CONFIG_PAGE_HEADER header; + uint32_t page_address; + uint32_t buf; + int len; + uint16_t ioc_status; +}; + +struct mps_ext_cfg_page_req32 { + MPI2_CONFIG_EXTENDED_PAGE_HEADER header; + uint32_t page_address; + uint32_t buf; + int len; + uint16_t ioc_status; +}; + +struct mps_raid_action32 { + uint8_t action; + uint8_t volume_bus; + uint8_t volume_id; + uint8_t phys_disk_num; + uint32_t action_data_word; + uint32_t buf; + int len; + uint32_t volume_status; + uint32_t action_data[4]; + uint16_t action_status; + uint16_t ioc_status; + uint8_t write; +}; + +struct mps_usr_command32 { + uint32_t req; + uint32_t req_len; + uint32_t rpl; + uint32_t rpl_len; + uint32_t buf; + int len; + uint32_t flags; +}; + +#define MPSIO_READ_CFG_HEADER32 _IOWR('M', 200, struct mps_cfg_page_req32) +#define MPSIO_READ_CFG_PAGE32 _IOWR('M', 201, struct mps_cfg_page_req32) +#define MPSIO_READ_EXT_CFG_HEADER32 _IOWR('M', 202, struct mps_ext_cfg_page_req32) +#define MPSIO_READ_EXT_CFG_PAGE32 _IOWR('M', 203, struct mps_ext_cfg_page_req32) +#define MPSIO_WRITE_CFG_PAGE32 _IOWR('M', 204, struct mps_cfg_page_req32) +#define MPSIO_RAID_ACTION32 _IOWR('M', 205, struct mps_raid_action32) +#define MPSIO_MPS_COMMAND32 _IOWR('M', 210, struct mps_usr_command32) + +static int +mps_ioctl32(struct cdev *dev, u_long cmd32, void *_arg, int flag, + struct thread *td) +{ + struct mps_cfg_page_req32 *page32 = _arg; + struct mps_ext_cfg_page_req32 *ext32 = _arg; + struct mps_raid_action32 *raid32 = _arg; + struct mps_usr_command32 *user32 = _arg; + union { + struct mps_cfg_page_req page; + struct mps_ext_cfg_page_req ext; + struct mps_raid_action raid; + struct mps_usr_command user; + } arg; + u_long cmd; + int error; + + switch (cmd32) { case MPSIO_READ_CFG_HEADER32: case MPSIO_READ_CFG_PAGE32: case MPSIO_WRITE_CFG_PAGE32: - page_req32->header = page_req->header; - page_req32->page_address = page_req->page_address; - page_req32->buf = PTROUT(page_req->buf); - page_req32->len = page_req->len; - page_req32->ioc_status = page_req->ioc_status; + if (cmd32 == MPSIO_READ_CFG_HEADER32) + cmd = MPSIO_READ_CFG_HEADER; + else if (cmd32 == MPSIO_READ_CFG_PAGE32) + cmd = MPSIO_READ_CFG_PAGE; + else + cmd = MPSIO_WRITE_CFG_PAGE; + CP(*page32, arg.page, header); + CP(*page32, arg.page, page_address); + PTRIN_CP(*page32, arg.page, buf); + CP(*page32, arg.page, len); + CP(*page32, arg.page, ioc_status); break; + case MPSIO_READ_EXT_CFG_HEADER32: - case MPSIO_READ_EXT_CFG_PAGE32: - ext_page_req32->header = ext_page_req->header; - ext_page_req32->page_address = ext_page_req->page_address; - ext_page_req32->buf = PTROUT(ext_page_req->buf); - ext_page_req32->len = ext_page_req->len; - ext_page_req32->ioc_status = ext_page_req->ioc_status; + case MPSIO_READ_EXT_CFG_PAGE32: + if (cmd32 == MPSIO_READ_EXT_CFG_HEADER32) + cmd = MPSIO_READ_EXT_CFG_HEADER; + else + cmd = MPSIO_READ_EXT_CFG_PAGE; + CP(*ext32, arg.ext, header); + CP(*ext32, arg.ext, page_address); + PTRIN_CP(*ext32, arg.ext, buf); + CP(*ext32, arg.ext, len); + CP(*ext32, arg.ext, ioc_status); break; + + case MPSIO_RAID_ACTION32: + cmd = MPSIO_RAID_ACTION; + CP(*raid32, arg.raid, action); + CP(*raid32, arg.raid, volume_bus); + CP(*raid32, arg.raid, volume_id); + CP(*raid32, arg.raid, phys_disk_num); + CP(*raid32, arg.raid, action_data_word); + PTRIN_CP(*raid32, arg.raid, buf); + CP(*raid32, arg.raid, len); + CP(*raid32, arg.raid, volume_status); + bcopy(raid32->action_data, arg.raid.action_data, + sizeof arg.raid.action_data); + CP(*raid32, arg.raid, ioc_status); + CP(*raid32, arg.raid, write); + break; + + case MPSIO_MPS_COMMAND32: + cmd = MPSIO_MPS_COMMAND; + PTRIN_CP(*user32, arg.user, req); + CP(*user32, arg.user, req_len); + PTRIN_CP(*user32, arg.user, rpl); + CP(*user32, arg.user, rpl_len); + PTRIN_CP(*user32, arg.user, buf); + CP(*user32, arg.user, len); + CP(*user32, arg.user, flags); + break; default: return (ENOIOCTL); } -#endif - return (0); + error = mps_ioctl(dev, cmd, &arg, flag, td); + if (error == 0 && (cmd32 & IOC_OUT) != 0) { + switch (cmd32) { + case MPSIO_READ_CFG_HEADER32: + case MPSIO_READ_CFG_PAGE32: + case MPSIO_WRITE_CFG_PAGE32: + CP(arg.page, *page32, header); + CP(arg.page, *page32, page_address); + PTROUT_CP(arg.page, *page32, buf); + CP(arg.page, *page32, len); + CP(arg.page, *page32, ioc_status); + break; + + case MPSIO_READ_EXT_CFG_HEADER32: + case MPSIO_READ_EXT_CFG_PAGE32: + CP(arg.ext, *ext32, header); + CP(arg.ext, *ext32, page_address); + PTROUT_CP(arg.ext, *ext32, buf); + CP(arg.ext, *ext32, len); + CP(arg.ext, *ext32, ioc_status); + break; + + case MPSIO_RAID_ACTION32: + CP(arg.raid, *raid32, action); + CP(arg.raid, *raid32, volume_bus); + CP(arg.raid, *raid32, volume_id); + CP(arg.raid, *raid32, phys_disk_num); + CP(arg.raid, *raid32, action_data_word); + PTROUT_CP(arg.raid, *raid32, buf); + CP(arg.raid, *raid32, len); + CP(arg.raid, *raid32, volume_status); + bcopy(arg.raid.action_data, raid32->action_data, + sizeof arg.raid.action_data); + CP(arg.raid, *raid32, ioc_status); + CP(arg.raid, *raid32, write); + break; + + case MPSIO_MPS_COMMAND32: + PTROUT_CP(arg.user, *user32, req); + CP(arg.user, *user32, req_len); + PTROUT_CP(arg.user, *user32, rpl); + CP(arg.user, *user32, rpl_len); + PTROUT_CP(arg.user, *user32, buf); + CP(arg.user, *user32, len); + CP(arg.user, *user32, flags); + break; + } + } + + return (error); } +#endif /* COMPAT_FREEBSD32 */ + +static int +mps_ioctl_devsw(struct cdev *dev, u_long com, caddr_t arg, int flag, + struct thread *td) +{ +#ifdef COMPAT_FREEBSD32 + if (SV_CURPROC_FLAG(SV_ILP32)) + return (mps_ioctl32(dev, com, arg, flag, td)); +#endif + return (mps_ioctl(dev, com, arg, flag, td)); +} Index: sys/dev/mps/mpsvar.h =================================================================== --- sys/dev/mps/mpsvar.h (revision 212420) +++ sys/dev/mps/mpsvar.h (working copy) @@ -60,11 +60,19 @@ uint32_t chain_busaddr; }; +/* + * This needs to be at least 2 to support SMP passthrough. + */ +#define MPS_IOVEC_COUNT 2 + struct mps_command { TAILQ_ENTRY(mps_command) cm_link; struct mps_softc *cm_sc; void *cm_data; u_int cm_length; + struct uio cm_uio; + struct iovec cm_iovec[MPS_IOVEC_COUNT]; + u_int cm_max_segs; u_int cm_sglsize; MPI2_SGE_IO_UNION *cm_sge; uint8_t *cm_req; @@ -81,6 +89,9 @@ #define MPS_CM_FLAGS_DATAOUT (1 << 3) #define MPS_CM_FLAGS_DATAIN (1 << 4) #define MPS_CM_FLAGS_WAKEUP (1 << 5) +#define MPS_CM_FLAGS_ACTIVE (1 << 6) +#define MPS_CM_FLAGS_USE_UIO (1 << 7) +#define MPS_CM_FLAGS_SMP_PASS (1 << 8) u_int cm_state; #define MPS_CM_STATE_FREE 0 #define MPS_CM_STATE_BUSY 1 @@ -109,6 +120,8 @@ #define MPS_FLAGS_BUSY (1 << 2) #define MPS_FLAGS_SHUTDOWN (1 << 3) u_int mps_debug; + u_int allow_multiple_tm_cmds; + int tm_cmds_active; struct sysctl_ctx_list sysctl_ctx; struct sysctl_oid *sysctl_tree; struct mps_command *commands; @@ -119,9 +132,9 @@ TAILQ_HEAD(, mps_command) req_list; TAILQ_HEAD(, mps_chain) chain_list; + TAILQ_HEAD(, mps_command) tm_list; int replypostindex; int replyfreeindex; - int replycurindex; struct resource *mps_regs_resource; bus_space_handle_t mps_bhandle; @@ -234,12 +247,15 @@ { struct mps_chain *chain, *chain_temp; - if (cm->cm_reply != NULL) + if (cm->cm_reply != NULL) { mps_free_reply(sc, cm->cm_reply_data); + cm->cm_reply = NULL; + } cm->cm_flags = 0; cm->cm_complete = NULL; cm->cm_complete_data = NULL; cm->cm_targ = 0; + cm->cm_max_segs = 0; cm->cm_state = MPS_CM_STATE_FREE; TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); @@ -355,12 +371,16 @@ int mps_update_events(struct mps_softc *, struct mps_event_handle *, uint8_t *); int mps_deregister_events(struct mps_softc *, struct mps_event_handle *); int mps_request_polled(struct mps_softc *sc, struct mps_command *cm); +void mps_enqueue_request(struct mps_softc *, struct mps_command *); +int mps_push_sge(struct mps_command *, void *, size_t, int); +int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); int mps_attach_sas(struct mps_softc *sc); int mps_detach_sas(struct mps_softc *sc); int mps_map_command(struct mps_softc *sc, struct mps_command *cm); int mps_read_config_page(struct mps_softc *, struct mps_config_params *); int mps_write_config_page(struct mps_softc *, struct mps_config_params *); void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); +void mpi_init_sge(struct mps_command *cm, void *req, void *sge); int mps_attach_user(struct mps_softc *); void mps_detach_user(struct mps_softc *); Index: sys/dev/bwn/if_bwn.c =================================================================== --- sys/dev/bwn/if_bwn.c (revision 218743) +++ sys/dev/bwn/if_bwn.c (working copy) @@ -2882,7 +2882,7 @@ error = bwn_switch_band(sc, ic->ic_curchan); if (error) - goto fail;; + goto fail; bwn_mac_suspend(mac); bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG); chan = ieee80211_chan2ieee(ic, ic->ic_curchan); @@ -8260,7 +8260,7 @@ device_printf(sc->sc_dev, "switching to %s-GHz band\n", IEEE80211_IS_CHAN_2GHZ(chan) ? "2" : "5"); - down_dev = sc->sc_curmac;; + down_dev = sc->sc_curmac; status = down_dev->mac_status; if (status >= BWN_MAC_STATUS_STARTED) bwn_core_stop(down_dev); Property changes on: sys/contrib/pf ___________________________________________________________________ Modified: svn:mergeinfo Merged /head/sys/contrib/pf:r212420,212616,212772,212802,213535,213702,213704,213707-213708,213743,213839-213840,213882,213898,216088,216227,216363,216368 Property changes on: sys/contrib/dev/acpica ___________________________________________________________________ Modified: svn:mergeinfo Merged /head/sys/contrib/dev/acpica:r212420,212616,212772,212802,213535,213702,213704,213707-213708,213743,213839-213840,213882,213898,216088,216227,216363,216368 Property changes on: sys/cddl/contrib/opensolaris ___________________________________________________________________ Modified: svn:mergeinfo Merged /head/sys/cddl/contrib/opensolaris:r212420,212616,212772,212802,213535,213702,213704,213707-213708,213743,213839-213840,213882,213898,216088,216227,216363,216368 Property changes on: sys/amd64/include/xen ___________________________________________________________________ Modified: svn:mergeinfo Merged /head/sys/amd64/include/xen:r212420,212616,212772,212802,213535,213702,213704,213707-213708,213743,213839-213840,213882,213898,216088,216227,216363,216368 Index: sys/amd64/conf/GENERIC =================================================================== --- sys/amd64/conf/GENERIC (revision 218743) +++ sys/amd64/conf/GENERIC (working copy) @@ -114,6 +114,7 @@ device isp # Qlogic family #device ispfw # Firmware for QLogic HBAs- normally a module device mpt # LSI-Logic MPT-Fusion +device mps # LSI-Logic MPT-Fusion 2 #device ncr # NCR/Symbios Logic device sym # NCR/Symbios Logic (newer chipsets + those of `ncr') device trm # Tekram DC395U/UW/F DC315U adapters --6c2NcOVqGQ03X4Wi-- From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 19:07:20 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 644E9106564A; Wed, 16 Feb 2011 19:07:20 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id C1FC68FC17; Wed, 16 Feb 2011 19:07:19 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1GJ7BEB097023; Wed, 16 Feb 2011 22:07:11 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Wed, 16 Feb 2011 22:07:11 +0300 (MSK) From: Dmitry Morozovsky To: "Kenneth D. Merry" In-Reply-To: <20110216172643.GA37858@nargothrond.kdm.org> Message-ID: References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Wed, 16 Feb 2011 22:07:11 +0300 (MSK) Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 19:07:20 -0000 On Wed, 16 Feb 2011, Kenneth D. Merry wrote: KDM> > Ah that makes sense. I'm a bit reluctant to use -current on this particular KDM> > machine, so I would discuss MFCing mps driver wirh ken@ KDM> KDM> I have attached a patch against -stable, try it out and let me know whether KDM> it works. If so I'll go ahead and MFC it. I'm afraid something goes wrong at your side, at least in some files in sys/dev/mps, like Index: sys/dev/mps/mps_ioctl.h =================================================================== --- sys/dev/mps/mps_ioctl.h (revision 212420) +++ sys/dev/mps/mps_ioctl.h (working copy) as there is no sys/dev/mps in stable/8 kernel sources -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Wed Feb 16 20:36:05 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 584B71065674 for ; Wed, 16 Feb 2011 20:36:05 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 22B1A8FC19 for ; Wed, 16 Feb 2011 20:35:58 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1GKZhen041253; Wed, 16 Feb 2011 13:35:43 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1GKZgQd041252; Wed, 16 Feb 2011 13:35:42 -0700 (MST) (envelope-from ken) Date: Wed, 16 Feb 2011 13:35:42 -0700 From: "Kenneth D. Merry" To: Dmitry Morozovsky Message-ID: <20110216203542.GA41226@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="qMm9M+Fa2AknHoGS" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2i X-Mailman-Approved-At: Wed, 16 Feb 2011 21:06:03 +0000 Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Feb 2011 20:36:06 -0000 --qMm9M+Fa2AknHoGS Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Feb 16, 2011 at 22:07:11 +0300, Dmitry Morozovsky wrote: > On Wed, 16 Feb 2011, Kenneth D. Merry wrote: > > KDM> > Ah that makes sense. I'm a bit reluctant to use -current on this particular > KDM> > machine, so I would discuss MFCing mps driver wirh ken@ > KDM> > KDM> I have attached a patch against -stable, try it out and let me know whether > KDM> it works. If so I'll go ahead and MFC it. > > I'm afraid something goes wrong at your side, at least in some files in > sys/dev/mps, like > > Index: sys/dev/mps/mps_ioctl.h > =================================================================== > --- sys/dev/mps/mps_ioctl.h (revision 212420) > +++ sys/dev/mps/mps_ioctl.h (working copy) > > as there is no sys/dev/mps in stable/8 kernel sources Whoops, svn diff doesn't do the right thing when there are multiple changes merged. I re-did the diffs manually, you should be able to do something like: cd src cat patch |patch -p4 Ken -- Kenneth Merry ken@FreeBSD.ORG --qMm9M+Fa2AknHoGS Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="mps_stable.20110216.3.txt" diff -x .svn -urN sys/amd64/conf/GENERIC ../../stable/8/sys/amd64/conf/GENERIC --- sys/amd64/conf/GENERIC 2011-01-07 15:03:42.295368047 -0700 +++ ../../stable/8/sys/amd64/conf/GENERIC 2011-01-07 14:33:13.012014226 -0700 @@ -114,6 +114,7 @@ device isp # Qlogic family #device ispfw # Firmware for QLogic HBAs- normally a module device mpt # LSI-Logic MPT-Fusion +device mps # LSI-Logic MPT-Fusion 2 #device ncr # NCR/Symbios Logic device sym # NCR/Symbios Logic (newer chipsets + those of `ncr') device trm # Tekram DC395U/UW/F DC315U adapters diff -x .svn -urN sys/conf/files ../../stable/8/sys/conf/files --- sys/conf/files 2011-02-16 10:02:31.958763733 -0700 +++ ../../stable/8/sys/conf/files 2011-02-16 10:08:39.323115505 -0700 @@ -1303,6 +1303,11 @@ dev/mmc/mmcbus_if.m standard dev/mmc/mmcsd.c optional mmcsd dev/mn/if_mn.c optional mn pci +dev/mps/mps.c optional mps +dev/mps/mps_pci.c optional mps pci +dev/mps/mps_sas.c optional mps +dev/mps/mps_table.c optional mps +dev/mps/mps_user.c optional mps dev/mpt/mpt.c optional mpt dev/mpt/mpt_cam.c optional mpt dev/mpt/mpt_debug.c optional mpt diff -x .svn -urN sys/dev/bwn/if_bwn.c ../../stable/8/sys/dev/bwn/if_bwn.c --- sys/dev/bwn/if_bwn.c 2011-02-16 10:02:35.844775993 -0700 +++ ../../stable/8/sys/dev/bwn/if_bwn.c 2011-02-16 10:08:44.335701618 -0700 @@ -2882,7 +2882,7 @@ error = bwn_switch_band(sc, ic->ic_curchan); if (error) - goto fail;; + goto fail; bwn_mac_suspend(mac); bwn_set_txretry(mac, BWN_RETRY_SHORT, BWN_RETRY_LONG); chan = ieee80211_chan2ieee(ic, ic->ic_curchan); @@ -8260,7 +8260,7 @@ device_printf(sc->sc_dev, "switching to %s-GHz band\n", IEEE80211_IS_CHAN_2GHZ(chan) ? "2" : "5"); - down_dev = sc->sc_curmac;; + down_dev = sc->sc_curmac; status = down_dev->mac_status; if (status >= BWN_MAC_STATUS_STARTED) bwn_core_stop(down_dev); diff -x .svn -urN sys/dev/mps/mpi/mpi2.h ../../stable/8/sys/dev/mps/mpi/mpi2.h --- sys/dev/mps/mpi/mpi2.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2.h 2011-01-07 14:33:12.703724259 -0700 @@ -0,0 +1,1121 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2009 LSI Corporation. + * + * + * Name: mpi2.h + * Title: MPI Message independent structures and definitions + * including System Interface Register Set and + * scatter/gather formats. + * Creation Date: June 21, 2006 + * + * mpi2.h Version: 02.00.14 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. + * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. + * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. + * Moved ReplyPostHostIndex register to offset 0x6C of the + * MPI2_SYSTEM_INTERFACE_REGS and modified the define for + * MPI2_REPLY_POST_HOST_INDEX_OFFSET. + * Added union of request descriptors. + * Added union of reply descriptors. + * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. + * Added define for MPI2_VERSION_02_00. + * Fixed the size of the FunctionDependent5 field in the + * MPI2_DEFAULT_REPLY structure. + * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. + * Removed the MPI-defined Fault Codes and extended the + * product specific codes up to 0xEFFF. + * Added a sixth key value for the WriteSequence register + * and changed the flush value to 0x0. + * Added message function codes for Diagnostic Buffer Post + * and Diagnsotic Release. + * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED + * Moved MPI2_VERSION_UNION from mpi2_ioc.h. + * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. + * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. + * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. + * Added #defines for marking a reply descriptor as unused. + * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. + * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. + * Moved LUN field defines from mpi2_init.h. + * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. + * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT. + * In all request and reply descriptors, replaced VF_ID + * field with MSIxIndex field. + * Removed DevHandle field from + * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those + * bytes reserved. + * Added RAID Accelerator functionality. + * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT. + * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT. + * Added MSI-x index mask and shift for Reply Post Host + * Index register. + * Added function code for Host Based Discovery Action. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_H +#define MPI2_H + + +/***************************************************************************** +* +* MPI Version Definitions +* +*****************************************************************************/ + +#define MPI2_VERSION_MAJOR (0x02) +#define MPI2_VERSION_MINOR (0x00) +#define MPI2_VERSION_MAJOR_MASK (0xFF00) +#define MPI2_VERSION_MAJOR_SHIFT (8) +#define MPI2_VERSION_MINOR_MASK (0x00FF) +#define MPI2_VERSION_MINOR_SHIFT (0) +#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ + MPI2_VERSION_MINOR) + +#define MPI2_VERSION_02_00 (0x0200) + +/* versioning for this MPI header set */ +#define MPI2_HEADER_VERSION_UNIT (0x0E) +#define MPI2_HEADER_VERSION_DEV (0x00) +#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) +#define MPI2_HEADER_VERSION_UNIT_SHIFT (8) +#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) +#define MPI2_HEADER_VERSION_DEV_SHIFT (0) +#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) + + +/***************************************************************************** +* +* IOC State Definitions +* +*****************************************************************************/ + +#define MPI2_IOC_STATE_RESET (0x00000000) +#define MPI2_IOC_STATE_READY (0x10000000) +#define MPI2_IOC_STATE_OPERATIONAL (0x20000000) +#define MPI2_IOC_STATE_FAULT (0x40000000) + +#define MPI2_IOC_STATE_MASK (0xF0000000) +#define MPI2_IOC_STATE_SHIFT (28) + +/* Fault state range for prodcut specific codes */ +#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000) +#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF) + + +/***************************************************************************** +* +* System Interface Register Definitions +* +*****************************************************************************/ + +typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS +{ + U32 Doorbell; /* 0x00 */ + U32 WriteSequence; /* 0x04 */ + U32 HostDiagnostic; /* 0x08 */ + U32 Reserved1; /* 0x0C */ + U32 DiagRWData; /* 0x10 */ + U32 DiagRWAddressLow; /* 0x14 */ + U32 DiagRWAddressHigh; /* 0x18 */ + U32 Reserved2[5]; /* 0x1C */ + U32 HostInterruptStatus; /* 0x30 */ + U32 HostInterruptMask; /* 0x34 */ + U32 DCRData; /* 0x38 */ + U32 DCRAddress; /* 0x3C */ + U32 Reserved3[2]; /* 0x40 */ + U32 ReplyFreeHostIndex; /* 0x48 */ + U32 Reserved4[8]; /* 0x4C */ + U32 ReplyPostHostIndex; /* 0x6C */ + U32 Reserved5; /* 0x70 */ + U32 HCBSize; /* 0x74 */ + U32 HCBAddressLow; /* 0x78 */ + U32 HCBAddressHigh; /* 0x7C */ + U32 Reserved6[16]; /* 0x80 */ + U32 RequestDescriptorPostLow; /* 0xC0 */ + U32 RequestDescriptorPostHigh; /* 0xC4 */ + U32 Reserved7[14]; /* 0xC8 */ +} MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, + Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; + +/* + * Defines for working with the Doorbell register. + */ +#define MPI2_DOORBELL_OFFSET (0x00000000) + +/* IOC --> System values */ +#define MPI2_DOORBELL_USED (0x08000000) +#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000) +#define MPI2_DOORBELL_WHO_INIT_SHIFT (24) +#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF) +#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF) + +/* System --> IOC values */ +#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000) +#define MPI2_DOORBELL_FUNCTION_SHIFT (24) +#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) +#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16) + + +/* + * Defines for the WriteSequence register + */ +#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004) +#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F) +#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0) +#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF) +#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4) +#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB) +#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2) +#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7) +#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD) + +/* + * Defines for the HostDiagnostic register + */ +#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008) + +#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800) +#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000) +#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800) + +#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) +#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200) +#define MPI2_DIAG_HCB_MODE (0x00000100) +#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080) +#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040) +#define MPI2_DIAG_RESET_HISTORY (0x00000020) +#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010) +#define MPI2_DIAG_RESET_ADAPTER (0x00000004) +#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002) + +/* + * Offsets for DiagRWData and address + */ +#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010) +#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014) +#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018) + +/* + * Defines for the HostInterruptStatus register + */ +#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) +#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000) +#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS +#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000) +#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008) +#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001) +#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS + +/* + * Defines for the HostInterruptMask register + */ +#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034) +#define MPI2_HIM_RESET_IRQ_MASK (0x40000000) +#define MPI2_HIM_REPLY_INT_MASK (0x00000008) +#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK +#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001) +#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK + +/* + * Offsets for DCRData and address + */ +#define MPI2_DCR_DATA_OFFSET (0x00000038) +#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C) + +/* + * Offset for the Reply Free Queue + */ +#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) + +/* + * Defines for the Reply Descriptor Post Queue + */ +#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) +#define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF) +#define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000) +#define MPI2_RPHI_MSIX_INDEX_SHIFT (24) + +/* + * Defines for the HCBSize and address + */ +#define MPI2_HCB_SIZE_OFFSET (0x00000074) +#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000) +#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001) + +#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078) +#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C) + +/* + * Offsets for the Request Queue + */ +#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) +#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) + + +/***************************************************************************** +* +* Message Descriptors +* +*****************************************************************************/ + +/* Request Descriptors */ + +/* Default Request Descriptor */ +typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR +{ + U8 RequestFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 LMID; /* 0x04 */ + U16 DescriptorTypeDependent; /* 0x06 */ +} MPI2_DEFAULT_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, + Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; + +/* defines for the RequestFlags field */ +#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E) +#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) +#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) +#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) +#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) +#define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A) + +#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) + + +/* High Priority Request Descriptor */ +typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR +{ + U8 RequestFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 LMID; /* 0x04 */ + U16 Reserved1; /* 0x06 */ +} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, + Mpi2HighPriorityRequestDescriptor_t, + MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; + + +/* SCSI IO Request Descriptor */ +typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR +{ + U8 RequestFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 LMID; /* 0x04 */ + U16 DevHandle; /* 0x06 */ +} MPI2_SCSI_IO_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, + Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; + + +/* SCSI Target Request Descriptor */ +typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR +{ + U8 RequestFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 LMID; /* 0x04 */ + U16 IoIndex; /* 0x06 */ +} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, + Mpi2SCSITargetRequestDescriptor_t, + MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; + + +/* RAID Accelerator Request Descriptor */ +typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR +{ + U8 RequestFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 LMID; /* 0x04 */ + U16 Reserved; /* 0x06 */ +} MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, + Mpi2RAIDAcceleratorRequestDescriptor_t, + MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t; + + +/* union of Request Descriptors */ +typedef union _MPI2_REQUEST_DESCRIPTOR_UNION +{ + MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; + MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; + MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; + MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; + MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator; + U64 Words; +} MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, + Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; + + +/* Reply Descriptors */ + +/* Default Reply Descriptor */ +typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 DescriptorTypeDependent1; /* 0x02 */ + U32 DescriptorTypeDependent2; /* 0x04 */ +} MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, + Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; + +/* defines for the ReplyFlags field */ +#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F) +#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) +#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) +#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) +#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) +#define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05) +#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) + +/* values for marking a reply descriptor as unused */ +#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) +#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF) + +/* Address Reply Descriptor */ +typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U32 ReplyFrameAddress; /* 0x04 */ +} MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, + Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; + +#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00) + + +/* SCSI IO Success Reply Descriptor */ +typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U16 TaskTag; /* 0x04 */ + U16 Reserved1; /* 0x06 */ +} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, + Mpi2SCSIIOSuccessReplyDescriptor_t, + MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; + + +/* TargetAssist Success Reply Descriptor */ +typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U8 SequenceNumber; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 IoIndex; /* 0x06 */ +} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, + Mpi2TargetAssistSuccessReplyDescriptor_t, + MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; + + +/* Target Command Buffer Reply Descriptor */ +typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U8 VP_ID; /* 0x02 */ + U8 Flags; /* 0x03 */ + U16 InitiatorDevHandle; /* 0x04 */ + U16 IoIndex; /* 0x06 */ +} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, + Mpi2TargetCommandBufferReplyDescriptor_t, + MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; + +/* defines for Flags field */ +#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F) + + +/* RAID Accelerator Success Reply Descriptor */ +typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR +{ + U8 ReplyFlags; /* 0x00 */ + U8 MSIxIndex; /* 0x01 */ + U16 SMID; /* 0x02 */ + U32 Reserved; /* 0x04 */ +} MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, + MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, + Mpi2RAIDAcceleratorSuccessReplyDescriptor_t, + MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t; + + +/* union of Reply Descriptors */ +typedef union _MPI2_REPLY_DESCRIPTORS_UNION +{ + MPI2_DEFAULT_REPLY_DESCRIPTOR Default; + MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; + MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; + MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; + MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; + MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess; + U64 Words; +} MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, + Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; + + + +/***************************************************************************** +* +* Message Functions +* 0x80 -> 0x8F reserved for private message use per product +* +* +*****************************************************************************/ + +#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */ +#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */ +#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */ +#define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */ +#define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */ +#define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */ +#define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */ +#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */ +#define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */ +#define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */ +#define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */ +#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */ +#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */ +#define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */ +#define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */ +#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */ +#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */ +#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */ +#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */ +#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ +#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */ +#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ +#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ +#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ +#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ +#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */ +#define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */ + + + +/* Doorbell functions */ +#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) +#define MPI2_FUNCTION_HANDSHAKE (0x42) + + +/***************************************************************************** +* +* IOC Status Values +* +*****************************************************************************/ + +/* mask for IOCStatus status value */ +#define MPI2_IOCSTATUS_MASK (0x7FFF) + +/**************************************************************************** +* Common IOCStatus values for all replies +****************************************************************************/ + +#define MPI2_IOCSTATUS_SUCCESS (0x0000) +#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001) +#define MPI2_IOCSTATUS_BUSY (0x0002) +#define MPI2_IOCSTATUS_INVALID_SGL (0x0003) +#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004) +#define MPI2_IOCSTATUS_INVALID_VPID (0x0005) +#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) +#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007) +#define MPI2_IOCSTATUS_INVALID_STATE (0x0008) +#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009) + +/**************************************************************************** +* Config IOCStatus values +****************************************************************************/ + +#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) +#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) +#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) +#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) +#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) +#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) + +/**************************************************************************** +* SCSI IO Reply +****************************************************************************/ + +#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) +#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042) +#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) +#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) +#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) +#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) +#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) +#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) +#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) +#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) +#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) +#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) + +/**************************************************************************** +* For use by SCSI Initiator and SCSI Target end-to-end data protection +****************************************************************************/ + +#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D) +#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E) +#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F) + +/**************************************************************************** +* SCSI Target values +****************************************************************************/ + +#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062) +#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063) +#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) +#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) +#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) +#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D) +#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E) +#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F) +#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070) +#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071) + +/**************************************************************************** +* Serial Attached SCSI values +****************************************************************************/ + +#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090) +#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091) + +/**************************************************************************** +* Diagnostic Buffer Post / Diagnostic Release values +****************************************************************************/ + +#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0) + +/**************************************************************************** +* RAID Accelerator values +****************************************************************************/ + +#define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0) + +/**************************************************************************** +* IOCStatus flag to indicate that log info is available +****************************************************************************/ + +#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) + +/**************************************************************************** +* IOCLogInfo Types +****************************************************************************/ + +#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000) +#define MPI2_IOCLOGINFO_TYPE_SHIFT (28) +#define MPI2_IOCLOGINFO_TYPE_NONE (0x0) +#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1) +#define MPI2_IOCLOGINFO_TYPE_FC (0x2) +#define MPI2_IOCLOGINFO_TYPE_SAS (0x3) +#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4) +#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) + + +/***************************************************************************** +* +* Standard Message Structures +* +*****************************************************************************/ + +/**************************************************************************** +* Request Message Header for all request messages +****************************************************************************/ + +typedef struct _MPI2_REQUEST_HEADER +{ + U16 FunctionDependent1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 FunctionDependent2; /* 0x04 */ + U8 FunctionDependent3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ +} MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, + MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; + + +/**************************************************************************** +* Default Reply +****************************************************************************/ + +typedef struct _MPI2_DEFAULT_REPLY +{ + U16 FunctionDependent1; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 FunctionDependent2; /* 0x04 */ + U8 FunctionDependent3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U16 FunctionDependent5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, + MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; + + +/* common version structure/union used in messages and configuration pages */ + +typedef struct _MPI2_VERSION_STRUCT +{ + U8 Dev; /* 0x00 */ + U8 Unit; /* 0x01 */ + U8 Minor; /* 0x02 */ + U8 Major; /* 0x03 */ +} MPI2_VERSION_STRUCT; + +typedef union _MPI2_VERSION_UNION +{ + MPI2_VERSION_STRUCT Struct; + U32 Word; +} MPI2_VERSION_UNION; + + +/* LUN field defines, common to many structures */ +#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) +#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) +#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) +#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) +#define MPI2_LUN_LEVEL_1_WORD (0xFF00) +#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00) + + +/***************************************************************************** +* +* Fusion-MPT MPI Scatter Gather Elements +* +*****************************************************************************/ + +/**************************************************************************** +* MPI Simple Element structures +****************************************************************************/ + +typedef struct _MPI2_SGE_SIMPLE32 +{ + U32 FlagsLength; + U32 Address; +} MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, + Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; + +typedef struct _MPI2_SGE_SIMPLE64 +{ + U32 FlagsLength; + U64 Address; +} MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, + Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; + +typedef struct _MPI2_SGE_SIMPLE_UNION +{ + U32 FlagsLength; + union + { + U32 Address32; + U64 Address64; + } u; +} MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, + Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; + + +/**************************************************************************** +* MPI Chain Element structures +****************************************************************************/ + +typedef struct _MPI2_SGE_CHAIN32 +{ + U16 Length; + U8 NextChainOffset; + U8 Flags; + U32 Address; +} MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, + Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; + +typedef struct _MPI2_SGE_CHAIN64 +{ + U16 Length; + U8 NextChainOffset; + U8 Flags; + U64 Address; +} MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, + Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; + +typedef struct _MPI2_SGE_CHAIN_UNION +{ + U16 Length; + U8 NextChainOffset; + U8 Flags; + union + { + U32 Address32; + U64 Address64; + } u; +} MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, + Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; + + +/**************************************************************************** +* MPI Transaction Context Element structures +****************************************************************************/ + +typedef struct _MPI2_SGE_TRANSACTION32 +{ + U8 Reserved; + U8 ContextSize; + U8 DetailsLength; + U8 Flags; + U32 TransactionContext[1]; + U32 TransactionDetails[1]; +} MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, + Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; + +typedef struct _MPI2_SGE_TRANSACTION64 +{ + U8 Reserved; + U8 ContextSize; + U8 DetailsLength; + U8 Flags; + U32 TransactionContext[2]; + U32 TransactionDetails[1]; +} MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, + Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; + +typedef struct _MPI2_SGE_TRANSACTION96 +{ + U8 Reserved; + U8 ContextSize; + U8 DetailsLength; + U8 Flags; + U32 TransactionContext[3]; + U32 TransactionDetails[1]; +} MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, + Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; + +typedef struct _MPI2_SGE_TRANSACTION128 +{ + U8 Reserved; + U8 ContextSize; + U8 DetailsLength; + U8 Flags; + U32 TransactionContext[4]; + U32 TransactionDetails[1]; +} MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, + Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; + +typedef struct _MPI2_SGE_TRANSACTION_UNION +{ + U8 Reserved; + U8 ContextSize; + U8 DetailsLength; + U8 Flags; + union + { + U32 TransactionContext32[1]; + U32 TransactionContext64[2]; + U32 TransactionContext96[3]; + U32 TransactionContext128[4]; + } u; + U32 TransactionDetails[1]; +} MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, + Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; + + +/**************************************************************************** +* MPI SGE union for IO SGL's +****************************************************************************/ + +typedef struct _MPI2_MPI_SGE_IO_UNION +{ + union + { + MPI2_SGE_SIMPLE_UNION Simple; + MPI2_SGE_CHAIN_UNION Chain; + } u; +} MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, + Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; + + +/**************************************************************************** +* MPI SGE union for SGL's with Simple and Transaction elements +****************************************************************************/ + +typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION +{ + union + { + MPI2_SGE_SIMPLE_UNION Simple; + MPI2_SGE_TRANSACTION_UNION Transaction; + } u; +} MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, + Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; + + +/**************************************************************************** +* All MPI SGE types union +****************************************************************************/ + +typedef struct _MPI2_MPI_SGE_UNION +{ + union + { + MPI2_SGE_SIMPLE_UNION Simple; + MPI2_SGE_CHAIN_UNION Chain; + MPI2_SGE_TRANSACTION_UNION Transaction; + } u; +} MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, + Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; + + +/**************************************************************************** +* MPI SGE field definition and masks +****************************************************************************/ + +/* Flags field bit definitions */ + +#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80) +#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40) +#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) +#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08) +#define MPI2_SGE_FLAGS_DIRECTION (0x04) +#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02) +#define MPI2_SGE_FLAGS_END_OF_LIST (0x01) + +#define MPI2_SGE_FLAGS_SHIFT (24) + +#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) +#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) + +/* Element Type */ + +#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) +#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) +#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) +#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) + +/* Address location */ + +#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) + +/* Direction */ + +#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) +#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) + +/* Address Size */ + +#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) +#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02) + +/* Context Size */ + +#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00) +#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02) +#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04) +#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06) + +#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000) +#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16) + +/**************************************************************************** +* MPI SGE operation Macros +****************************************************************************/ + +/* SIMPLE FlagsLength manipulations... */ +#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) +#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) +#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK) +#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) + +#define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) + +#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength) +#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength) +#define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) + +/* CAUTION - The following are READ-MODIFY-WRITE! */ +#define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) +#define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) + +#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) + + +/***************************************************************************** +* +* Fusion-MPT IEEE Scatter Gather Elements +* +*****************************************************************************/ + +/**************************************************************************** +* IEEE Simple Element structures +****************************************************************************/ + +typedef struct _MPI2_IEEE_SGE_SIMPLE32 +{ + U32 Address; + U32 FlagsLength; +} MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, + Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; + +typedef struct _MPI2_IEEE_SGE_SIMPLE64 +{ + U64 Address; + U32 Length; + U16 Reserved1; + U8 Reserved2; + U8 Flags; +} MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, + Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; + +typedef union _MPI2_IEEE_SGE_SIMPLE_UNION +{ + MPI2_IEEE_SGE_SIMPLE32 Simple32; + MPI2_IEEE_SGE_SIMPLE64 Simple64; +} MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, + Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; + + +/**************************************************************************** +* IEEE Chain Element structures +****************************************************************************/ + +typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; + +typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; + +typedef union _MPI2_IEEE_SGE_CHAIN_UNION +{ + MPI2_IEEE_SGE_CHAIN32 Chain32; + MPI2_IEEE_SGE_CHAIN64 Chain64; +} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, + Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; + + +/**************************************************************************** +* All IEEE SGE types union +****************************************************************************/ + +typedef struct _MPI2_IEEE_SGE_UNION +{ + union + { + MPI2_IEEE_SGE_SIMPLE_UNION Simple; + MPI2_IEEE_SGE_CHAIN_UNION Chain; + } u; +} MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, + Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; + + +/**************************************************************************** +* IEEE SGE field definitions and masks +****************************************************************************/ + +/* Flags field bit definitions */ + +#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) + +#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) + +#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF) + +/* Element Type */ + +#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00) +#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) + +/* Data Location Address Space */ + +#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) +#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) +#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) +#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) +#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) + + +/**************************************************************************** +* IEEE SGE operation Macros +****************************************************************************/ + +/* SIMPLE FlagsLength manipulations... */ +#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) +#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) +#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) + +#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) + +#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) +#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) +#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) + +/* CAUTION - The following are READ-MODIFY-WRITE! */ +#define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) +#define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) + + + + +/***************************************************************************** +* +* Fusion-MPT MPI/IEEE Scatter Gather Unions +* +*****************************************************************************/ + +typedef union _MPI2_SIMPLE_SGE_UNION +{ + MPI2_SGE_SIMPLE_UNION MpiSimple; + MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; +} MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, + Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; + + +typedef union _MPI2_SGE_IO_UNION +{ + MPI2_SGE_SIMPLE_UNION MpiSimple; + MPI2_SGE_CHAIN_UNION MpiChain; + MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; + MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; +} MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, + Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; + + +/**************************************************************************** +* +* Values for SGLFlags field, used in many request messages with an SGL +* +****************************************************************************/ + +/* values for MPI SGL Data Location Address Space subfield */ +#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C) +#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00) +#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04) +#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) +#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) +/* values for SGL Type subfield */ +#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03) +#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00) +#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) +#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02) + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_cnfg.h ../../stable/8/sys/dev/mps/mpi/mpi2_cnfg.h --- sys/dev/mps/mpi/mpi2_cnfg.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_cnfg.h 2011-01-07 14:33:12.677616339 -0700 @@ -0,0 +1,2646 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_cnfg.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2009 LSI Corporation. + * + * + * Name: mpi2_cnfg.h + * Title: MPI Configuration messages and pages + * Creation Date: November 10, 2006 + * + * mpi2_cnfg.h Version: 02.00.13 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags. + * Added Manufacturing Page 11. + * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE + * define. + * 06-26-07 02.00.02 Adding generic structure for product-specific + * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS. + * Rework of BIOS Page 2 configuration page. + * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the + * forms. + * Added configuration pages IOC Page 8 and Driver + * Persistent Mapping Page 0. + * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated + * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1, + * RAID Physical Disk Pages 0 and 1, RAID Configuration + * Page 0). + * Added new value for AccessStatus field of SAS Device + * Page 0 (_SATA_NEEDS_INITIALIZATION). + * 10-31-07 02.00.04 Added missing SEPDevHandle field to + * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. + * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for + * NVDATA. + * Modified IOC Page 7 to use masks and added field for + * SASBroadcastPrimitiveMasks. + * Added MPI2_CONFIG_PAGE_BIOS_4. + * Added MPI2_CONFIG_PAGE_LOG_0. + * 02-29-08 02.00.06 Modified various names to make them 32-character unique. + * Added SAS Device IDs. + * Updated Integrated RAID configuration pages including + * Manufacturing Page 4, IOC Page 6, and RAID Configuration + * Page 0. + * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA. + * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION. + * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING. + * Added missing MaxNumRoutedSasAddresses field to + * MPI2_CONFIG_PAGE_EXPANDER_0. + * Added SAS Port Page 0. + * Modified structure layout for + * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0. + * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use + * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array. + * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF + * to 0x000000FF. + * Added two new values for the Physical Disk Coercion Size + * bits in the Flags field of Manufacturing Page 4. + * Added product-specific Manufacturing pages 16 to 31. + * Modified Flags bits for controlling write cache on SATA + * drives in IO Unit Page 1. + * Added new bit to AdditionalControlFlags of SAS IO Unit + * Page 1 to control Invalid Topology Correction. + * Added additional defines for RAID Volume Page 0 + * VolumeStatusFlags field. + * Modified meaning of RAID Volume Page 0 VolumeSettings + * define for auto-configure of hot-swap drives. + * Added SupportedPhysDisks field to RAID Volume Page 1 and + * added related defines. + * Added PhysDiskAttributes field (and related defines) to + * RAID Physical Disk Page 0. + * Added MPI2_SAS_PHYINFO_PHY_VACANT define. + * Added three new DiscoveryStatus bits for SAS IO Unit + * Page 0 and SAS Expander Page 0. + * Removed multiplexing information from SAS IO Unit pages. + * Added BootDeviceWaitTime field to SAS IO Unit Page 4. + * Removed Zone Address Resolved bit from PhyInfo and from + * Expander Page 0 Flags field. + * Added two new AccessStatus values to SAS Device Page 0 + * for indicating routing problems. Added 3 reserved words + * to this page. + * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3. + * Inserted missing reserved field into structure for IOC + * Page 6. + * Added more pending task bits to RAID Volume Page 0 + * VolumeStatusFlags defines. + * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define. + * Added a new DiscoveryStatus bit for SAS IO Unit Page 0 + * and SAS Expander Page 0 to flag a downstream initiator + * when in simplified routing mode. + * Removed SATA Init Failure defines for DiscoveryStatus + * fields of SAS IO Unit Page 0 and SAS Expander Page 0. + * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define. + * Added PortGroups, DmaGroup, and ControlGroup fields to + * SAS Device Page 0. + * 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO + * Unit Page 6. + * Added expander reduced functionality data to SAS + * Expander Page 0. + * Added SAS PHY Page 2 and SAS PHY Page 3. + * 07-30-09 02.00.12 Added IO Unit Page 7. + * Added new device ids. + * Added SAS IO Unit Page 5. + * Added partial and slumber power management capable flags + * to SAS Device Page 0 Flags field. + * Added PhyInfo defines for power condition. + * Added Ethernet configuration pages. + * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY. + * Added SAS PHY Page 4 structure and defines. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_CNFG_H +#define MPI2_CNFG_H + +/***************************************************************************** +* Configuration Page Header and defines +*****************************************************************************/ + +/* Config Page Header */ +typedef struct _MPI2_CONFIG_PAGE_HEADER +{ + U8 PageVersion; /* 0x00 */ + U8 PageLength; /* 0x01 */ + U8 PageNumber; /* 0x02 */ + U8 PageType; /* 0x03 */ +} MPI2_CONFIG_PAGE_HEADER, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER, + Mpi2ConfigPageHeader_t, MPI2_POINTER pMpi2ConfigPageHeader_t; + +typedef union _MPI2_CONFIG_PAGE_HEADER_UNION +{ + MPI2_CONFIG_PAGE_HEADER Struct; + U8 Bytes[4]; + U16 Word16[2]; + U32 Word32; +} MPI2_CONFIG_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER_UNION, + Mpi2ConfigPageHeaderUnion, MPI2_POINTER pMpi2ConfigPageHeaderUnion; + +/* Extended Config Page Header */ +typedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER +{ + U8 PageVersion; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 PageNumber; /* 0x02 */ + U8 PageType; /* 0x03 */ + U16 ExtPageLength; /* 0x04 */ + U8 ExtPageType; /* 0x06 */ + U8 Reserved2; /* 0x07 */ +} MPI2_CONFIG_EXTENDED_PAGE_HEADER, + MPI2_POINTER PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER, + Mpi2ConfigExtendedPageHeader_t, MPI2_POINTER pMpi2ConfigExtendedPageHeader_t; + +typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION +{ + MPI2_CONFIG_PAGE_HEADER Struct; + MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext; + U8 Bytes[8]; + U16 Word16[4]; + U32 Word32[2]; +} MPI2_CONFIG_EXT_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION, + Mpi2ConfigPageExtendedHeaderUnion, MPI2_POINTER pMpi2ConfigPageExtendedHeaderUnion; + + +/* PageType field values */ +#define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00) +#define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10) +#define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20) +#define MPI2_CONFIG_PAGEATTR_MASK (0xF0) + +#define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00) +#define MPI2_CONFIG_PAGETYPE_IOC (0x01) +#define MPI2_CONFIG_PAGETYPE_BIOS (0x02) +#define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08) +#define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09) +#define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) +#define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F) +#define MPI2_CONFIG_PAGETYPE_MASK (0x0F) + +#define MPI2_CONFIG_TYPENUM_MASK (0x0FFF) + + +/* ExtPageType field values */ +#define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10) +#define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) +#define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) +#define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) +#define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14) +#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15) +#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16) +#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17) +#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18) +#define MPI2_CONFIG_EXTPAGETYPE_ETHERNET (0x19) + + +/***************************************************************************** +* PageAddress defines +*****************************************************************************/ + +/* RAID Volume PageAddress format */ +#define MPI2_RAID_VOLUME_PGAD_FORM_MASK (0xF0000000) +#define MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) +#define MPI2_RAID_VOLUME_PGAD_FORM_HANDLE (0x10000000) + +#define MPI2_RAID_VOLUME_PGAD_HANDLE_MASK (0x0000FFFF) + + +/* RAID Physical Disk PageAddress format */ +#define MPI2_PHYSDISK_PGAD_FORM_MASK (0xF0000000) +#define MPI2_PHYSDISK_PGAD_FORM_GET_NEXT_PHYSDISKNUM (0x00000000) +#define MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM (0x10000000) +#define MPI2_PHYSDISK_PGAD_FORM_DEVHANDLE (0x20000000) + +#define MPI2_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) +#define MPI2_PHYSDISK_PGAD_DEVHANDLE_MASK (0x0000FFFF) + + +/* SAS Expander PageAddress format */ +#define MPI2_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000) +#define MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL (0x00000000) +#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM (0x10000000) +#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL (0x20000000) + +#define MPI2_SAS_EXPAND_PGAD_HANDLE_MASK (0x0000FFFF) +#define MPI2_SAS_EXPAND_PGAD_PHYNUM_MASK (0x00FF0000) +#define MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT (16) + + +/* SAS Device PageAddress format */ +#define MPI2_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) +#define MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) +#define MPI2_SAS_DEVICE_PGAD_FORM_HANDLE (0x20000000) + +#define MPI2_SAS_DEVICE_PGAD_HANDLE_MASK (0x0000FFFF) + + +/* SAS PHY PageAddress format */ +#define MPI2_SAS_PHY_PGAD_FORM_MASK (0xF0000000) +#define MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x00000000) +#define MPI2_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x10000000) + +#define MPI2_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF) +#define MPI2_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF) + + +/* SAS Port PageAddress format */ +#define MPI2_SASPORT_PGAD_FORM_MASK (0xF0000000) +#define MPI2_SASPORT_PGAD_FORM_GET_NEXT_PORT (0x00000000) +#define MPI2_SASPORT_PGAD_FORM_PORT_NUM (0x10000000) + +#define MPI2_SASPORT_PGAD_PORTNUMBER_MASK (0x00000FFF) + + +/* SAS Enclosure PageAddress format */ +#define MPI2_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000) +#define MPI2_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) +#define MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE (0x10000000) + +#define MPI2_SAS_ENCLOS_PGAD_HANDLE_MASK (0x0000FFFF) + + +/* RAID Configuration PageAddress format */ +#define MPI2_RAID_PGAD_FORM_MASK (0xF0000000) +#define MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM (0x00000000) +#define MPI2_RAID_PGAD_FORM_CONFIGNUM (0x10000000) +#define MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG (0x20000000) + +#define MPI2_RAID_PGAD_CONFIGNUM_MASK (0x000000FF) + + +/* Driver Persistent Mapping PageAddress format */ +#define MPI2_DPM_PGAD_FORM_MASK (0xF0000000) +#define MPI2_DPM_PGAD_FORM_ENTRY_RANGE (0x00000000) + +#define MPI2_DPM_PGAD_ENTRY_COUNT_MASK (0x0FFF0000) +#define MPI2_DPM_PGAD_ENTRY_COUNT_SHIFT (16) +#define MPI2_DPM_PGAD_START_ENTRY_MASK (0x0000FFFF) + + +/* Ethernet PageAddress format */ +#define MPI2_ETHERNET_PGAD_FORM_MASK (0xF0000000) +#define MPI2_ETHERNET_PGAD_FORM_IF_NUM (0x00000000) + +#define MPI2_ETHERNET_PGAD_IF_NUMBER_MASK (0x000000FF) + + + +/**************************************************************************** +* Configuration messages +****************************************************************************/ + +/* Configuration Request Message */ +typedef struct _MPI2_CONFIG_REQUEST +{ + U8 Action; /* 0x00 */ + U8 SGLFlags; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 ExtPageLength; /* 0x04 */ + U8 ExtPageType; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U32 Reserved2; /* 0x0C */ + U32 Reserved3; /* 0x10 */ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ + U32 PageAddress; /* 0x18 */ + MPI2_SGE_IO_UNION PageBufferSGE; /* 0x1C */ +} MPI2_CONFIG_REQUEST, MPI2_POINTER PTR_MPI2_CONFIG_REQUEST, + Mpi2ConfigRequest_t, MPI2_POINTER pMpi2ConfigRequest_t; + +/* values for the Action field */ +#define MPI2_CONFIG_ACTION_PAGE_HEADER (0x00) +#define MPI2_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) +#define MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) +#define MPI2_CONFIG_ACTION_PAGE_DEFAULT (0x03) +#define MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) +#define MPI2_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) +#define MPI2_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) +#define MPI2_CONFIG_ACTION_PAGE_GET_CHANGEABLE (0x07) + +/* values for SGLFlags field are in the SGL section of mpi2.h */ + + +/* Config Reply Message */ +typedef struct _MPI2_CONFIG_REPLY +{ + U8 Action; /* 0x00 */ + U8 SGLFlags; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 ExtPageLength; /* 0x04 */ + U8 ExtPageType; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U16 Reserved2; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ +} MPI2_CONFIG_REPLY, MPI2_POINTER PTR_MPI2_CONFIG_REPLY, + Mpi2ConfigReply_t, MPI2_POINTER pMpi2ConfigReply_t; + + + +/***************************************************************************** +* +* C o n f i g u r a t i o n P a g e s +* +*****************************************************************************/ + +/**************************************************************************** +* Manufacturing Config pages +****************************************************************************/ + +#define MPI2_MFGPAGE_VENDORID_LSI (0x1000) + +/* SAS */ +#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070) +#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072) +#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074) +#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076) +#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077) +#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064) +#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065) + +#define MPI2_MFGPAGE_DEVID_SAS2208_1 (0x0080) +#define MPI2_MFGPAGE_DEVID_SAS2208_2 (0x0081) +#define MPI2_MFGPAGE_DEVID_SAS2208_3 (0x0082) +#define MPI2_MFGPAGE_DEVID_SAS2208_4 (0x0083) +#define MPI2_MFGPAGE_DEVID_SAS2208_5 (0x0084) +#define MPI2_MFGPAGE_DEVID_SAS2208_6 (0x0085) +#define MPI2_MFGPAGE_DEVID_SAS2208_7 (0x0086) +#define MPI2_MFGPAGE_DEVID_SAS2208_8 (0x0087) + + +/* Manufacturing Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_MAN_0 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 ChipName[16]; /* 0x04 */ + U8 ChipRevision[8]; /* 0x14 */ + U8 BoardName[16]; /* 0x1C */ + U8 BoardAssembly[16]; /* 0x2C */ + U8 BoardTracerNumber[16]; /* 0x3C */ +} MPI2_CONFIG_PAGE_MAN_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_0, + Mpi2ManufacturingPage0_t, MPI2_POINTER pMpi2ManufacturingPage0_t; + +#define MPI2_MANUFACTURING0_PAGEVERSION (0x00) + + +/* Manufacturing Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_MAN_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 VPD[256]; /* 0x04 */ +} MPI2_CONFIG_PAGE_MAN_1, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_1, + Mpi2ManufacturingPage1_t, MPI2_POINTER pMpi2ManufacturingPage1_t; + +#define MPI2_MANUFACTURING1_PAGEVERSION (0x00) + + +typedef struct _MPI2_CHIP_REVISION_ID +{ + U16 DeviceID; /* 0x00 */ + U8 PCIRevisionID; /* 0x02 */ + U8 Reserved; /* 0x03 */ +} MPI2_CHIP_REVISION_ID, MPI2_POINTER PTR_MPI2_CHIP_REVISION_ID, + Mpi2ChipRevisionId_t, MPI2_POINTER pMpi2ChipRevisionId_t; + + +/* Manufacturing Page 2 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength at runtime. + */ +#ifndef MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS +#define MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_MAN_2 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ + U32 HwSettings[MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 0x08 */ +} MPI2_CONFIG_PAGE_MAN_2, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_2, + Mpi2ManufacturingPage2_t, MPI2_POINTER pMpi2ManufacturingPage2_t; + +#define MPI2_MANUFACTURING2_PAGEVERSION (0x00) + + +/* Manufacturing Page 3 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength at runtime. + */ +#ifndef MPI2_MAN_PAGE_3_INFO_WORDS +#define MPI2_MAN_PAGE_3_INFO_WORDS (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_MAN_3 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ + U32 Info[MPI2_MAN_PAGE_3_INFO_WORDS];/* 0x08 */ +} MPI2_CONFIG_PAGE_MAN_3, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_3, + Mpi2ManufacturingPage3_t, MPI2_POINTER pMpi2ManufacturingPage3_t; + +#define MPI2_MANUFACTURING3_PAGEVERSION (0x00) + + +/* Manufacturing Page 4 */ + +typedef struct _MPI2_MANPAGE4_PWR_SAVE_SETTINGS +{ + U8 PowerSaveFlags; /* 0x00 */ + U8 InternalOperationsSleepTime; /* 0x01 */ + U8 InternalOperationsRunTime; /* 0x02 */ + U8 HostIdleTime; /* 0x03 */ +} MPI2_MANPAGE4_PWR_SAVE_SETTINGS, + MPI2_POINTER PTR_MPI2_MANPAGE4_PWR_SAVE_SETTINGS, + Mpi2ManPage4PwrSaveSettings_t, MPI2_POINTER pMpi2ManPage4PwrSaveSettings_t; + +/* defines for the PowerSaveFlags field */ +#define MPI2_MANPAGE4_MASK_POWERSAVE_MODE (0x03) +#define MPI2_MANPAGE4_POWERSAVE_MODE_DISABLED (0x00) +#define MPI2_MANPAGE4_CUSTOM_POWERSAVE_MODE (0x01) +#define MPI2_MANPAGE4_FULL_POWERSAVE_MODE (0x02) + +typedef struct _MPI2_CONFIG_PAGE_MAN_4 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 Flags; /* 0x08 */ + U8 InquirySize; /* 0x0C */ + U8 Reserved2; /* 0x0D */ + U16 Reserved3; /* 0x0E */ + U8 InquiryData[56]; /* 0x10 */ + U32 RAID0VolumeSettings; /* 0x48 */ + U32 RAID1EVolumeSettings; /* 0x4C */ + U32 RAID1VolumeSettings; /* 0x50 */ + U32 RAID10VolumeSettings; /* 0x54 */ + U32 Reserved4; /* 0x58 */ + U32 Reserved5; /* 0x5C */ + MPI2_MANPAGE4_PWR_SAVE_SETTINGS PowerSaveSettings; /* 0x60 */ + U8 MaxOCEDisks; /* 0x64 */ + U8 ResyncRate; /* 0x65 */ + U16 DataScrubDuration; /* 0x66 */ + U8 MaxHotSpares; /* 0x68 */ + U8 MaxPhysDisksPerVol; /* 0x69 */ + U8 MaxPhysDisks; /* 0x6A */ + U8 MaxVolumes; /* 0x6B */ +} MPI2_CONFIG_PAGE_MAN_4, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_4, + Mpi2ManufacturingPage4_t, MPI2_POINTER pMpi2ManufacturingPage4_t; + +#define MPI2_MANUFACTURING4_PAGEVERSION (0x0A) + +/* Manufacturing Page 4 Flags field */ +#define MPI2_MANPAGE4_METADATA_SIZE_MASK (0x00030000) +#define MPI2_MANPAGE4_METADATA_512MB (0x00000000) + +#define MPI2_MANPAGE4_MIX_SSD_SAS_SATA (0x00008000) +#define MPI2_MANPAGE4_MIX_SSD_AND_NON_SSD (0x00004000) +#define MPI2_MANPAGE4_HIDE_PHYSDISK_NON_IR (0x00002000) + +#define MPI2_MANPAGE4_MASK_PHYSDISK_COERCION (0x00001C00) +#define MPI2_MANPAGE4_PHYSDISK_COERCION_1GB (0x00000000) +#define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION (0x00000400) +#define MPI2_MANPAGE4_PHYSDISK_ADAPTIVE_COERCION (0x00000800) +#define MPI2_MANPAGE4_PHYSDISK_ZERO_COERCION (0x00000C00) + +#define MPI2_MANPAGE4_MASK_BAD_BLOCK_MARKING (0x00000300) +#define MPI2_MANPAGE4_DEFAULT_BAD_BLOCK_MARKING (0x00000000) +#define MPI2_MANPAGE4_TABLE_BAD_BLOCK_MARKING (0x00000100) +#define MPI2_MANPAGE4_WRITE_LONG_BAD_BLOCK_MARKING (0x00000200) + +#define MPI2_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x00000080) +#define MPI2_MANPAGE4_RAID10_DISABLE (0x00000040) +#define MPI2_MANPAGE4_RAID1E_DISABLE (0x00000020) +#define MPI2_MANPAGE4_RAID1_DISABLE (0x00000010) +#define MPI2_MANPAGE4_RAID0_DISABLE (0x00000008) +#define MPI2_MANPAGE4_IR_MODEPAGE8_DISABLE (0x00000004) +#define MPI2_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x00000002) +#define MPI2_MANPAGE4_IR_NO_MIX_SAS_SATA (0x00000001) + + +/* Manufacturing Page 5 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength or NumPhys at runtime. + */ +#ifndef MPI2_MAN_PAGE_5_PHY_ENTRIES +#define MPI2_MAN_PAGE_5_PHY_ENTRIES (1) +#endif + +typedef struct _MPI2_MANUFACTURING5_ENTRY +{ + U64 WWID; /* 0x00 */ + U64 DeviceName; /* 0x08 */ +} MPI2_MANUFACTURING5_ENTRY, MPI2_POINTER PTR_MPI2_MANUFACTURING5_ENTRY, + Mpi2Manufacturing5Entry_t, MPI2_POINTER pMpi2Manufacturing5Entry_t; + +typedef struct _MPI2_CONFIG_PAGE_MAN_5 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 NumPhys; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + U32 Reserved3; /* 0x08 */ + U32 Reserved4; /* 0x0C */ + MPI2_MANUFACTURING5_ENTRY Phy[MPI2_MAN_PAGE_5_PHY_ENTRIES];/* 0x08 */ +} MPI2_CONFIG_PAGE_MAN_5, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_5, + Mpi2ManufacturingPage5_t, MPI2_POINTER pMpi2ManufacturingPage5_t; + +#define MPI2_MANUFACTURING5_PAGEVERSION (0x03) + + +/* Manufacturing Page 6 */ + +typedef struct _MPI2_CONFIG_PAGE_MAN_6 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 ProductSpecificInfo;/* 0x04 */ +} MPI2_CONFIG_PAGE_MAN_6, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_6, + Mpi2ManufacturingPage6_t, MPI2_POINTER pMpi2ManufacturingPage6_t; + +#define MPI2_MANUFACTURING6_PAGEVERSION (0x00) + + +/* Manufacturing Page 7 */ + +typedef struct _MPI2_MANPAGE7_CONNECTOR_INFO +{ + U32 Pinout; /* 0x00 */ + U8 Connector[16]; /* 0x04 */ + U8 Location; /* 0x14 */ + U8 Reserved1; /* 0x15 */ + U16 Slot; /* 0x16 */ + U32 Reserved2; /* 0x18 */ +} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO, + Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t; + +/* defines for the Pinout field */ +#define MPI2_MANPAGE7_PINOUT_SFF_8484_L4 (0x00080000) +#define MPI2_MANPAGE7_PINOUT_SFF_8484_L3 (0x00040000) +#define MPI2_MANPAGE7_PINOUT_SFF_8484_L2 (0x00020000) +#define MPI2_MANPAGE7_PINOUT_SFF_8484_L1 (0x00010000) +#define MPI2_MANPAGE7_PINOUT_SFF_8470_L4 (0x00000800) +#define MPI2_MANPAGE7_PINOUT_SFF_8470_L3 (0x00000400) +#define MPI2_MANPAGE7_PINOUT_SFF_8470_L2 (0x00000200) +#define MPI2_MANPAGE7_PINOUT_SFF_8470_L1 (0x00000100) +#define MPI2_MANPAGE7_PINOUT_SFF_8482 (0x00000002) +#define MPI2_MANPAGE7_PINOUT_CONNECTION_UNKNOWN (0x00000001) + +/* defines for the Location field */ +#define MPI2_MANPAGE7_LOCATION_UNKNOWN (0x01) +#define MPI2_MANPAGE7_LOCATION_INTERNAL (0x02) +#define MPI2_MANPAGE7_LOCATION_EXTERNAL (0x04) +#define MPI2_MANPAGE7_LOCATION_SWITCHABLE (0x08) +#define MPI2_MANPAGE7_LOCATION_AUTO (0x10) +#define MPI2_MANPAGE7_LOCATION_NOT_PRESENT (0x20) +#define MPI2_MANPAGE7_LOCATION_NOT_CONNECTED (0x80) + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check NumPhys at runtime. + */ +#ifndef MPI2_MANPAGE7_CONNECTOR_INFO_MAX +#define MPI2_MANPAGE7_CONNECTOR_INFO_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_MAN_7 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 Reserved2; /* 0x08 */ + U32 Flags; /* 0x0C */ + U8 EnclosureName[16]; /* 0x10 */ + U8 NumPhys; /* 0x20 */ + U8 Reserved3; /* 0x21 */ + U16 Reserved4; /* 0x22 */ + MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */ +} MPI2_CONFIG_PAGE_MAN_7, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7, + Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t; + +#define MPI2_MANUFACTURING7_PAGEVERSION (0x00) + +/* defines for the Flags field */ +#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001) + + +/* + * Generic structure to use for product-specific manufacturing pages + * (currently Manufacturing Page 8 through Manufacturing Page 31). + */ + +typedef struct _MPI2_CONFIG_PAGE_MAN_PS +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 ProductSpecificInfo;/* 0x04 */ +} MPI2_CONFIG_PAGE_MAN_PS, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_PS, + Mpi2ManufacturingPagePS_t, MPI2_POINTER pMpi2ManufacturingPagePS_t; + +#define MPI2_MANUFACTURING8_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING9_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING10_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING11_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING12_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING13_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING14_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING15_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING16_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING17_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING18_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING19_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING20_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING21_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING22_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING23_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING24_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING25_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING26_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING27_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING28_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING29_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING30_PAGEVERSION (0x00) +#define MPI2_MANUFACTURING31_PAGEVERSION (0x00) + + +/**************************************************************************** +* IO Unit Config Pages +****************************************************************************/ + +/* IO Unit Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_0 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U64 UniqueValue; /* 0x04 */ + MPI2_VERSION_UNION NvdataVersionDefault; /* 0x08 */ + MPI2_VERSION_UNION NvdataVersionPersistent; /* 0x0A */ +} MPI2_CONFIG_PAGE_IO_UNIT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_0, + Mpi2IOUnitPage0_t, MPI2_POINTER pMpi2IOUnitPage0_t; + +#define MPI2_IOUNITPAGE0_PAGEVERSION (0x02) + + +/* IO Unit Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Flags; /* 0x04 */ +} MPI2_CONFIG_PAGE_IO_UNIT_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_1, + Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t; + +#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04) + +/* IO Unit Page 1 Flags defines */ +#define MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY (0x00000800) +#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600) +#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000) +#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200) +#define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400) +#define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100) +#define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040) +#define MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING (0x00000020) +#define MPI2_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004) +#define MPI2_IOUNITPAGE1_MULTI_PATHING (0x00000002) +#define MPI2_IOUNITPAGE1_SINGLE_PATHING (0x00000000) + + +/* IO Unit Page 3 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength at runtime. + */ +#ifndef MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX +#define MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_3 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 GPIOCount; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + U16 GPIOVal[MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX];/* 0x08 */ +} MPI2_CONFIG_PAGE_IO_UNIT_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_3, + Mpi2IOUnitPage3_t, MPI2_POINTER pMpi2IOUnitPage3_t; + +#define MPI2_IOUNITPAGE3_PAGEVERSION (0x01) + +/* defines for IO Unit Page 3 GPIOVal field */ +#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFFFC) +#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) +#define MPI2_IOUNITPAGE3_GPIO_SETTING_OFF (0x0000) +#define MPI2_IOUNITPAGE3_GPIO_SETTING_ON (0x0001) + + +/* IO Unit Page 5 */ + +/* + * Upper layer code (drivers, utilities, etc.) should leave this define set to + * one and check Header.PageLength or NumDmaEngines at runtime. + */ +#ifndef MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES +#define MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_5 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U64 RaidAcceleratorBufferBaseAddress; /* 0x04 */ + U64 RaidAcceleratorBufferSize; /* 0x0C */ + U64 RaidAcceleratorControlBaseAddress; /* 0x14 */ + U8 RAControlSize; /* 0x1C */ + U8 NumDmaEngines; /* 0x1D */ + U8 RAMinControlSize; /* 0x1E */ + U8 RAMaxControlSize; /* 0x1F */ + U32 Reserved1; /* 0x20 */ + U32 Reserved2; /* 0x24 */ + U32 Reserved3; /* 0x28 */ + U32 DmaEngineCapabilities[MPI2_IOUNITPAGE5_DMAENGINE_ENTRIES]; /* 0x2C */ +} MPI2_CONFIG_PAGE_IO_UNIT_5, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_5, + Mpi2IOUnitPage5_t, MPI2_POINTER pMpi2IOUnitPage5_t; + +#define MPI2_IOUNITPAGE5_PAGEVERSION (0x00) + +/* defines for IO Unit Page 5 DmaEngineCapabilities field */ +#define MPI2_IOUNITPAGE5_DMA_CAP_MASK_MAX_REQUESTS (0xFF00) +#define MPI2_IOUNITPAGE5_DMA_CAP_SHIFT_MAX_REQUESTS (16) + +#define MPI2_IOUNITPAGE5_DMA_CAP_EEDP (0x0008) +#define MPI2_IOUNITPAGE5_DMA_CAP_PARITY_GENERATION (0x0004) +#define MPI2_IOUNITPAGE5_DMA_CAP_HASHING (0x0002) +#define MPI2_IOUNITPAGE5_DMA_CAP_ENCRYPTION (0x0001) + + +/* IO Unit Page 6 */ + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_6 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U16 Flags; /* 0x04 */ + U8 RAHostControlSize; /* 0x06 */ + U8 Reserved0; /* 0x07 */ + U64 RaidAcceleratorHostControlBaseAddress; /* 0x08 */ + U32 Reserved1; /* 0x10 */ + U32 Reserved2; /* 0x14 */ + U32 Reserved3; /* 0x18 */ +} MPI2_CONFIG_PAGE_IO_UNIT_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_6, + Mpi2IOUnitPage6_t, MPI2_POINTER pMpi2IOUnitPage6_t; + +#define MPI2_IOUNITPAGE6_PAGEVERSION (0x00) + +/* defines for IO Unit Page 6 Flags field */ +#define MPI2_IOUNITPAGE6_FLAGS_ENABLE_RAID_ACCELERATOR (0x0001) + + +/* IO Unit Page 7 */ + +typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_7 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U16 Reserved1; /* 0x04 */ + U8 PCIeWidth; /* 0x06 */ + U8 PCIeSpeed; /* 0x07 */ + U32 ProcessorState; /* 0x08 */ + U32 Reserved2; /* 0x0C */ + U16 IOCTemperature; /* 0x10 */ + U8 IOCTemperatureUnits; /* 0x12 */ + U8 IOCSpeed; /* 0x13 */ + U32 Reserved3; /* 0x14 */ +} MPI2_CONFIG_PAGE_IO_UNIT_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_7, + Mpi2IOUnitPage7_t, MPI2_POINTER pMpi2IOUnitPage7_t; + +#define MPI2_IOUNITPAGE7_PAGEVERSION (0x00) + +/* defines for IO Unit Page 7 PCIeWidth field */ +#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X1 (0x01) +#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X2 (0x02) +#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X4 (0x04) +#define MPI2_IOUNITPAGE7_PCIE_WIDTH_X8 (0x08) + +/* defines for IO Unit Page 7 PCIeSpeed field */ +#define MPI2_IOUNITPAGE7_PCIE_SPEED_2_5_GBPS (0x00) +#define MPI2_IOUNITPAGE7_PCIE_SPEED_5_0_GBPS (0x01) +#define MPI2_IOUNITPAGE7_PCIE_SPEED_8_0_GBPS (0x02) + +/* defines for IO Unit Page 7 ProcessorState field */ +#define MPI2_IOUNITPAGE7_PSTATE_MASK_SECOND (0x0000000F) +#define MPI2_IOUNITPAGE7_PSTATE_SHIFT_SECOND (0) + +#define MPI2_IOUNITPAGE7_PSTATE_NOT_PRESENT (0x00) +#define MPI2_IOUNITPAGE7_PSTATE_DISABLED (0x01) +#define MPI2_IOUNITPAGE7_PSTATE_ENABLED (0x02) + +/* defines for IO Unit Page 7 IOCTemperatureUnits field */ +#define MPI2_IOUNITPAGE7_IOC_TEMP_NOT_PRESENT (0x00) +#define MPI2_IOUNITPAGE7_IOC_TEMP_FAHRENHEIT (0x01) +#define MPI2_IOUNITPAGE7_IOC_TEMP_CELSIUS (0x02) + +/* defines for IO Unit Page 7 IOCSpeed field */ +#define MPI2_IOUNITPAGE7_IOC_SPEED_FULL (0x01) +#define MPI2_IOUNITPAGE7_IOC_SPEED_HALF (0x02) +#define MPI2_IOUNITPAGE7_IOC_SPEED_QUARTER (0x04) +#define MPI2_IOUNITPAGE7_IOC_SPEED_EIGHTH (0x08) + + + +/**************************************************************************** +* IOC Config Pages +****************************************************************************/ + +/* IOC Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_IOC_0 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 Reserved2; /* 0x08 */ + U16 VendorID; /* 0x0C */ + U16 DeviceID; /* 0x0E */ + U8 RevisionID; /* 0x10 */ + U8 Reserved3; /* 0x11 */ + U16 Reserved4; /* 0x12 */ + U32 ClassCode; /* 0x14 */ + U16 SubsystemVendorID; /* 0x18 */ + U16 SubsystemID; /* 0x1A */ +} MPI2_CONFIG_PAGE_IOC_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_0, + Mpi2IOCPage0_t, MPI2_POINTER pMpi2IOCPage0_t; + +#define MPI2_IOCPAGE0_PAGEVERSION (0x02) + + +/* IOC Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_IOC_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Flags; /* 0x04 */ + U32 CoalescingTimeout; /* 0x08 */ + U8 CoalescingDepth; /* 0x0C */ + U8 PCISlotNum; /* 0x0D */ + U8 PCIBusNum; /* 0x0E */ + U8 PCIDomainSegment; /* 0x0F */ + U32 Reserved1; /* 0x10 */ + U32 Reserved2; /* 0x14 */ +} MPI2_CONFIG_PAGE_IOC_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_1, + Mpi2IOCPage1_t, MPI2_POINTER pMpi2IOCPage1_t; + +#define MPI2_IOCPAGE1_PAGEVERSION (0x05) + +/* defines for IOC Page 1 Flags field */ +#define MPI2_IOCPAGE1_REPLY_COALESCING (0x00000001) + +#define MPI2_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) +#define MPI2_IOCPAGE1_PCIBUSNUM_UNKNOWN (0xFF) +#define MPI2_IOCPAGE1_PCIDOMAIN_UNKNOWN (0xFF) + +/* IOC Page 6 */ + +typedef struct _MPI2_CONFIG_PAGE_IOC_6 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 CapabilitiesFlags; /* 0x04 */ + U8 MaxDrivesRAID0; /* 0x08 */ + U8 MaxDrivesRAID1; /* 0x09 */ + U8 MaxDrivesRAID1E; /* 0x0A */ + U8 MaxDrivesRAID10; /* 0x0B */ + U8 MinDrivesRAID0; /* 0x0C */ + U8 MinDrivesRAID1; /* 0x0D */ + U8 MinDrivesRAID1E; /* 0x0E */ + U8 MinDrivesRAID10; /* 0x0F */ + U32 Reserved1; /* 0x10 */ + U8 MaxGlobalHotSpares; /* 0x14 */ + U8 MaxPhysDisks; /* 0x15 */ + U8 MaxVolumes; /* 0x16 */ + U8 MaxConfigs; /* 0x17 */ + U8 MaxOCEDisks; /* 0x18 */ + U8 Reserved2; /* 0x19 */ + U16 Reserved3; /* 0x1A */ + U32 SupportedStripeSizeMapRAID0; /* 0x1C */ + U32 SupportedStripeSizeMapRAID1E; /* 0x20 */ + U32 SupportedStripeSizeMapRAID10; /* 0x24 */ + U32 Reserved4; /* 0x28 */ + U32 Reserved5; /* 0x2C */ + U16 DefaultMetadataSize; /* 0x30 */ + U16 Reserved6; /* 0x32 */ + U16 MaxBadBlockTableEntries; /* 0x34 */ + U16 Reserved7; /* 0x36 */ + U32 IRNvsramVersion; /* 0x38 */ +} MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6, + Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t; + +#define MPI2_IOCPAGE6_PAGEVERSION (0x04) + +/* defines for IOC Page 6 CapabilitiesFlags */ +#define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT (0x00000010) +#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT (0x00000008) +#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT (0x00000004) +#define MPI2_IOCPAGE6_CAP_FLAGS_RAID0_SUPPORT (0x00000002) +#define MPI2_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001) + + +/* IOC Page 7 */ + +#define MPI2_IOCPAGE7_EVENTMASK_WORDS (4) + +typedef struct _MPI2_CONFIG_PAGE_IOC_7 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 EventMasks[MPI2_IOCPAGE7_EVENTMASK_WORDS];/* 0x08 */ + U16 SASBroadcastPrimitiveMasks; /* 0x18 */ + U16 Reserved2; /* 0x1A */ + U32 Reserved3; /* 0x1C */ +} MPI2_CONFIG_PAGE_IOC_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_7, + Mpi2IOCPage7_t, MPI2_POINTER pMpi2IOCPage7_t; + +#define MPI2_IOCPAGE7_PAGEVERSION (0x01) + + +/* IOC Page 8 */ + +typedef struct _MPI2_CONFIG_PAGE_IOC_8 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 NumDevsPerEnclosure; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + U16 MaxPersistentEntries; /* 0x08 */ + U16 MaxNumPhysicalMappedIDs; /* 0x0A */ + U16 Flags; /* 0x0C */ + U16 Reserved3; /* 0x0E */ + U16 IRVolumeMappingFlags; /* 0x10 */ + U16 Reserved4; /* 0x12 */ + U32 Reserved5; /* 0x14 */ +} MPI2_CONFIG_PAGE_IOC_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_8, + Mpi2IOCPage8_t, MPI2_POINTER pMpi2IOCPage8_t; + +#define MPI2_IOCPAGE8_PAGEVERSION (0x00) + +/* defines for IOC Page 8 Flags field */ +#define MPI2_IOCPAGE8_FLAGS_DA_START_SLOT_1 (0x00000020) +#define MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0 (0x00000010) + +#define MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE (0x0000000E) +#define MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING (0x00000000) +#define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING (0x00000002) + +#define MPI2_IOCPAGE8_FLAGS_DISABLE_PERSISTENT_MAPPING (0x00000001) +#define MPI2_IOCPAGE8_FLAGS_ENABLE_PERSISTENT_MAPPING (0x00000000) + +/* defines for IOC Page 8 IRVolumeMappingFlags */ +#define MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE (0x00000003) +#define MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING (0x00000000) +#define MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING (0x00000001) + + +/**************************************************************************** +* BIOS Config Pages +****************************************************************************/ + +/* BIOS Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_BIOS_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 BiosOptions; /* 0x04 */ + U32 IOCSettings; /* 0x08 */ + U32 Reserved1; /* 0x0C */ + U32 DeviceSettings; /* 0x10 */ + U16 NumberOfDevices; /* 0x14 */ + U16 Reserved2; /* 0x16 */ + U16 IOTimeoutBlockDevicesNonRM; /* 0x18 */ + U16 IOTimeoutSequential; /* 0x1A */ + U16 IOTimeoutOther; /* 0x1C */ + U16 IOTimeoutBlockDevicesRM; /* 0x1E */ +} MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1, + Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t; + +#define MPI2_BIOSPAGE1_PAGEVERSION (0x04) + +/* values for BIOS Page 1 BiosOptions field */ +#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) + +/* values for BIOS Page 1 IOCSettings field */ +#define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000) +#define MPI2_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000) +#define MPI2_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000) + +#define MPI2_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0) +#define MPI2_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000) +#define MPI2_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040) +#define MPI2_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080) + +#define MPI2_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030) +#define MPI2_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000) +#define MPI2_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010) +#define MPI2_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020) +#define MPI2_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030) + +#define MPI2_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008) + +/* values for BIOS Page 1 DeviceSettings field */ +#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010) +#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008) +#define MPI2_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004) +#define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) +#define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) + + +/* BIOS Page 2 */ + +typedef struct _MPI2_BOOT_DEVICE_ADAPTER_ORDER +{ + U32 Reserved1; /* 0x00 */ + U32 Reserved2; /* 0x04 */ + U32 Reserved3; /* 0x08 */ + U32 Reserved4; /* 0x0C */ + U32 Reserved5; /* 0x10 */ + U32 Reserved6; /* 0x14 */ +} MPI2_BOOT_DEVICE_ADAPTER_ORDER, + MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ADAPTER_ORDER, + Mpi2BootDeviceAdapterOrder_t, MPI2_POINTER pMpi2BootDeviceAdapterOrder_t; + +typedef struct _MPI2_BOOT_DEVICE_SAS_WWID +{ + U64 SASAddress; /* 0x00 */ + U8 LUN[8]; /* 0x08 */ + U32 Reserved1; /* 0x10 */ + U32 Reserved2; /* 0x14 */ +} MPI2_BOOT_DEVICE_SAS_WWID, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_SAS_WWID, + Mpi2BootDeviceSasWwid_t, MPI2_POINTER pMpi2BootDeviceSasWwid_t; + +typedef struct _MPI2_BOOT_DEVICE_ENCLOSURE_SLOT +{ + U64 EnclosureLogicalID; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U32 Reserved2; /* 0x0C */ + U16 SlotNumber; /* 0x10 */ + U16 Reserved3; /* 0x12 */ + U32 Reserved4; /* 0x14 */ +} MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, + MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, + Mpi2BootDeviceEnclosureSlot_t, MPI2_POINTER pMpi2BootDeviceEnclosureSlot_t; + +typedef struct _MPI2_BOOT_DEVICE_DEVICE_NAME +{ + U64 DeviceName; /* 0x00 */ + U8 LUN[8]; /* 0x08 */ + U32 Reserved1; /* 0x10 */ + U32 Reserved2; /* 0x14 */ +} MPI2_BOOT_DEVICE_DEVICE_NAME, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_DEVICE_NAME, + Mpi2BootDeviceDeviceName_t, MPI2_POINTER pMpi2BootDeviceDeviceName_t; + +typedef union _MPI2_MPI2_BIOSPAGE2_BOOT_DEVICE +{ + MPI2_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder; + MPI2_BOOT_DEVICE_SAS_WWID SasWwid; + MPI2_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot; + MPI2_BOOT_DEVICE_DEVICE_NAME DeviceName; +} MPI2_BIOSPAGE2_BOOT_DEVICE, MPI2_POINTER PTR_MPI2_BIOSPAGE2_BOOT_DEVICE, + Mpi2BiosPage2BootDevice_t, MPI2_POINTER pMpi2BiosPage2BootDevice_t; + +typedef struct _MPI2_CONFIG_PAGE_BIOS_2 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 Reserved2; /* 0x08 */ + U32 Reserved3; /* 0x0C */ + U32 Reserved4; /* 0x10 */ + U32 Reserved5; /* 0x14 */ + U32 Reserved6; /* 0x18 */ + U8 ReqBootDeviceForm; /* 0x1C */ + U8 Reserved7; /* 0x1D */ + U16 Reserved8; /* 0x1E */ + MPI2_BIOSPAGE2_BOOT_DEVICE RequestedBootDevice; /* 0x20 */ + U8 ReqAltBootDeviceForm; /* 0x38 */ + U8 Reserved9; /* 0x39 */ + U16 Reserved10; /* 0x3A */ + MPI2_BIOSPAGE2_BOOT_DEVICE RequestedAltBootDevice; /* 0x3C */ + U8 CurrentBootDeviceForm; /* 0x58 */ + U8 Reserved11; /* 0x59 */ + U16 Reserved12; /* 0x5A */ + MPI2_BIOSPAGE2_BOOT_DEVICE CurrentBootDevice; /* 0x58 */ +} MPI2_CONFIG_PAGE_BIOS_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_2, + Mpi2BiosPage2_t, MPI2_POINTER pMpi2BiosPage2_t; + +#define MPI2_BIOSPAGE2_PAGEVERSION (0x04) + +/* values for BIOS Page 2 BootDeviceForm fields */ +#define MPI2_BIOSPAGE2_FORM_MASK (0x0F) +#define MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED (0x00) +#define MPI2_BIOSPAGE2_FORM_SAS_WWID (0x05) +#define MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06) +#define MPI2_BIOSPAGE2_FORM_DEVICE_NAME (0x07) + + +/* BIOS Page 3 */ + +typedef struct _MPI2_ADAPTER_INFO +{ + U8 PciBusNumber; /* 0x00 */ + U8 PciDeviceAndFunctionNumber; /* 0x01 */ + U16 AdapterFlags; /* 0x02 */ +} MPI2_ADAPTER_INFO, MPI2_POINTER PTR_MPI2_ADAPTER_INFO, + Mpi2AdapterInfo_t, MPI2_POINTER pMpi2AdapterInfo_t; + +#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) +#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) + +typedef struct _MPI2_CONFIG_PAGE_BIOS_3 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U32 GlobalFlags; /* 0x04 */ + U32 BiosVersion; /* 0x08 */ + MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */ + U32 Reserved1; /* 0x1C */ +} MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3, + Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t; + +#define MPI2_BIOSPAGE3_PAGEVERSION (0x00) + +/* values for BIOS Page 3 GlobalFlags */ +#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002) +#define MPI2_BIOSPAGE3_FLAGS_VERBOSE_ENABLE (0x00000004) +#define MPI2_BIOSPAGE3_FLAGS_HOOK_INT_40_DISABLE (0x00000010) + +#define MPI2_BIOSPAGE3_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0) +#define MPI2_BIOSPAGE3_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000) +#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DISPLAY (0x00000020) +#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040) + + +/* BIOS Page 4 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength or NumPhys at runtime. + */ +#ifndef MPI2_BIOS_PAGE_4_PHY_ENTRIES +#define MPI2_BIOS_PAGE_4_PHY_ENTRIES (1) +#endif + +typedef struct _MPI2_BIOS4_ENTRY +{ + U64 ReassignmentWWID; /* 0x00 */ + U64 ReassignmentDeviceName; /* 0x08 */ +} MPI2_BIOS4_ENTRY, MPI2_POINTER PTR_MPI2_BIOS4_ENTRY, + Mpi2MBios4Entry_t, MPI2_POINTER pMpi2Bios4Entry_t; + +typedef struct _MPI2_CONFIG_PAGE_BIOS_4 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 NumPhys; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + MPI2_BIOS4_ENTRY Phy[MPI2_BIOS_PAGE_4_PHY_ENTRIES]; /* 0x08 */ +} MPI2_CONFIG_PAGE_BIOS_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_4, + Mpi2BiosPage4_t, MPI2_POINTER pMpi2BiosPage4_t; + +#define MPI2_BIOSPAGE4_PAGEVERSION (0x01) + + +/**************************************************************************** +* RAID Volume Config Pages +****************************************************************************/ + +/* RAID Volume Page 0 */ + +typedef struct _MPI2_RAIDVOL0_PHYS_DISK +{ + U8 RAIDSetNum; /* 0x00 */ + U8 PhysDiskMap; /* 0x01 */ + U8 PhysDiskNum; /* 0x02 */ + U8 Reserved; /* 0x03 */ +} MPI2_RAIDVOL0_PHYS_DISK, MPI2_POINTER PTR_MPI2_RAIDVOL0_PHYS_DISK, + Mpi2RaidVol0PhysDisk_t, MPI2_POINTER pMpi2RaidVol0PhysDisk_t; + +/* defines for the PhysDiskMap field */ +#define MPI2_RAIDVOL0_PHYSDISK_PRIMARY (0x01) +#define MPI2_RAIDVOL0_PHYSDISK_SECONDARY (0x02) + +typedef struct _MPI2_RAIDVOL0_SETTINGS +{ + U16 Settings; /* 0x00 */ + U8 HotSparePool; /* 0x01 */ + U8 Reserved; /* 0x02 */ +} MPI2_RAIDVOL0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDVOL0_SETTINGS, + Mpi2RaidVol0Settings_t, MPI2_POINTER pMpi2RaidVol0Settings_t; + +/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ +#define MPI2_RAID_HOT_SPARE_POOL_0 (0x01) +#define MPI2_RAID_HOT_SPARE_POOL_1 (0x02) +#define MPI2_RAID_HOT_SPARE_POOL_2 (0x04) +#define MPI2_RAID_HOT_SPARE_POOL_3 (0x08) +#define MPI2_RAID_HOT_SPARE_POOL_4 (0x10) +#define MPI2_RAID_HOT_SPARE_POOL_5 (0x20) +#define MPI2_RAID_HOT_SPARE_POOL_6 (0x40) +#define MPI2_RAID_HOT_SPARE_POOL_7 (0x80) + +/* RAID Volume Page 0 VolumeSettings defines */ +#define MPI2_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0008) +#define MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE (0x0004) + +#define MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING (0x0003) +#define MPI2_RAIDVOL0_SETTING_UNCHANGED (0x0000) +#define MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING (0x0001) +#define MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING (0x0002) + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength at runtime. + */ +#ifndef MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX +#define MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_0 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U16 DevHandle; /* 0x04 */ + U8 VolumeState; /* 0x06 */ + U8 VolumeType; /* 0x07 */ + U32 VolumeStatusFlags; /* 0x08 */ + MPI2_RAIDVOL0_SETTINGS VolumeSettings; /* 0x0C */ + U64 MaxLBA; /* 0x10 */ + U32 StripeSize; /* 0x18 */ + U16 BlockSize; /* 0x1C */ + U16 Reserved1; /* 0x1E */ + U8 SupportedPhysDisks; /* 0x20 */ + U8 ResyncRate; /* 0x21 */ + U16 DataScrubDuration; /* 0x22 */ + U8 NumPhysDisks; /* 0x24 */ + U8 Reserved2; /* 0x25 */ + U8 Reserved3; /* 0x26 */ + U8 InactiveStatus; /* 0x27 */ + MPI2_RAIDVOL0_PHYS_DISK PhysDisk[MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX]; /* 0x28 */ +} MPI2_CONFIG_PAGE_RAID_VOL_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_0, + Mpi2RaidVolPage0_t, MPI2_POINTER pMpi2RaidVolPage0_t; + +#define MPI2_RAIDVOLPAGE0_PAGEVERSION (0x0A) + +/* values for RAID VolumeState */ +#define MPI2_RAID_VOL_STATE_MISSING (0x00) +#define MPI2_RAID_VOL_STATE_FAILED (0x01) +#define MPI2_RAID_VOL_STATE_INITIALIZING (0x02) +#define MPI2_RAID_VOL_STATE_ONLINE (0x03) +#define MPI2_RAID_VOL_STATE_DEGRADED (0x04) +#define MPI2_RAID_VOL_STATE_OPTIMAL (0x05) + +/* values for RAID VolumeType */ +#define MPI2_RAID_VOL_TYPE_RAID0 (0x00) +#define MPI2_RAID_VOL_TYPE_RAID1E (0x01) +#define MPI2_RAID_VOL_TYPE_RAID1 (0x02) +#define MPI2_RAID_VOL_TYPE_RAID10 (0x05) +#define MPI2_RAID_VOL_TYPE_UNKNOWN (0xFF) + +/* values for RAID Volume Page 0 VolumeStatusFlags field */ +#define MPI2_RAIDVOL0_STATUS_FLAG_PENDING_RESYNC (0x02000000) +#define MPI2_RAIDVOL0_STATUS_FLAG_BACKG_INIT_PENDING (0x01000000) +#define MPI2_RAIDVOL0_STATUS_FLAG_MDC_PENDING (0x00800000) +#define MPI2_RAIDVOL0_STATUS_FLAG_USER_CONSIST_PENDING (0x00400000) +#define MPI2_RAIDVOL0_STATUS_FLAG_MAKE_DATA_CONSISTENT (0x00200000) +#define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000) +#define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000) +#define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000) +#define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000) +#define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000) +#define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040) +#define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020) +#define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000) +#define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010) +#define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008) +#define MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x00000004) +#define MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED (0x00000002) +#define MPI2_RAIDVOL0_STATUS_FLAG_ENABLED (0x00000001) + +/* values for RAID Volume Page 0 SupportedPhysDisks field */ +#define MPI2_RAIDVOL0_SUPPORT_SOLID_STATE_DISKS (0x08) +#define MPI2_RAIDVOL0_SUPPORT_HARD_DISKS (0x04) +#define MPI2_RAIDVOL0_SUPPORT_SAS_PROTOCOL (0x02) +#define MPI2_RAIDVOL0_SUPPORT_SATA_PROTOCOL (0x01) + +/* values for RAID Volume Page 0 InactiveStatus field */ +#define MPI2_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00) +#define MPI2_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01) +#define MPI2_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02) +#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03) +#define MPI2_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04) +#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05) +#define MPI2_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06) + + +/* RAID Volume Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U16 DevHandle; /* 0x04 */ + U16 Reserved0; /* 0x06 */ + U8 GUID[24]; /* 0x08 */ + U8 Name[16]; /* 0x20 */ + U64 WWID; /* 0x30 */ + U32 Reserved1; /* 0x38 */ + U32 Reserved2; /* 0x3C */ +} MPI2_CONFIG_PAGE_RAID_VOL_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_1, + Mpi2RaidVolPage1_t, MPI2_POINTER pMpi2RaidVolPage1_t; + +#define MPI2_RAIDVOLPAGE1_PAGEVERSION (0x03) + + +/**************************************************************************** +* RAID Physical Disk Config Pages +****************************************************************************/ + +/* RAID Physical Disk Page 0 */ + +typedef struct _MPI2_RAIDPHYSDISK0_SETTINGS +{ + U16 Reserved1; /* 0x00 */ + U8 HotSparePool; /* 0x02 */ + U8 Reserved2; /* 0x03 */ +} MPI2_RAIDPHYSDISK0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_SETTINGS, + Mpi2RaidPhysDisk0Settings_t, MPI2_POINTER pMpi2RaidPhysDisk0Settings_t; + +/* use MPI2_RAID_HOT_SPARE_POOL_ defines for the HotSparePool field */ + +typedef struct _MPI2_RAIDPHYSDISK0_INQUIRY_DATA +{ + U8 VendorID[8]; /* 0x00 */ + U8 ProductID[16]; /* 0x08 */ + U8 ProductRevLevel[4]; /* 0x18 */ + U8 SerialNum[32]; /* 0x1C */ +} MPI2_RAIDPHYSDISK0_INQUIRY_DATA, + MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_INQUIRY_DATA, + Mpi2RaidPhysDisk0InquiryData_t, MPI2_POINTER pMpi2RaidPhysDisk0InquiryData_t; + +typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_0 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U16 DevHandle; /* 0x04 */ + U8 Reserved1; /* 0x06 */ + U8 PhysDiskNum; /* 0x07 */ + MPI2_RAIDPHYSDISK0_SETTINGS PhysDiskSettings; /* 0x08 */ + U32 Reserved2; /* 0x0C */ + MPI2_RAIDPHYSDISK0_INQUIRY_DATA InquiryData; /* 0x10 */ + U32 Reserved3; /* 0x4C */ + U8 PhysDiskState; /* 0x50 */ + U8 OfflineReason; /* 0x51 */ + U8 IncompatibleReason; /* 0x52 */ + U8 PhysDiskAttributes; /* 0x53 */ + U32 PhysDiskStatusFlags; /* 0x54 */ + U64 DeviceMaxLBA; /* 0x58 */ + U64 HostMaxLBA; /* 0x60 */ + U64 CoercedMaxLBA; /* 0x68 */ + U16 BlockSize; /* 0x70 */ + U16 Reserved5; /* 0x72 */ + U32 Reserved6; /* 0x74 */ +} MPI2_CONFIG_PAGE_RD_PDISK_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_0, + Mpi2RaidPhysDiskPage0_t, MPI2_POINTER pMpi2RaidPhysDiskPage0_t; + +#define MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION (0x05) + +/* PhysDiskState defines */ +#define MPI2_RAID_PD_STATE_NOT_CONFIGURED (0x00) +#define MPI2_RAID_PD_STATE_NOT_COMPATIBLE (0x01) +#define MPI2_RAID_PD_STATE_OFFLINE (0x02) +#define MPI2_RAID_PD_STATE_ONLINE (0x03) +#define MPI2_RAID_PD_STATE_HOT_SPARE (0x04) +#define MPI2_RAID_PD_STATE_DEGRADED (0x05) +#define MPI2_RAID_PD_STATE_REBUILDING (0x06) +#define MPI2_RAID_PD_STATE_OPTIMAL (0x07) + +/* OfflineReason defines */ +#define MPI2_PHYSDISK0_ONLINE (0x00) +#define MPI2_PHYSDISK0_OFFLINE_MISSING (0x01) +#define MPI2_PHYSDISK0_OFFLINE_FAILED (0x03) +#define MPI2_PHYSDISK0_OFFLINE_INITIALIZING (0x04) +#define MPI2_PHYSDISK0_OFFLINE_REQUESTED (0x05) +#define MPI2_PHYSDISK0_OFFLINE_FAILED_REQUESTED (0x06) +#define MPI2_PHYSDISK0_OFFLINE_OTHER (0xFF) + +/* IncompatibleReason defines */ +#define MPI2_PHYSDISK0_COMPATIBLE (0x00) +#define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01) +#define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02) +#define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03) +#define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04) +#define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05) +#define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF) + +/* PhysDiskAttributes defines */ +#define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08) +#define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04) +#define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02) +#define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01) + +/* PhysDiskStatusFlags defines */ +#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040) +#define MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET (0x00000020) +#define MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED (0x00000010) +#define MPI2_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00000000) +#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x00000008) +#define MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x00000004) +#define MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED (0x00000002) +#define MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x00000001) + + +/* RAID Physical Disk Page 1 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.PageLength or NumPhysDiskPaths at runtime. + */ +#ifndef MPI2_RAID_PHYS_DISK1_PATH_MAX +#define MPI2_RAID_PHYS_DISK1_PATH_MAX (1) +#endif + +typedef struct _MPI2_RAIDPHYSDISK1_PATH +{ + U16 DevHandle; /* 0x00 */ + U16 Reserved1; /* 0x02 */ + U64 WWID; /* 0x04 */ + U64 OwnerWWID; /* 0x0C */ + U8 OwnerIdentifier; /* 0x14 */ + U8 Reserved2; /* 0x15 */ + U16 Flags; /* 0x16 */ +} MPI2_RAIDPHYSDISK1_PATH, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK1_PATH, + Mpi2RaidPhysDisk1Path_t, MPI2_POINTER pMpi2RaidPhysDisk1Path_t; + +/* RAID Physical Disk Page 1 Physical Disk Path Flags field defines */ +#define MPI2_RAID_PHYSDISK1_FLAG_PRIMARY (0x0004) +#define MPI2_RAID_PHYSDISK1_FLAG_BROKEN (0x0002) +#define MPI2_RAID_PHYSDISK1_FLAG_INVALID (0x0001) + +typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_1 +{ + MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ + U8 NumPhysDiskPaths; /* 0x04 */ + U8 PhysDiskNum; /* 0x05 */ + U16 Reserved1; /* 0x06 */ + U32 Reserved2; /* 0x08 */ + MPI2_RAIDPHYSDISK1_PATH PhysicalDiskPath[MPI2_RAID_PHYS_DISK1_PATH_MAX];/* 0x0C */ +} MPI2_CONFIG_PAGE_RD_PDISK_1, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_1, + Mpi2RaidPhysDiskPage1_t, MPI2_POINTER pMpi2RaidPhysDiskPage1_t; + +#define MPI2_RAIDPHYSDISKPAGE1_PAGEVERSION (0x02) + + +/**************************************************************************** +* values for fields used by several types of SAS Config Pages +****************************************************************************/ + +/* values for NegotiatedLinkRates fields */ +#define MPI2_SAS_NEG_LINK_RATE_MASK_LOGICAL (0xF0) +#define MPI2_SAS_NEG_LINK_RATE_SHIFT_LOGICAL (4) +#define MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL (0x0F) +/* link rates used for Negotiated Physical and Logical Link Rate */ +#define MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE (0x00) +#define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01) +#define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02) +#define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03) +#define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04) +#define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05) +#define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08) +#define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09) +#define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A) + + +/* values for AttachedPhyInfo fields */ +#define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040) +#define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020) +#define MPI2_SAS_APHYINFO_BREAK_REPLY_CAPABLE (0x00000010) + +#define MPI2_SAS_APHYINFO_REASON_MASK (0x0000000F) +#define MPI2_SAS_APHYINFO_REASON_UNKNOWN (0x00000000) +#define MPI2_SAS_APHYINFO_REASON_POWER_ON (0x00000001) +#define MPI2_SAS_APHYINFO_REASON_HARD_RESET (0x00000002) +#define MPI2_SAS_APHYINFO_REASON_SMP_PHY_CONTROL (0x00000003) +#define MPI2_SAS_APHYINFO_REASON_LOSS_OF_SYNC (0x00000004) +#define MPI2_SAS_APHYINFO_REASON_MULTIPLEXING_SEQ (0x00000005) +#define MPI2_SAS_APHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00000006) +#define MPI2_SAS_APHYINFO_REASON_BREAK_TIMEOUT (0x00000007) +#define MPI2_SAS_APHYINFO_REASON_PHY_TEST_STOPPED (0x00000008) + + +/* values for PhyInfo fields */ +#define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000) + +#define MPI2_SAS_PHYINFO_PHY_POWER_CONDITION_MASK (0x18000000) +#define MPI2_SAS_PHYINFO_PHY_POWER_ACTIVE (0x00000000) +#define MPI2_SAS_PHYINFO_PHY_POWER_PARTIAL (0x08000000) +#define MPI2_SAS_PHYINFO_PHY_POWER_SLUMBER (0x10000000) + +#define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000) +#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS_PERSISTENT (0x02000000) +#define MPI2_SAS_PHYINFO_REQ_INSIDE_ZPSDS (0x01000000) +#define MPI2_SAS_PHYINFO_ZONE_GROUP_PERSISTENT (0x00400000) +#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS (0x00200000) +#define MPI2_SAS_PHYINFO_ZONING_ENABLED (0x00100000) + +#define MPI2_SAS_PHYINFO_REASON_MASK (0x000F0000) +#define MPI2_SAS_PHYINFO_REASON_UNKNOWN (0x00000000) +#define MPI2_SAS_PHYINFO_REASON_POWER_ON (0x00010000) +#define MPI2_SAS_PHYINFO_REASON_HARD_RESET (0x00020000) +#define MPI2_SAS_PHYINFO_REASON_SMP_PHY_CONTROL (0x00030000) +#define MPI2_SAS_PHYINFO_REASON_LOSS_OF_SYNC (0x00040000) +#define MPI2_SAS_PHYINFO_REASON_MULTIPLEXING_SEQ (0x00050000) +#define MPI2_SAS_PHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00060000) +#define MPI2_SAS_PHYINFO_REASON_BREAK_TIMEOUT (0x00070000) +#define MPI2_SAS_PHYINFO_REASON_PHY_TEST_STOPPED (0x00080000) + +#define MPI2_SAS_PHYINFO_MULTIPLEXING_SUPPORTED (0x00008000) +#define MPI2_SAS_PHYINFO_SATA_PORT_ACTIVE (0x00004000) +#define MPI2_SAS_PHYINFO_SATA_PORT_SELECTOR_PRESENT (0x00002000) +#define MPI2_SAS_PHYINFO_VIRTUAL_PHY (0x00001000) + +#define MPI2_SAS_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00) +#define MPI2_SAS_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8) + +#define MPI2_SAS_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0) +#define MPI2_SAS_PHYINFO_DIRECT_ROUTING (0x00000000) +#define MPI2_SAS_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010) +#define MPI2_SAS_PHYINFO_TABLE_ROUTING (0x00000020) + + +/* values for SAS ProgrammedLinkRate fields */ +#define MPI2_SAS_PRATE_MAX_RATE_MASK (0xF0) +#define MPI2_SAS_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00) +#define MPI2_SAS_PRATE_MAX_RATE_1_5 (0x80) +#define MPI2_SAS_PRATE_MAX_RATE_3_0 (0x90) +#define MPI2_SAS_PRATE_MAX_RATE_6_0 (0xA0) +#define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F) +#define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00) +#define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08) +#define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09) +#define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A) + + +/* values for SAS HwLinkRate fields */ +#define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0) +#define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80) +#define MPI2_SAS_HWRATE_MAX_RATE_3_0 (0x90) +#define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0) +#define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F) +#define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08) +#define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09) +#define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A) + + + +/**************************************************************************** +* SAS IO Unit Config Pages +****************************************************************************/ + +/* SAS IO Unit Page 0 */ + +typedef struct _MPI2_SAS_IO_UNIT0_PHY_DATA +{ + U8 Port; /* 0x00 */ + U8 PortFlags; /* 0x01 */ + U8 PhyFlags; /* 0x02 */ + U8 NegotiatedLinkRate; /* 0x03 */ + U32 ControllerPhyDeviceInfo;/* 0x04 */ + U16 AttachedDevHandle; /* 0x08 */ + U16 ControllerDevHandle; /* 0x0A */ + U32 DiscoveryStatus; /* 0x0C */ + U32 Reserved; /* 0x10 */ +} MPI2_SAS_IO_UNIT0_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT0_PHY_DATA, + Mpi2SasIOUnit0PhyData_t, MPI2_POINTER pMpi2SasIOUnit0PhyData_t; + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_SAS_IOUNIT0_PHY_MAX +#define MPI2_SAS_IOUNIT0_PHY_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U8 NumPhys; /* 0x0C */ + U8 Reserved2; /* 0x0D */ + U16 Reserved3; /* 0x0E */ + MPI2_SAS_IO_UNIT0_PHY_DATA PhyData[MPI2_SAS_IOUNIT0_PHY_MAX]; /* 0x10 */ +} MPI2_CONFIG_PAGE_SASIOUNIT_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_0, + Mpi2SasIOUnitPage0_t, MPI2_POINTER pMpi2SasIOUnitPage0_t; + +#define MPI2_SASIOUNITPAGE0_PAGEVERSION (0x05) + +/* values for SAS IO Unit Page 0 PortFlags */ +#define MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS (0x08) +#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01) + +/* values for SAS IO Unit Page 0 PhyFlags */ +#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10) +#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08) + +/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ + +/* see mpi2_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ + +/* values for SAS IO Unit Page 0 DiscoveryStatus */ +#define MPI2_SASIOUNIT0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) +#define MPI2_SASIOUNIT0_DS_MAX_EXPANDERS_EXCEED (0x40000000) +#define MPI2_SASIOUNIT0_DS_MAX_DEVICES_EXCEED (0x20000000) +#define MPI2_SASIOUNIT0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) +#define MPI2_SASIOUNIT0_DS_DOWNSTREAM_INITIATOR (0x08000000) +#define MPI2_SASIOUNIT0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) +#define MPI2_SASIOUNIT0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) +#define MPI2_SASIOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000) +#define MPI2_SASIOUNIT0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) +#define MPI2_SASIOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800) +#define MPI2_SASIOUNIT0_DS_TABLE_LINK (0x00000400) +#define MPI2_SASIOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200) +#define MPI2_SASIOUNIT0_DS_SMP_CRC_ERROR (0x00000100) +#define MPI2_SASIOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080) +#define MPI2_SASIOUNIT0_DS_INDEX_NOT_EXIST (0x00000040) +#define MPI2_SASIOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020) +#define MPI2_SASIOUNIT0_DS_SMP_TIMEOUT (0x00000010) +#define MPI2_SASIOUNIT0_DS_MULTIPLE_PORTS (0x00000004) +#define MPI2_SASIOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002) +#define MPI2_SASIOUNIT0_DS_LOOP_DETECTED (0x00000001) + + +/* SAS IO Unit Page 1 */ + +typedef struct _MPI2_SAS_IO_UNIT1_PHY_DATA +{ + U8 Port; /* 0x00 */ + U8 PortFlags; /* 0x01 */ + U8 PhyFlags; /* 0x02 */ + U8 MaxMinLinkRate; /* 0x03 */ + U32 ControllerPhyDeviceInfo; /* 0x04 */ + U16 MaxTargetPortConnectTime; /* 0x08 */ + U16 Reserved1; /* 0x0A */ +} MPI2_SAS_IO_UNIT1_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT1_PHY_DATA, + Mpi2SasIOUnit1PhyData_t, MPI2_POINTER pMpi2SasIOUnit1PhyData_t; + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_SAS_IOUNIT1_PHY_MAX +#define MPI2_SAS_IOUNIT1_PHY_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U16 ControlFlags; /* 0x08 */ + U16 SASNarrowMaxQueueDepth; /* 0x0A */ + U16 AdditionalControlFlags; /* 0x0C */ + U16 SASWideMaxQueueDepth; /* 0x0E */ + U8 NumPhys; /* 0x10 */ + U8 SATAMaxQDepth; /* 0x11 */ + U8 ReportDeviceMissingDelay; /* 0x12 */ + U8 IODeviceMissingDelay; /* 0x13 */ + MPI2_SAS_IO_UNIT1_PHY_DATA PhyData[MPI2_SAS_IOUNIT1_PHY_MAX]; /* 0x14 */ +} MPI2_CONFIG_PAGE_SASIOUNIT_1, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_1, + Mpi2SasIOUnitPage1_t, MPI2_POINTER pMpi2SasIOUnitPage1_t; + +#define MPI2_SASIOUNITPAGE1_PAGEVERSION (0x09) + +/* values for SAS IO Unit Page 1 ControlFlags */ +#define MPI2_SASIOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000) +#define MPI2_SASIOUNIT1_CONTROL_SATA_3_0_MAX (0x4000) +#define MPI2_SASIOUNIT1_CONTROL_SATA_1_5_MAX (0x2000) +#define MPI2_SASIOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000) + +#define MPI2_SASIOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600) +#define MPI2_SASIOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9) +#define MPI2_SASIOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x0) +#define MPI2_SASIOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x1) +#define MPI2_SASIOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x2) + +#define MPI2_SASIOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080) +#define MPI2_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040) +#define MPI2_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020) +#define MPI2_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010) +#define MPI2_SASIOUNIT1_CONTROL_TABLE_SUBTRACTIVE_ILLEGAL (0x0008) +#define MPI2_SASIOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004) +#define MPI2_SASIOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002) +#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) + +/* values for SAS IO Unit Page 1 AdditionalControlFlags */ +#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080) +#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040) +#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020) +#define MPI2_SASIOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010) +#define MPI2_SASIOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008) +#define MPI2_SASIOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004) +#define MPI2_SASIOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002) +#define MPI2_SASIOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001) + +/* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */ +#define MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F) +#define MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16 (0x80) + +/* values for SAS IO Unit Page 1 PortFlags */ +#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) + +/* values for SAS IO Unit Page 1 PhyFlags */ +#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10) +#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08) + +/* values for SAS IO Unit Page 1 MaxMinLinkRate */ +#define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0) +#define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80) +#define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90) +#define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0) +#define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F) +#define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08) +#define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09) +#define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A) + +/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ + + +/* SAS IO Unit Page 4 */ + +typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP +{ + U8 MaxTargetSpinup; /* 0x00 */ + U8 SpinupDelay; /* 0x01 */ + U16 Reserved1; /* 0x02 */ +} MPI2_SAS_IOUNIT4_SPINUP_GROUP, MPI2_POINTER PTR_MPI2_SAS_IOUNIT4_SPINUP_GROUP, + Mpi2SasIOUnit4SpinupGroup_t, MPI2_POINTER pMpi2SasIOUnit4SpinupGroup_t; + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * four and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_SAS_IOUNIT4_PHY_MAX +#define MPI2_SAS_IOUNIT4_PHY_MAX (4) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + MPI2_SAS_IOUNIT4_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */ + U32 Reserved1; /* 0x18 */ + U32 Reserved2; /* 0x1C */ + U32 Reserved3; /* 0x20 */ + U8 BootDeviceWaitTime; /* 0x24 */ + U8 Reserved4; /* 0x25 */ + U16 Reserved5; /* 0x26 */ + U8 NumPhys; /* 0x28 */ + U8 PEInitialSpinupDelay; /* 0x29 */ + U8 PEReplyDelay; /* 0x2A */ + U8 Flags; /* 0x2B */ + U8 PHY[MPI2_SAS_IOUNIT4_PHY_MAX]; /* 0x2C */ +} MPI2_CONFIG_PAGE_SASIOUNIT_4, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_4, + Mpi2SasIOUnitPage4_t, MPI2_POINTER pMpi2SasIOUnitPage4_t; + +#define MPI2_SASIOUNITPAGE4_PAGEVERSION (0x02) + +/* defines for Flags field */ +#define MPI2_SASIOUNIT4_FLAGS_AUTO_PORTENABLE (0x01) + +/* defines for PHY field */ +#define MPI2_SASIOUNIT4_PHY_SPINUP_GROUP_MASK (0x03) + + +/* SAS IO Unit Page 5 */ + +typedef struct _MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS +{ + U8 ControlFlags; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 InactivityTimerExponent; /* 0x02 */ + U8 SATAPartialTimeout; /* 0x04 */ + U8 Reserved2; /* 0x05 */ + U8 SATASlumberTimeout; /* 0x06 */ + U8 Reserved3; /* 0x07 */ + U8 SASPartialTimeout; /* 0x08 */ + U8 Reserved4; /* 0x09 */ + U8 SASSlumberTimeout; /* 0x0A */ + U8 Reserved5; /* 0x0B */ +} MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, + MPI2_POINTER PTR_MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS, + Mpi2SasIOUnit5PhyPmSettings_t, MPI2_POINTER pMpi2SasIOUnit5PhyPmSettings_t; + +/* defines for ControlFlags field */ +#define MPI2_SASIOUNIT5_CONTROL_SAS_SLUMBER_ENABLE (0x08) +#define MPI2_SASIOUNIT5_CONTROL_SAS_PARTIAL_ENABLE (0x04) +#define MPI2_SASIOUNIT5_CONTROL_SATA_SLUMBER_ENABLE (0x02) +#define MPI2_SASIOUNIT5_CONTROL_SATA_PARTIAL_ENABLE (0x01) + +/* defines for InactivityTimerExponent field */ +#define MPI2_SASIOUNIT5_ITE_MASK_SAS_SLUMBER (0x7000) +#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_SLUMBER (12) +#define MPI2_SASIOUNIT5_ITE_MASK_SAS_PARTIAL (0x0700) +#define MPI2_SASIOUNIT5_ITE_SHIFT_SAS_PARTIAL (8) +#define MPI2_SASIOUNIT5_ITE_MASK_SATA_SLUMBER (0x0070) +#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_SLUMBER (4) +#define MPI2_SASIOUNIT5_ITE_MASK_SATA_PARTIAL (0x0007) +#define MPI2_SASIOUNIT5_ITE_SHIFT_SATA_PARTIAL (0) + +#define MPI2_SASIOUNIT5_ITE_TEN_SECONDS (7) +#define MPI2_SASIOUNIT5_ITE_ONE_SECOND (6) +#define MPI2_SASIOUNIT5_ITE_HUNDRED_MILLISECONDS (5) +#define MPI2_SASIOUNIT5_ITE_TEN_MILLISECONDS (4) +#define MPI2_SASIOUNIT5_ITE_ONE_MILLISECOND (3) +#define MPI2_SASIOUNIT5_ITE_HUNDRED_MICROSECONDS (2) +#define MPI2_SASIOUNIT5_ITE_TEN_MICROSECONDS (1) +#define MPI2_SASIOUNIT5_ITE_ONE_MICROSECOND (0) + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_SAS_IOUNIT5_PHY_MAX +#define MPI2_SAS_IOUNIT5_PHY_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_5 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 NumPhys; /* 0x08 */ + U8 Reserved1; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS SASPhyPowerManagementSettings[MPI2_SAS_IOUNIT5_PHY_MAX]; /* 0x10 */ +} MPI2_CONFIG_PAGE_SASIOUNIT_5, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_5, + Mpi2SasIOUnitPage5_t, MPI2_POINTER pMpi2SasIOUnitPage5_t; + +#define MPI2_SASIOUNITPAGE5_PAGEVERSION (0x00) + + + + +/**************************************************************************** +* SAS Expander Config Pages +****************************************************************************/ + +/* SAS Expander Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_EXPANDER_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 PhysicalPort; /* 0x08 */ + U8 ReportGenLength; /* 0x09 */ + U16 EnclosureHandle; /* 0x0A */ + U64 SASAddress; /* 0x0C */ + U32 DiscoveryStatus; /* 0x14 */ + U16 DevHandle; /* 0x18 */ + U16 ParentDevHandle; /* 0x1A */ + U16 ExpanderChangeCount; /* 0x1C */ + U16 ExpanderRouteIndexes; /* 0x1E */ + U8 NumPhys; /* 0x20 */ + U8 SASLevel; /* 0x21 */ + U16 Flags; /* 0x22 */ + U16 STPBusInactivityTimeLimit; /* 0x24 */ + U16 STPMaxConnectTimeLimit; /* 0x26 */ + U16 STP_SMP_NexusLossTime; /* 0x28 */ + U16 MaxNumRoutedSasAddresses; /* 0x2A */ + U64 ActiveZoneManagerSASAddress;/* 0x2C */ + U16 ZoneLockInactivityLimit; /* 0x34 */ + U16 Reserved1; /* 0x36 */ + U8 TimeToReducedFunc; /* 0x38 */ + U8 InitialTimeToReducedFunc; /* 0x39 */ + U8 MaxReducedFuncTime; /* 0x3A */ + U8 Reserved2; /* 0x3B */ +} MPI2_CONFIG_PAGE_EXPANDER_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_0, + Mpi2ExpanderPage0_t, MPI2_POINTER pMpi2ExpanderPage0_t; + +#define MPI2_SASEXPANDER0_PAGEVERSION (0x06) + +/* values for SAS Expander Page 0 DiscoveryStatus field */ +#define MPI2_SAS_EXPANDER0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) +#define MPI2_SAS_EXPANDER0_DS_MAX_EXPANDERS_EXCEED (0x40000000) +#define MPI2_SAS_EXPANDER0_DS_MAX_DEVICES_EXCEED (0x20000000) +#define MPI2_SAS_EXPANDER0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) +#define MPI2_SAS_EXPANDER0_DS_DOWNSTREAM_INITIATOR (0x08000000) +#define MPI2_SAS_EXPANDER0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) +#define MPI2_SAS_EXPANDER0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) +#define MPI2_SAS_EXPANDER0_DS_MULTI_PORT_DOMAIN (0x00002000) +#define MPI2_SAS_EXPANDER0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) +#define MPI2_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800) +#define MPI2_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400) +#define MPI2_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200) +#define MPI2_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100) +#define MPI2_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080) +#define MPI2_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040) +#define MPI2_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020) +#define MPI2_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010) +#define MPI2_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004) +#define MPI2_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002) +#define MPI2_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001) + +/* values for SAS Expander Page 0 Flags field */ +#define MPI2_SAS_EXPANDER0_FLAGS_REDUCED_FUNCTIONALITY (0x2000) +#define MPI2_SAS_EXPANDER0_FLAGS_ZONE_LOCKED (0x1000) +#define MPI2_SAS_EXPANDER0_FLAGS_SUPPORTED_PHYSICAL_PRES (0x0800) +#define MPI2_SAS_EXPANDER0_FLAGS_ASSERTED_PHYSICAL_PRES (0x0400) +#define MPI2_SAS_EXPANDER0_FLAGS_ZONING_SUPPORT (0x0200) +#define MPI2_SAS_EXPANDER0_FLAGS_ENABLED_ZONING (0x0100) +#define MPI2_SAS_EXPANDER0_FLAGS_TABLE_TO_TABLE_SUPPORT (0x0080) +#define MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x0010) +#define MPI2_SAS_EXPANDER0_FLAGS_OTHERS_CONFIG (0x0004) +#define MPI2_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x0002) +#define MPI2_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x0001) + + +/* SAS Expander Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_EXPANDER_1 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 PhysicalPort; /* 0x08 */ + U8 Reserved1; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U8 NumPhys; /* 0x0C */ + U8 Phy; /* 0x0D */ + U16 NumTableEntriesProgrammed; /* 0x0E */ + U8 ProgrammedLinkRate; /* 0x10 */ + U8 HwLinkRate; /* 0x11 */ + U16 AttachedDevHandle; /* 0x12 */ + U32 PhyInfo; /* 0x14 */ + U32 AttachedDeviceInfo; /* 0x18 */ + U16 ExpanderDevHandle; /* 0x1C */ + U8 ChangeCount; /* 0x1E */ + U8 NegotiatedLinkRate; /* 0x1F */ + U8 PhyIdentifier; /* 0x20 */ + U8 AttachedPhyIdentifier; /* 0x21 */ + U8 Reserved3; /* 0x22 */ + U8 DiscoveryInfo; /* 0x23 */ + U32 AttachedPhyInfo; /* 0x24 */ + U8 ZoneGroup; /* 0x28 */ + U8 SelfConfigStatus; /* 0x29 */ + U16 Reserved4; /* 0x2A */ +} MPI2_CONFIG_PAGE_EXPANDER_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_1, + Mpi2ExpanderPage1_t, MPI2_POINTER pMpi2ExpanderPage1_t; + +#define MPI2_SASEXPANDER1_PAGEVERSION (0x02) + +/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ + +/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ + +/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ + +/* see mpi2_sas.h for the MPI2_SAS_DEVICE_INFO_ defines used for the AttachedDeviceInfo field */ + +/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ + +/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ + +/* values for SAS Expander Page 1 DiscoveryInfo field */ +#define MPI2_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04) +#define MPI2_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02) +#define MPI2_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01) + + +/**************************************************************************** +* SAS Device Config Pages +****************************************************************************/ + +/* SAS Device Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U16 Slot; /* 0x08 */ + U16 EnclosureHandle; /* 0x0A */ + U64 SASAddress; /* 0x0C */ + U16 ParentDevHandle; /* 0x14 */ + U8 PhyNum; /* 0x16 */ + U8 AccessStatus; /* 0x17 */ + U16 DevHandle; /* 0x18 */ + U8 AttachedPhyIdentifier; /* 0x1A */ + U8 ZoneGroup; /* 0x1B */ + U32 DeviceInfo; /* 0x1C */ + U16 Flags; /* 0x20 */ + U8 PhysicalPort; /* 0x22 */ + U8 MaxPortConnections; /* 0x23 */ + U64 DeviceName; /* 0x24 */ + U8 PortGroups; /* 0x2C */ + U8 DmaGroup; /* 0x2D */ + U8 ControlGroup; /* 0x2E */ + U8 Reserved1; /* 0x2F */ + U32 Reserved2; /* 0x30 */ + U32 Reserved3; /* 0x34 */ +} MPI2_CONFIG_PAGE_SAS_DEV_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_0, + Mpi2SasDevicePage0_t, MPI2_POINTER pMpi2SasDevicePage0_t; + +#define MPI2_SASDEVICE0_PAGEVERSION (0x08) + +/* values for SAS Device Page 0 AccessStatus field */ +#define MPI2_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00) +#define MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01) +#define MPI2_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02) +#define MPI2_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03) +#define MPI2_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04) +#define MPI2_SAS_DEVICE0_ASTATUS_ROUTE_NOT_ADDRESSABLE (0x05) +#define MPI2_SAS_DEVICE0_ASTATUS_SMP_ERROR_NOT_ADDRESSABLE (0x06) +#define MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED (0x07) +/* specific values for SATA Init failures */ +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19) +#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F) + +/* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */ + +/* values for SAS Device Page 0 Flags field */ +#define MPI2_SAS_DEVICE0_FLAGS_SLUMBER_PM_CAPABLE (0x1000) +#define MPI2_SAS_DEVICE0_FLAGS_PARTIAL_PM_CAPABLE (0x0800) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200) +#define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020) +#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010) +#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008) +#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001) + + +/* SAS Device Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_1 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U64 SASAddress; /* 0x0C */ + U32 Reserved2; /* 0x14 */ + U16 DevHandle; /* 0x18 */ + U16 Reserved3; /* 0x1A */ + U8 InitialRegDeviceFIS[20];/* 0x1C */ +} MPI2_CONFIG_PAGE_SAS_DEV_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_1, + Mpi2SasDevicePage1_t, MPI2_POINTER pMpi2SasDevicePage1_t; + +#define MPI2_SASDEVICE1_PAGEVERSION (0x01) + + +/**************************************************************************** +* SAS PHY Config Pages +****************************************************************************/ + +/* SAS PHY Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U16 OwnerDevHandle; /* 0x08 */ + U16 Reserved1; /* 0x0A */ + U16 AttachedDevHandle; /* 0x0C */ + U8 AttachedPhyIdentifier; /* 0x0E */ + U8 Reserved2; /* 0x0F */ + U32 AttachedPhyInfo; /* 0x10 */ + U8 ProgrammedLinkRate; /* 0x14 */ + U8 HwLinkRate; /* 0x15 */ + U8 ChangeCount; /* 0x16 */ + U8 Flags; /* 0x17 */ + U32 PhyInfo; /* 0x18 */ + U8 NegotiatedLinkRate; /* 0x1C */ + U8 Reserved3; /* 0x1D */ + U16 Reserved4; /* 0x1E */ +} MPI2_CONFIG_PAGE_SAS_PHY_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_0, + Mpi2SasPhyPage0_t, MPI2_POINTER pMpi2SasPhyPage0_t; + +#define MPI2_SASPHY0_PAGEVERSION (0x03) + +/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ + +/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ + +/* values for SAS PHY Page 0 Flags field */ +#define MPI2_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01) + +/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ + +/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ + +/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ + + +/* SAS PHY Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_1 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U32 InvalidDwordCount; /* 0x0C */ + U32 RunningDisparityErrorCount; /* 0x10 */ + U32 LossDwordSynchCount; /* 0x14 */ + U32 PhyResetProblemCount; /* 0x18 */ +} MPI2_CONFIG_PAGE_SAS_PHY_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_1, + Mpi2SasPhyPage1_t, MPI2_POINTER pMpi2SasPhyPage1_t; + +#define MPI2_SASPHY1_PAGEVERSION (0x01) + + +/* SAS PHY Page 2 */ + +typedef struct _MPI2_SASPHY2_PHY_EVENT +{ + U8 PhyEventCode; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ + U32 PhyEventInfo; /* 0x04 */ +} MPI2_SASPHY2_PHY_EVENT, MPI2_POINTER PTR_MPI2_SASPHY2_PHY_EVENT, + Mpi2SasPhy2PhyEvent_t, MPI2_POINTER pMpi2SasPhy2PhyEvent_t; + +/* use MPI2_SASPHY3_EVENT_CODE_ for the PhyEventCode field */ + + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhyEvents at runtime. + */ +#ifndef MPI2_SASPHY2_PHY_EVENT_MAX +#define MPI2_SASPHY2_PHY_EVENT_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_2 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U8 NumPhyEvents; /* 0x0C */ + U8 Reserved2; /* 0x0D */ + U16 Reserved3; /* 0x0E */ + MPI2_SASPHY2_PHY_EVENT PhyEvent[MPI2_SASPHY2_PHY_EVENT_MAX]; /* 0x10 */ +} MPI2_CONFIG_PAGE_SAS_PHY_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_2, + Mpi2SasPhyPage2_t, MPI2_POINTER pMpi2SasPhyPage2_t; + +#define MPI2_SASPHY2_PAGEVERSION (0x00) + + +/* SAS PHY Page 3 */ + +typedef struct _MPI2_SASPHY3_PHY_EVENT_CONFIG +{ + U8 PhyEventCode; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ + U8 CounterType; /* 0x04 */ + U8 ThresholdWindow; /* 0x05 */ + U8 TimeUnits; /* 0x06 */ + U8 Reserved3; /* 0x07 */ + U32 EventThreshold; /* 0x08 */ + U16 ThresholdFlags; /* 0x0C */ + U16 Reserved4; /* 0x0E */ +} MPI2_SASPHY3_PHY_EVENT_CONFIG, MPI2_POINTER PTR_MPI2_SASPHY3_PHY_EVENT_CONFIG, + Mpi2SasPhy3PhyEventConfig_t, MPI2_POINTER pMpi2SasPhy3PhyEventConfig_t; + +/* values for PhyEventCode field */ +#define MPI2_SASPHY3_EVENT_CODE_NO_EVENT (0x00) +#define MPI2_SASPHY3_EVENT_CODE_INVALID_DWORD (0x01) +#define MPI2_SASPHY3_EVENT_CODE_RUNNING_DISPARITY_ERROR (0x02) +#define MPI2_SASPHY3_EVENT_CODE_LOSS_DWORD_SYNC (0x03) +#define MPI2_SASPHY3_EVENT_CODE_PHY_RESET_PROBLEM (0x04) +#define MPI2_SASPHY3_EVENT_CODE_ELASTICITY_BUF_OVERFLOW (0x05) +#define MPI2_SASPHY3_EVENT_CODE_RX_ERROR (0x06) +#define MPI2_SASPHY3_EVENT_CODE_RX_ADDR_FRAME_ERROR (0x20) +#define MPI2_SASPHY3_EVENT_CODE_TX_AC_OPEN_REJECT (0x21) +#define MPI2_SASPHY3_EVENT_CODE_RX_AC_OPEN_REJECT (0x22) +#define MPI2_SASPHY3_EVENT_CODE_TX_RC_OPEN_REJECT (0x23) +#define MPI2_SASPHY3_EVENT_CODE_RX_RC_OPEN_REJECT (0x24) +#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_PARTIAL_WAITING_ON (0x25) +#define MPI2_SASPHY3_EVENT_CODE_RX_AIP_CONNECT_WAITING_ON (0x26) +#define MPI2_SASPHY3_EVENT_CODE_TX_BREAK (0x27) +#define MPI2_SASPHY3_EVENT_CODE_RX_BREAK (0x28) +#define MPI2_SASPHY3_EVENT_CODE_BREAK_TIMEOUT (0x29) +#define MPI2_SASPHY3_EVENT_CODE_CONNECTION (0x2A) +#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_PATHWAY_BLOCKED (0x2B) +#define MPI2_SASPHY3_EVENT_CODE_PEAKTX_ARB_WAIT_TIME (0x2C) +#define MPI2_SASPHY3_EVENT_CODE_PEAK_ARB_WAIT_TIME (0x2D) +#define MPI2_SASPHY3_EVENT_CODE_PEAK_CONNECT_TIME (0x2E) +#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_FRAMES (0x40) +#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_FRAMES (0x41) +#define MPI2_SASPHY3_EVENT_CODE_TX_SSP_ERROR_FRAMES (0x42) +#define MPI2_SASPHY3_EVENT_CODE_RX_SSP_ERROR_FRAMES (0x43) +#define MPI2_SASPHY3_EVENT_CODE_TX_CREDIT_BLOCKED (0x44) +#define MPI2_SASPHY3_EVENT_CODE_RX_CREDIT_BLOCKED (0x45) +#define MPI2_SASPHY3_EVENT_CODE_TX_SATA_FRAMES (0x50) +#define MPI2_SASPHY3_EVENT_CODE_RX_SATA_FRAMES (0x51) +#define MPI2_SASPHY3_EVENT_CODE_SATA_OVERFLOW (0x52) +#define MPI2_SASPHY3_EVENT_CODE_TX_SMP_FRAMES (0x60) +#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_FRAMES (0x61) +#define MPI2_SASPHY3_EVENT_CODE_RX_SMP_ERROR_FRAMES (0x63) +#define MPI2_SASPHY3_EVENT_CODE_HOTPLUG_TIMEOUT (0xD0) +#define MPI2_SASPHY3_EVENT_CODE_MISALIGNED_MUX_PRIMITIVE (0xD1) +#define MPI2_SASPHY3_EVENT_CODE_RX_AIP (0xD2) + +/* values for the CounterType field */ +#define MPI2_SASPHY3_COUNTER_TYPE_WRAPPING (0x00) +#define MPI2_SASPHY3_COUNTER_TYPE_SATURATING (0x01) +#define MPI2_SASPHY3_COUNTER_TYPE_PEAK_VALUE (0x02) + +/* values for the TimeUnits field */ +#define MPI2_SASPHY3_TIME_UNITS_10_MICROSECONDS (0x00) +#define MPI2_SASPHY3_TIME_UNITS_100_MICROSECONDS (0x01) +#define MPI2_SASPHY3_TIME_UNITS_1_MILLISECOND (0x02) +#define MPI2_SASPHY3_TIME_UNITS_10_MILLISECONDS (0x03) + +/* values for the ThresholdFlags field */ +#define MPI2_SASPHY3_TFLAGS_PHY_RESET (0x0002) +#define MPI2_SASPHY3_TFLAGS_EVENT_NOTIFY (0x0001) + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhyEvents at runtime. + */ +#ifndef MPI2_SASPHY3_PHY_EVENT_MAX +#define MPI2_SASPHY3_PHY_EVENT_MAX (1) +#endif + +typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_3 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U8 NumPhyEvents; /* 0x0C */ + U8 Reserved2; /* 0x0D */ + U16 Reserved3; /* 0x0E */ + MPI2_SASPHY3_PHY_EVENT_CONFIG PhyEventConfig[MPI2_SASPHY3_PHY_EVENT_MAX]; /* 0x10 */ +} MPI2_CONFIG_PAGE_SAS_PHY_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_3, + Mpi2SasPhyPage3_t, MPI2_POINTER pMpi2SasPhyPage3_t; + +#define MPI2_SASPHY3_PAGEVERSION (0x00) + + +/* SAS PHY Page 4 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_4 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U16 Reserved1; /* 0x08 */ + U8 Reserved2; /* 0x0A */ + U8 Flags; /* 0x0B */ + U8 InitialFrame[28]; /* 0x0C */ +} MPI2_CONFIG_PAGE_SAS_PHY_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_4, + Mpi2SasPhyPage4_t, MPI2_POINTER pMpi2SasPhyPage4_t; + +#define MPI2_SASPHY4_PAGEVERSION (0x00) + +/* values for the Flags field */ +#define MPI2_SASPHY4_FLAGS_FRAME_VALID (0x02) +#define MPI2_SASPHY4_FLAGS_SATA_FRAME (0x01) + + + + +/**************************************************************************** +* SAS Port Config Pages +****************************************************************************/ + +/* SAS Port Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_PORT_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 PortNumber; /* 0x08 */ + U8 PhysicalPort; /* 0x09 */ + U8 PortWidth; /* 0x0A */ + U8 PhysicalPortWidth; /* 0x0B */ + U8 ZoneGroup; /* 0x0C */ + U8 Reserved1; /* 0x0D */ + U16 Reserved2; /* 0x0E */ + U64 SASAddress; /* 0x10 */ + U32 DeviceInfo; /* 0x18 */ + U32 Reserved3; /* 0x1C */ + U32 Reserved4; /* 0x20 */ +} MPI2_CONFIG_PAGE_SAS_PORT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PORT_0, + Mpi2SasPortPage0_t, MPI2_POINTER pMpi2SasPortPage0_t; + +#define MPI2_SASPORT0_PAGEVERSION (0x00) + +/* see mpi2_sas.h for values for SAS Port Page 0 DeviceInfo values */ + + +/**************************************************************************** +* SAS Enclosure Config Pages +****************************************************************************/ + +/* SAS Enclosure Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U64 EnclosureLogicalID; /* 0x0C */ + U16 Flags; /* 0x14 */ + U16 EnclosureHandle; /* 0x16 */ + U16 NumSlots; /* 0x18 */ + U16 StartSlot; /* 0x1A */ + U16 Reserved2; /* 0x1C */ + U16 SEPDevHandle; /* 0x1E */ + U32 Reserved3; /* 0x20 */ + U32 Reserved4; /* 0x24 */ +} MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, + Mpi2SasEnclosurePage0_t, MPI2_POINTER pMpi2SasEnclosurePage0_t; + +#define MPI2_SASENCLOSURE0_PAGEVERSION (0x03) + +/* values for SAS Enclosure Page 0 Flags field */ +#define MPI2_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004) +#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005) + + +/**************************************************************************** +* Log Config Page +****************************************************************************/ + +/* Log Page 0 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_LOG_0_NUM_LOG_ENTRIES +#define MPI2_LOG_0_NUM_LOG_ENTRIES (1) +#endif + +#define MPI2_LOG_0_LOG_DATA_LENGTH (0x1C) + +typedef struct _MPI2_LOG_0_ENTRY +{ + U64 TimeStamp; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U16 LogSequence; /* 0x0C */ + U16 LogEntryQualifier; /* 0x0E */ + U8 VP_ID; /* 0x10 */ + U8 VF_ID; /* 0x11 */ + U16 Reserved2; /* 0x12 */ + U8 LogData[MPI2_LOG_0_LOG_DATA_LENGTH];/* 0x14 */ +} MPI2_LOG_0_ENTRY, MPI2_POINTER PTR_MPI2_LOG_0_ENTRY, + Mpi2Log0Entry_t, MPI2_POINTER pMpi2Log0Entry_t; + +/* values for Log Page 0 LogEntry LogEntryQualifier field */ +#define MPI2_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000) +#define MPI2_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001) +#define MPI2_LOG_0_ENTRY_QUAL_TIMESTAMP_UPDATE (0x0002) +#define MPI2_LOG_0_ENTRY_QUAL_MIN_IMPLEMENT_SPEC (0x8000) +#define MPI2_LOG_0_ENTRY_QUAL_MAX_IMPLEMENT_SPEC (0xFFFF) + +typedef struct _MPI2_CONFIG_PAGE_LOG_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U32 Reserved2; /* 0x0C */ + U16 NumLogEntries; /* 0x10 */ + U16 Reserved3; /* 0x12 */ + MPI2_LOG_0_ENTRY LogEntry[MPI2_LOG_0_NUM_LOG_ENTRIES]; /* 0x14 */ +} MPI2_CONFIG_PAGE_LOG_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_LOG_0, + Mpi2LogPage0_t, MPI2_POINTER pMpi2LogPage0_t; + +#define MPI2_LOG_0_PAGEVERSION (0x02) + + +/**************************************************************************** +* RAID Config Page +****************************************************************************/ + +/* RAID Page 0 */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check Header.ExtPageLength or NumPhys at runtime. + */ +#ifndef MPI2_RAIDCONFIG0_MAX_ELEMENTS +#define MPI2_RAIDCONFIG0_MAX_ELEMENTS (1) +#endif + +typedef struct _MPI2_RAIDCONFIG0_CONFIG_ELEMENT +{ + U16 ElementFlags; /* 0x00 */ + U16 VolDevHandle; /* 0x02 */ + U8 HotSparePool; /* 0x04 */ + U8 PhysDiskNum; /* 0x05 */ + U16 PhysDiskDevHandle; /* 0x06 */ +} MPI2_RAIDCONFIG0_CONFIG_ELEMENT, + MPI2_POINTER PTR_MPI2_RAIDCONFIG0_CONFIG_ELEMENT, + Mpi2RaidConfig0ConfigElement_t, MPI2_POINTER pMpi2RaidConfig0ConfigElement_t; + +/* values for the ElementFlags field */ +#define MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE (0x000F) +#define MPI2_RAIDCONFIG0_EFLAGS_VOLUME_ELEMENT (0x0000) +#define MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT (0x0001) +#define MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT (0x0002) +#define MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT (0x0003) + + +typedef struct _MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 NumHotSpares; /* 0x08 */ + U8 NumPhysDisks; /* 0x09 */ + U8 NumVolumes; /* 0x0A */ + U8 ConfigNum; /* 0x0B */ + U32 Flags; /* 0x0C */ + U8 ConfigGUID[24]; /* 0x10 */ + U32 Reserved1; /* 0x28 */ + U8 NumElements; /* 0x2C */ + U8 Reserved2; /* 0x2D */ + U16 Reserved3; /* 0x2E */ + MPI2_RAIDCONFIG0_CONFIG_ELEMENT ConfigElement[MPI2_RAIDCONFIG0_MAX_ELEMENTS]; /* 0x30 */ +} MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, + Mpi2RaidConfigurationPage0_t, MPI2_POINTER pMpi2RaidConfigurationPage0_t; + +#define MPI2_RAIDCONFIG0_PAGEVERSION (0x00) + +/* values for RAID Configuration Page 0 Flags field */ +#define MPI2_RAIDCONFIG0_FLAG_FOREIGN_CONFIG (0x00000001) + + +/**************************************************************************** +* Driver Persistent Mapping Config Pages +****************************************************************************/ + +/* Driver Persistent Mapping Page 0 */ + +typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY +{ + U64 PhysicalIdentifier; /* 0x00 */ + U16 MappingInformation; /* 0x08 */ + U16 DeviceIndex; /* 0x0A */ + U32 PhysicalBitsMapping; /* 0x0C */ + U32 Reserved1; /* 0x10 */ +} MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, + Mpi2DriverMap0Entry_t, MPI2_POINTER pMpi2DriverMap0Entry_t; + +typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAPPING_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY Entry; /* 0x08 */ +} MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, + MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, + Mpi2DriverMappingPage0_t, MPI2_POINTER pMpi2DriverMappingPage0_t; + +#define MPI2_DRIVERMAPPING0_PAGEVERSION (0x00) + +/* values for Driver Persistent Mapping Page 0 MappingInformation field */ +#define MPI2_DRVMAP0_MAPINFO_SLOT_MASK (0x07F0) +#define MPI2_DRVMAP0_MAPINFO_SLOT_SHIFT (4) +#define MPI2_DRVMAP0_MAPINFO_MISSING_MASK (0x000F) + + +/**************************************************************************** +* Ethernet Config Pages +****************************************************************************/ + +/* Ethernet Page 0 */ + +/* IP address (union of IPv4 and IPv6) */ +typedef union _MPI2_ETHERNET_IP_ADDR +{ + U32 IPv4Addr; + U32 IPv6Addr[4]; +} MPI2_ETHERNET_IP_ADDR, MPI2_POINTER PTR_MPI2_ETHERNET_IP_ADDR, + Mpi2EthernetIpAddr_t, MPI2_POINTER pMpi2EthernetIpAddr_t; + +#define MPI2_ETHERNET_HOST_NAME_LENGTH (32) + +typedef struct _MPI2_CONFIG_PAGE_ETHERNET_0 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U8 NumInterfaces; /* 0x08 */ + U8 Reserved0; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U32 Status; /* 0x0C */ + U8 MediaState; /* 0x10 */ + U8 Reserved2; /* 0x11 */ + U16 Reserved3; /* 0x12 */ + U8 MacAddress[6]; /* 0x14 */ + U8 Reserved4; /* 0x1A */ + U8 Reserved5; /* 0x1B */ + MPI2_ETHERNET_IP_ADDR IpAddress; /* 0x1C */ + MPI2_ETHERNET_IP_ADDR SubnetMask; /* 0x2C */ + MPI2_ETHERNET_IP_ADDR GatewayIpAddress; /* 0x3C */ + MPI2_ETHERNET_IP_ADDR DNS1IpAddress; /* 0x4C */ + MPI2_ETHERNET_IP_ADDR DNS2IpAddress; /* 0x5C */ + MPI2_ETHERNET_IP_ADDR DhcpIpAddress; /* 0x6C */ + U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ +} MPI2_CONFIG_PAGE_ETHERNET_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_0, + Mpi2EthernetPage0_t, MPI2_POINTER pMpi2EthernetPage0_t; + +#define MPI2_ETHERNETPAGE0_PAGEVERSION (0x00) + +/* values for Ethernet Page 0 Status field */ +#define MPI2_ETHPG0_STATUS_IPV6_CAPABLE (0x80000000) +#define MPI2_ETHPG0_STATUS_IPV4_CAPABLE (0x40000000) +#define MPI2_ETHPG0_STATUS_CONSOLE_CONNECTED (0x20000000) +#define MPI2_ETHPG0_STATUS_DEFAULT_IF (0x00000100) +#define MPI2_ETHPG0_STATUS_FW_DWNLD_ENABLED (0x00000080) +#define MPI2_ETHPG0_STATUS_TELNET_ENABLED (0x00000040) +#define MPI2_ETHPG0_STATUS_SSH2_ENABLED (0x00000020) +#define MPI2_ETHPG0_STATUS_DHCP_CLIENT_ENABLED (0x00000010) +#define MPI2_ETHPG0_STATUS_IPV6_ENABLED (0x00000008) +#define MPI2_ETHPG0_STATUS_IPV4_ENABLED (0x00000004) +#define MPI2_ETHPG0_STATUS_IPV6_ADDRESSES (0x00000002) +#define MPI2_ETHPG0_STATUS_ETH_IF_ENABLED (0x00000001) + +/* values for Ethernet Page 0 MediaState field */ +#define MPI2_ETHPG0_MS_DUPLEX_MASK (0x80) +#define MPI2_ETHPG0_MS_HALF_DUPLEX (0x00) +#define MPI2_ETHPG0_MS_FULL_DUPLEX (0x80) + +#define MPI2_ETHPG0_MS_CONNECT_SPEED_MASK (0x07) +#define MPI2_ETHPG0_MS_NOT_CONNECTED (0x00) +#define MPI2_ETHPG0_MS_10MBIT (0x01) +#define MPI2_ETHPG0_MS_100MBIT (0x02) +#define MPI2_ETHPG0_MS_1GBIT (0x03) + + +/* Ethernet Page 1 */ + +typedef struct _MPI2_CONFIG_PAGE_ETHERNET_1 +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ + U32 Reserved0; /* 0x08 */ + U32 Flags; /* 0x0C */ + U8 MediaState; /* 0x10 */ + U8 Reserved1; /* 0x11 */ + U16 Reserved2; /* 0x12 */ + U8 MacAddress[6]; /* 0x14 */ + U8 Reserved3; /* 0x1A */ + U8 Reserved4; /* 0x1B */ + MPI2_ETHERNET_IP_ADDR StaticIpAddress; /* 0x1C */ + MPI2_ETHERNET_IP_ADDR StaticSubnetMask; /* 0x2C */ + MPI2_ETHERNET_IP_ADDR StaticGatewayIpAddress; /* 0x3C */ + MPI2_ETHERNET_IP_ADDR StaticDNS1IpAddress; /* 0x4C */ + MPI2_ETHERNET_IP_ADDR StaticDNS2IpAddress; /* 0x5C */ + U32 Reserved5; /* 0x6C */ + U32 Reserved6; /* 0x70 */ + U32 Reserved7; /* 0x74 */ + U32 Reserved8; /* 0x78 */ + U8 HostName[MPI2_ETHERNET_HOST_NAME_LENGTH];/* 0x7C */ +} MPI2_CONFIG_PAGE_ETHERNET_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_ETHERNET_1, + Mpi2EthernetPage1_t, MPI2_POINTER pMpi2EthernetPage1_t; + +#define MPI2_ETHERNETPAGE1_PAGEVERSION (0x00) + +/* values for Ethernet Page 1 Flags field */ +#define MPI2_ETHPG1_FLAG_SET_DEFAULT_IF (0x00000100) +#define MPI2_ETHPG1_FLAG_ENABLE_FW_DOWNLOAD (0x00000080) +#define MPI2_ETHPG1_FLAG_ENABLE_TELNET (0x00000040) +#define MPI2_ETHPG1_FLAG_ENABLE_SSH2 (0x00000020) +#define MPI2_ETHPG1_FLAG_ENABLE_DHCP_CLIENT (0x00000010) +#define MPI2_ETHPG1_FLAG_ENABLE_IPV6 (0x00000008) +#define MPI2_ETHPG1_FLAG_ENABLE_IPV4 (0x00000004) +#define MPI2_ETHPG1_FLAG_USE_IPV6_ADDRESSES (0x00000002) +#define MPI2_ETHPG1_FLAG_ENABLE_ETH_IF (0x00000001) + +/* values for Ethernet Page 1 MediaState field */ +#define MPI2_ETHPG1_MS_DUPLEX_MASK (0x80) +#define MPI2_ETHPG1_MS_HALF_DUPLEX (0x00) +#define MPI2_ETHPG1_MS_FULL_DUPLEX (0x80) + +#define MPI2_ETHPG1_MS_DATA_RATE_MASK (0x07) +#define MPI2_ETHPG1_MS_DATA_RATE_AUTO (0x00) +#define MPI2_ETHPG1_MS_DATA_RATE_10MBIT (0x01) +#define MPI2_ETHPG1_MS_DATA_RATE_100MBIT (0x02) +#define MPI2_ETHPG1_MS_DATA_RATE_1GBIT (0x03) + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_hbd.h ../../stable/8/sys/dev/mps/mpi/mpi2_hbd.h --- sys/dev/mps/mpi/mpi2_hbd.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_hbd.h 2011-01-07 14:33:12.681632685 -0700 @@ -0,0 +1,114 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_hbd.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2009 LSI Corporation. + * + * + * Name: mpi2_hbd.h + * Title: MPI Host Based Discovery messages and structures + * Creation Date: October 21, 2009 + * + * mpi2_hbd.h Version: 02.00.00 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 10-28-09 02.00.00 Initial version. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_HBD_H +#define MPI2_HBD_H + +/**************************************************************************** +* Host Based Discovery Action messages +****************************************************************************/ + +/* Host Based Discovery Action Request Message */ +typedef struct _MPI2_HBD_ACTION_REQUEST +{ + U8 Operation; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 DevHandle; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U32 Reserved4; /* 0x0C */ + U64 SASAddress; /* 0x10 */ + U32 Reserved5; /* 0x18 */ + U32 HbdDeviceInfo; /* 0x1C */ + U16 ParentDevHandle; /* 0x20 */ + U16 MaxQDepth; /* 0x22 */ + U8 FirstPhyIdentifier; /* 0x24 */ + U8 Port; /* 0x25 */ + U8 MaxConnections; /* 0x26 */ + U8 MaxRate; /* 0x27 */ + U8 PortGroups; /* 0x28 */ + U8 DmaGroup; /* 0x29 */ + U8 ControlGroup; /* 0x2A */ + U8 Reserved6; /* 0x2B */ + U16 InitialAWT; /* 0x2C */ + U16 Reserved7; /* 0x2E */ + U32 Reserved8; /* 0x30 */ +} MPI2_HBD_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_HBD_ACTION_REQUEST, + Mpi2HbdActionRequest_t, MPI2_POINTER pMpi2HbdActionRequest_t; + +/* values for the Operation field */ +#define MPI2_HBD_OP_ADD_DEVICE (0x01) +#define MPI2_HBD_OP_REMOVE_DEVICE (0x02) +#define MPI2_HBD_OP_UPDATE_DEVICE (0x03) + +/* values for the HbdDeviceInfo field */ +#define MPI2_HBD_DEVICE_INFO_VIRTUAL_DEVICE (0x00004000) +#define MPI2_HBD_DEVICE_INFO_ATAPI_DEVICE (0x00002000) +#define MPI2_HBD_DEVICE_INFO_DIRECT_ATTACH (0x00000800) +#define MPI2_HBD_DEVICE_INFO_SSP_TARGET (0x00000400) +#define MPI2_HBD_DEVICE_INFO_STP_TARGET (0x00000200) +#define MPI2_HBD_DEVICE_INFO_SMP_TARGET (0x00000100) +#define MPI2_HBD_DEVICE_INFO_SATA_DEVICE (0x00000080) +#define MPI2_HBD_DEVICE_INFO_SSP_INITIATOR (0x00000040) +#define MPI2_HBD_DEVICE_INFO_STP_INITIATOR (0x00000020) +#define MPI2_HBD_DEVICE_INFO_SMP_INITIATOR (0x00000010) +#define MPI2_HBD_DEVICE_INFO_SATA_HOST (0x00000008) + +#define MPI2_HBD_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007) +#define MPI2_HBD_DEVICE_INFO_NO_DEVICE (0x00000000) +#define MPI2_HBD_DEVICE_INFO_END_DEVICE (0x00000001) +#define MPI2_HBD_DEVICE_INFO_EDGE_EXPANDER (0x00000002) +#define MPI2_HBD_DEVICE_INFO_FANOUT_EXPANDER (0x00000003) + +/* values for the MaxRate field */ +#define MPI2_HBD_MAX_RATE_MASK (0x0F) +#define MPI2_HBD_MAX_RATE_1_5 (0x08) +#define MPI2_HBD_MAX_RATE_3_0 (0x09) +#define MPI2_HBD_MAX_RATE_6_0 (0x0A) + + +/* Host Based Discovery Action Reply Message */ +typedef struct _MPI2_HBD_ACTION_REPLY +{ + U8 Operation; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 DevHandle; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_HBD_ACTION_REPLY, MPI2_POINTER PTR_MPI2_HBD_ACTION_REPLY, + Mpi2HbdActionReply_t, MPI2_POINTER pMpi2HbdActionReply_t; + + +#endif + + diff -x .svn -urN sys/dev/mps/mpi/mpi2_history.txt ../../stable/8/sys/dev/mps/mpi/mpi2_history.txt --- sys/dev/mps/mpi/mpi2_history.txt 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_history.txt 2011-01-07 14:33:12.652515579 -0700 @@ -0,0 +1,382 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_history.txt 212420 2010-09-10 15:03:56Z ken $ */ + ============================== + Fusion-MPT MPI 2.0 Header File Change History + ============================== + + Copyright (c) 2000-2009 LSI Corporation. + + --------------------------------------- + Header Set Release Version: 02.00.14 + Header Set Release Date: 10-28-09 + --------------------------------------- + + Filename Current version Prior version + ---------- --------------- ------------- + mpi2.h 02.00.14 02.00.13 + mpi2_cnfg.h 02.00.13 02.00.12 + mpi2_init.h 02.00.08 02.00.07 + mpi2_ioc.h 02.00.13 02.00.12 + mpi2_raid.h 02.00.04 02.00.04 + mpi2_sas.h 02.00.03 02.00.02 + mpi2_targ.h 02.00.03 02.00.03 + mpi2_tool.h 02.00.04 02.00.04 + mpi2_type.h 02.00.00 02.00.00 + mpi2_ra.h 02.00.00 02.00.00 + mpi2_hbd.h 02.00.00 + mpi2_history.txt 02.00.14 02.00.13 + + + * Date Version Description + * -------- -------- ------------------------------------------------------ + +mpi2.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. + * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. + * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. + * Moved ReplyPostHostIndex register to offset 0x6C of the + * MPI2_SYSTEM_INTERFACE_REGS and modified the define for + * MPI2_REPLY_POST_HOST_INDEX_OFFSET. + * Added union of request descriptors. + * Added union of reply descriptors. + * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. + * Added define for MPI2_VERSION_02_00. + * Fixed the size of the FunctionDependent5 field in the + * MPI2_DEFAULT_REPLY structure. + * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. + * Removed the MPI-defined Fault Codes and extended the + * product specific codes up to 0xEFFF. + * Added a sixth key value for the WriteSequence register + * and changed the flush value to 0x0. + * Added message function codes for Diagnostic Buffer Post + * and Diagnsotic Release. + * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED + * Moved MPI2_VERSION_UNION from mpi2_ioc.h. + * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. + * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. + * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. + * Added #defines for marking a reply descriptor as unused. + * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. + * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. + * Moved LUN field defines from mpi2_init.h. + * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. + * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT. + * In all request and reply descriptors, replaced VF_ID + * field with MSIxIndex field. + * Removed DevHandle field from + * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those + * bytes reserved. + * Added RAID Accelerator functionality. + * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT. + * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT. + * Added MSI-x index mask and shift for Reply Post Host + * Index register. + * Added function code for Host Based Discovery Action. + * -------------------------------------------------------------------------- + +mpi2_cnfg.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags. + * Added Manufacturing Page 11. + * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE + * define. + * 06-26-07 02.00.02 Adding generic structure for product-specific + * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS. + * Rework of BIOS Page 2 configuration page. + * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the + * forms. + * Added configuration pages IOC Page 8 and Driver + * Persistent Mapping Page 0. + * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated + * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1, + * RAID Physical Disk Pages 0 and 1, RAID Configuration + * Page 0). + * Added new value for AccessStatus field of SAS Device + * Page 0 (_SATA_NEEDS_INITIALIZATION). + * 10-31-07 02.00.04 Added missing SEPDevHandle field to + * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. + * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for + * NVDATA. + * Modified IOC Page 7 to use masks and added field for + * SASBroadcastPrimitiveMasks. + * Added MPI2_CONFIG_PAGE_BIOS_4. + * Added MPI2_CONFIG_PAGE_LOG_0. + * 02-29-08 02.00.06 Modified various names to make them 32-character unique. + * Added SAS Device IDs. + * Updated Integrated RAID configuration pages including + * Manufacturing Page 4, IOC Page 6, and RAID Configuration + * Page 0. + * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA. + * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION. + * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING. + * Added missing MaxNumRoutedSasAddresses field to + * MPI2_CONFIG_PAGE_EXPANDER_0. + * Added SAS Port Page 0. + * Modified structure layout for + * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0. + * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use + * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array. + * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF + * to 0x000000FF. + * Added two new values for the Physical Disk Coercion Size + * bits in the Flags field of Manufacturing Page 4. + * Added product-specific Manufacturing pages 16 to 31. + * Modified Flags bits for controlling write cache on SATA + * drives in IO Unit Page 1. + * Added new bit to AdditionalControlFlags of SAS IO Unit + * Page 1 to control Invalid Topology Correction. + * Added SupportedPhysDisks field to RAID Volume Page 1 and + * added related defines. + * Added additional defines for RAID Volume Page 0 + * VolumeStatusFlags field. + * Modified meaning of RAID Volume Page 0 VolumeSettings + * define for auto-configure of hot-swap drives. + * Added PhysDiskAttributes field (and related defines) to + * RAID Physical Disk Page 0. + * Added MPI2_SAS_PHYINFO_PHY_VACANT define. + * Added three new DiscoveryStatus bits for SAS IO Unit + * Page 0 and SAS Expander Page 0. + * Removed multiplexing information from SAS IO Unit pages. + * Added BootDeviceWaitTime field to SAS IO Unit Page 4. + * Removed Zone Address Resolved bit from PhyInfo and from + * Expander Page 0 Flags field. + * Added two new AccessStatus values to SAS Device Page 0 + * for indicating routing problems. Added 3 reserved words + * to this page. + * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3. + * Inserted missing reserved field into structure for IOC + * Page 6. + * Added more pending task bits to RAID Volume Page 0 + * VolumeStatusFlags defines. + * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define. + * Added a new DiscoveryStatus bit for SAS IO Unit Page 0 + * and SAS Expander Page 0 to flag a downstream initiator + * when in simplified routing mode. + * Removed SATA Init Failure defines for DiscoveryStatus + * fields of SAS IO Unit Page 0 and SAS Expander Page 0. + * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define. + * Added PortGroups, DmaGroup, and ControlGroup fields to + * SAS Device Page 0. + * 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO + * Unit Page 6. + * Added expander reduced functionality data to SAS + * Expander Page 0. + * Added SAS PHY Page 2 and SAS PHY Page 3. + * 07-30-09 02.00.12 Added IO Unit Page 7. + * Added new device ids. + * Added SAS IO Unit Page 5. + * Added partial and slumber power management capable flags + * to SAS Device Page 0 Flags field. + * Added PhyInfo defines for power condition. + * Added Ethernet configuration pages. + * 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY. + * Added SAS PHY Page 4 structure and defines. + * -------------------------------------------------------------------------- + +mpi2_init.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. + * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. + * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. + * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. + * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. + * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO + * Control field Task Attribute flags. + * Moved LUN field defines to mpi2.h becasue they are + * common to many structures. + * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to + * Query Asynchronous Event. + * Defined two new bits in the SlotStatus field of the SCSI + * Enclosure Processor Request and Reply. + * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for + * both SCSI IO Error Reply and SCSI Task Management Reply. + * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. + * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. + * -------------------------------------------------------------------------- + +mpi2_ioc.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to + * MaxTargets. + * Added TotalImageSize field to FWDownload Request. + * Added reserved words to FWUpload Request. + * 06-26-07 02.00.02 Added IR Configuration Change List Event. + * 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit + * request and replaced it with + * ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth. + * Replaced the MinReplyQueueDepth field of the IOCFacts + * reply with MaxReplyDescriptorPostQueueDepth. + * Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum + * depth for the Reply Descriptor Post Queue. + * Added SASAddress field to Initiator Device Table + * Overflow Event data. + * 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING + * for SAS Initiator Device Status Change Event data. + * Modified Reason Code defines for SAS Topology Change + * List Event data, including adding a bit for PHY Vacant + * status, and adding a mask for the Reason Code. + * Added define for + * MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING. + * Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID. + * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of + * the IOCFacts Reply. + * Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. + * Moved MPI2_VERSION_UNION to mpi2.h. + * Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks + * instead of enables, and added SASBroadcastPrimitiveMasks + * field. + * Added Log Entry Added Event and related structure. + * 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID. + * Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET. + * Added MaxVolumes and MaxPersistentEntries fields to + * IOCFacts reply. + * Added ProtocalFlags and IOCCapabilities fields to + * MPI2_FW_IMAGE_HEADER. + * Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT. + * 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to + * a U16 (from a U32). + * Removed extra 's' from EventMasks name. + * 06-27-08 02.00.08 Fixed an offset in a comment. + * 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST. + * Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and + * renamed MinReplyFrameSize to ReplyFrameSize. + * Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX. + * Added two new RAIDOperation values for Integrated RAID + * Operations Status Event data. + * Added four new IR Configuration Change List Event data + * ReasonCode values. + * Added two new ReasonCode defines for SAS Device Status + * Change Event data. + * Added three new DiscoveryStatus bits for the SAS + * Discovery event data. + * Added Multiplexing Status Change bit to the PhyStatus + * field of the SAS Topology Change List event data. + * Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY. + * BootFlags are now product-specific. + * Added defines for the indivdual signature bytes + * for MPI2_INIT_IMAGE_FOOTER. + * 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define. + * Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR + * define. + * Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE + * define. + * Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define. + * 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define. + * Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define. + * Added two new reason codes for SAS Device Status Change + * Event. + * Added new event: SAS PHY Counter. + * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure. + * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. + * Added new product id family for 2208. + * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST. + * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY. + * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY. + * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY. + * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define. + * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define. + * Added Host Based Discovery Phy Event data. + * Added defines for ProductID Product field + * (MPI2_FW_HEADER_PID_). + * Modified values for SAS ProductID Family + * (MPI2_FW_HEADER_PID_FAMILY_). + * -------------------------------------------------------------------------- + +mpi2_raid.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 08-31-07 02.00.01 Modifications to RAID Action request and reply, + * including the Actions and ActionData. + * 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD. + * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that + * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT + * can be sized by the build environment. + * 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of + * VolumeCreationFlags and marked the old one as obsolete. + * -------------------------------------------------------------------------- + +mpi2_sas.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit + * Control Request. + * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control + * Request. + * 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST + * to MPI2_SGE_IO_UNION since it supports chained SGLs. + * -------------------------------------------------------------------------- + +mpi2_targ.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to + * BufferPostFlags field of CommandBufferPostBase Request. + * 02-29-08 02.00.02 Modified various names to make them 32-character unique. + * 10-02-08 02.00.03 Removed NextCmdBufferOffset from + * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST. + * Target Status Send Request only takes a single SGE for + * response data. + * -------------------------------------------------------------------------- + +mpi2_tool.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release + * structures and defines. + * 02-29-08 02.00.02 Modified various names to make them 32-character unique. + * 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool. + * 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request + * and reply messages. + * Added MPI2_DIAG_BUF_TYPE_EXTENDED. + * Incremented MPI2_DIAG_BUF_TYPE_COUNT. + * -------------------------------------------------------------------------- + +mpi2_type.h + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * -------------------------------------------------------------------------- + +mpi2_ra.h + * 05-06-09 02.00.00 Initial version. + * -------------------------------------------------------------------------- + +mpi2_hbd.h + * 10-28-09 02.00.00 Initial version. + * -------------------------------------------------------------------------- + + +mpi2_history.txt Parts list history + +Filename 02.00.14 02.00.13 02.00.12 +---------- -------- -------- -------- +mpi2.h 02.00.14 02.00.13 02.00.12 +mpi2_cnfg.h 02.00.13 02.00.12 02.00.11 +mpi2_init.h 02.00.08 02.00.07 02.00.07 +mpi2_ioc.h 02.00.13 02.00.12 02.00.11 +mpi2_raid.h 02.00.04 02.00.04 02.00.03 +mpi2_sas.h 02.00.03 02.00.02 02.00.02 +mpi2_targ.h 02.00.03 02.00.03 02.00.03 +mpi2_tool.h 02.00.04 02.00.04 02.00.03 +mpi2_type.h 02.00.00 02.00.00 02.00.00 +mpi2_ra.h 02.00.00 02.00.00 02.00.00 +mpi2_hbd.h 02.00.00 + +Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 +---------- -------- -------- -------- -------- -------- -------- +mpi2.h 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 +mpi2_cnfg.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 02.00.06 +mpi2_init.h 02.00.06 02.00.06 02.00.05 02.00.05 02.00.04 02.00.03 +mpi2_ioc.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07 02.00.06 +mpi2_raid.h 02.00.03 02.00.03 02.00.03 02.00.03 02.00.02 02.00.02 +mpi2_sas.h 02.00.02 02.00.02 02.00.01 02.00.01 02.00.01 02.00.01 +mpi2_targ.h 02.00.03 02.00.03 02.00.02 02.00.02 02.00.02 02.00.02 +mpi2_tool.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 +mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 + +Filename 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00 +---------- -------- -------- -------- -------- -------- -------- +mpi2.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00 +mpi2_cnfg.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00 +mpi2_init.h 02.00.02 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00 +mpi2_ioc.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00 +mpi2_raid.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00 +mpi2_sas.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 +mpi2_targ.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00 +mpi2_tool.h 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 +mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 + diff -x .svn -urN sys/dev/mps/mpi/mpi2_init.h ../../stable/8/sys/dev/mps/mpi/mpi2_init.h --- sys/dev/mps/mpi/mpi2_init.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_init.h 2011-01-07 14:33:12.643483552 -0700 @@ -0,0 +1,454 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_init.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2009 LSI Corporation. + * + * + * Name: mpi2_init.h + * Title: MPI SCSI initiator mode messages and structures + * Creation Date: June 23, 2006 + * + * mpi2_init.h Version: 02.00.08 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. + * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. + * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. + * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. + * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. + * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO + * Control field Task Attribute flags. + * Moved LUN field defines to mpi2.h becasue they are + * common to many structures. + * 05-06-09 02.00.07 Changed task management type of Query Unit Attention to + * Query Asynchronous Event. + * Defined two new bits in the SlotStatus field of the SCSI + * Enclosure Processor Request and Reply. + * 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for + * both SCSI IO Error Reply and SCSI Task Management Reply. + * Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY. + * Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_INIT_H +#define MPI2_INIT_H + +/***************************************************************************** +* +* SCSI Initiator Messages +* +*****************************************************************************/ + +/**************************************************************************** +* SCSI IO messages and associated structures +****************************************************************************/ + +typedef struct +{ + U8 CDB[20]; /* 0x00 */ + U32 PrimaryReferenceTag; /* 0x14 */ + U16 PrimaryApplicationTag; /* 0x18 */ + U16 PrimaryApplicationTagMask; /* 0x1A */ + U32 TransferLength; /* 0x1C */ +} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32, + Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t; + +/* TBD: I don't think this is needed for MPI2/Gen2 */ +#if 0 +typedef struct +{ + U8 CDB[16]; /* 0x00 */ + U32 DataLength; /* 0x10 */ + U32 PrimaryReferenceTag; /* 0x14 */ + U16 PrimaryApplicationTag; /* 0x18 */ + U16 PrimaryApplicationTagMask; /* 0x1A */ + U32 TransferLength; /* 0x1C */ +} MPI2_SCSI_IO32_CDB_EEDP16, MPI2_POINTER PTR_MPI2_SCSI_IO32_CDB_EEDP16, + Mpi2ScsiIo32CdbEedp16_t, MPI2_POINTER pMpi2ScsiIo32CdbEedp16_t; +#endif + +typedef union +{ + U8 CDB32[32]; + MPI2_SCSI_IO_CDB_EEDP32 EEDP32; + MPI2_SGE_SIMPLE_UNION SGE; +} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION, + Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t; + +/* SCSI IO Request Message */ +typedef struct _MPI2_SCSI_IO_REQUEST +{ + U16 DevHandle; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U32 SenseBufferLowAddress; /* 0x0C */ + U16 SGLFlags; /* 0x10 */ + U8 SenseBufferLength; /* 0x12 */ + U8 Reserved4; /* 0x13 */ + U8 SGLOffset0; /* 0x14 */ + U8 SGLOffset1; /* 0x15 */ + U8 SGLOffset2; /* 0x16 */ + U8 SGLOffset3; /* 0x17 */ + U32 SkipCount; /* 0x18 */ + U32 DataLength; /* 0x1C */ + U32 BidirectionalDataLength; /* 0x20 */ + U16 IoFlags; /* 0x24 */ + U16 EEDPFlags; /* 0x26 */ + U32 EEDPBlockSize; /* 0x28 */ + U32 SecondaryReferenceTag; /* 0x2C */ + U16 SecondaryApplicationTag; /* 0x30 */ + U16 ApplicationTagTranslationMask; /* 0x32 */ + U8 LUN[8]; /* 0x34 */ + U32 Control; /* 0x3C */ + MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */ + MPI2_SGE_IO_UNION SGL; /* 0x60 */ +} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST, + Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t; + +/* SCSI IO MsgFlags bits */ + +/* MsgFlags for SenseBufferAddressSpace */ +#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) +#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) +#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) +#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) +#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) + +/* SCSI IO SGLFlags bits */ + +/* base values for Data Location Address Space */ +#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) +#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) +#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) +#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) +#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) + +/* base values for Type */ +#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) +#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) +#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) +#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) + +/* shift values for each sub-field */ +#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) +#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) +#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) +#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) + +/* SCSI IO IoFlags bits */ + +/* Large CDB Address Space */ +#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) +#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) +#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) +#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) +#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) + +#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) +#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) +#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) +#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) +#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) + +/* SCSI IO EEDPFlags bits */ + +#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) +#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) +#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) +#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) + +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) + +#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) + +#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) +#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) +#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) +#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) +#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) +#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) + +/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ + +/* SCSI IO Control bits */ +#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) +#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) + +#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) +#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) +#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) +#define MPI2_SCSIIO_CONTROL_READ (0x02000000) +#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) + +#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) +#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) + +#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) +#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) +#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) +#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) +#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) + +#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) +#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) +#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) +#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) + + +/* SCSI IO Error Reply Message */ +typedef struct _MPI2_SCSI_IO_REPLY +{ + U16 DevHandle; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U8 SCSIStatus; /* 0x0C */ + U8 SCSIState; /* 0x0D */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 TransferCount; /* 0x14 */ + U32 SenseCount; /* 0x18 */ + U32 ResponseInfo; /* 0x1C */ + U16 TaskTag; /* 0x20 */ + U16 Reserved4; /* 0x22 */ + U32 BidirectionalTransferCount; /* 0x24 */ + U32 Reserved5; /* 0x28 */ + U32 Reserved6; /* 0x2C */ +} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY, + Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t; + +/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ + +#define MPI2_SCSI_STATUS_GOOD (0x00) +#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) +#define MPI2_SCSI_STATUS_CONDITION_MET (0x04) +#define MPI2_SCSI_STATUS_BUSY (0x08) +#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) +#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) +#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) +#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */ +#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) +#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) +#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) + +/* SCSI IO Reply SCSIState flags */ + +#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) +#define MPI2_SCSI_STATE_TERMINATED (0x08) +#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) +#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) +#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) + +/* masks and shifts for the ResponseInfo field */ + +#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF) +#define MPI2_SCSI_RI_SHIFT_REASONCODE (0) + +#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) + + +/**************************************************************************** +* SCSI Task Management messages +****************************************************************************/ + +/* SCSI Task Management Request Message */ +typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST +{ + U16 DevHandle; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 Reserved1; /* 0x04 */ + U8 TaskType; /* 0x05 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U8 LUN[8]; /* 0x0C */ + U32 Reserved4[7]; /* 0x14 */ + U16 TaskMID; /* 0x30 */ + U16 Reserved5; /* 0x32 */ +} MPI2_SCSI_TASK_MANAGE_REQUEST, + MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, + Mpi2SCSITaskManagementRequest_t, + MPI2_POINTER pMpi2SCSITaskManagementRequest_t; + +/* TaskType values */ + +#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) +#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) +#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) +#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) +#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) +#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) +#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) +#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) +#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A) + +/* obsolete TaskType name */ +#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT) + +/* MsgFlags bits */ + +#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) +#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) +#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) +#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) + +#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) + + + +/* SCSI Task Management Reply Message */ +typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY +{ + U16 DevHandle; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 ResponseCode; /* 0x04 */ + U8 TaskType; /* 0x05 */ + U8 Reserved1; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U16 Reserved3; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 TerminationCount; /* 0x14 */ + U32 ResponseInfo; /* 0x18 */ +} MPI2_SCSI_TASK_MANAGE_REPLY, + MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY, + Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t; + +/* ResponseCode values */ + +#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) +#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) +#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) +#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) +#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) +#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) +#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A) +#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) + +/* masks and shifts for the ResponseInfo field */ + +#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF) +#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0) +#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00) +#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8) +#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000) +#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16) +#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000) +#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24) + + +/**************************************************************************** +* SCSI Enclosure Processor messages +****************************************************************************/ + +/* SCSI Enclosure Processor Request Message */ +typedef struct _MPI2_SEP_REQUEST +{ + U16 DevHandle; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 Action; /* 0x04 */ + U8 Flags; /* 0x05 */ + U8 Reserved1; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 SlotStatus; /* 0x0C */ + U32 Reserved3; /* 0x10 */ + U32 Reserved4; /* 0x14 */ + U32 Reserved5; /* 0x18 */ + U16 Slot; /* 0x1C */ + U16 EnclosureHandle; /* 0x1E */ +} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST, + Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t; + +/* Action defines */ +#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) +#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) + +/* Flags defines */ +#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) +#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) + +/* SlotStatus defines */ +#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) +#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) +#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) +#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) +#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) +#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) +#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) +#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) +#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) +#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) +#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) + + +/* SCSI Enclosure Processor Reply Message */ +typedef struct _MPI2_SEP_REPLY +{ + U16 DevHandle; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 Action; /* 0x04 */ + U8 Flags; /* 0x05 */ + U8 Reserved1; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U16 Reserved3; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 SlotStatus; /* 0x14 */ + U32 Reserved4; /* 0x18 */ + U16 Slot; /* 0x1C */ + U16 EnclosureHandle; /* 0x1E */ +} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY, + Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t; + +/* SlotStatus defines */ +#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) +#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) +#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) +#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) +#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) +#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) +#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010) +#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008) +#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) +#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) +#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) + + +#endif + + diff -x .svn -urN sys/dev/mps/mpi/mpi2_ioc.h ../../stable/8/sys/dev/mps/mpi/mpi2_ioc.h --- sys/dev/mps/mpi/mpi2_ioc.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_ioc.h 2011-01-07 14:33:12.661552076 -0700 @@ -0,0 +1,1414 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_ioc.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2009 LSI Corporation. + * + * + * Name: mpi2_ioc.h + * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages + * Creation Date: October 11, 2006 + * + * mpi2_ioc.h Version: 02.00.13 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to + * MaxTargets. + * Added TotalImageSize field to FWDownload Request. + * Added reserved words to FWUpload Request. + * 06-26-07 02.00.02 Added IR Configuration Change List Event. + * 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit + * request and replaced it with + * ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth. + * Replaced the MinReplyQueueDepth field of the IOCFacts + * reply with MaxReplyDescriptorPostQueueDepth. + * Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum + * depth for the Reply Descriptor Post Queue. + * Added SASAddress field to Initiator Device Table + * Overflow Event data. + * 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING + * for SAS Initiator Device Status Change Event data. + * Modified Reason Code defines for SAS Topology Change + * List Event data, including adding a bit for PHY Vacant + * status, and adding a mask for the Reason Code. + * Added define for + * MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING. + * Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID. + * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of + * the IOCFacts Reply. + * Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. + * Moved MPI2_VERSION_UNION to mpi2.h. + * Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks + * instead of enables, and added SASBroadcastPrimitiveMasks + * field. + * Added Log Entry Added Event and related structure. + * 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID. + * Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET. + * Added MaxVolumes and MaxPersistentEntries fields to + * IOCFacts reply. + * Added ProtocalFlags and IOCCapabilities fields to + * MPI2_FW_IMAGE_HEADER. + * Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT. + * 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to + * a U16 (from a U32). + * Removed extra 's' from EventMasks name. + * 06-27-08 02.00.08 Fixed an offset in a comment. + * 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST. + * Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and + * renamed MinReplyFrameSize to ReplyFrameSize. + * Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX. + * Added two new RAIDOperation values for Integrated RAID + * Operations Status Event data. + * Added four new IR Configuration Change List Event data + * ReasonCode values. + * Added two new ReasonCode defines for SAS Device Status + * Change Event data. + * Added three new DiscoveryStatus bits for the SAS + * Discovery event data. + * Added Multiplexing Status Change bit to the PhyStatus + * field of the SAS Topology Change List event data. + * Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY. + * BootFlags are now product-specific. + * Added defines for the indivdual signature bytes + * for MPI2_INIT_IMAGE_FOOTER. + * 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define. + * Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR + * define. + * Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE + * define. + * Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define. + * 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define. + * Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define. + * Added two new reason codes for SAS Device Status Change + * Event. + * Added new event: SAS PHY Counter. + * 07-30-09 02.00.12 Added GPIO Interrupt event define and structure. + * Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. + * Added new product id family for 2208. + * 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST. + * Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY. + * Added MinDevHandle field to MPI2_IOC_FACTS_REPLY. + * Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY. + * Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define. + * Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define. + * Added Host Based Discovery Phy Event data. + * Added defines for ProductID Product field + * (MPI2_FW_HEADER_PID_). + * Modified values for SAS ProductID Family + * (MPI2_FW_HEADER_PID_FAMILY_). + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_IOC_H +#define MPI2_IOC_H + +/***************************************************************************** +* +* IOC Messages +* +*****************************************************************************/ + +/**************************************************************************** +* IOCInit message +****************************************************************************/ + +/* IOCInit Request message */ +typedef struct _MPI2_IOC_INIT_REQUEST +{ + U8 WhoInit; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 MsgVersion; /* 0x0C */ + U16 HeaderVersion; /* 0x0E */ + U32 Reserved5; /* 0x10 */ + U16 Reserved6; /* 0x14 */ + U8 Reserved7; /* 0x16 */ + U8 HostMSIxVectors; /* 0x17 */ + U16 Reserved8; /* 0x18 */ + U16 SystemRequestFrameSize; /* 0x1A */ + U16 ReplyDescriptorPostQueueDepth; /* 0x1C */ + U16 ReplyFreeQueueDepth; /* 0x1E */ + U32 SenseBufferAddressHigh; /* 0x20 */ + U32 SystemReplyAddressHigh; /* 0x24 */ + U64 SystemRequestFrameBaseAddress; /* 0x28 */ + U64 ReplyDescriptorPostQueueAddress;/* 0x30 */ + U64 ReplyFreeQueueAddress; /* 0x38 */ + U64 TimeStamp; /* 0x40 */ +} MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST, + Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t; + +/* WhoInit values */ +#define MPI2_WHOINIT_NOT_INITIALIZED (0x00) +#define MPI2_WHOINIT_SYSTEM_BIOS (0x01) +#define MPI2_WHOINIT_ROM_BIOS (0x02) +#define MPI2_WHOINIT_PCI_PEER (0x03) +#define MPI2_WHOINIT_HOST_DRIVER (0x04) +#define MPI2_WHOINIT_MANUFACTURER (0x05) + +/* MsgVersion */ +#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) +#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) +#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) +#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0) + +/* HeaderVersion */ +#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00) +#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8) +#define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF) +#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0) + +/* minimum depth for the Reply Descriptor Post Queue */ +#define MPI2_RDPQ_DEPTH_MIN (16) + + +/* IOCInit Reply message */ +typedef struct _MPI2_IOC_INIT_REPLY +{ + U8 WhoInit; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY, + Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t; + + +/**************************************************************************** +* IOCFacts message +****************************************************************************/ + +/* IOCFacts Request message */ +typedef struct _MPI2_IOC_FACTS_REQUEST +{ + U16 Reserved1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ +} MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST, + Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t; + + +/* IOCFacts Reply message */ +typedef struct _MPI2_IOC_FACTS_REPLY +{ + U16 MsgVersion; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 HeaderVersion; /* 0x04 */ + U8 IOCNumber; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U16 IOCExceptions; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U8 MaxChainDepth; /* 0x14 */ + U8 WhoInit; /* 0x15 */ + U8 NumberOfPorts; /* 0x16 */ + U8 MaxMSIxVectors; /* 0x17 */ + U16 RequestCredit; /* 0x18 */ + U16 ProductID; /* 0x1A */ + U32 IOCCapabilities; /* 0x1C */ + MPI2_VERSION_UNION FWVersion; /* 0x20 */ + U16 IOCRequestFrameSize; /* 0x24 */ + U16 Reserved3; /* 0x26 */ + U16 MaxInitiators; /* 0x28 */ + U16 MaxTargets; /* 0x2A */ + U16 MaxSasExpanders; /* 0x2C */ + U16 MaxEnclosures; /* 0x2E */ + U16 ProtocolFlags; /* 0x30 */ + U16 HighPriorityCredit; /* 0x32 */ + U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */ + U8 ReplyFrameSize; /* 0x36 */ + U8 MaxVolumes; /* 0x37 */ + U16 MaxDevHandle; /* 0x38 */ + U16 MaxPersistentEntries; /* 0x3A */ + U16 MinDevHandle; /* 0x3C */ + U16 Reserved4; /* 0x3E */ +} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY, + Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t; + +/* MsgVersion */ +#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) +#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) +#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) +#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) + +/* HeaderVersion */ +#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) +#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) +#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) +#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0) + +/* IOCExceptions */ +#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100) + +#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0) +#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000) +#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020) +#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040) +#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060) + +#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010) +#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008) +#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) +#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) +#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) + +/* defines for WhoInit field are after the IOCInit Request */ + +/* ProductID field uses MPI2_FW_HEADER_PID_ */ + +/* IOCCapabilities */ +#define MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY (0x00010000) +#define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX (0x00008000) +#define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR (0x00004000) +#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000) +#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000) +#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800) +#define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) +#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080) +#define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040) +#define MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) +#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) +#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) +#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004) + +/* ProtocolFlags */ +#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) +#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) + + +/**************************************************************************** +* PortFacts message +****************************************************************************/ + +/* PortFacts Request message */ +typedef struct _MPI2_PORT_FACTS_REQUEST +{ + U16 Reserved1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 PortNumber; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ +} MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST, + Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t; + +/* PortFacts Reply message */ +typedef struct _MPI2_PORT_FACTS_REPLY +{ + U16 Reserved1; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 PortNumber; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U8 Reserved5; /* 0x14 */ + U8 PortType; /* 0x15 */ + U16 Reserved6; /* 0x16 */ + U16 MaxPostedCmdBuffers; /* 0x18 */ + U16 Reserved7; /* 0x1A */ +} MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY, + Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t; + +/* PortType values */ +#define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00) +#define MPI2_PORTFACTS_PORTTYPE_FC (0x10) +#define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20) +#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30) +#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31) + + +/**************************************************************************** +* PortEnable message +****************************************************************************/ + +/* PortEnable Request message */ +typedef struct _MPI2_PORT_ENABLE_REQUEST +{ + U16 Reserved1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 Reserved2; /* 0x04 */ + U8 PortFlags; /* 0x05 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ +} MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST, + Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t; + + +/* PortEnable Reply message */ +typedef struct _MPI2_PORT_ENABLE_REPLY +{ + U16 Reserved1; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U8 Reserved2; /* 0x04 */ + U8 PortFlags; /* 0x05 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY, + Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t; + + +/**************************************************************************** +* EventNotification message +****************************************************************************/ + +/* EventNotification Request message */ +#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4) + +typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST +{ + U16 Reserved1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U32 Reserved5; /* 0x0C */ + U32 Reserved6; /* 0x10 */ + U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */ + U16 SASBroadcastPrimitiveMasks; /* 0x24 */ + U16 Reserved7; /* 0x26 */ + U32 Reserved8; /* 0x28 */ +} MPI2_EVENT_NOTIFICATION_REQUEST, + MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST, + Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t; + + +/* EventNotification Reply message */ +typedef struct _MPI2_EVENT_NOTIFICATION_REPLY +{ + U16 EventDataLength; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 AckRequired; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U16 Reserved3; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U16 Event; /* 0x14 */ + U16 Reserved4; /* 0x16 */ + U32 EventContext; /* 0x18 */ + U32 EventData[1]; /* 0x1C */ +} MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY, + Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t; + +/* AckRequired */ +#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) +#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) + +/* Event */ +#define MPI2_EVENT_LOG_DATA (0x0001) +#define MPI2_EVENT_STATE_CHANGE (0x0002) +#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005) +#define MPI2_EVENT_EVENT_CHANGE (0x000A) +#define MPI2_EVENT_TASK_SET_FULL (0x000E) +#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F) +#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014) +#define MPI2_EVENT_SAS_DISCOVERY (0x0016) +#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017) +#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018) +#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019) +#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C) +#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D) +#define MPI2_EVENT_IR_VOLUME (0x001E) +#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F) +#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020) +#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021) +#define MPI2_EVENT_SAS_PHY_COUNTER (0x0022) +#define MPI2_EVENT_GPIO_INTERRUPT (0x0023) +#define MPI2_EVENT_HOST_BASED_DISCOVERY_PHY (0x0024) + + +/* Log Entry Added Event data */ + +/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */ +#define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C) + +typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED +{ + U64 TimeStamp; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U16 LogSequence; /* 0x0C */ + U16 LogEntryQualifier; /* 0x0E */ + U8 VP_ID; /* 0x10 */ + U8 VF_ID; /* 0x11 */ + U16 Reserved2; /* 0x12 */ + U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */ +} MPI2_EVENT_DATA_LOG_ENTRY_ADDED, + MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED, + Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t; + +/* GPIO Interrupt Event data */ + +typedef struct _MPI2_EVENT_DATA_GPIO_INTERRUPT +{ + U8 GPIONum; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ +} MPI2_EVENT_DATA_GPIO_INTERRUPT, + MPI2_POINTER PTR_MPI2_EVENT_DATA_GPIO_INTERRUPT, + Mpi2EventDataGpioInterrupt_t, MPI2_POINTER pMpi2EventDataGpioInterrupt_t; + +/* Hard Reset Received Event data */ + +typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED +{ + U8 Reserved1; /* 0x00 */ + U8 Port; /* 0x01 */ + U16 Reserved2; /* 0x02 */ +} MPI2_EVENT_DATA_HARD_RESET_RECEIVED, + MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED, + Mpi2EventDataHardResetReceived_t, + MPI2_POINTER pMpi2EventDataHardResetReceived_t; + +/* Task Set Full Event data */ + +typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL +{ + U16 DevHandle; /* 0x00 */ + U16 CurrentDepth; /* 0x02 */ +} MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL, + Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t; + + +/* SAS Device Status Change Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE +{ + U16 TaskTag; /* 0x00 */ + U8 ReasonCode; /* 0x02 */ + U8 Reserved1; /* 0x03 */ + U8 ASC; /* 0x04 */ + U8 ASCQ; /* 0x05 */ + U16 DevHandle; /* 0x06 */ + U32 Reserved2; /* 0x08 */ + U64 SASAddress; /* 0x0C */ + U8 LUN[8]; /* 0x14 */ +} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, + Mpi2EventDataSasDeviceStatusChange_t, + MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t; + +/* SAS Device Status Change Event data ReasonCode values */ +#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) +#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) +#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) +#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) +#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) +#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) +#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) +#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) +#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E) +#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F) +#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10) +#define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY (0x11) +#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY (0x12) + + +/* Integrated RAID Operation Status Event data */ + +typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS +{ + U16 VolDevHandle; /* 0x00 */ + U16 Reserved1; /* 0x02 */ + U8 RAIDOperation; /* 0x04 */ + U8 PercentComplete; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + U32 Resereved3; /* 0x08 */ +} MPI2_EVENT_DATA_IR_OPERATION_STATUS, + MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS, + Mpi2EventDataIrOperationStatus_t, + MPI2_POINTER pMpi2EventDataIrOperationStatus_t; + +/* Integrated RAID Operation Status Event data RAIDOperation values */ +#define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00) +#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01) +#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02) +#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03) +#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04) + + +/* Integrated RAID Volume Event data */ + +typedef struct _MPI2_EVENT_DATA_IR_VOLUME +{ + U16 VolDevHandle; /* 0x00 */ + U8 ReasonCode; /* 0x02 */ + U8 Reserved1; /* 0x03 */ + U32 NewValue; /* 0x04 */ + U32 PreviousValue; /* 0x08 */ +} MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME, + Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t; + +/* Integrated RAID Volume Event data ReasonCode values */ +#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01) +#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02) +#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03) + + +/* Integrated RAID Physical Disk Event data */ + +typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK +{ + U16 Reserved1; /* 0x00 */ + U8 ReasonCode; /* 0x02 */ + U8 PhysDiskNum; /* 0x03 */ + U16 PhysDiskDevHandle; /* 0x04 */ + U16 Reserved2; /* 0x06 */ + U16 Slot; /* 0x08 */ + U16 EnclosureHandle; /* 0x0A */ + U32 NewValue; /* 0x0C */ + U32 PreviousValue; /* 0x10 */ +} MPI2_EVENT_DATA_IR_PHYSICAL_DISK, + MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK, + Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t; + +/* Integrated RAID Physical Disk Event data ReasonCode values */ +#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01) +#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02) +#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03) + + +/* Integrated RAID Configuration Change List Event data */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check NumElements at runtime. + */ +#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT +#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1) +#endif + +typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT +{ + U16 ElementFlags; /* 0x00 */ + U16 VolDevHandle; /* 0x02 */ + U8 ReasonCode; /* 0x04 */ + U8 PhysDiskNum; /* 0x05 */ + U16 PhysDiskDevHandle; /* 0x06 */ +} MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT, + Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t; + +/* IR Configuration Change List Event data ElementFlags values */ +#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F) +#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000) +#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001) +#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002) + +/* IR Configuration Change List Event data ReasonCode values */ +#define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01) +#define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02) +#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03) +#define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04) +#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05) +#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06) +#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07) +#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08) +#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09) + +typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST +{ + U8 NumElements; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 Reserved2; /* 0x02 */ + U8 ConfigNum; /* 0x03 */ + U32 Flags; /* 0x04 */ + MPI2_EVENT_IR_CONFIG_ELEMENT ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT]; /* 0x08 */ +} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, + MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, + Mpi2EventDataIrConfigChangeList_t, + MPI2_POINTER pMpi2EventDataIrConfigChangeList_t; + +/* IR Configuration Change List Event data Flags values */ +#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001) + + +/* SAS Discovery Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY +{ + U8 Flags; /* 0x00 */ + U8 ReasonCode; /* 0x01 */ + U8 PhysicalPort; /* 0x02 */ + U8 Reserved1; /* 0x03 */ + U32 DiscoveryStatus; /* 0x04 */ +} MPI2_EVENT_DATA_SAS_DISCOVERY, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY, + Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t; + +/* SAS Discovery Event data Flags values */ +#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02) +#define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01) + +/* SAS Discovery Event data ReasonCode values */ +#define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01) +#define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02) + +/* SAS Discovery Event data DiscoveryStatus values */ +#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000) +#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000) +#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000) +#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) +#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000) +#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) +#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) +#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000) +#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) +#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800) +#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400) +#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200) +#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100) +#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080) +#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040) +#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020) +#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010) +#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004) +#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002) +#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001) + + +/* SAS Broadcast Primitive Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE +{ + U8 PhyNum; /* 0x00 */ + U8 Port; /* 0x01 */ + U8 PortWidth; /* 0x02 */ + U8 Primitive; /* 0x03 */ +} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, + Mpi2EventDataSasBroadcastPrimitive_t, + MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t; + +/* defines for the Primitive field */ +#define MPI2_EVENT_PRIMITIVE_CHANGE (0x01) +#define MPI2_EVENT_PRIMITIVE_SES (0x02) +#define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03) +#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) +#define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05) +#define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06) +#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07) +#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08) + + +/* SAS Initiator Device Status Change Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE +{ + U8 ReasonCode; /* 0x00 */ + U8 PhysicalPort; /* 0x01 */ + U16 DevHandle; /* 0x02 */ + U64 SASAddress; /* 0x04 */ +} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, + Mpi2EventDataSasInitDevStatusChange_t, + MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t; + +/* SAS Initiator Device Status Change event ReasonCode values */ +#define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01) +#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) + + +/* SAS Initiator Device Table Overflow Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW +{ + U16 MaxInit; /* 0x00 */ + U16 CurrentInit; /* 0x02 */ + U64 SASAddress; /* 0x04 */ +} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, + Mpi2EventDataSasInitTableOverflow_t, + MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t; + + +/* SAS Topology Change List Event data */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check NumEntries at runtime. + */ +#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT +#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1) +#endif + +typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY +{ + U16 AttachedDevHandle; /* 0x00 */ + U8 LinkRate; /* 0x02 */ + U8 PhyStatus; /* 0x03 */ +} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY, + Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t; + +typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST +{ + U16 EnclosureHandle; /* 0x00 */ + U16 ExpanderDevHandle; /* 0x02 */ + U8 NumPhys; /* 0x04 */ + U8 Reserved1; /* 0x05 */ + U16 Reserved2; /* 0x06 */ + U8 NumEntries; /* 0x08 */ + U8 StartPhyNum; /* 0x09 */ + U8 ExpStatus; /* 0x0A */ + U8 PhysicalPort; /* 0x0B */ + MPI2_EVENT_SAS_TOPO_PHY_ENTRY PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/ +} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, + Mpi2EventDataSasTopologyChangeList_t, + MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t; + +/* values for the ExpStatus field */ +#define MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER (0x00) +#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01) +#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) +#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03) +#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) + +/* defines for the LinkRate field */ +#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) +#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) +#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) +#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) + +#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) +#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) +#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) +#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) +#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) +#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) +#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08) +#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09) +#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) + +/* values for the PhyStatus field */ +#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80) +#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10) +/* values for the PhyStatus ReasonCode sub-field */ +#define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F) +#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01) +#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02) +#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03) +#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04) +#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05) + + +/* SAS Enclosure Device Status Change Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE +{ + U16 EnclosureHandle; /* 0x00 */ + U8 ReasonCode; /* 0x02 */ + U8 PhysicalPort; /* 0x03 */ + U64 EnclosureLogicalID; /* 0x04 */ + U16 NumSlots; /* 0x0C */ + U16 StartSlot; /* 0x0E */ + U32 PhyBits; /* 0x10 */ +} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, + Mpi2EventDataSasEnclDevStatusChange_t, + MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t; + +/* SAS Enclosure Device Status Change event ReasonCode values */ +#define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01) +#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02) + + +/* SAS PHY Counter Event data */ + +typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER +{ + U64 TimeStamp; /* 0x00 */ + U32 Reserved1; /* 0x08 */ + U8 PhyEventCode; /* 0x0C */ + U8 PhyNum; /* 0x0D */ + U16 Reserved2; /* 0x0E */ + U32 PhyEventInfo; /* 0x10 */ + U8 CounterType; /* 0x14 */ + U8 ThresholdWindow; /* 0x15 */ + U8 TimeUnits; /* 0x16 */ + U8 Reserved3; /* 0x17 */ + U32 EventThreshold; /* 0x18 */ + U16 ThresholdFlags; /* 0x1C */ + U16 Reserved4; /* 0x1E */ +} MPI2_EVENT_DATA_SAS_PHY_COUNTER, + MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER, + Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t; + +/* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the PhyEventCode field */ + +/* use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the CounterType field */ + +/* use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the TimeUnits field */ + +/* use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the ThresholdFlags field */ + + +/* Host Based Discovery Phy Event data */ + +typedef struct _MPI2_EVENT_HBD_PHY_SAS +{ + U8 Flags; /* 0x00 */ + U8 NegotiatedLinkRate; /* 0x01 */ + U8 PhyNum; /* 0x02 */ + U8 PhysicalPort; /* 0x03 */ + U32 Reserved1; /* 0x04 */ + U8 InitialFrame[28]; /* 0x08 */ +} MPI2_EVENT_HBD_PHY_SAS, MPI2_POINTER PTR_MPI2_EVENT_HBD_PHY_SAS, + Mpi2EventHbdPhySas_t, MPI2_POINTER pMpi2EventHbdPhySas_t; + +/* values for the Flags field */ +#define MPI2_EVENT_HBD_SAS_FLAGS_FRAME_VALID (0x02) +#define MPI2_EVENT_HBD_SAS_FLAGS_SATA_FRAME (0x01) + +/* use MPI2_SAS_NEG_LINK_RATE_ defines from mpi2_cnfg.h for the NegotiatedLinkRate field */ + +typedef union _MPI2_EVENT_HBD_DESCRIPTOR +{ + MPI2_EVENT_HBD_PHY_SAS Sas; +} MPI2_EVENT_HBD_DESCRIPTOR, MPI2_POINTER PTR_MPI2_EVENT_HBD_DESCRIPTOR, + Mpi2EventHbdDescriptor_t, MPI2_POINTER pMpi2EventHbdDescriptor_t; + +typedef struct _MPI2_EVENT_DATA_HBD_PHY +{ + U8 DescriptorType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ + U32 Reserved3; /* 0x04 */ + MPI2_EVENT_HBD_DESCRIPTOR Descriptor; /* 0x08 */ +} MPI2_EVENT_DATA_HBD_PHY, MPI2_POINTER PTR_MPI2_EVENT_DATA_HBD_PHY, + Mpi2EventDataHbdPhy_t, MPI2_POINTER pMpi2EventDataMpi2EventDataHbdPhy_t; + +/* values for the DescriptorType field */ +#define MPI2_EVENT_HBD_DT_SAS (0x01) + + + +/**************************************************************************** +* EventAck message +****************************************************************************/ + +/* EventAck Request message */ +typedef struct _MPI2_EVENT_ACK_REQUEST +{ + U16 Reserved1; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Event; /* 0x0C */ + U16 Reserved5; /* 0x0E */ + U32 EventContext; /* 0x10 */ +} MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST, + Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t; + + +/* EventAck Reply message */ +typedef struct _MPI2_EVENT_ACK_REPLY +{ + U16 Reserved1; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY, + Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t; + + +/**************************************************************************** +* FWDownload message +****************************************************************************/ + +/* FWDownload Request message */ +typedef struct _MPI2_FW_DOWNLOAD_REQUEST +{ + U8 ImageType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U32 TotalImageSize; /* 0x0C */ + U32 Reserved5; /* 0x10 */ + MPI2_MPI_SGE_UNION SGL; /* 0x14 */ +} MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST, + Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest; + +#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) + +#define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01) +#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02) +#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06) +#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07) +#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08) +#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09) +#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) + +/* FWDownload TransactionContext Element */ +typedef struct _MPI2_FW_DOWNLOAD_TCSGE +{ + U8 Reserved1; /* 0x00 */ + U8 ContextSize; /* 0x01 */ + U8 DetailsLength; /* 0x02 */ + U8 Flags; /* 0x03 */ + U32 Reserved2; /* 0x04 */ + U32 ImageOffset; /* 0x08 */ + U32 ImageSize; /* 0x0C */ +} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE, + Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t; + +/* FWDownload Reply message */ +typedef struct _MPI2_FW_DOWNLOAD_REPLY +{ + U8 ImageType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY, + Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t; + + +/**************************************************************************** +* FWUpload message +****************************************************************************/ + +/* FWUpload Request message */ +typedef struct _MPI2_FW_UPLOAD_REQUEST +{ + U8 ImageType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U32 Reserved5; /* 0x0C */ + U32 Reserved6; /* 0x10 */ + MPI2_MPI_SGE_UNION SGL; /* 0x14 */ +} MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST, + Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t; + +#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00) +#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01) +#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) +#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) +#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06) +#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07) +#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08) +#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09) +#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A) +#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) + +typedef struct _MPI2_FW_UPLOAD_TCSGE +{ + U8 Reserved1; /* 0x00 */ + U8 ContextSize; /* 0x01 */ + U8 DetailsLength; /* 0x02 */ + U8 Flags; /* 0x03 */ + U32 Reserved2; /* 0x04 */ + U32 ImageOffset; /* 0x08 */ + U32 ImageSize; /* 0x0C */ +} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE, + Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t; + +/* FWUpload Reply message */ +typedef struct _MPI2_FW_UPLOAD_REPLY +{ + U8 ImageType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 ActualImageSize; /* 0x14 */ +} MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY, + Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t; + + +/* FW Image Header */ +typedef struct _MPI2_FW_IMAGE_HEADER +{ + U32 Signature; /* 0x00 */ + U32 Signature0; /* 0x04 */ + U32 Signature1; /* 0x08 */ + U32 Signature2; /* 0x0C */ + MPI2_VERSION_UNION MPIVersion; /* 0x10 */ + MPI2_VERSION_UNION FWVersion; /* 0x14 */ + MPI2_VERSION_UNION NVDATAVersion; /* 0x18 */ + MPI2_VERSION_UNION PackageVersion; /* 0x1C */ + U16 VendorID; /* 0x20 */ + U16 ProductID; /* 0x22 */ + U16 ProtocolFlags; /* 0x24 */ + U16 Reserved26; /* 0x26 */ + U32 IOCCapabilities; /* 0x28 */ + U32 ImageSize; /* 0x2C */ + U32 NextImageHeaderOffset; /* 0x30 */ + U32 Checksum; /* 0x34 */ + U32 Reserved38; /* 0x38 */ + U32 Reserved3C; /* 0x3C */ + U32 Reserved40; /* 0x40 */ + U32 Reserved44; /* 0x44 */ + U32 Reserved48; /* 0x48 */ + U32 Reserved4C; /* 0x4C */ + U32 Reserved50; /* 0x50 */ + U32 Reserved54; /* 0x54 */ + U32 Reserved58; /* 0x58 */ + U32 Reserved5C; /* 0x5C */ + U32 Reserved60; /* 0x60 */ + U32 FirmwareVersionNameWhat; /* 0x64 */ + U8 FirmwareVersionName[32]; /* 0x68 */ + U32 VendorNameWhat; /* 0x88 */ + U8 VendorName[32]; /* 0x8C */ + U32 PackageNameWhat; /* 0x88 */ + U8 PackageName[32]; /* 0x8C */ + U32 ReservedD0; /* 0xD0 */ + U32 ReservedD4; /* 0xD4 */ + U32 ReservedD8; /* 0xD8 */ + U32 ReservedDC; /* 0xDC */ + U32 ReservedE0; /* 0xE0 */ + U32 ReservedE4; /* 0xE4 */ + U32 ReservedE8; /* 0xE8 */ + U32 ReservedEC; /* 0xEC */ + U32 ReservedF0; /* 0xF0 */ + U32 ReservedF4; /* 0xF4 */ + U32 ReservedF8; /* 0xF8 */ + U32 ReservedFC; /* 0xFC */ +} MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER, + Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t; + +/* Signature field */ +#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00) +#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000) +#define MPI2_FW_HEADER_SIGNATURE (0xEA000000) + +/* Signature0 field */ +#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04) +#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A) + +/* Signature1 field */ +#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08) +#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5) + +/* Signature2 field */ +#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C) +#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA) + + +/* defines for using the ProductID field */ +#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000) +#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000) + +#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00) +#define MPI2_FW_HEADER_PID_PROD_A (0x0000) +#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00) +#define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) +#define MPI2_FW_HEADER_PID_PROD_IR_SCSI (0x0700) + + +#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF) +/* SAS */ +#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0013) +#define MPI2_FW_HEADER_PID_FAMILY_2208_SAS (0x0014) + +/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */ + +/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */ + + +#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C) +#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30) +#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64) + +#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840) + +#define MPI2_FW_HEADER_SIZE (0x100) + + +/* Extended Image Header */ +typedef struct _MPI2_EXT_IMAGE_HEADER + +{ + U8 ImageType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ + U32 Checksum; /* 0x04 */ + U32 ImageSize; /* 0x08 */ + U32 NextImageHeaderOffset; /* 0x0C */ + U32 PackageVersion; /* 0x10 */ + U32 Reserved3; /* 0x14 */ + U32 Reserved4; /* 0x18 */ + U32 Reserved5; /* 0x1C */ + U8 IdentifyString[32]; /* 0x20 */ +} MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER, + Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t; + +/* useful offsets */ +#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00) +#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08) +#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C) + +#define MPI2_EXT_IMAGE_HEADER_SIZE (0x40) + +/* defines for the ImageType field */ +#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) +#define MPI2_EXT_IMAGE_TYPE_FW (0x01) +#define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03) +#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04) +#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05) +#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06) +#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07) +#define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08) + +#define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MEGARAID) + + + +/* FLASH Layout Extended Image Data */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check RegionsPerLayout at runtime. + */ +#ifndef MPI2_FLASH_NUMBER_OF_REGIONS +#define MPI2_FLASH_NUMBER_OF_REGIONS (1) +#endif + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check NumberOfLayouts at runtime. + */ +#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS +#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1) +#endif + +typedef struct _MPI2_FLASH_REGION +{ + U8 RegionType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 Reserved2; /* 0x02 */ + U32 RegionOffset; /* 0x04 */ + U32 RegionSize; /* 0x08 */ + U32 Reserved3; /* 0x0C */ +} MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION, + Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t; + +typedef struct _MPI2_FLASH_LAYOUT +{ + U32 FlashSize; /* 0x00 */ + U32 Reserved1; /* 0x04 */ + U32 Reserved2; /* 0x08 */ + U32 Reserved3; /* 0x0C */ + MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */ +} MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT, + Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t; + +typedef struct _MPI2_FLASH_LAYOUT_DATA +{ + U8 ImageRevision; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 SizeOfRegion; /* 0x02 */ + U8 Reserved2; /* 0x03 */ + U16 NumberOfLayouts; /* 0x04 */ + U16 RegionsPerLayout; /* 0x06 */ + U16 MinimumSectorAlignment; /* 0x08 */ + U16 Reserved3; /* 0x0A */ + U32 Reserved4; /* 0x0C */ + MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */ +} MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA, + Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t; + +/* defines for the RegionType field */ +#define MPI2_FLASH_REGION_UNUSED (0x00) +#define MPI2_FLASH_REGION_FIRMWARE (0x01) +#define MPI2_FLASH_REGION_BIOS (0x02) +#define MPI2_FLASH_REGION_NVDATA (0x03) +#define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05) +#define MPI2_FLASH_REGION_MFG_INFORMATION (0x06) +#define MPI2_FLASH_REGION_CONFIG_1 (0x07) +#define MPI2_FLASH_REGION_CONFIG_2 (0x08) +#define MPI2_FLASH_REGION_MEGARAID (0x09) +#define MPI2_FLASH_REGION_INIT (0x0A) + +/* ImageRevision */ +#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00) + + + +/* Supported Devices Extended Image Data */ + +/* + * Host code (drivers, BIOS, utilities, etc.) should leave this define set to + * one and check NumberOfDevices at runtime. + */ +#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES +#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1) +#endif + +typedef struct _MPI2_SUPPORTED_DEVICE +{ + U16 DeviceID; /* 0x00 */ + U16 VendorID; /* 0x02 */ + U16 DeviceIDMask; /* 0x04 */ + U16 Reserved1; /* 0x06 */ + U8 LowPCIRev; /* 0x08 */ + U8 HighPCIRev; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 Reserved3; /* 0x0C */ +} MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE, + Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t; + +typedef struct _MPI2_SUPPORTED_DEVICES_DATA +{ + U8 ImageRevision; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 NumberOfDevices; /* 0x02 */ + U8 Reserved2; /* 0x03 */ + U32 Reserved3; /* 0x04 */ + MPI2_SUPPORTED_DEVICE SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */ +} MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA, + Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t; + +/* ImageRevision */ +#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00) + + +/* Init Extended Image Data */ + +typedef struct _MPI2_INIT_IMAGE_FOOTER + +{ + U32 BootFlags; /* 0x00 */ + U32 ImageSize; /* 0x04 */ + U32 Signature0; /* 0x08 */ + U32 Signature1; /* 0x0C */ + U32 Signature2; /* 0x10 */ + U32 ResetVector; /* 0x14 */ +} MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER, + Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t; + +/* defines for the BootFlags field */ +#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00) + +/* defines for the ImageSize field */ +#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04) + +/* defines for the Signature0 field */ +#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08) +#define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA) + +/* defines for the Signature1 field */ +#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C) +#define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5) + +/* defines for the Signature2 field */ +#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10) +#define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A) + +/* Signature fields as individual bytes */ +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A) + +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5) + +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA) +#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A) + +/* defines for the ResetVector field */ +#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14) + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_ra.h ../../stable/8/sys/dev/mps/mpi/mpi2_ra.h --- sys/dev/mps/mpi/mpi2_ra.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_ra.h 2011-01-07 14:33:12.638459489 -0700 @@ -0,0 +1,86 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_ra.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2009 LSI Corporation. + * + * + * Name: mpi2_ra.h + * Title: MPI RAID Accelerator messages and structures + * Creation Date: April 13, 2009 + * + * mpi2_ra.h Version: 02.00.00 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 05-06-09 02.00.00 Initial version. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_RA_H +#define MPI2_RA_H + +/* generic structure for RAID Accelerator Control Block */ +typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK +{ + U32 Reserved[8]; /* 0x00 */ + U32 RaidAcceleratorCDB[1]; /* 0x20 */ +} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK, + MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK, + Mpi2RAIDAcceleratorControlBlock_t, + MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t; + + +/****************************************************************************** +* +* RAID Accelerator Messages +* +*******************************************************************************/ + +/* RAID Accelerator Request Message */ +typedef struct _MPI2_RAID_ACCELERATOR_REQUEST +{ + U16 Reserved0; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U64 RaidAcceleratorControlBlockAddress; /* 0x0C */ + U8 DmaEngineNumber; /* 0x14 */ + U8 Reserved4; /* 0x15 */ + U16 Reserved5; /* 0x16 */ + U32 Reserved6; /* 0x18 */ + U32 Reserved7; /* 0x1C */ + U32 Reserved8; /* 0x20 */ +} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST, + Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t; + + +/* RAID Accelerator Error Reply Message */ +typedef struct _MPI2_RAID_ACCELERATOR_REPLY +{ + U16 Reserved0; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 ProductSpecificData[3]; /* 0x14 */ +} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY, + Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t; + + +#endif + + diff -x .svn -urN sys/dev/mps/mpi/mpi2_raid.h ../../stable/8/sys/dev/mps/mpi/mpi2_raid.h --- sys/dev/mps/mpi/mpi2_raid.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_raid.h 2011-01-07 14:33:12.696693420 -0700 @@ -0,0 +1,302 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_raid.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2008 LSI Corporation. + * + * + * Name: mpi2_raid.h + * Title: MPI Integrated RAID messages and structures + * Creation Date: April 26, 2007 + * + * mpi2_raid.h Version: 02.00.04 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 08-31-07 02.00.01 Modifications to RAID Action request and reply, + * including the Actions and ActionData. + * 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD. + * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that + * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT + * can be sized by the build environment. + * 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of + * VolumeCreationFlags and marked the old one as obsolete. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_RAID_H +#define MPI2_RAID_H + +/***************************************************************************** +* +* Integrated RAID Messages +* +*****************************************************************************/ + +/**************************************************************************** +* RAID Action messages +****************************************************************************/ + +/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */ +#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000) +#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001) + +/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */ + +/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */ +#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001) + +/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */ +typedef struct _MPI2_RAID_ACTION_RATE_DATA +{ + U8 RateToChange; /* 0x00 */ + U8 RateOrMode; /* 0x01 */ + U16 DataScrubDuration; /* 0x02 */ +} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA, + Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t; + +#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00) +#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01) +#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02) + +/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */ +typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION +{ + U8 RAIDFunction; /* 0x00 */ + U8 Flags; /* 0x01 */ + U16 Reserved1; /* 0x02 */ +} MPI2_RAID_ACTION_START_RAID_FUNCTION, + MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION, + Mpi2RaidActionStartRaidFunction_t, + MPI2_POINTER pMpi2RaidActionStartRaidFunction_t; + +/* defines for the RAIDFunction field */ +#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00) +#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01) +#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02) + +/* defines for the Flags field */ +#define MPI2_RAID_ACTION_START_NEW (0x00) +#define MPI2_RAID_ACTION_START_RESUME (0x01) + +/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */ +typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION +{ + U8 RAIDFunction; /* 0x00 */ + U8 Flags; /* 0x01 */ + U16 Reserved1; /* 0x02 */ +} MPI2_RAID_ACTION_STOP_RAID_FUNCTION, + MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION, + Mpi2RaidActionStopRaidFunction_t, + MPI2_POINTER pMpi2RaidActionStopRaidFunction_t; + +/* defines for the RAIDFunction field */ +#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00) +#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01) +#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02) + +/* defines for the Flags field */ +#define MPI2_RAID_ACTION_STOP_ABORT (0x00) +#define MPI2_RAID_ACTION_STOP_PAUSE (0x01) + +/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */ +typedef struct _MPI2_RAID_ACTION_HOT_SPARE +{ + U8 HotSparePool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 DevHandle; /* 0x02 */ +} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE, + Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t; + +/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */ +typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE +{ + U8 Flags; /* 0x00 */ + U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */ + U16 Reserved1; /* 0x02 */ +} MPI2_RAID_ACTION_FW_UPDATE_MODE, + MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE, + Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t; + +/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */ +#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00) +#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01) + +typedef union _MPI2_RAID_ACTION_DATA +{ + U32 Word; + MPI2_RAID_ACTION_RATE_DATA Rates; + MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction; + MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction; + MPI2_RAID_ACTION_HOT_SPARE HotSpare; + MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode; +} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA, + Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t; + + +/* RAID Action Request Message */ +typedef struct _MPI2_RAID_ACTION_REQUEST +{ + U8 Action; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 VolDevHandle; /* 0x04 */ + U8 PhysDiskNum; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */ + MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */ +} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST, + Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t; + +/* RAID Action request Action values */ + +#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01) +#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02) +#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03) +#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04) +#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05) +#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A) +#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B) +#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F) +#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11) +#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15) +#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17) +#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18) +#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19) +#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C) +#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D) +#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E) +#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20) +#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21) +#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22) + + +/* RAID Volume Creation Structure */ + +/* + * The following define can be customized for the targeted product. + */ +#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS +#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1) +#endif + +typedef struct _MPI2_RAID_VOLUME_PHYSDISK +{ + U8 RAIDSetNum; /* 0x00 */ + U8 PhysDiskMap; /* 0x01 */ + U16 PhysDiskDevHandle; /* 0x02 */ +} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK, + Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t; + +/* defines for the PhysDiskMap field */ +#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01) +#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02) + +typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT +{ + U8 NumPhysDisks; /* 0x00 */ + U8 VolumeType; /* 0x01 */ + U16 Reserved1; /* 0x02 */ + U32 VolumeCreationFlags; /* 0x04 */ + U32 VolumeSettings; /* 0x08 */ + U8 Reserved2; /* 0x0C */ + U8 ResyncRate; /* 0x0D */ + U16 DataScrubDuration; /* 0x0E */ + U64 VolumeMaxLBA; /* 0x10 */ + U32 StripeSize; /* 0x18 */ + U8 Name[16]; /* 0x1C */ + MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */ +} MPI2_RAID_VOLUME_CREATION_STRUCT, + MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT, + Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t; + +/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */ + +/* defines for the VolumeCreationFlags field */ +#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000) +#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004) +#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002) +#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001) +/* The following is an obsolete define. + * It must be shifted left 24 bits in order to set the proper bit. + */ +#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80) + + +/* RAID Online Capacity Expansion Structure */ + +typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION +{ + U32 Flags; /* 0x00 */ + U16 DevHandle0; /* 0x04 */ + U16 Reserved1; /* 0x06 */ + U16 DevHandle1; /* 0x08 */ + U16 Reserved2; /* 0x0A */ +} MPI2_RAID_ONLINE_CAPACITY_EXPANSION, + MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION, + Mpi2RaidOnlineCapacityExpansion_t, + MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t; + + +/* RAID Volume Indicator Structure */ + +typedef struct _MPI2_RAID_VOL_INDICATOR +{ + U64 TotalBlocks; /* 0x00 */ + U64 BlocksRemaining; /* 0x08 */ + U32 Flags; /* 0x10 */ +} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR, + Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t; + +/* defines for RAID Volume Indicator Flags field */ +#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F) +#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000) +#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001) +#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002) +#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003) + + +/* RAID Action Reply ActionData union */ +typedef union _MPI2_RAID_ACTION_REPLY_DATA +{ + U32 Word[5]; + MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator; + U16 VolDevHandle; + U8 VolumeState; + U8 PhysDiskNum; +} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA, + Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t; + +/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */ + + +/* RAID Action Reply Message */ +typedef struct _MPI2_RAID_ACTION_REPLY +{ + U8 Action; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 VolDevHandle; /* 0x04 */ + U8 PhysDiskNum; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U16 Reserved3; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */ +} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY, + Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t; + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_sas.h ../../stable/8/sys/dev/mps/mpi/mpi2_sas.h --- sys/dev/mps/mpi/mpi2_sas.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_sas.h 2011-01-07 14:33:12.647495427 -0700 @@ -0,0 +1,285 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_sas.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2007 LSI Corporation. + * + * + * Name: mpi2_sas.h + * Title: MPI Serial Attached SCSI structures and definitions + * Creation Date: February 9, 2007 + * + * mpi2.h Version: 02.00.03 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit + * Control Request. + * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control + * Request. + * 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST + * to MPI2_SGE_IO_UNION since it supports chained SGLs. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_SAS_H +#define MPI2_SAS_H + +/* + * Values for SASStatus. + */ +#define MPI2_SASSTATUS_SUCCESS (0x00) +#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01) +#define MPI2_SASSTATUS_INVALID_FRAME (0x02) +#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03) +#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04) +#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05) +#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06) +#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07) +#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08) +#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09) +#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A) +#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B) +#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C) +#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D) +#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E) +#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F) +#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10) +#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11) +#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12) +#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13) +#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14) + + +/* + * Values for the SAS DeviceInfo field used in SAS Device Status Change Event + * data and SAS Configuration pages. + */ +#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000) +#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000) +#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000) +#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800) +#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400) +#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200) +#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100) +#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080) +#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040) +#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020) +#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010) +#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008) + +#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007) +#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000) +#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001) +#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002) +#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003) + + +/***************************************************************************** +* +* SAS Messages +* +*****************************************************************************/ + +/**************************************************************************** +* SMP Passthrough messages +****************************************************************************/ + +/* SMP Passthrough Request Message */ +typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST +{ + U8 PassthroughFlags; /* 0x00 */ + U8 PhysicalPort; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 RequestDataLength; /* 0x04 */ + U8 SGLFlags; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U32 Reserved2; /* 0x0C */ + U64 SASAddress; /* 0x10 */ + U32 Reserved3; /* 0x18 */ + U32 Reserved4; /* 0x1C */ + MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ +} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST, + Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t; + +/* values for PassthroughFlags field */ +#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80) + +/* values for SGLFlags field are in the SGL section of mpi2.h */ + + +/* SMP Passthrough Reply Message */ +typedef struct _MPI2_SMP_PASSTHROUGH_REPLY +{ + U8 PassthroughFlags; /* 0x00 */ + U8 PhysicalPort; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 ResponseDataLength; /* 0x04 */ + U8 SGLFlags; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U8 Reserved2; /* 0x0C */ + U8 SASStatus; /* 0x0D */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 Reserved3; /* 0x14 */ + U8 ResponseData[4]; /* 0x18 */ +} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY, + Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t; + +/* values for PassthroughFlags field */ +#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80) + +/* values for SASStatus field are at the top of this file */ + + +/**************************************************************************** +* SATA Passthrough messages +****************************************************************************/ + +/* SATA Passthrough Request Message */ +typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST +{ + U16 DevHandle; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 PassthroughFlags; /* 0x04 */ + U8 SGLFlags; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U32 Reserved2; /* 0x0C */ + U32 Reserved3; /* 0x10 */ + U32 Reserved4; /* 0x14 */ + U32 DataLength; /* 0x18 */ + U8 CommandFIS[20]; /* 0x1C */ + MPI2_SGE_IO_UNION SGL; /* 0x20 */ +} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST, + Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t; + +/* values for PassthroughFlags field */ +#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100) +#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020) +#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010) +#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004) +#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002) +#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001) + +/* values for SGLFlags field are in the SGL section of mpi2.h */ + + +/* SATA Passthrough Reply Message */ +typedef struct _MPI2_SATA_PASSTHROUGH_REPLY +{ + U16 DevHandle; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 PassthroughFlags; /* 0x04 */ + U8 SGLFlags; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved1; /* 0x0A */ + U8 Reserved2; /* 0x0C */ + U8 SASStatus; /* 0x0D */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U8 StatusFIS[20]; /* 0x14 */ + U32 StatusControlRegisters; /* 0x28 */ + U32 TransferCount; /* 0x2C */ +} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY, + Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t; + +/* values for SASStatus field are at the top of this file */ + + +/**************************************************************************** +* SAS IO Unit Control messages +****************************************************************************/ + +/* SAS IO Unit Control Request Message */ +typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST +{ + U8 Operation; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 DevHandle; /* 0x04 */ + U8 IOCParameter; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U8 PhyNum; /* 0x0E */ + U8 PrimFlags; /* 0x0F */ + U32 Primitive; /* 0x10 */ + U8 LookupMethod; /* 0x14 */ + U8 Reserved5; /* 0x15 */ + U16 SlotNumber; /* 0x16 */ + U64 LookupAddress; /* 0x18 */ + U32 IOCParameterValue; /* 0x20 */ + U32 Reserved7; /* 0x24 */ + U32 Reserved8; /* 0x28 */ +} MPI2_SAS_IOUNIT_CONTROL_REQUEST, + MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST, + Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t; + +/* values for the Operation field */ +#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02) +#define MPI2_SAS_OP_PHY_LINK_RESET (0x06) +#define MPI2_SAS_OP_PHY_HARD_RESET (0x07) +#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08) +#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A) +#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B) +#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C) +#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D) +#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E) +#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F) +#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80) + +/* values for the PrimFlags field */ +#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08) +#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02) +#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01) + +/* values for the LookupMethod field */ +#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01) +#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02) +#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) + + +/* SAS IO Unit Control Reply Message */ +typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY +{ + U8 Operation; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 DevHandle; /* 0x04 */ + U8 IOCParameter; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_SAS_IOUNIT_CONTROL_REPLY, + MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY, + Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t; + + +#endif + + diff -x .svn -urN sys/dev/mps/mpi/mpi2_targ.h ../../stable/8/sys/dev/mps/mpi/mpi2_targ.h --- sys/dev/mps/mpi/mpi2_targ.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_targ.h 2011-01-07 14:33:12.686655630 -0700 @@ -0,0 +1,441 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_targ.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2008 LSI Corporation. + * + * + * Name: mpi2_targ.h + * Title: MPI Target mode messages and structures + * Creation Date: September 8, 2006 + * + * mpi2_targ.h Version: 02.00.03 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to + * BufferPostFlags field of CommandBufferPostBase Request. + * 02-29-08 02.00.02 Modified various names to make them 32-character unique. + * 10-02-08 02.00.03 Removed NextCmdBufferOffset from + * MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST. + * Target Status Send Request only takes a single SGE for + * response data. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_TARG_H +#define MPI2_TARG_H + + +/****************************************************************************** +* +* SCSI Target Messages +* +*******************************************************************************/ + +/**************************************************************************** +* Target Command Buffer Post Base Request +****************************************************************************/ + +typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST +{ + U8 BufferPostFlags; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 TotalCmdBuffers; /* 0x04 */ + U8 Reserved; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + U16 CmdBufferLength; /* 0x10 */ + U16 Reserved4; /* 0x12 */ + U32 BaseAddressLow; /* 0x14 */ + U32 BaseAddressHigh; /* 0x18 */ +} MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST, + MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST, + Mpi2TargetCmdBufferPostBaseRequest_t, + MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t; + +/* values for the BufferPostflags field */ +#define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C) +#define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00) +#define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04) +#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08) +#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C) + +#define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01) + + +/**************************************************************************** +* Target Command Buffer Post List Request +****************************************************************************/ + +typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST +{ + U16 Reserved; /* 0x00 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 CmdBufferCount; /* 0x04 */ + U8 Reserved1; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved2; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + U16 IoIndex[2]; /* 0x10 */ +} MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST, + MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST, + Mpi2TargetCmdBufferPostListRequest_t, + MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t; + +/**************************************************************************** +* Target Command Buffer Post Base List Reply +****************************************************************************/ + +typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY +{ + U8 Flags; /* 0x00 */ + U8 Reserved; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U16 IoIndex; /* 0x14 */ + U16 Reserved5; /* 0x16 */ + U32 Reserved6; /* 0x18 */ +} MPI2_TARGET_BUF_POST_BASE_LIST_REPLY, + MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY, + Mpi2TargetCmdBufferPostBaseListReply_t, + MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t; + +/* Flags defines */ +#define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01) + + +/**************************************************************************** +* Command Buffer Formats (with 16 byte CDB) +****************************************************************************/ + +typedef struct _MPI2_TARGET_SSP_CMD_BUFFER +{ + U8 FrameType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 InitiatorConnectionTag; /* 0x02 */ + U32 HashedSourceSASAddress; /* 0x04 */ + U16 Reserved2; /* 0x08 */ + U16 Flags; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + U16 Tag; /* 0x10 */ + U16 TargetPortTransferTag; /* 0x12 */ + U32 DataOffset; /* 0x14 */ + /* COMMAND information unit starts here */ + U8 LogicalUnitNumber[8]; /* 0x18 */ + U8 Reserved4; /* 0x20 */ + U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */ + U8 Reserved5; /* 0x22 */ + U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */ + U8 CDB[16]; /* 0x24 */ + /* Additional CDB bytes extend past the CDB field */ +} MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER, + Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer; + +typedef struct _MPI2_TARGET_SSP_TASK_BUFFER +{ + U8 FrameType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U16 InitiatorConnectionTag; /* 0x02 */ + U32 HashedSourceSASAddress; /* 0x04 */ + U16 Reserved2; /* 0x08 */ + U16 Flags; /* 0x0A */ + U32 Reserved3; /* 0x0C */ + U16 Tag; /* 0x10 */ + U16 TargetPortTransferTag; /* 0x12 */ + U32 DataOffset; /* 0x14 */ + /* TASK information unit starts here */ + U8 LogicalUnitNumber[8]; /* 0x18 */ + U16 Reserved4; /* 0x20 */ + U8 TaskManagementFunction; /* 0x22 */ + U8 Reserved5; /* 0x23 */ + U16 ManagedTaskTag; /* 0x24 */ + U16 Reserved6; /* 0x26 */ + U32 Reserved7; /* 0x28 */ + U32 Reserved8; /* 0x2C */ + U32 Reserved9; /* 0x30 */ +} MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER, + Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer; + +/* mask and shift for HashedSourceSASAddress field */ +#define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00) +#define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8) + + +/**************************************************************************** +* Target Assist Request +****************************************************************************/ + +typedef struct _MPI2_TARGET_ASSIST_REQUEST +{ + U8 Reserved1; /* 0x00 */ + U8 TargetAssistFlags; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 QueueTag; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 IoIndex; /* 0x0C */ + U16 InitiatorConnectionTag; /* 0x0E */ + U16 SGLFlags; /* 0x10 */ + U8 SequenceNumber; /* 0x12 */ + U8 Reserved4; /* 0x13 */ + U8 SGLOffset0; /* 0x14 */ + U8 SGLOffset1; /* 0x15 */ + U8 SGLOffset2; /* 0x16 */ + U8 SGLOffset3; /* 0x17 */ + U32 SkipCount; /* 0x18 */ + U32 DataLength; /* 0x1C */ + U32 BidirectionalDataLength; /* 0x20 */ + U16 IoFlags; /* 0x24 */ + U16 EEDPFlags; /* 0x26 */ + U32 EEDPBlockSize; /* 0x28 */ + U32 SecondaryReferenceTag; /* 0x2C */ + U16 SecondaryApplicationTag; /* 0x30 */ + U16 ApplicationTagTranslationMask; /* 0x32 */ + U32 PrimaryReferenceTag; /* 0x34 */ + U16 PrimaryApplicationTag; /* 0x38 */ + U16 PrimaryApplicationTagMask; /* 0x3A */ + U32 RelativeOffset; /* 0x3C */ + U32 Reserved5; /* 0x40 */ + U32 Reserved6; /* 0x44 */ + U32 Reserved7; /* 0x48 */ + U32 Reserved8; /* 0x4C */ + MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */ +} MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST, + Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t; + +/* Target Assist TargetAssistFlags bits */ + +#define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80) +#define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10) +#define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04) +#define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02) +#define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01) + +/* Target Assist SGLFlags bits */ + +/* base values for Data Location Address Space */ +#define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C) +#define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00) +#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04) +#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08) +#define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C) + +/* base values for Type */ +#define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03) +#define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00) +#define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01) +#define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02) + +/* shift values for each sub-field */ +#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12) +#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8) +#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4) +#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0) + +/* Target Assist IoFlags bits */ + +#define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800) +#define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400) +#define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200) + +/* Target Assist EEDPFlags bits */ + +#define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000) +#define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000) +#define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000) +#define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000) + +#define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400) +#define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200) +#define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100) + +#define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) + +#define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007) +#define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000) +#define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001) +#define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002) +#define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) +#define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004) +#define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006) +#define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007) + + +/**************************************************************************** +* Target Status Send Request +****************************************************************************/ + +typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST +{ + U8 Reserved1; /* 0x00 */ + U8 StatusFlags; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 QueueTag; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 IoIndex; /* 0x0C */ + U16 InitiatorConnectionTag; /* 0x0E */ + U16 SGLFlags; /* 0x10 */ + U16 Reserved4; /* 0x12 */ + U8 SGLOffset0; /* 0x14 */ + U8 Reserved5; /* 0x15 */ + U16 Reserved6; /* 0x16 */ + U32 Reserved7; /* 0x18 */ + U32 Reserved8; /* 0x1C */ + MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */ +} MPI2_TARGET_STATUS_SEND_REQUEST, + MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST, + Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t; + +/* Target Status Send StatusFlags bits */ + +#define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80) +#define MPI2_TSS_FLAGS_RETRANSMIT (0x04) +#define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01) + +/* Target Status Send SGLFlags bits */ +/* Data Location Address Space */ +#define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C) +#define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00) +#define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04) +#define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08) +#define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) +/* Type */ +#define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03) +#define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00) +#define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01) +#define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02) + + + +/* + * NOTE: The SSP status IU is big-endian. When used on a little-endian system, + * this structure properly orders the bytes. + */ +typedef struct _MPI2_TARGET_SSP_RSP_IU +{ + U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */ + /* start of RESPONSE information unit */ + U32 Reserved1; /* 0x18 */ + U32 Reserved2; /* 0x1C */ + U16 Reserved3; /* 0x20 */ + U8 DataPres; /* lower 2 bits */ /* 0x22 */ + U8 Status; /* 0x23 */ + U32 Reserved4; /* 0x24 */ + U32 SenseDataLength; /* 0x28 */ + U32 ResponseDataLength; /* 0x2C */ + U8 ResponseSenseData[4]; /* 0x30 */ +} MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU, + Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t; + + +/**************************************************************************** +* Target Standard Reply - used with Target Assist or Target Status Send +****************************************************************************/ + +typedef struct _MPI2_TARGET_STANDARD_REPLY +{ + U16 Reserved; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U16 IoIndex; /* 0x14 */ + U16 Reserved5; /* 0x16 */ + U32 TransferCount; /* 0x18 */ + U32 BidirectionalTransferCount; /* 0x1C */ +} MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY, + Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t; + + +/**************************************************************************** +* Target Mode Abort Request +****************************************************************************/ + +typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST +{ + U8 AbortType; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 IoIndexToAbort; /* 0x0C */ + U16 Reserved6; /* 0x0E */ + U32 MidToAbort; /* 0x10 */ +} MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT, + Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t; + +/* Target Mode Abort AbortType values */ + +#define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00) +#define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01) +#define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02) +#define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03) +#define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04) + + +/**************************************************************************** +* Target Mode Abort Reply +****************************************************************************/ + +typedef struct _MPI2_TARGET_MODE_ABORT_REPLY +{ + U16 Reserved; /* 0x00 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved1; /* 0x04 */ + U8 Reserved2; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved3; /* 0x0A */ + U16 Reserved4; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 AbortCount; /* 0x14 */ +} MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY, + Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t; + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_tool.h ../../stable/8/sys/dev/mps/mpi/mpi2_tool.h --- sys/dev/mps/mpi/mpi2_tool.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_tool.h 2011-01-07 14:33:12.691672709 -0700 @@ -0,0 +1,391 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_tool.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2009 LSI Corporation. + * + * + * Name: mpi2_tool.h + * Title: MPI diagnostic tool structures and definitions + * Creation Date: March 26, 2007 + * + * mpi2_tool.h Version: 02.00.04 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release + * structures and defines. + * 02-29-08 02.00.02 Modified various names to make them 32-character unique. + * 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool. + * 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request + * and reply messages. + * Added MPI2_DIAG_BUF_TYPE_EXTENDED. + * Incremented MPI2_DIAG_BUF_TYPE_COUNT. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_TOOL_H +#define MPI2_TOOL_H + +/***************************************************************************** +* +* Toolbox Messages +* +*****************************************************************************/ + +/* defines for the Tools */ +#define MPI2_TOOLBOX_CLEAN_TOOL (0x00) +#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01) +#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03) +#define MPI2_TOOLBOX_BEACON_TOOL (0x05) +#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06) + + +/**************************************************************************** +* Toolbox reply +****************************************************************************/ + +typedef struct _MPI2_TOOLBOX_REPLY +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY, + Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t; + + +/**************************************************************************** +* Toolbox Clean Tool request +****************************************************************************/ + +typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U32 Flags; /* 0x0C */ + } MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST, + Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t; + +/* values for the Flags field */ +#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000) +#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000) +#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000) +#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000) +#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000) +#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000) +#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000) +#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004) +#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002) +#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001) + + +/**************************************************************************** +* Toolbox Memory Move request +****************************************************************************/ + +typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */ +} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST, + Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t; + + +/**************************************************************************** +* Toolbox ISTWI Read Write Tool +****************************************************************************/ + +/* Toolbox ISTWI Read Write Tool request message */ +typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U32 Reserved5; /* 0x0C */ + U32 Reserved6; /* 0x10 */ + U8 DevIndex; /* 0x14 */ + U8 Action; /* 0x15 */ + U8 SGLFlags; /* 0x16 */ + U8 Reserved7; /* 0x17 */ + U16 TxDataLength; /* 0x18 */ + U16 RxDataLength; /* 0x1A */ + U32 Reserved8; /* 0x1C */ + U32 Reserved9; /* 0x20 */ + U32 Reserved10; /* 0x24 */ + U32 Reserved11; /* 0x28 */ + U32 Reserved12; /* 0x2C */ + MPI2_SGE_SIMPLE_UNION SGL; /* 0x30 */ +} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST, + MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST, + Mpi2ToolboxIstwiReadWriteRequest_t, + MPI2_POINTER pMpi2ToolboxIstwiReadWriteRequest_t; + +/* values for the Action field */ +#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01) +#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02) +#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03) +#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10) +#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11) +#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12) + +/* values for SGLFlags field are in the SGL section of mpi2.h */ + + +/* Toolbox ISTWI Read Write Tool reply message */ +typedef struct _MPI2_TOOLBOX_ISTWI_REPLY +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U8 DevIndex; /* 0x14 */ + U8 Action; /* 0x15 */ + U8 IstwiStatus; /* 0x16 */ + U8 Reserved6; /* 0x17 */ + U16 TxDataCount; /* 0x18 */ + U16 RxDataCount; /* 0x1A */ +} MPI2_TOOLBOX_ISTWI_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_REPLY, + Mpi2ToolboxIstwiReply_t, MPI2_POINTER pMpi2ToolboxIstwiReply_t; + + +/**************************************************************************** +* Toolbox Beacon Tool request +****************************************************************************/ + +typedef struct _MPI2_TOOLBOX_BEACON_REQUEST +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U8 Reserved5; /* 0x0C */ + U8 PhysicalPort; /* 0x0D */ + U8 Reserved6; /* 0x0E */ + U8 Flags; /* 0x0F */ +} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST, + Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t; + +/* values for the Flags field */ +#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00) +#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01) + + +/**************************************************************************** +* Toolbox Diagnostic CLI Tool +****************************************************************************/ + +#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C) + +/* Toolbox Diagnostic CLI Tool request message */ +typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U8 SGLFlags; /* 0x0C */ + U8 Reserved5; /* 0x0D */ + U16 Reserved6; /* 0x0E */ + U32 DataLength; /* 0x10 */ + U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */ + MPI2_SGE_SIMPLE_UNION SGL; /* 0x70 */ +} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST, + MPI2_POINTER PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST, + Mpi2ToolboxDiagnosticCliRequest_t, + MPI2_POINTER pMpi2ToolboxDiagnosticCliRequest_t; + +/* values for SGLFlags field are in the SGL section of mpi2.h */ + + +/* Toolbox Diagnostic CLI Tool reply message */ +typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY +{ + U8 Tool; /* 0x00 */ + U8 Reserved1; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 ReturnedDataLength; /* 0x14 */ +} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY, + MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY, + Mpi2ToolboxDiagnosticCliReply_t, + MPI2_POINTER pMpi2ToolboxDiagnosticCliReply_t; + + +/***************************************************************************** +* +* Diagnostic Buffer Messages +* +*****************************************************************************/ + + +/**************************************************************************** +* Diagnostic Buffer Post request +****************************************************************************/ + +typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST +{ + U8 ExtendedType; /* 0x00 */ + U8 BufferType; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U64 BufferAddress; /* 0x0C */ + U32 BufferLength; /* 0x14 */ + U32 Reserved5; /* 0x18 */ + U32 Reserved6; /* 0x1C */ + U32 Flags; /* 0x20 */ + U32 ProductSpecific[23]; /* 0x24 */ +} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST, + Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t; + +/* values for the ExtendedType field */ +#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02) + +/* values for the BufferType field */ +#define MPI2_DIAG_BUF_TYPE_TRACE (0x00) +#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01) +#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02) +/* count of the number of buffer types */ +#define MPI2_DIAG_BUF_TYPE_COUNT (0x03) + + +/**************************************************************************** +* Diagnostic Buffer Post reply +****************************************************************************/ + +typedef struct _MPI2_DIAG_BUFFER_POST_REPLY +{ + U8 ExtendedType; /* 0x00 */ + U8 BufferType; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ + U32 TransferLength; /* 0x14 */ +} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY, + Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t; + + +/**************************************************************************** +* Diagnostic Release request +****************************************************************************/ + +typedef struct _MPI2_DIAG_RELEASE_REQUEST +{ + U8 Reserved1; /* 0x00 */ + U8 BufferType; /* 0x01 */ + U8 ChainOffset; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ +} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST, + Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t; + + +/**************************************************************************** +* Diagnostic Buffer Post reply +****************************************************************************/ + +typedef struct _MPI2_DIAG_RELEASE_REPLY +{ + U8 Reserved1; /* 0x00 */ + U8 BufferType; /* 0x01 */ + U8 MsgLength; /* 0x02 */ + U8 Function; /* 0x03 */ + U16 Reserved2; /* 0x04 */ + U8 Reserved3; /* 0x06 */ + U8 MsgFlags; /* 0x07 */ + U8 VP_ID; /* 0x08 */ + U8 VF_ID; /* 0x09 */ + U16 Reserved4; /* 0x0A */ + U16 Reserved5; /* 0x0C */ + U16 IOCStatus; /* 0x0E */ + U32 IOCLogInfo; /* 0x10 */ +} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY, + Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t; + + +#endif + diff -x .svn -urN sys/dev/mps/mpi/mpi2_type.h ../../stable/8/sys/dev/mps/mpi/mpi2_type.h --- sys/dev/mps/mpi/mpi2_type.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpi/mpi2_type.h 2011-01-07 14:33:12.707737251 -0700 @@ -0,0 +1,99 @@ +/* $FreeBSD: stable/8/sys/dev/mps/mpi/mpi2_type.h 212420 2010-09-10 15:03:56Z ken $ */ +/* + * Copyright (c) 2000-2007 LSI Corporation. + * + * + * Name: mpi2_type.h + * Title: MPI basic type definitions + * Creation Date: August 16, 2006 + * + * mpi2_type.h Version: 02.00.00 + * + * Version History + * --------------- + * + * Date Version Description + * -------- -------- ------------------------------------------------------ + * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. + * -------------------------------------------------------------------------- + */ + +#ifndef MPI2_TYPE_H +#define MPI2_TYPE_H + + +/******************************************************************************* + * Define MPI2_POINTER if it hasn't already been defined. By default + * MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as + * a far pointer by defining MPI2_POINTER as "far *" before this header file is + * included. + */ +#ifndef MPI2_POINTER +#define MPI2_POINTER * +#endif + +/* the basic types may have already been included by mpi_type.h */ +#ifndef MPI_TYPE_H +/***************************************************************************** +* +* Basic Types +* +*****************************************************************************/ + +typedef signed char S8; +typedef unsigned char U8; +typedef signed short S16; +typedef unsigned short U16; + +#ifdef __FreeBSD__ + +typedef int32_t S32; +typedef uint32_t U32; + +#else + +#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__PPC__) || defined(__ppc) + + typedef signed int S32; + typedef unsigned int U32; + +#else + + typedef signed long S32; + typedef unsigned long U32; + +#endif +#endif + +typedef struct _S64 +{ + U32 Low; + S32 High; +} S64; + +typedef struct _U64 +{ + U32 Low; + U32 High; +} U64; + + +/***************************************************************************** +* +* Pointer Types +* +*****************************************************************************/ + +typedef S8 *PS8; +typedef U8 *PU8; +typedef S16 *PS16; +typedef U16 *PU16; +typedef S32 *PS32; +typedef U32 *PU32; +typedef S64 *PS64; +typedef U64 *PU64; + +#endif + +#endif + diff -x .svn -urN sys/dev/mps/mps.c ../../stable/8/sys/dev/mps/mps.c --- sys/dev/mps/mps.c 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps.c 2011-01-07 14:37:54.164882195 -0700 @@ -0,0 +1,1821 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD: stable/8/sys/dev/mps/mps.c 212420 2010-09-10 15:03:56Z ken $"); + +/* Communications core for LSI MPT2 */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include + +static void mps_startup(void *arg); +static void mps_startup_complete(struct mps_softc *sc, struct mps_command *cm); +static int mps_send_iocinit(struct mps_softc *sc); +static int mps_attach_log(struct mps_softc *sc); +static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, MPI2_EVENT_NOTIFICATION_REPLY *reply); +static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm); +static void mps_periodic(void *); + +SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters"); + +MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory"); + +/* + * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of + * any state and back to its initialization state machine. + */ +static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d }; + +static int +mps_hard_reset(struct mps_softc *sc) +{ + uint32_t reg; + int i, error, tries = 0; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + /* Clear any pending interrupts */ + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + + /* Push the magic sequence */ + error = ETIMEDOUT; + while (tries++ < 20) { + for (i = 0; i < sizeof(mpt2_reset_magic); i++) + mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, + mpt2_reset_magic[i]); + + DELAY(100 * 1000); + + reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET); + if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) { + error = 0; + break; + } + } + if (error) + return (error); + + /* Send the actual reset. XXX need to refresh the reg? */ + mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET, + reg | MPI2_DIAG_RESET_ADAPTER); + + /* Wait up to 300 seconds in 50ms intervals */ + error = ETIMEDOUT; + for (i = 0; i < 60000; i++) { + DELAY(50000); + reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); + if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) { + error = 0; + break; + } + } + if (error) + return (error); + + mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0); + + return (0); +} + +static int +mps_soft_reset(struct mps_softc *sc) +{ + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + mps_regwrite(sc, MPI2_DOORBELL_OFFSET, + MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET << + MPI2_DOORBELL_FUNCTION_SHIFT); + DELAY(50000); + + return (0); +} + +static int +mps_transition_ready(struct mps_softc *sc) +{ + uint32_t reg, state; + int error, tries = 0; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + error = 0; + while (tries++ < 5) { + reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); + mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg); + + /* + * Ensure the IOC is ready to talk. If it's not, try + * resetting it. + */ + if (reg & MPI2_DOORBELL_USED) { + mps_hard_reset(sc); + DELAY(50000); + continue; + } + + /* Is the adapter owned by another peer? */ + if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) == + (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) { + device_printf(sc->mps_dev, "IOC is under the control " + "of another peer host, aborting initialization.\n"); + return (ENXIO); + } + + state = reg & MPI2_IOC_STATE_MASK; + if (state == MPI2_IOC_STATE_READY) { + /* Ready to go! */ + error = 0; + break; + } else if (state == MPI2_IOC_STATE_FAULT) { + mps_dprint(sc, MPS_INFO, "IOC in fault state 0x%x\n", + state & MPI2_DOORBELL_FAULT_CODE_MASK); + mps_hard_reset(sc); + } else if (state == MPI2_IOC_STATE_OPERATIONAL) { + /* Need to take ownership */ + mps_soft_reset(sc); + } else if (state == MPI2_IOC_STATE_RESET) { + /* Wait a bit, IOC might be in transition */ + mps_dprint(sc, MPS_FAULT, + "IOC in unexpected reset state\n"); + } else { + mps_dprint(sc, MPS_FAULT, + "IOC in unknown state 0x%x\n", state); + error = EINVAL; + break; + } + + /* Wait 50ms for things to settle down. */ + DELAY(50000); + } + + if (error) + device_printf(sc->mps_dev, "Cannot transition IOC to ready\n"); + + return (error); +} + +static int +mps_transition_operational(struct mps_softc *sc) +{ + uint32_t reg, state; + int error; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + error = 0; + reg = mps_regread(sc, MPI2_DOORBELL_OFFSET); + mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg); + + state = reg & MPI2_IOC_STATE_MASK; + if (state != MPI2_IOC_STATE_READY) { + if ((error = mps_transition_ready(sc)) != 0) + return (error); + } + + error = mps_send_iocinit(sc); + return (error); +} + +/* Wait for the chip to ACK a word that we've put into its FIFO */ +static int +mps_wait_db_ack(struct mps_softc *sc) +{ + int retry; + + for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { + if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & + MPI2_HIS_SYS2IOC_DB_STATUS) == 0) + return (0); + DELAY(2000); + } + return (ETIMEDOUT); +} + +/* Wait for the chip to signal that the next word in its FIFO can be fetched */ +static int +mps_wait_db_int(struct mps_softc *sc) +{ + int retry; + + for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) { + if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) & + MPI2_HIS_IOC2SYS_DB_STATUS) != 0) + return (0); + DELAY(2000); + } + return (ETIMEDOUT); +} + +/* Step through the synchronous command state machine, i.e. "Doorbell mode" */ +static int +mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply, + int req_sz, int reply_sz, int timeout) +{ + uint32_t *data32; + uint16_t *data16; + int i, count, ioc_sz, residual; + + /* Step 1 */ + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + + /* Step 2 */ + if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) + return (EBUSY); + + /* Step 3 + * Announce that a message is coming through the doorbell. Messages + * are pushed at 32bit words, so round up if needed. + */ + count = (req_sz + 3) / 4; + mps_regwrite(sc, MPI2_DOORBELL_OFFSET, + (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | + (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT)); + + /* Step 4 */ + if (mps_wait_db_int(sc) || + (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) { + mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n"); + return (ENXIO); + } + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + if (mps_wait_db_ack(sc) != 0) { + mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n"); + return (ENXIO); + } + + /* Step 5 */ + /* Clock out the message data synchronously in 32-bit dwords*/ + data32 = (uint32_t *)req; + for (i = 0; i < count; i++) { + mps_regwrite(sc, MPI2_DOORBELL_OFFSET, data32[i]); + if (mps_wait_db_ack(sc) != 0) { + mps_dprint(sc, MPS_FAULT, + "Timeout while writing doorbell\n"); + return (ENXIO); + } + } + + /* Step 6 */ + /* Clock in the reply in 16-bit words. The total length of the + * message is always in the 4th byte, so clock out the first 2 words + * manually, then loop the rest. + */ + data16 = (uint16_t *)reply; + if (mps_wait_db_int(sc) != 0) { + mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n"); + return (ENXIO); + } + data16[0] = + mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + if (mps_wait_db_int(sc) != 0) { + mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n"); + return (ENXIO); + } + data16[1] = + mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK; + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + + /* Number of 32bit words in the message */ + ioc_sz = reply->MsgLength; + + /* + * Figure out how many 16bit words to clock in without overrunning. + * The precision loss with dividing reply_sz can safely be + * ignored because the messages can only be multiples of 32bits. + */ + residual = 0; + count = MIN((reply_sz / 4), ioc_sz) * 2; + if (count < ioc_sz * 2) { + residual = ioc_sz * 2 - count; + mps_dprint(sc, MPS_FAULT, "Driver error, throwing away %d " + "residual message words\n", residual); + } + + for (i = 2; i < count; i++) { + if (mps_wait_db_int(sc) != 0) { + mps_dprint(sc, MPS_FAULT, + "Timeout reading doorbell %d\n", i); + return (ENXIO); + } + data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) & + MPI2_DOORBELL_DATA_MASK; + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + } + + /* + * Pull out residual words that won't fit into the provided buffer. + * This keeps the chip from hanging due to a driver programming + * error. + */ + while (residual--) { + if (mps_wait_db_int(sc) != 0) { + mps_dprint(sc, MPS_FAULT, + "Timeout reading doorbell\n"); + return (ENXIO); + } + (void)mps_regread(sc, MPI2_DOORBELL_OFFSET); + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + } + + /* Step 7 */ + if (mps_wait_db_int(sc) != 0) { + mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n"); + return (ENXIO); + } + if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) + mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n"); + mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0); + + return (0); +} + +void +mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm) +{ + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET, + cm->cm_desc.Words.Low); + mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET, + cm->cm_desc.Words.High); +} + +int +mps_request_polled(struct mps_softc *sc, struct mps_command *cm) +{ + int error, timeout = 0; + + error = 0; + + cm->cm_flags |= MPS_CM_FLAGS_POLLED; + cm->cm_complete = NULL; + mps_map_command(sc, cm); + + while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) { + mps_intr(sc); + DELAY(50 * 1000); + if (timeout++ > 1000) { + mps_dprint(sc, MPS_FAULT, "polling failed\n"); + error = ETIMEDOUT; + break; + } + } + + return (error); +} + +/* + * Just the FACTS, ma'am. + */ +static int +mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) +{ + MPI2_DEFAULT_REPLY *reply; + MPI2_IOC_FACTS_REQUEST request; + int error, req_sz, reply_sz; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + req_sz = sizeof(MPI2_IOC_FACTS_REQUEST); + reply_sz = sizeof(MPI2_IOC_FACTS_REPLY); + reply = (MPI2_DEFAULT_REPLY *)facts; + + bzero(&request, req_sz); + request.Function = MPI2_FUNCTION_IOC_FACTS; + error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5); + + return (error); +} + +static int +mps_get_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts, int port) +{ + MPI2_PORT_FACTS_REQUEST *request; + MPI2_PORT_FACTS_REPLY *reply; + struct mps_command *cm; + int error; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + if ((cm = mps_alloc_command(sc)) == NULL) + return (EBUSY); + request = (MPI2_PORT_FACTS_REQUEST *)cm->cm_req; + request->Function = MPI2_FUNCTION_PORT_FACTS; + request->PortNumber = port; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_data = NULL; + error = mps_request_polled(sc, cm); + reply = (MPI2_PORT_FACTS_REPLY *)cm->cm_reply; + if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) + error = ENXIO; + bcopy(reply, facts, sizeof(MPI2_PORT_FACTS_REPLY)); + mps_free_command(sc, cm); + + return (error); +} + +static int +mps_send_iocinit(struct mps_softc *sc) +{ + MPI2_IOC_INIT_REQUEST init; + MPI2_DEFAULT_REPLY reply; + int req_sz, reply_sz, error; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + req_sz = sizeof(MPI2_IOC_INIT_REQUEST); + reply_sz = sizeof(MPI2_IOC_INIT_REPLY); + bzero(&init, req_sz); + bzero(&reply, reply_sz); + + /* + * Fill in the init block. Note that most addresses are + * deliberately in the lower 32bits of memory. This is a micro- + * optimzation for PCI/PCIX, though it's not clear if it helps PCIe. + */ + init.Function = MPI2_FUNCTION_IOC_INIT; + init.WhoInit = MPI2_WHOINIT_HOST_DRIVER; + init.MsgVersion = MPI2_VERSION; + init.HeaderVersion = MPI2_HEADER_VERSION; + init.SystemRequestFrameSize = sc->facts->IOCRequestFrameSize; + init.ReplyDescriptorPostQueueDepth = sc->pqdepth; + init.ReplyFreeQueueDepth = sc->fqdepth; + init.SenseBufferAddressHigh = 0; + init.SystemReplyAddressHigh = 0; + init.SystemRequestFrameBaseAddress.High = 0; + init.SystemRequestFrameBaseAddress.Low = (uint32_t)sc->req_busaddr; + init.ReplyDescriptorPostQueueAddress.High = 0; + init.ReplyDescriptorPostQueueAddress.Low = (uint32_t)sc->post_busaddr; + init.ReplyFreeQueueAddress.High = 0; + init.ReplyFreeQueueAddress.Low = (uint32_t)sc->free_busaddr; + init.TimeStamp.High = 0; + init.TimeStamp.Low = (uint32_t)time_uptime; + + error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5); + if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) + error = ENXIO; + + mps_dprint(sc, MPS_INFO, "IOCInit status= 0x%x\n", reply.IOCStatus); + return (error); +} + +static int +mps_send_portenable(struct mps_softc *sc) +{ + MPI2_PORT_ENABLE_REQUEST *request; + struct mps_command *cm; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + if ((cm = mps_alloc_command(sc)) == NULL) + return (EBUSY); + request = (MPI2_PORT_ENABLE_REQUEST *)cm->cm_req; + request->Function = MPI2_FUNCTION_PORT_ENABLE; + request->MsgFlags = 0; + request->VP_ID = 0; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_complete = mps_startup_complete; + + mps_enqueue_request(sc, cm); + return (0); +} + +static int +mps_send_mur(struct mps_softc *sc) +{ + + /* Placeholder */ + return (0); +} + +void +mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + bus_addr_t *addr; + + addr = arg; + *addr = segs[0].ds_addr; +} + +static int +mps_alloc_queues(struct mps_softc *sc) +{ + bus_addr_t queues_busaddr; + uint8_t *queues; + int qsize, fqsize, pqsize; + + /* + * The reply free queue contains 4 byte entries in multiples of 16 and + * aligned on a 16 byte boundary. There must always be an unused entry. + * This queue supplies fresh reply frames for the firmware to use. + * + * The reply descriptor post queue contains 8 byte entries in + * multiples of 16 and aligned on a 16 byte boundary. This queue + * contains filled-in reply frames sent from the firmware to the host. + * + * These two queues are allocated together for simplicity. + */ + sc->fqdepth = roundup2((sc->num_replies + 1), 16); + sc->pqdepth = roundup2((sc->num_replies + 1), 16); + fqsize= sc->fqdepth * 4; + pqsize = sc->pqdepth * 8; + qsize = fqsize + pqsize; + + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 16, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + qsize, /* maxsize */ + 1, /* nsegments */ + qsize, /* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->queues_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n"); + return (ENOMEM); + } + if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT, + &sc->queues_map)) { + device_printf(sc->mps_dev, "Cannot allocate queues memory\n"); + return (ENOMEM); + } + bzero(queues, qsize); + bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize, + mps_memaddr_cb, &queues_busaddr, 0); + + sc->free_queue = (uint32_t *)queues; + sc->free_busaddr = queues_busaddr; + sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize); + sc->post_busaddr = queues_busaddr + fqsize; + + return (0); +} + +static int +mps_alloc_replies(struct mps_softc *sc) +{ + int rsize, num_replies; + + /* + * sc->num_replies should be one less than sc->fqdepth. We need to + * allocate space for sc->fqdepth replies, but only sc->num_replies + * replies can be used at once. + */ + num_replies = max(sc->fqdepth, sc->num_replies); + + rsize = sc->facts->ReplyFrameSize * num_replies * 4; + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 4, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + rsize, /* maxsize */ + 1, /* nsegments */ + rsize, /* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->reply_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n"); + return (ENOMEM); + } + if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames, + BUS_DMA_NOWAIT, &sc->reply_map)) { + device_printf(sc->mps_dev, "Cannot allocate replies memory\n"); + return (ENOMEM); + } + bzero(sc->reply_frames, rsize); + bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize, + mps_memaddr_cb, &sc->reply_busaddr, 0); + + return (0); +} + +static int +mps_alloc_requests(struct mps_softc *sc) +{ + struct mps_command *cm; + struct mps_chain *chain; + int i, rsize, nsegs; + + rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4; + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 16, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + rsize, /* maxsize */ + 1, /* nsegments */ + rsize, /* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->req_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n"); + return (ENOMEM); + } + if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames, + BUS_DMA_NOWAIT, &sc->req_map)) { + device_printf(sc->mps_dev, "Cannot allocate request memory\n"); + return (ENOMEM); + } + bzero(sc->req_frames, rsize); + bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize, + mps_memaddr_cb, &sc->req_busaddr, 0); + + rsize = sc->facts->IOCRequestFrameSize * MPS_CHAIN_FRAMES * 4; + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 16, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + rsize, /* maxsize */ + 1, /* nsegments */ + rsize, /* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->chain_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n"); + return (ENOMEM); + } + if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames, + BUS_DMA_NOWAIT, &sc->chain_map)) { + device_printf(sc->mps_dev, "Cannot allocate chain memory\n"); + return (ENOMEM); + } + bzero(sc->chain_frames, rsize); + bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize, + mps_memaddr_cb, &sc->chain_busaddr, 0); + + rsize = MPS_SENSE_LEN * sc->num_reqs; + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 1, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR_32BIT,/* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + rsize, /* maxsize */ + 1, /* nsegments */ + rsize, /* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->sense_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n"); + return (ENOMEM); + } + if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames, + BUS_DMA_NOWAIT, &sc->sense_map)) { + device_printf(sc->mps_dev, "Cannot allocate sense memory\n"); + return (ENOMEM); + } + bzero(sc->sense_frames, rsize); + bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize, + mps_memaddr_cb, &sc->sense_busaddr, 0); + + sc->chains = malloc(sizeof(struct mps_chain) * MPS_CHAIN_FRAMES, + M_MPT2, M_WAITOK | M_ZERO); + for (i = 0; i < MPS_CHAIN_FRAMES; i++) { + chain = &sc->chains[i]; + chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames + + i * sc->facts->IOCRequestFrameSize * 4); + chain->chain_busaddr = sc->chain_busaddr + + i * sc->facts->IOCRequestFrameSize * 4; + mps_free_chain(sc, chain); + } + + /* XXX Need to pick a more precise value */ + nsegs = (MAXPHYS / PAGE_SIZE) + 1; + if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */ + 1, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ + nsegs, /* nsegments */ + BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ + BUS_DMA_ALLOCNOW, /* flags */ + busdma_lock_mutex, /* lockfunc */ + &sc->mps_mtx, /* lockarg */ + &sc->buffer_dmat)) { + device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n"); + return (ENOMEM); + } + + /* + * SMID 0 cannot be used as a free command per the firmware spec. + * Just drop that command instead of risking accounting bugs. + */ + sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs, + M_MPT2, M_WAITOK | M_ZERO); + for (i = 1; i < sc->num_reqs; i++) { + cm = &sc->commands[i]; + cm->cm_req = sc->req_frames + + i * sc->facts->IOCRequestFrameSize * 4; + cm->cm_req_busaddr = sc->req_busaddr + + i * sc->facts->IOCRequestFrameSize * 4; + cm->cm_sense = &sc->sense_frames[i]; + cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN; + cm->cm_desc.Default.SMID = i; + cm->cm_sc = sc; + TAILQ_INIT(&cm->cm_chain_list); + callout_init(&cm->cm_callout, 1 /*MPSAFE*/); + + /* XXX Is a failure here a critical problem? */ + if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0) + mps_free_command(sc, cm); + else { + sc->num_reqs = i; + break; + } + } + + return (0); +} + +static int +mps_init_queues(struct mps_softc *sc) +{ + int i; + + memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8); + + /* + * According to the spec, we need to use one less reply than we + * have space for on the queue. So sc->num_replies (the number we + * use) should be less than sc->fqdepth (allocated size). + */ + if (sc->num_replies >= sc->fqdepth) + return (EINVAL); + + /* + * Initialize all of the free queue entries. + */ + for (i = 0; i < sc->fqdepth; i++) + sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4); + sc->replyfreeindex = sc->num_replies; + + return (0); +} + +int +mps_attach(struct mps_softc *sc) +{ + int i, error; + char tmpstr[80], tmpstr2[80]; + + /* + * Grab any tunable-set debug level so that tracing works as early + * as possible. + */ + snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.debug_level", + device_get_unit(sc->mps_dev)); + TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug); + snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.allow_multiple_tm_cmds", + device_get_unit(sc->mps_dev)); + TUNABLE_INT_FETCH(tmpstr, &sc->allow_multiple_tm_cmds); + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF); + callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0); + TAILQ_INIT(&sc->event_list); + + /* + * Setup the sysctl variable so the user can change the debug level + * on the fly. + */ + snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d", + device_get_unit(sc->mps_dev)); + snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev)); + + sysctl_ctx_init(&sc->sysctl_ctx); + sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, + SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, CTLFLAG_RD, + 0, tmpstr); + if (sc->sysctl_tree == NULL) + return (ENOMEM); + + SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), + OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0, + "mps debug level"); + + SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), + OID_AUTO, "allow_multiple_tm_cmds", CTLFLAG_RW, + &sc->allow_multiple_tm_cmds, 0, + "allow multiple simultaneous task management cmds"); + + if ((error = mps_transition_ready(sc)) != 0) + return (error); + + sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2, + M_ZERO|M_NOWAIT); + if ((error = mps_get_iocfacts(sc, sc->facts)) != 0) + return (error); + + mps_print_iocfacts(sc, sc->facts); + + mps_printf(sc, "Firmware: %02d.%02d.%02d.%02d\n", + sc->facts->FWVersion.Struct.Major, + sc->facts->FWVersion.Struct.Minor, + sc->facts->FWVersion.Struct.Unit, + sc->facts->FWVersion.Struct.Dev); + mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities, + "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf" + "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR" + "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc"); + + /* + * If the chip doesn't support event replay then a hard reset will be + * required to trigger a full discovery. Do the reset here then + * retransition to Ready. A hard reset might have already been done, + * but it doesn't hurt to do it again. + */ + if ((sc->facts->IOCCapabilities & + MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) { + mps_hard_reset(sc); + if ((error = mps_transition_ready(sc)) != 0) + return (error); + } + + /* + * Size the queues. Since the reply queues always need one free entry, + * we'll just deduct one reply message here. + */ + sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit); + sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES, + sc->facts->MaxReplyDescriptorPostQueueDepth) - 1; + TAILQ_INIT(&sc->req_list); + TAILQ_INIT(&sc->chain_list); + TAILQ_INIT(&sc->tm_list); + + if (((error = mps_alloc_queues(sc)) != 0) || + ((error = mps_alloc_replies(sc)) != 0) || + ((error = mps_alloc_requests(sc)) != 0)) { + mps_free(sc); + return (error); + } + + if (((error = mps_init_queues(sc)) != 0) || + ((error = mps_transition_operational(sc)) != 0)) { + mps_free(sc); + return (error); + } + + /* + * Finish the queue initialization. + * These are set here instead of in mps_init_queues() because the + * IOC resets these values during the state transition in + * mps_transition_operational(). The free index is set to 1 + * because the corresponding index in the IOC is set to 0, and the + * IOC treats the queues as full if both are set to the same value. + * Hence the reason that the queue can't hold all of the possible + * replies. + */ + sc->replypostindex = 0; + mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); + mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0); + + sc->pfacts = malloc(sizeof(MPI2_PORT_FACTS_REPLY) * + sc->facts->NumberOfPorts, M_MPT2, M_ZERO|M_WAITOK); + for (i = 0; i < sc->facts->NumberOfPorts; i++) { + if ((error = mps_get_portfacts(sc, &sc->pfacts[i], i)) != 0) { + mps_free(sc); + return (error); + } + mps_print_portfacts(sc, &sc->pfacts[i]); + } + + /* Attach the subsystems so they can prepare their event masks. */ + /* XXX Should be dynamic so that IM/IR and user modules can attach */ + if (((error = mps_attach_log(sc)) != 0) || + ((error = mps_attach_sas(sc)) != 0) || + ((error = mps_attach_user(sc)) != 0)) { + mps_printf(sc, "%s failed to attach all subsystems: error %d\n", + __func__, error); + mps_free(sc); + return (error); + } + + if ((error = mps_pci_setup_interrupts(sc)) != 0) { + mps_free(sc); + return (error); + } + + /* Start the periodic watchdog check on the IOC Doorbell */ + mps_periodic(sc); + + /* + * The portenable will kick off discovery events that will drive the + * rest of the initialization process. The CAM/SAS module will + * hold up the boot sequence until discovery is complete. + */ + sc->mps_ich.ich_func = mps_startup; + sc->mps_ich.ich_arg = sc; + if (config_intrhook_establish(&sc->mps_ich) != 0) { + mps_dprint(sc, MPS_FAULT, "Cannot establish MPS config hook\n"); + error = EINVAL; + } + + return (error); +} + +static void +mps_startup(void *arg) +{ + struct mps_softc *sc; + + sc = (struct mps_softc *)arg; + + mps_lock(sc); + mps_unmask_intr(sc); + mps_send_portenable(sc); + mps_unlock(sc); +} + +/* Periodic watchdog. Is called with the driver lock already held. */ +static void +mps_periodic(void *arg) +{ + struct mps_softc *sc; + uint32_t db; + + sc = (struct mps_softc *)arg; + if (sc->mps_flags & MPS_FLAGS_SHUTDOWN) + return; + + db = mps_regread(sc, MPI2_DOORBELL_OFFSET); + if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { + device_printf(sc->mps_dev, "IOC Fault 0x%08x, Resetting\n", db); + /* XXX Need to broaden this to re-initialize the chip */ + mps_hard_reset(sc); + db = mps_regread(sc, MPI2_DOORBELL_OFFSET); + if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { + device_printf(sc->mps_dev, "Second IOC Fault 0x%08x, " + "Giving up!\n", db); + return; + } + } + + callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc); +} + +static void +mps_startup_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_PORT_ENABLE_REPLY *reply; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + reply = (MPI2_PORT_ENABLE_REPLY *)cm->cm_reply; + if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) + mps_dprint(sc, MPS_FAULT, "Portenable failed\n"); + + mps_free_command(sc, cm); + config_intrhook_disestablish(&sc->mps_ich); + +} + +static void +mps_log_evt_handler(struct mps_softc *sc, uintptr_t data, + MPI2_EVENT_NOTIFICATION_REPLY *event) +{ + MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry; + + mps_print_event(sc, event); + + switch (event->Event) { + case MPI2_EVENT_LOG_DATA: + device_printf(sc->mps_dev, "MPI2_EVENT_LOG_DATA:\n"); + hexdump(event->EventData, event->EventDataLength, NULL, 0); + break; + case MPI2_EVENT_LOG_ENTRY_ADDED: + entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData; + mps_dprint(sc, MPS_INFO, "MPI2_EVENT_LOG_ENTRY_ADDED event " + "0x%x Sequence %d:\n", entry->LogEntryQualifier, + entry->LogSequence); + break; + default: + break; + } + return; +} + +static int +mps_attach_log(struct mps_softc *sc) +{ + uint8_t events[16]; + + bzero(events, 16); + setbit(events, MPI2_EVENT_LOG_DATA); + setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED); + + mps_register_events(sc, events, mps_log_evt_handler, NULL, + &sc->mps_log_eh); + + return (0); +} + +static int +mps_detach_log(struct mps_softc *sc) +{ + + if (sc->mps_log_eh != NULL) + mps_deregister_events(sc, sc->mps_log_eh); + return (0); +} + +/* + * Free all of the driver resources and detach submodules. Should be called + * without the lock held. + */ +int +mps_free(struct mps_softc *sc) +{ + struct mps_command *cm; + int i, error; + + /* Turn off the watchdog */ + mps_lock(sc); + sc->mps_flags |= MPS_FLAGS_SHUTDOWN; + mps_unlock(sc); + /* Lock must not be held for this */ + callout_drain(&sc->periodic); + + if (((error = mps_detach_log(sc)) != 0) || + ((error = mps_detach_sas(sc)) != 0)) + return (error); + + /* Put the IOC back in the READY state. */ + mps_lock(sc); + if ((error = mps_send_mur(sc)) != 0) { + mps_unlock(sc); + return (error); + } + mps_unlock(sc); + + if (sc->facts != NULL) + free(sc->facts, M_MPT2); + + if (sc->pfacts != NULL) + free(sc->pfacts, M_MPT2); + + if (sc->post_busaddr != 0) + bus_dmamap_unload(sc->queues_dmat, sc->queues_map); + if (sc->post_queue != NULL) + bus_dmamem_free(sc->queues_dmat, sc->post_queue, + sc->queues_map); + if (sc->queues_dmat != NULL) + bus_dma_tag_destroy(sc->queues_dmat); + + if (sc->chain_busaddr != 0) + bus_dmamap_unload(sc->chain_dmat, sc->chain_map); + if (sc->chain_frames != NULL) + bus_dmamem_free(sc->chain_dmat, sc->chain_frames,sc->chain_map); + if (sc->chain_dmat != NULL) + bus_dma_tag_destroy(sc->chain_dmat); + + if (sc->sense_busaddr != 0) + bus_dmamap_unload(sc->sense_dmat, sc->sense_map); + if (sc->sense_frames != NULL) + bus_dmamem_free(sc->sense_dmat, sc->sense_frames,sc->sense_map); + if (sc->sense_dmat != NULL) + bus_dma_tag_destroy(sc->sense_dmat); + + if (sc->reply_busaddr != 0) + bus_dmamap_unload(sc->reply_dmat, sc->reply_map); + if (sc->reply_frames != NULL) + bus_dmamem_free(sc->reply_dmat, sc->reply_frames,sc->reply_map); + if (sc->reply_dmat != NULL) + bus_dma_tag_destroy(sc->reply_dmat); + + if (sc->req_busaddr != 0) + bus_dmamap_unload(sc->req_dmat, sc->req_map); + if (sc->req_frames != NULL) + bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map); + if (sc->req_dmat != NULL) + bus_dma_tag_destroy(sc->req_dmat); + + if (sc->chains != NULL) + free(sc->chains, M_MPT2); + if (sc->commands != NULL) { + for (i = 1; i < sc->num_reqs; i++) { + cm = &sc->commands[i]; + bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap); + } + free(sc->commands, M_MPT2); + } + if (sc->buffer_dmat != NULL) + bus_dma_tag_destroy(sc->buffer_dmat); + + if (sc->sysctl_tree != NULL) + sysctl_ctx_free(&sc->sysctl_ctx); + + mtx_destroy(&sc->mps_mtx); + + return (0); +} + +void +mps_intr(void *data) +{ + struct mps_softc *sc; + uint32_t status; + + sc = (struct mps_softc *)data; + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + /* + * Check interrupt status register to flush the bus. This is + * needed for both INTx interrupts and driver-driven polling + */ + status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET); + if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0) + return; + + mps_lock(sc); + mps_intr_locked(data); + mps_unlock(sc); + return; +} + +/* + * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the + * chip. Hopefully this theory is correct. + */ +void +mps_intr_msi(void *data) +{ + struct mps_softc *sc; + + sc = (struct mps_softc *)data; + mps_lock(sc); + mps_intr_locked(data); + mps_unlock(sc); + return; +} + +/* + * The locking is overly broad and simplistic, but easy to deal with for now. + */ +void +mps_intr_locked(void *data) +{ + MPI2_REPLY_DESCRIPTORS_UNION *desc; + struct mps_softc *sc; + struct mps_command *cm = NULL; + uint8_t flags; + u_int pq; + + sc = (struct mps_softc *)data; + + pq = sc->replypostindex; + + for ( ;; ) { + cm = NULL; + desc = &sc->post_queue[pq]; + flags = desc->Default.ReplyFlags & + MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; + if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) + || (desc->Words.High == 0xffffffff)) + break; + + switch (flags) { + case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS: + cm = &sc->commands[desc->SCSIIOSuccess.SMID]; + cm->cm_reply = NULL; + break; + case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY: + { + uint32_t baddr; + uint8_t *reply; + + /* + * Re-compose the reply address from the address + * sent back from the chip. The ReplyFrameAddress + * is the lower 32 bits of the physical address of + * particular reply frame. Convert that address to + * host format, and then use that to provide the + * offset against the virtual address base + * (sc->reply_frames). + */ + baddr = le32toh(desc->AddressReply.ReplyFrameAddress); + reply = sc->reply_frames + + (baddr - ((uint32_t)sc->reply_busaddr)); + /* + * Make sure the reply we got back is in a valid + * range. If not, go ahead and panic here, since + * we'll probably panic as soon as we deference the + * reply pointer anyway. + */ + if ((reply < sc->reply_frames) + || (reply > (sc->reply_frames + + (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) { + printf("%s: WARNING: reply %p out of range!\n", + __func__, reply); + printf("%s: reply_frames %p, fqdepth %d, " + "frame size %d\n", __func__, + sc->reply_frames, sc->fqdepth, + sc->facts->ReplyFrameSize * 4); + printf("%s: baddr %#x,\n", __func__, baddr); + panic("Reply address out of range"); + } + if (desc->AddressReply.SMID == 0) { + mps_dispatch_event(sc, baddr, + (MPI2_EVENT_NOTIFICATION_REPLY *) reply); + } else { + cm = &sc->commands[desc->AddressReply.SMID]; + cm->cm_reply = reply; + cm->cm_reply_data = + desc->AddressReply.ReplyFrameAddress; + } + break; + } + case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS: + case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER: + case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS: + default: + /* Unhandled */ + device_printf(sc->mps_dev, "Unhandled reply 0x%x\n", + desc->Default.ReplyFlags); + cm = NULL; + break; + } + + if (cm != NULL) { + if (cm->cm_flags & MPS_CM_FLAGS_POLLED) + cm->cm_flags |= MPS_CM_FLAGS_COMPLETE; + + if (cm->cm_complete != NULL) + cm->cm_complete(sc, cm); + + if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) + wakeup(cm); + } + + desc->Words.Low = 0xffffffff; + desc->Words.High = 0xffffffff; + if (++pq >= sc->pqdepth) + pq = 0; + } + + if (pq != sc->replypostindex) { + mps_dprint(sc, MPS_INFO, "writing postindex %d\n", pq); + mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, pq); + sc->replypostindex = pq; + } + + return; +} + +static void +mps_dispatch_event(struct mps_softc *sc, uintptr_t data, + MPI2_EVENT_NOTIFICATION_REPLY *reply) +{ + struct mps_event_handle *eh; + int event, handled = 0; + + event = reply->Event; + TAILQ_FOREACH(eh, &sc->event_list, eh_list) { + if (isset(eh->mask, event)) { + eh->callback(sc, data, reply); + handled++; + } + } + + if (handled == 0) + device_printf(sc->mps_dev, "Unhandled event 0x%x\n", event); +} + +/* + * For both register_events and update_events, the caller supplies a bitmap + * of events that it _wants_. These functions then turn that into a bitmask + * suitable for the controller. + */ +int +mps_register_events(struct mps_softc *sc, uint8_t *mask, + mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle) +{ + struct mps_event_handle *eh; + int error = 0; + + eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO); + eh->callback = cb; + eh->data = data; + TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list); + if (mask != NULL) + error = mps_update_events(sc, eh, mask); + *handle = eh; + + return (error); +} + +int +mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle, + uint8_t *mask) +{ + MPI2_EVENT_NOTIFICATION_REQUEST *evtreq; + MPI2_EVENT_NOTIFICATION_REPLY *reply; + struct mps_command *cm; + struct mps_event_handle *eh; + int error, i; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + if ((mask != NULL) && (handle != NULL)) + bcopy(mask, &handle->mask[0], 16); + memset(sc->event_mask, 0xff, 16); + + TAILQ_FOREACH(eh, &sc->event_list, eh_list) { + for (i = 0; i < 16; i++) + sc->event_mask[i] &= ~eh->mask[i]; + } + + if ((cm = mps_alloc_command(sc)) == NULL) + return (EBUSY); + evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req; + evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; + evtreq->MsgFlags = 0; + evtreq->SASBroadcastPrimitiveMasks = 0; +#ifdef MPS_DEBUG_ALL_EVENTS + { + u_char fullmask[16]; + memset(fullmask, 0x00, 16); + bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16); + } +#else + bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16); +#endif + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_data = NULL; + + error = mps_request_polled(sc, cm); + reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply; + if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) + error = ENXIO; + mps_print_event(sc, reply); + + mps_free_command(sc, cm); + return (error); +} + +int +mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle) +{ + + TAILQ_REMOVE(&sc->event_list, handle, eh_list); + free(handle, M_MPT2); + return (mps_update_events(sc, NULL, NULL)); +} + +/* + * Add a chain element as the next SGE for the specified command. + * Reset cm_sge and cm_sgesize to indicate all the available space. + */ +static int +mps_add_chain(struct mps_command *cm) +{ + MPI2_SGE_CHAIN32 *sgc; + struct mps_chain *chain; + int space; + + if (cm->cm_sglsize < MPS_SGC_SIZE) + panic("MPS: Need SGE Error Code\n"); + + chain = mps_alloc_chain(cm->cm_sc); + if (chain == NULL) + return (ENOBUFS); + + space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; + + /* + * Note: a double-linked list is used to make it easier to + * walk for debugging. + */ + TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link); + + sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain; + sgc->Length = space; + sgc->NextChainOffset = 0; + sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT; + sgc->Address = chain->chain_busaddr; + + cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple; + cm->cm_sglsize = space; + return (0); +} + +/* + * Add one scatter-gather element (chain, simple, transaction context) + * to the scatter-gather list for a command. Maintain cm_sglsize and + * cm_sge as the remaining size and pointer to the next SGE to fill + * in, respectively. + */ +int +mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft) +{ + MPI2_SGE_TRANSACTION_UNION *tc = sgep; + MPI2_SGE_SIMPLE64 *sge = sgep; + int error, type; + + type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK); + +#ifdef INVARIANTS + switch (type) { + case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: { + if (len != tc->DetailsLength + 4) + panic("TC %p length %u or %zu?", tc, + tc->DetailsLength + 4, len); + } + break; + case MPI2_SGE_FLAGS_CHAIN_ELEMENT: + /* Driver only uses 32-bit chain elements */ + if (len != MPS_SGC_SIZE) + panic("CHAIN %p length %u or %zu?", sgep, + MPS_SGC_SIZE, len); + break; + case MPI2_SGE_FLAGS_SIMPLE_ELEMENT: + /* Driver only uses 64-bit SGE simple elements */ + sge = sgep; + if (len != MPS_SGE64_SIZE) + panic("SGE simple %p length %u or %zu?", sge, + MPS_SGE64_SIZE, len); + if (((sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT) & + MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0) + panic("SGE simple %p flags %02x not marked 64-bit?", + sge, sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT); + + break; + default: + panic("Unexpected SGE %p, flags %02x", tc, tc->Flags); + } +#endif + + /* + * case 1: 1 more segment, enough room for it + * case 2: 2 more segments, enough room for both + * case 3: >=2 more segments, only enough room for 1 and a chain + * case 4: >=1 more segment, enough room for only a chain + * case 5: >=1 more segment, no room for anything (error) + */ + + /* + * There should be room for at least a chain element, or this + * code is buggy. Case (5). + */ + if (cm->cm_sglsize < MPS_SGC_SIZE) + panic("MPS: Need SGE Error Code\n"); + + if (segsleft >= 2 && + cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) { + /* + * There are 2 or more segments left to add, and only + * enough room for 1 and a chain. Case (3). + * + * Mark as last element in this chain if necessary. + */ + if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { + sge->FlagsLength |= + (MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT); + } + + /* + * Add the item then a chain. Do the chain now, + * rather than on the next iteration, to simplify + * understanding the code. + */ + cm->cm_sglsize -= len; + bcopy(sgep, cm->cm_sge, len); + cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); + return (mps_add_chain(cm)); + } + + if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) { + /* + * 1 or more segment, enough room for only a chain. + * Hope the previous element wasn't a Simple entry + * that needed to be marked with + * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4). + */ + if ((error = mps_add_chain(cm)) != 0) + return (error); + } + +#ifdef INVARIANTS + /* Case 1: 1 more segment, enough room for it. */ + if (segsleft == 1 && cm->cm_sglsize < len) + panic("1 seg left and no room? %u versus %zu", + cm->cm_sglsize, len); + + /* Case 2: 2 more segments, enough room for both */ + if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE) + panic("2 segs left and no room? %u versus %zu", + cm->cm_sglsize, len); +#endif + + if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) { + /* + * Last element of the last segment of the entire + * buffer. + */ + sge->FlagsLength |= ((MPI2_SGE_FLAGS_LAST_ELEMENT | + MPI2_SGE_FLAGS_END_OF_BUFFER | + MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT); + } + + cm->cm_sglsize -= len; + bcopy(sgep, cm->cm_sge, len); + cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len); + return (0); +} + +/* + * Add one dma segment to the scatter-gather list for a command. + */ +int +mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags, + int segsleft) +{ + MPI2_SGE_SIMPLE64 sge; + + /* + * This driver always uses 64-bit address elements for + * simplicity. + */ + flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | MPI2_SGE_FLAGS_ADDRESS_SIZE; + sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT); + mps_from_u64(pa, &sge.Address); + + return (mps_push_sge(cm, &sge, sizeof sge, segsleft)); +} + +static void +mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + struct mps_softc *sc; + struct mps_command *cm; + u_int i, dir, sflags; + + cm = (struct mps_command *)arg; + sc = cm->cm_sc; + + /* + * In this case, just print out a warning and let the chip tell the + * user they did the wrong thing. + */ + if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) { + mps_printf(sc, "%s: warning: busdma returned %d segments, " + "more than the %d allowed\n", __func__, nsegs, + cm->cm_max_segs); + } + + /* + * Set up DMA direction flags. Note that we don't support + * bi-directional transfers, with the exception of SMP passthrough. + */ + sflags = 0; + if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) { + /* + * We have to add a special case for SMP passthrough, there + * is no easy way to generically handle it. The first + * S/G element is used for the command (therefore the + * direction bit needs to be set). The second one is used + * for the reply. We'll leave it to the caller to make + * sure we only have two buffers. + */ + /* + * Even though the busdma man page says it doesn't make + * sense to have both direction flags, it does in this case. + * We have one s/g element being accessed in each direction. + */ + dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD; + + /* + * Set the direction flag on the first buffer in the SMP + * passthrough request. We'll clear it for the second one. + */ + sflags |= MPI2_SGE_FLAGS_DIRECTION | + MPI2_SGE_FLAGS_END_OF_BUFFER; + } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) { + sflags |= MPI2_SGE_FLAGS_DIRECTION; + dir = BUS_DMASYNC_PREWRITE; + } else + dir = BUS_DMASYNC_PREREAD; + + for (i = 0; i < nsegs; i++) { + if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) + && (i != 0)) { + sflags &= ~MPI2_SGE_FLAGS_DIRECTION; + } + error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len, + sflags, nsegs - i); + if (error != 0) { + /* Resource shortage, roll back! */ + mps_printf(sc, "out of chain frames\n"); + return; + } + } + + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); + mps_enqueue_request(sc, cm); + + return; +} + +static void +mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, + int error) +{ + mps_data_cb(arg, segs, nsegs, error); +} + +/* + * Note that the only error path here is from bus_dmamap_load(), which can + * return EINPROGRESS if it is waiting for resources. + */ +int +mps_map_command(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SGE_SIMPLE32 *sge; + int error = 0; + + if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) { + error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap, + &cm->cm_uio, mps_data_cb2, cm, 0); + } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) { + error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap, + cm->cm_data, cm->cm_length, mps_data_cb, cm, 0); + } else { + /* Add a zero-length element as needed */ + if (cm->cm_sge != NULL) { + sge = (MPI2_SGE_SIMPLE32 *)cm->cm_sge; + sge->FlagsLength = (MPI2_SGE_FLAGS_LAST_ELEMENT | + MPI2_SGE_FLAGS_END_OF_BUFFER | + MPI2_SGE_FLAGS_END_OF_LIST | + MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << + MPI2_SGE_FLAGS_SHIFT; + sge->Address = 0; + } + mps_enqueue_request(sc, cm); + } + + return (error); +} + +/* + * The MPT driver had a verbose interface for config pages. In this driver, + * reduce it to much simplier terms, similar to the Linux driver. + */ +int +mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params) +{ + MPI2_CONFIG_REQUEST *req; + struct mps_command *cm; + int error; + + if (sc->mps_flags & MPS_FLAGS_BUSY) { + return (EBUSY); + } + + cm = mps_alloc_command(sc); + if (cm == NULL) { + return (EBUSY); + } + + req = (MPI2_CONFIG_REQUEST *)cm->cm_req; + req->Function = MPI2_FUNCTION_CONFIG; + req->Action = params->action; + req->SGLFlags = 0; + req->ChainOffset = 0; + req->PageAddress = params->page_address; + if (params->hdr.Ext.ExtPageType != 0) { + MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; + + hdr = ¶ms->hdr.Ext; + req->ExtPageType = hdr->ExtPageType; + req->ExtPageLength = hdr->ExtPageLength; + req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; + req->Header.PageLength = 0; /* Must be set to zero */ + req->Header.PageNumber = hdr->PageNumber; + req->Header.PageVersion = hdr->PageVersion; + } else { + MPI2_CONFIG_PAGE_HEADER *hdr; + + hdr = ¶ms->hdr.Struct; + req->Header.PageType = hdr->PageType; + req->Header.PageNumber = hdr->PageNumber; + req->Header.PageLength = hdr->PageLength; + req->Header.PageVersion = hdr->PageVersion; + } + + cm->cm_data = params->buffer; + cm->cm_length = params->length; + cm->cm_sge = &req->PageBufferSGE; + cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); + cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + + cm->cm_complete_data = params; + if (params->callback != NULL) { + cm->cm_complete = mps_config_complete; + return (mps_map_command(sc, cm)); + } else { + cm->cm_complete = NULL; + cm->cm_flags |= MPS_CM_FLAGS_WAKEUP; + if ((error = mps_map_command(sc, cm)) != 0) + return (error); + msleep(cm, &sc->mps_mtx, 0, "mpswait", 0); + mps_config_complete(sc, cm); + } + + return (0); +} + +int +mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params) +{ + return (EINVAL); +} + +static void +mps_config_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_CONFIG_REPLY *reply; + struct mps_config_params *params; + + params = cm->cm_complete_data; + + if (cm->cm_data != NULL) { + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, + BUS_DMASYNC_POSTREAD); + bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); + } + + reply = (MPI2_CONFIG_REPLY *)cm->cm_reply; + params->status = reply->IOCStatus; + if (params->hdr.Ext.ExtPageType != 0) { + params->hdr.Ext.ExtPageType = reply->ExtPageType; + params->hdr.Ext.ExtPageLength = reply->ExtPageLength; + } else { + params->hdr.Struct.PageType = reply->Header.PageType; + params->hdr.Struct.PageNumber = reply->Header.PageNumber; + params->hdr.Struct.PageLength = reply->Header.PageLength; + params->hdr.Struct.PageVersion = reply->Header.PageVersion; + } + + mps_free_command(sc, cm); + if (params->callback != NULL) + params->callback(sc, params); + + return; +} diff -x .svn -urN sys/dev/mps/mps_ioctl.h ../../stable/8/sys/dev/mps/mps_ioctl.h --- sys/dev/mps/mps_ioctl.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_ioctl.h 2011-01-07 14:33:43.864929596 -0700 @@ -0,0 +1,106 @@ +/*- + * Copyright (c) 2008 Yahoo!, Inc. + * All rights reserved. + * Written by: John Baldwin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * LSI MPT-Fusion Host Adapter FreeBSD userland interface + * + * $FreeBSD: stable/8/sys/dev/mps/mps_ioctl.h 212420 2010-09-10 15:03:56Z ken $ + */ + +#ifndef _MPS_IOCTL_H_ +#define _MPS_IOCTL_H_ + +#include +#include +#include +#include + +/* + * For the read header requests, the header should include the page + * type or extended page type, page number, and page version. The + * buffer and length are unused. The completed header is returned in + * the 'header' member. + * + * For the read page and write page requests, 'buf' should point to a + * buffer of 'len' bytes which holds the entire page (including the + * header). + * + * All requests specify the page address in 'page_address'. + */ +struct mps_cfg_page_req { + MPI2_CONFIG_PAGE_HEADER header; + uint32_t page_address; + void *buf; + int len; + uint16_t ioc_status; +}; + +struct mps_ext_cfg_page_req { + MPI2_CONFIG_EXTENDED_PAGE_HEADER header; + uint32_t page_address; + void *buf; + int len; + uint16_t ioc_status; +}; + +struct mps_raid_action { + uint8_t action; + uint8_t volume_bus; + uint8_t volume_id; + uint8_t phys_disk_num; + uint32_t action_data_word; + void *buf; + int len; + uint32_t volume_status; + uint32_t action_data[4]; + uint16_t action_status; + uint16_t ioc_status; + uint8_t write; +}; + +struct mps_usr_command { + void *req; + uint32_t req_len; + void *rpl; + uint32_t rpl_len; + void *buf; + int len; + uint32_t flags; +}; + +#define MPSIO_MPS_COMMAND_FLAG_VERBOSE 0x01 +#define MPSIO_MPS_COMMAND_FLAG_DEBUG 0x02 +#define MPSIO_READ_CFG_HEADER _IOWR('M', 200, struct mps_cfg_page_req) +#define MPSIO_READ_CFG_PAGE _IOWR('M', 201, struct mps_cfg_page_req) +#define MPSIO_READ_EXT_CFG_HEADER _IOWR('M', 202, struct mps_ext_cfg_page_req) +#define MPSIO_READ_EXT_CFG_PAGE _IOWR('M', 203, struct mps_ext_cfg_page_req) +#define MPSIO_WRITE_CFG_PAGE _IOWR('M', 204, struct mps_cfg_page_req) +#define MPSIO_RAID_ACTION _IOWR('M', 205, struct mps_raid_action) +#define MPSIO_MPS_COMMAND _IOWR('M', 210, struct mps_usr_command) + +#endif /* !_MPS_IOCTL_H_ */ diff -x .svn -urN sys/dev/mps/mps_pci.c ../../stable/8/sys/dev/mps/mps_pci.c --- sys/dev/mps/mps_pci.c 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_pci.c 2011-01-07 14:36:19.527671382 -0700 @@ -0,0 +1,365 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD: stable/8/sys/dev/mps/mps_pci.c 212420 2010-09-10 15:03:56Z ken $"); + +/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include + +static int mps_pci_probe(device_t); +static int mps_pci_attach(device_t); +static int mps_pci_detach(device_t); +static int mps_pci_suspend(device_t); +static int mps_pci_resume(device_t); +static void mps_pci_free(struct mps_softc *); +static int mps_alloc_msix(struct mps_softc *sc, int msgs); +static int mps_alloc_msi(struct mps_softc *sc, int msgs); + +int mps_disable_msix = 0; +TUNABLE_INT("hw.mps.disable_msix", &mps_disable_msix); +SYSCTL_INT(_hw_mps, OID_AUTO, disable_msix, CTLFLAG_RD, &mps_disable_msix, 0, + "Disable MSIX interrupts\n"); +int mps_disable_msi = 0; +TUNABLE_INT("hw.mps.disable_msi", &mps_disable_msi); +SYSCTL_INT(_hw_mps, OID_AUTO, disable_msi, CTLFLAG_RD, &mps_disable_msi, 0, + "Disable MSI interrupts\n"); + +static device_method_t mps_methods[] = { + DEVMETHOD(device_probe, mps_pci_probe), + DEVMETHOD(device_attach, mps_pci_attach), + DEVMETHOD(device_detach, mps_pci_detach), + DEVMETHOD(device_suspend, mps_pci_suspend), + DEVMETHOD(device_resume, mps_pci_resume), + DEVMETHOD(bus_print_child, bus_generic_print_child), + DEVMETHOD(bus_driver_added, bus_generic_driver_added), + { 0, 0 } +}; + +static driver_t mps_pci_driver = { + "mps", + mps_methods, + sizeof(struct mps_softc) +}; + +static devclass_t mps_devclass; +DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); + +struct mps_ident { + uint16_t vendor; + uint16_t device; + uint16_t subvendor; + uint16_t subdevice; + u_int flags; + const char *desc; +} mps_identifiers[] = { + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, + 0xffff, 0xffff, 0, "LSI SAS2004" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, + 0xffff, 0xffff, 0, "LSI SAS2008" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, + 0xffff, 0xffff, 0, "LSI SAS2108" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, + 0xffff, 0xffff, 0, "LSI SAS2108" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, + 0xffff, 0xffff, 0, "LSI SAS2108" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, + 0xffff, 0xffff, 0, "LSI SAS2116" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, + 0xffff, 0xffff, 0, "LSI SAS2116" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_7, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_8, + 0xffff, 0xffff, 0, "LSI SAS2208" }, + { 0, 0, 0, 0, 0, NULL } +}; + +static struct mps_ident * +mps_find_ident(device_t dev) +{ + struct mps_ident *m; + + for (m = mps_identifiers; m->vendor != 0; m++) { + if (m->vendor != pci_get_vendor(dev)) + continue; + if (m->device != pci_get_device(dev)) + continue; + if ((m->subvendor != 0xffff) && + (m->subvendor != pci_get_subvendor(dev))) + continue; + if ((m->subdevice != 0xffff) && + (m->subdevice != pci_get_subdevice(dev))) + continue; + return (m); + } + + return (NULL); +} + +static int +mps_pci_probe(device_t dev) +{ + struct mps_ident *id; + + if ((id = mps_find_ident(dev)) != NULL) { + device_set_desc(dev, id->desc); + return (BUS_PROBE_DEFAULT); + } + return (ENXIO); +} + +static int +mps_pci_attach(device_t dev) +{ + struct mps_softc *sc; + struct mps_ident *m; + uint16_t command; + int error; + + sc = device_get_softc(dev); + bzero(sc, sizeof(*sc)); + sc->mps_dev = dev; + m = mps_find_ident(dev); + sc->mps_flags = m->flags; + + /* Twiddle basic PCI config bits for a sanity check */ + command = pci_read_config(dev, PCIR_COMMAND, 2); + command |= PCIM_CMD_BUSMASTEREN; + pci_write_config(dev, PCIR_COMMAND, command, 2); + command = pci_read_config(dev, PCIR_COMMAND, 2); + if ((command & PCIM_CMD_BUSMASTEREN) == 0) { + device_printf(dev, "Cannot enable PCI busmaster\n"); + return (ENXIO); + } + if ((command & PCIM_CMD_MEMEN) == 0) { + device_printf(dev, "PCI memory window not available\n"); + return (ENXIO); + } + + /* Allocate the System Interface Register Set */ + sc->mps_regs_rid = PCIR_BAR(1); + if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, + SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { + device_printf(dev, "Cannot allocate PCI registers\n"); + return (ENXIO); + } + sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); + sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); + + /* Allocate the parent DMA tag */ + if (bus_dma_tag_create( NULL, /* parent */ + 1, 0, /* algnmnt, boundary */ + BUS_SPACE_MAXADDR, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ + BUS_SPACE_UNRESTRICTED, /* nsegments */ + BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ + 0, /* flags */ + NULL, NULL, /* lockfunc, lockarg */ + &sc->mps_parent_dmat)) { + device_printf(dev, "Cannot allocate parent DMA tag\n"); + mps_pci_free(sc); + return (ENOMEM); + } + + if ((error = mps_attach(sc)) != 0) + mps_pci_free(sc); + + return (error); +} + +int +mps_pci_setup_interrupts(struct mps_softc *sc) +{ + device_t dev; + int i, error, msgs; + + dev = sc->mps_dev; + error = ENXIO; + if ((mps_disable_msix == 0) && + ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT)) + error = mps_alloc_msix(sc, MPS_MSI_COUNT); + if ((error != 0) && (mps_disable_msi == 0) && + ((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT)) + error = mps_alloc_msi(sc, MPS_MSI_COUNT); + + if (error != 0) { + sc->mps_flags |= MPS_FLAGS_INTX; + sc->mps_irq_rid[0] = 0; + sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->mps_irq_rid[0], RF_SHAREABLE | RF_ACTIVE); + if (sc->mps_irq[0] == NULL) { + device_printf(dev, "Cannot allocate INTx interrupt\n"); + return (ENXIO); + } + error = bus_setup_intr(dev, sc->mps_irq[0], + INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc, + &sc->mps_intrhand[0]); + if (error) + device_printf(dev, "Cannot setup INTx interrupt\n"); + } else { + sc->mps_flags |= MPS_FLAGS_MSI; + for (i = 0; i < MPS_MSI_COUNT; i++) { + sc->mps_irq_rid[i] = i + 1; + sc->mps_irq[i] = bus_alloc_resource_any(dev, + SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE); + if (sc->mps_irq[i] == NULL) { + device_printf(dev, + "Cannot allocate MSI interrupt\n"); + return (ENXIO); + } + error = bus_setup_intr(dev, sc->mps_irq[i], + INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi, + sc, &sc->mps_intrhand[i]); + if (error) { + device_printf(dev, + "Cannot setup MSI interrupt %d\n", i); + break; + } + } + } + + return (error); +} + +static int +mps_pci_detach(device_t dev) +{ + struct mps_softc *sc; + int error; + + sc = device_get_softc(dev); + + if ((error = mps_free(sc)) != 0) + return (error); + + mps_pci_free(sc); + return (0); +} + +static void +mps_pci_free(struct mps_softc *sc) +{ + int i; + + if (sc->mps_parent_dmat != NULL) { + bus_dma_tag_destroy(sc->mps_parent_dmat); + } + + if (sc->mps_flags & MPS_FLAGS_MSI) { + for (i = 0; i < MPS_MSI_COUNT; i++) { + if (sc->mps_irq[i] != NULL) { + bus_teardown_intr(sc->mps_dev, sc->mps_irq[i], + sc->mps_intrhand[i]); + bus_release_resource(sc->mps_dev, SYS_RES_IRQ, + sc->mps_irq_rid[i], sc->mps_irq[i]); + } + } + pci_release_msi(sc->mps_dev); + } + + if (sc->mps_flags & MPS_FLAGS_INTX) { + bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], + sc->mps_intrhand[0]); + bus_release_resource(sc->mps_dev, SYS_RES_IRQ, + sc->mps_irq_rid[0], sc->mps_irq[0]); + } + + if (sc->mps_regs_resource != NULL) { + bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, + sc->mps_regs_rid, sc->mps_regs_resource); + } + + return; +} + +static int +mps_pci_suspend(device_t dev) +{ + return (EINVAL); +} + +static int +mps_pci_resume(device_t dev) +{ + return (EINVAL); +} + +static int +mps_alloc_msix(struct mps_softc *sc, int msgs) +{ + int error; + + error = pci_alloc_msix(sc->mps_dev, &msgs); + return (error); +} + +static int +mps_alloc_msi(struct mps_softc *sc, int msgs) +{ + int error; + + error = pci_alloc_msi(sc->mps_dev, &msgs); + return (error); +} + diff -x .svn -urN sys/dev/mps/mps_sas.c ../../stable/8/sys/dev/mps/mps_sas.c --- sys/dev/mps/mps_sas.c 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_sas.c 2011-01-07 14:38:00.422301954 -0700 @@ -0,0 +1,2007 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD: stable/8/sys/dev/mps/mps_sas.c 212420 2010-09-10 15:03:56Z ken $"); + +/* Communications core for LSI MPT2 */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if __FreeBSD_version >= 900026 +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include + +struct mpssas_target { + uint16_t handle; + uint8_t linkrate; + uint64_t devname; + uint64_t sasaddr; + uint32_t devinfo; + uint16_t encl_handle; + uint16_t encl_slot; + uint16_t parent_handle; + int flags; +#define MPSSAS_TARGET_INABORT (1 << 0) +#define MPSSAS_TARGET_INRESET (1 << 1) +#define MPSSAS_TARGET_INCHIPRESET (1 << 2) +#define MPSSAS_TARGET_INRECOVERY 0x7 + uint16_t tid; +}; + +struct mpssas_softc { + struct mps_softc *sc; + u_int flags; +#define MPSSAS_IN_DISCOVERY (1 << 0) +#define MPSSAS_IN_STARTUP (1 << 1) +#define MPSSAS_DISCOVERY_TIMEOUT_PENDING (1 << 2) +#define MPSSAS_QUEUE_FROZEN (1 << 3) + struct mpssas_target *targets; + struct cam_devq *devq; + struct cam_sim *sim; + struct cam_path *path; + struct intr_config_hook sas_ich; + struct callout discovery_callout; + u_int discovery_timeouts; + struct mps_event_handle *mpssas_eh; +}; + +struct mpssas_devprobe { + struct mps_config_params params; + u_int state; +#define MPSSAS_PROBE_DEV1 0x01 +#define MPSSAS_PROBE_DEV2 0x02 +#define MPSSAS_PROBE_PHY 0x03 +#define MPSSAS_PROBE_EXP 0x04 +#define MPSSAS_PROBE_PHY2 0x05 +#define MPSSAS_PROBE_EXP2 0x06 + struct mpssas_target target; +}; + +#define MPSSAS_DISCOVERY_TIMEOUT 20 +#define MPSSAS_MAX_DISCOVERY_TIMEOUTS 10 /* 200 seconds */ + +MALLOC_DEFINE(M_MPSSAS, "MPSSAS", "MPS SAS memory"); + +static __inline int mpssas_set_lun(uint8_t *lun, u_int ccblun); +static struct mpssas_target * mpssas_alloc_target(struct mpssas_softc *, + struct mpssas_target *); +static struct mpssas_target * mpssas_find_target(struct mpssas_softc *, int, + uint16_t); +static void mpssas_announce_device(struct mpssas_softc *, + struct mpssas_target *); +static void mpssas_startup(void *data); +static void mpssas_discovery_end(struct mpssas_softc *sassc); +static void mpssas_discovery_timeout(void *data); +static void mpssas_prepare_remove(struct mpssas_softc *, + MPI2_EVENT_SAS_TOPO_PHY_ENTRY *); +static void mpssas_remove_device(struct mps_softc *, struct mps_command *); +static void mpssas_remove_complete(struct mps_softc *, struct mps_command *); +static void mpssas_action(struct cam_sim *sim, union ccb *ccb); +static void mpssas_poll(struct cam_sim *sim); +static void mpssas_probe_device(struct mps_softc *sc, uint16_t handle); +static void mpssas_probe_device_complete(struct mps_softc *sc, + struct mps_config_params *params); +static void mpssas_scsiio_timeout(void *data); +static void mpssas_abort_complete(struct mps_softc *sc, struct mps_command *cm); +static void mpssas_recovery(struct mps_softc *, struct mps_command *); +static int mpssas_map_tm_request(struct mps_softc *sc, struct mps_command *cm); +static void mpssas_issue_tm_request(struct mps_softc *sc, + struct mps_command *cm); +static void mpssas_tm_complete(struct mps_softc *sc, struct mps_command *cm, + int error); +static int mpssas_complete_tm_request(struct mps_softc *sc, + struct mps_command *cm, int free_cm); +static void mpssas_action_scsiio(struct mpssas_softc *, union ccb *); +static void mpssas_scsiio_complete(struct mps_softc *, struct mps_command *); +#if __FreeBSD_version >= 900026 +static void mpssas_smpio_complete(struct mps_softc *sc, struct mps_command *cm); +static void mpssas_send_smpcmd(struct mpssas_softc *sassc, union ccb *ccb, + uint64_t sasaddr); +static void mpssas_action_smpio(struct mpssas_softc *sassc, union ccb *ccb); +#endif /* __FreeBSD_version >= 900026 */ +static void mpssas_resetdev(struct mpssas_softc *, struct mps_command *); +static void mpssas_action_resetdev(struct mpssas_softc *, union ccb *); +static void mpssas_resetdev_complete(struct mps_softc *, struct mps_command *); +static void mpssas_freeze_device(struct mpssas_softc *, struct mpssas_target *); +static void mpssas_unfreeze_device(struct mpssas_softc *, struct mpssas_target *) __unused; + +/* + * Abstracted so that the driver can be backwards and forwards compatible + * with future versions of CAM that will provide this functionality. + */ +#define MPS_SET_LUN(lun, ccblun) \ + mpssas_set_lun(lun, ccblun) + +static __inline int +mpssas_set_lun(uint8_t *lun, u_int ccblun) +{ + uint64_t *newlun; + + newlun = (uint64_t *)lun; + *newlun = 0; + if (ccblun <= 0xff) { + /* Peripheral device address method, LUN is 0 to 255 */ + lun[1] = ccblun; + } else if (ccblun <= 0x3fff) { + /* Flat space address method, LUN is <= 16383 */ + scsi_ulto2b(ccblun, lun); + lun[0] |= 0x40; + } else if (ccblun <= 0xffffff) { + /* Extended flat space address method, LUN is <= 16777215 */ + scsi_ulto3b(ccblun, &lun[1]); + /* Extended Flat space address method */ + lun[0] = 0xc0; + /* Length = 1, i.e. LUN is 3 bytes long */ + lun[0] |= 0x10; + /* Extended Address Method */ + lun[0] |= 0x02; + } else { + return (EINVAL); + } + + return (0); +} + +static struct mpssas_target * +mpssas_alloc_target(struct mpssas_softc *sassc, struct mpssas_target *probe) +{ + struct mpssas_target *target; + int start; + + mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); + + /* + * If it's not a sata or sas target, CAM won't be able to see it. Put + * it into a high-numbered slot so that it's accessible but not + * interrupting the target numbering sequence of real drives. + */ + if ((probe->devinfo & (MPI2_SAS_DEVICE_INFO_SSP_TARGET | + MPI2_SAS_DEVICE_INFO_STP_TARGET | MPI2_SAS_DEVICE_INFO_SATA_DEVICE)) + == 0) { + start = 200; + } else { + /* + * Use the enclosure number and slot number as a hint for target + * numbering. If that doesn't produce a sane result, search the + * entire space. + */ +#if 0 + start = probe->encl_handle * 16 + probe->encl_slot; +#else + start = probe->encl_slot; +#endif + if (start >= sassc->sc->facts->MaxTargets) + start = 0; + } + + target = mpssas_find_target(sassc, start, 0); + + /* + * Nothing found on the first pass, try a second pass that searches the + * entire space. + */ + if (target == NULL) + target = mpssas_find_target(sassc, 0, 0); + + return (target); +} + +static struct mpssas_target * +mpssas_find_target(struct mpssas_softc *sassc, int start, uint16_t handle) +{ + struct mpssas_target *target; + int i; + + for (i = start; i < sassc->sc->facts->MaxTargets; i++) { + target = &sassc->targets[i]; + if (target->handle == handle) + return (target); + } + + return (NULL); +} + +/* + * Start the probe sequence for a given device handle. This will not + * block. + */ +static void +mpssas_probe_device(struct mps_softc *sc, uint16_t handle) +{ + struct mpssas_devprobe *probe; + struct mps_config_params *params; + MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; + int error; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + probe = malloc(sizeof(*probe), M_MPSSAS, M_NOWAIT | M_ZERO); + if (probe == NULL) { + mps_dprint(sc, MPS_FAULT, "Out of memory starting probe\n"); + return; + } + params = &probe->params; + hdr = ¶ms->hdr.Ext; + + params->action = MPI2_CONFIG_ACTION_PAGE_HEADER; + params->page_address = MPI2_SAS_DEVICE_PGAD_FORM_HANDLE | handle; + hdr->ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE; + hdr->ExtPageLength = 0; + hdr->PageNumber = 0; + hdr->PageVersion = 0; + params->buffer = NULL; + params->length = 0; + params->callback = mpssas_probe_device_complete; + params->cbdata = probe; + probe->target.handle = handle; + probe->state = MPSSAS_PROBE_DEV1; + + if ((error = mps_read_config_page(sc, params)) != 0) { + free(probe, M_MPSSAS); + mps_dprint(sc, MPS_FAULT, "Failure starting device probe\n"); + return; + } +} + +static void +mpssas_probe_device_complete(struct mps_softc *sc, + struct mps_config_params *params) +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; + struct mpssas_devprobe *probe; + int error; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + hdr = ¶ms->hdr.Ext; + probe = params->cbdata; + + switch (probe->state) { + case MPSSAS_PROBE_DEV1: + case MPSSAS_PROBE_PHY: + case MPSSAS_PROBE_EXP: + if (params->status != MPI2_IOCSTATUS_SUCCESS) { + mps_dprint(sc, MPS_FAULT, + "Probe Failure 0x%x state %d\n", params->status, + probe->state); + free(probe, M_MPSSAS); + return; + } + params->action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; + params->length = hdr->ExtPageLength * 4; + params->buffer = malloc(params->length, M_MPSSAS, + M_ZERO|M_NOWAIT); + if (params->buffer == NULL) { + mps_dprint(sc, MPS_FAULT, "Out of memory at state " + "0x%x, size 0x%x\n", probe->state, params->length); + free(probe, M_MPSSAS); + return; + } + if (probe->state == MPSSAS_PROBE_DEV1) + probe->state = MPSSAS_PROBE_DEV2; + else if (probe->state == MPSSAS_PROBE_PHY) + probe->state = MPSSAS_PROBE_PHY2; + else if (probe->state == MPSSAS_PROBE_EXP) + probe->state = MPSSAS_PROBE_EXP2; + error = mps_read_config_page(sc, params); + break; + case MPSSAS_PROBE_DEV2: + { + MPI2_CONFIG_PAGE_SAS_DEV_0 *buf; + + if (params->status != MPI2_IOCSTATUS_SUCCESS) { + mps_dprint(sc, MPS_FAULT, + "Probe Failure 0x%x state %d\n", params->status, + probe->state); + free(params->buffer, M_MPSSAS); + free(probe, M_MPSSAS); + return; + } + buf = params->buffer; + mps_print_sasdev0(sc, buf); + + probe->target.devname = mps_to_u64(&buf->DeviceName); + probe->target.devinfo = buf->DeviceInfo; + probe->target.encl_handle = buf->EnclosureHandle; + probe->target.encl_slot = buf->Slot; + probe->target.sasaddr = mps_to_u64(&buf->SASAddress); + probe->target.parent_handle = buf->ParentDevHandle; + + if (buf->DeviceInfo & MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH) { + params->page_address = + MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER | buf->PhyNum; + hdr->ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_PHY; + hdr->PageNumber = 0; + probe->state = MPSSAS_PROBE_PHY; + } else { + params->page_address = + MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM | + buf->ParentDevHandle | (buf->PhyNum << 16); + hdr->ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER; + hdr->PageNumber = 1; + probe->state = MPSSAS_PROBE_EXP; + } + params->action = MPI2_CONFIG_ACTION_PAGE_HEADER; + hdr->ExtPageLength = 0; + hdr->PageVersion = 0; + params->buffer = NULL; + params->length = 0; + free(buf, M_MPSSAS); + error = mps_read_config_page(sc, params); + break; + } + case MPSSAS_PROBE_PHY2: + case MPSSAS_PROBE_EXP2: + { + MPI2_CONFIG_PAGE_SAS_PHY_0 *phy; + MPI2_CONFIG_PAGE_EXPANDER_1 *exp; + struct mpssas_softc *sassc; + struct mpssas_target *targ; + char devstring[80]; + uint16_t handle; + + if (params->status != MPI2_IOCSTATUS_SUCCESS) { + mps_dprint(sc, MPS_FAULT, + "Probe Failure 0x%x state %d\n", params->status, + probe->state); + free(params->buffer, M_MPSSAS); + free(probe, M_MPSSAS); + return; + } + + if (probe->state == MPSSAS_PROBE_PHY2) { + phy = params->buffer; + mps_print_sasphy0(sc, phy); + probe->target.linkrate = phy->NegotiatedLinkRate & 0xf; + } else { + exp = params->buffer; + mps_print_expander1(sc, exp); + probe->target.linkrate = exp->NegotiatedLinkRate & 0xf; + } + free(params->buffer, M_MPSSAS); + + sassc = sc->sassc; + handle = probe->target.handle; + if ((targ = mpssas_find_target(sassc, 0, handle)) != NULL) { + mps_printf(sc, "Ignoring dup device handle 0x%04x\n", + handle); + free(probe, M_MPSSAS); + return; + } + if ((targ = mpssas_alloc_target(sassc, &probe->target)) == NULL) { + mps_printf(sc, "Target table overflow, handle 0x%04x\n", + handle); + free(probe, M_MPSSAS); + return; + } + + *targ = probe->target; /* Copy the attributes */ + targ->tid = targ - sassc->targets; + mps_describe_devinfo(targ->devinfo, devstring, 80); + if (bootverbose) + mps_printf(sc, "Found device <%s> <%s> <0x%04x> " + "<%d/%d>\n", devstring, + mps_describe_table(mps_linkrate_names, + targ->linkrate), targ->handle, targ->encl_handle, + targ->encl_slot); + + free(probe, M_MPSSAS); + mpssas_announce_device(sassc, targ); + break; + } + default: + printf("what?\n"); + } +} + +/* + * The MPT2 firmware performs debounce on the link to avoid transient link errors + * and false removals. When it does decide that link has been lost and a device + * need to go away, it expects that the host will perform a target reset and then + * an op remove. The reset has the side-effect of aborting any outstanding + * requests for the device, which is required for the op-remove to succeed. It's + * not clear if the host should check for the device coming back alive after the + * reset. + */ +static void +mpssas_prepare_remove(struct mpssas_softc *sassc, MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy) +{ + MPI2_SCSI_TASK_MANAGE_REQUEST *req; + struct mps_softc *sc; + struct mps_command *cm; + struct mpssas_target *targ = NULL; + uint16_t handle; + + mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); + + handle = phy->AttachedDevHandle; + targ = mpssas_find_target(sassc, 0, handle); + if (targ == NULL) + /* We don't know about this device? */ + return; + + sc = sassc->sc; + cm = mps_alloc_command(sc); + if (cm == NULL) { + mps_printf(sc, "comand alloc failure in mpssas_prepare_remove\n"); + return; + } + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm->cm_req; + req->DevHandle = targ->handle; + req->Function = MPI2_FUNCTION_SCSI_TASK_MGMT; + req->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET; + + /* SAS Hard Link Reset / SATA Link Reset */ + req->MsgFlags = MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET; + + cm->cm_data = NULL; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_complete = mpssas_remove_device; + cm->cm_targ = targ; + mpssas_issue_tm_request(sc, cm); +} + +static void +mpssas_remove_device(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_TASK_MANAGE_REPLY *reply; + MPI2_SAS_IOUNIT_CONTROL_REQUEST *req; + struct mpssas_target *targ; + uint16_t handle; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + reply = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; + handle = cm->cm_targ->handle; + + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 0); + + if (reply->IOCStatus != MPI2_IOCSTATUS_SUCCESS) { + mps_printf(sc, "Failure 0x%x reseting device 0x%04x\n", + reply->IOCStatus, handle); + mps_free_command(sc, cm); + return; + } + + mps_printf(sc, "Reset aborted %d commands\n", reply->TerminationCount); + mps_free_reply(sc, cm->cm_reply_data); + + /* Reuse the existing command */ + req = (MPI2_SAS_IOUNIT_CONTROL_REQUEST *)cm->cm_req; + req->Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL; + req->Operation = MPI2_SAS_OP_REMOVE_DEVICE; + req->DevHandle = handle; + cm->cm_data = NULL; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_flags &= ~MPS_CM_FLAGS_COMPLETE; + cm->cm_complete = mpssas_remove_complete; + + mps_map_command(sc, cm); + + mps_dprint(sc, MPS_INFO, "clearing target handle 0x%04x\n", handle); + targ = mpssas_find_target(sc->sassc, 0, handle); + if (targ != NULL) { + targ->handle = 0x0; + mpssas_announce_device(sc->sassc, targ); + } +} + +static void +mpssas_remove_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SAS_IOUNIT_CONTROL_REPLY *reply; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + reply = (MPI2_SAS_IOUNIT_CONTROL_REPLY *)cm->cm_reply; + + mps_printf(sc, "mpssas_remove_complete on target 0x%04x," + " IOCStatus= 0x%x\n", cm->cm_targ->tid, reply->IOCStatus); + + mps_free_command(sc, cm); +} + +static void +mpssas_evt_handler(struct mps_softc *sc, uintptr_t data, + MPI2_EVENT_NOTIFICATION_REPLY *event) +{ + struct mpssas_softc *sassc; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + sassc = sc->sassc; + mps_print_evt_sas(sc, event); + + switch (event->Event) { + case MPI2_EVENT_SAS_DISCOVERY: + { + MPI2_EVENT_DATA_SAS_DISCOVERY *data; + + data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)&event->EventData; + + if (data->ReasonCode & MPI2_EVENT_SAS_DISC_RC_STARTED) + mps_dprint(sc, MPS_TRACE,"SAS discovery start event\n"); + if (data->ReasonCode & MPI2_EVENT_SAS_DISC_RC_COMPLETED) { + mps_dprint(sc, MPS_TRACE, "SAS discovery end event\n"); + sassc->flags &= ~MPSSAS_IN_DISCOVERY; + mpssas_discovery_end(sassc); + } + break; + } + case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: + { + MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *data; + MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy; + int i; + + data = (MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *) + &event->EventData; + + if (data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_ADDED) { + if (bootverbose) + printf("Expander found at enclosure %d\n", + data->EnclosureHandle); + mpssas_probe_device(sc, data->ExpanderDevHandle); + } + + for (i = 0; i < data->NumEntries; i++) { + phy = &data->PHY[i]; + switch (phy->PhyStatus & MPI2_EVENT_SAS_TOPO_RC_MASK) { + case MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED: + mpssas_probe_device(sc, phy->AttachedDevHandle); + break; + case MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING: + mpssas_prepare_remove(sassc, phy); + break; + case MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED: + case MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE: + case MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING: + default: + break; + } + } + + break; + } + case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: + break; + default: + break; + } + + mps_free_reply(sc, data); +} + +static int +mpssas_register_events(struct mps_softc *sc) +{ + uint8_t events[16]; + + bzero(events, 16); + setbit(events, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); + setbit(events, MPI2_EVENT_SAS_DISCOVERY); + setbit(events, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); + setbit(events, MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE); + setbit(events, MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW); + setbit(events, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); + setbit(events, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); + + mps_register_events(sc, events, mpssas_evt_handler, NULL, + &sc->sassc->mpssas_eh); + + return (0); +} + +int +mps_attach_sas(struct mps_softc *sc) +{ + struct mpssas_softc *sassc; + int error = 0; + int num_sim_reqs; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + sassc = malloc(sizeof(struct mpssas_softc), M_MPT2, M_WAITOK|M_ZERO); + sassc->targets = malloc(sizeof(struct mpssas_target) * + sc->facts->MaxTargets, M_MPT2, M_WAITOK|M_ZERO); + sc->sassc = sassc; + sassc->sc = sc; + + /* + * Tell CAM that we can handle 5 fewer requests than we have + * allocated. If we allow the full number of requests, all I/O + * will halt when we run out of resources. Things work fine with + * just 1 less request slot given to CAM than we have allocated. + * We also need a couple of extra commands so that we can send down + * abort, reset, etc. requests when commands time out. Otherwise + * we could wind up in a situation with sc->num_reqs requests down + * on the card and no way to send an abort. + * + * XXX KDM need to figure out why I/O locks up if all commands are + * used. + */ + num_sim_reqs = sc->num_reqs - 5; + + if ((sassc->devq = cam_simq_alloc(num_sim_reqs)) == NULL) { + mps_dprint(sc, MPS_FAULT, "Cannot allocate SIMQ\n"); + error = ENOMEM; + goto out; + } + + sassc->sim = cam_sim_alloc(mpssas_action, mpssas_poll, "mps", sassc, + device_get_unit(sc->mps_dev), &sc->mps_mtx, num_sim_reqs, + num_sim_reqs, sassc->devq); + if (sassc->sim == NULL) { + mps_dprint(sc, MPS_FAULT, "Cannot allocate SIM\n"); + error = EINVAL; + goto out; + } + + /* + * XXX There should be a bus for every port on the adapter, but since + * we're just going to fake the topology for now, we'll pretend that + * everything is just a target on a single bus. + */ + mps_lock(sc); + if ((error = xpt_bus_register(sassc->sim, sc->mps_dev, 0)) != 0) { + mps_dprint(sc, MPS_FAULT, "Error %d registering SCSI bus\n", + error); + mps_unlock(sc); + goto out; + } + + /* + * Assume that discovery events will start right away. Freezing + * the simq will prevent the CAM boottime scanner from running + * before discovery is complete. + */ + sassc->flags = MPSSAS_IN_STARTUP | MPSSAS_IN_DISCOVERY; + xpt_freeze_simq(sassc->sim, 1); + + mps_unlock(sc); + + callout_init(&sassc->discovery_callout, 1 /*mpsafe*/); + sassc->discovery_timeouts = 0; + + mpssas_register_events(sc); +out: + if (error) + mps_detach_sas(sc); + return (error); +} + +int +mps_detach_sas(struct mps_softc *sc) +{ + struct mpssas_softc *sassc; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + if (sc->sassc == NULL) + return (0); + + sassc = sc->sassc; + + /* Make sure CAM doesn't wedge if we had to bail out early. */ + mps_lock(sc); + if (sassc->flags & MPSSAS_IN_STARTUP) + xpt_release_simq(sassc->sim, 1); + mps_unlock(sc); + + if (sassc->mpssas_eh != NULL) + mps_deregister_events(sc, sassc->mpssas_eh); + + mps_lock(sc); + + if (sassc->sim != NULL) { + xpt_bus_deregister(cam_sim_path(sassc->sim)); + cam_sim_free(sassc->sim, FALSE); + } + mps_unlock(sc); + + if (sassc->devq != NULL) + cam_simq_free(sassc->devq); + + free(sassc->targets, M_MPT2); + free(sassc, M_MPT2); + sc->sassc = NULL; + + return (0); +} + +static void +mpssas_discovery_end(struct mpssas_softc *sassc) +{ + struct mps_softc *sc = sassc->sc; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + if (sassc->flags & MPSSAS_DISCOVERY_TIMEOUT_PENDING) + callout_stop(&sassc->discovery_callout); + + if ((sassc->flags & MPSSAS_IN_STARTUP) != 0) { + mps_dprint(sc, MPS_INFO, + "mpssas_discovery_end: removing confighook\n"); + sassc->flags &= ~MPSSAS_IN_STARTUP; + xpt_release_simq(sassc->sim, 1); + } +#if 0 + mpssas_announce_device(sassc, NULL); +#endif + +} + +static void +mpssas_announce_device(struct mpssas_softc *sassc, struct mpssas_target *targ) +{ + union ccb *ccb; + int bus, tid, lun; + + /* + * Force a rescan, a hackish way to announce devices. + * XXX Doing a scan on an individual device is hackish in that it + * won't scan the LUNs. + * XXX Does it matter if any of this fails? + */ + bus = cam_sim_path(sassc->sim); + if (targ != NULL) { + tid = targ->tid; + lun = 0; + } else { + tid = CAM_TARGET_WILDCARD; + lun = CAM_LUN_WILDCARD; + } + ccb = xpt_alloc_ccb_nowait(); + if (ccb == NULL) + return; + if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, bus, tid, + CAM_LUN_WILDCARD) != CAM_REQ_CMP) { + xpt_free_ccb(ccb); + return; + } + mps_dprint(sassc->sc, MPS_INFO, "Triggering rescan of %d:%d:-1\n", + bus, tid); + xpt_rescan(ccb); +} + +static void +mpssas_startup(void *data) +{ + struct mpssas_softc *sassc = data; + + mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); + + mps_lock(sassc->sc); + if ((sassc->flags & MPSSAS_IN_DISCOVERY) == 0) { + mpssas_discovery_end(sassc); + } else { + if (sassc->discovery_timeouts < MPSSAS_MAX_DISCOVERY_TIMEOUTS) { + sassc->flags |= MPSSAS_DISCOVERY_TIMEOUT_PENDING; + callout_reset(&sassc->discovery_callout, + MPSSAS_DISCOVERY_TIMEOUT * hz, + mpssas_discovery_timeout, sassc); + sassc->discovery_timeouts++; + } else { + mps_dprint(sassc->sc, MPS_FAULT, + "Discovery timed out, continuing.\n"); + sassc->flags &= ~MPSSAS_IN_DISCOVERY; + mpssas_discovery_end(sassc); + } + } + mps_unlock(sassc->sc); + + return; +} + +static void +mpssas_discovery_timeout(void *data) +{ + struct mpssas_softc *sassc = data; + struct mps_softc *sc; + + sc = sassc->sc; + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + mps_lock(sc); + mps_printf(sc, + "Timeout waiting for discovery, interrupts may not be working!\n"); + sassc->flags &= ~MPSSAS_DISCOVERY_TIMEOUT_PENDING; + + /* Poll the hardware for events in case interrupts aren't working */ + mps_intr_locked(sc); + mps_unlock(sc); + + /* Check the status of discovery and re-arm the timeout if needed */ + mpssas_startup(sassc); +} + +static void +mpssas_action(struct cam_sim *sim, union ccb *ccb) +{ + struct mpssas_softc *sassc; + + sassc = cam_sim_softc(sim); + + mps_dprint(sassc->sc, MPS_TRACE, "%s func 0x%x\n", __func__, + ccb->ccb_h.func_code); + + switch (ccb->ccb_h.func_code) { + case XPT_PATH_INQ: + { + struct ccb_pathinq *cpi = &ccb->cpi; + + cpi->version_num = 1; + cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16; + cpi->target_sprt = 0; + cpi->hba_misc = PIM_NOBUSRESET; + cpi->hba_eng_cnt = 0; + cpi->max_target = sassc->sc->facts->MaxTargets - 1; + cpi->max_lun = 0; + cpi->initiator_id = 255; + strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); + strncpy(cpi->hba_vid, "LSILogic", HBA_IDLEN); + strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); + cpi->unit_number = cam_sim_unit(sim); + cpi->bus_id = cam_sim_bus(sim); + cpi->base_transfer_speed = 150000; + cpi->transport = XPORT_SAS; + cpi->transport_version = 0; + cpi->protocol = PROTO_SCSI; + cpi->protocol_version = SCSI_REV_SPC; + cpi->ccb_h.status = CAM_REQ_CMP; + break; + } + case XPT_GET_TRAN_SETTINGS: + { + struct ccb_trans_settings *cts; + struct ccb_trans_settings_sas *sas; + struct ccb_trans_settings_scsi *scsi; + struct mpssas_target *targ; + + cts = &ccb->cts; + sas = &cts->xport_specific.sas; + scsi = &cts->proto_specific.scsi; + + targ = &sassc->targets[cts->ccb_h.target_id]; + if (targ->handle == 0x0) { + cts->ccb_h.status = CAM_TID_INVALID; + break; + } + + cts->protocol_version = SCSI_REV_SPC2; + cts->transport = XPORT_SAS; + cts->transport_version = 0; + + sas->valid = CTS_SAS_VALID_SPEED; + switch (targ->linkrate) { + case 0x08: + sas->bitrate = 150000; + break; + case 0x09: + sas->bitrate = 300000; + break; + case 0x0a: + sas->bitrate = 600000; + break; + default: + sas->valid = 0; + } + + cts->protocol = PROTO_SCSI; + scsi->valid = CTS_SCSI_VALID_TQ; + scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; + + cts->ccb_h.status = CAM_REQ_CMP; + break; + } + case XPT_CALC_GEOMETRY: + cam_calc_geometry(&ccb->ccg, /*extended*/1); + ccb->ccb_h.status = CAM_REQ_CMP; + break; + case XPT_RESET_DEV: + mpssas_action_resetdev(sassc, ccb); + return; + case XPT_RESET_BUS: + case XPT_ABORT: + case XPT_TERM_IO: + ccb->ccb_h.status = CAM_REQ_CMP; + break; + case XPT_SCSI_IO: + mpssas_action_scsiio(sassc, ccb); + return; +#if __FreeBSD_version >= 900026 + case XPT_SMP_IO: + mpssas_action_smpio(sassc, ccb); + return; +#endif /* __FreeBSD_version >= 900026 */ + default: + ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; + break; + } + xpt_done(ccb); + +} + +#if 0 +static void +mpssas_resettimeout_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_TASK_MANAGE_REPLY *resp; + uint16_t code; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + resp = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; + code = resp->ResponseCode; + + mps_free_command(sc, cm); + mpssas_unfreeze_device(sassc, targ); + + if (code != MPI2_SCSITASKMGMT_RSP_TM_COMPLETE) { + mps_reset_controller(sc); + } + + return; +} +#endif + +static void +mpssas_scsiio_timeout(void *data) +{ + union ccb *ccb; + struct mps_softc *sc; + struct mps_command *cm; + struct mpssas_target *targ; +#if 0 + char cdb_str[(SCSI_MAX_CDBLEN * 3) + 1]; +#endif + + cm = (struct mps_command *)data; + sc = cm->cm_sc; + + /* + * Run the interrupt handler to make sure it's not pending. This + * isn't perfect because the command could have already completed + * and been re-used, though this is unlikely. + */ + mps_lock(sc); + mps_intr_locked(sc); + if (cm->cm_state == MPS_CM_STATE_FREE) { + mps_unlock(sc); + return; + } + + ccb = cm->cm_complete_data; + targ = cm->cm_targ; + if (targ == 0x00) + /* Driver bug */ + targ = &sc->sassc->targets[ccb->ccb_h.target_id]; + + xpt_print(ccb->ccb_h.path, "SCSI command timeout on device handle " + "0x%04x SMID %d\n", targ->handle, cm->cm_desc.Default.SMID); + /* + * XXX KDM this is useful for debugging purposes, but the existing + * scsi_op_desc() implementation can't handle a NULL value for + * inq_data. So this will remain commented out until I bring in + * those changes as well. + */ +#if 0 + xpt_print(ccb->ccb_h.path, "Timed out command: %s. CDB %s\n", + scsi_op_desc((ccb->ccb_h.flags & CAM_CDB_POINTER) ? + ccb->csio.cdb_io.cdb_ptr[0] : + ccb->csio.cdb_io.cdb_bytes[0], NULL), + scsi_cdb_string((ccb->ccb_h.flags & CAM_CDB_POINTER) ? + ccb->csio.cdb_io.cdb_ptr : + ccb->csio.cdb_io.cdb_bytes, cdb_str, + sizeof(cdb_str))); +#endif + + /* Inform CAM about the timeout and that recovery is starting. */ +#if 0 + if ((targ->flags & MPSSAS_TARGET_INRECOVERY) == 0) { + mpssas_freeze_device(sc->sassc, targ); + ccb->ccb_h.status = CAM_CMD_TIMEOUT; + xpt_done(ccb); + } +#endif + mpssas_freeze_device(sc->sassc, targ); + ccb->ccb_h.status = CAM_CMD_TIMEOUT; + + /* + * recycle the command into recovery so that there's no risk of + * command allocation failure. + */ + cm->cm_state = MPS_CM_STATE_TIMEDOUT; + mpssas_recovery(sc, cm); + mps_unlock(sc); +} + +static void +mpssas_abort_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_TASK_MANAGE_REQUEST *req; + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm->cm_req; + + mps_printf(sc, "%s: abort request on handle %#04x SMID %d " + "complete\n", __func__, req->DevHandle, req->TaskMID); + + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 1); +} + +static void +mpssas_recovery(struct mps_softc *sc, struct mps_command *abort_cm) +{ + struct mps_command *cm; + MPI2_SCSI_TASK_MANAGE_REQUEST *req, *orig_req; + + cm = mps_alloc_command(sc); + if (cm == NULL) { + mps_printf(sc, "%s: command allocation failure\n", __func__); + return; + } + + cm->cm_targ = abort_cm->cm_targ; + cm->cm_complete = mpssas_abort_complete; + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm->cm_req; + orig_req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)abort_cm->cm_req; + req->DevHandle = abort_cm->cm_targ->handle; + req->Function = MPI2_FUNCTION_SCSI_TASK_MGMT; + req->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK; + memcpy(req->LUN, orig_req->LUN, sizeof(req->LUN)); + req->TaskMID = abort_cm->cm_desc.Default.SMID; + + cm->cm_data = NULL; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + + mpssas_issue_tm_request(sc, cm); + +} + +/* + * Can return 0 or EINPROGRESS on success. Any other value means failure. + */ +static int +mpssas_map_tm_request(struct mps_softc *sc, struct mps_command *cm) +{ + int error; + + error = 0; + + cm->cm_flags |= MPS_CM_FLAGS_ACTIVE; + error = mps_map_command(sc, cm); + if ((error == 0) + || (error == EINPROGRESS)) + sc->tm_cmds_active++; + + return (error); +} + +static void +mpssas_issue_tm_request(struct mps_softc *sc, struct mps_command *cm) +{ + int freeze_queue, send_command, error; + + freeze_queue = 0; + send_command = 0; + error = 0; + + mtx_assert(&sc->mps_mtx, MA_OWNED); + + /* + * If there are no other pending task management commands, go + * ahead and send this one. There is a small amount of anecdotal + * evidence that sending lots of task management commands at once + * may cause the controller to lock up. Or, if the user has + * configured the driver (via the allow_multiple_tm_cmds variable) to + * not serialize task management commands, go ahead and send the + * command if even other task management commands are pending. + */ + if (TAILQ_FIRST(&sc->tm_list) == NULL) { + send_command = 1; + freeze_queue = 1; + } else if (sc->allow_multiple_tm_cmds != 0) + send_command = 1; + + TAILQ_INSERT_TAIL(&sc->tm_list, cm, cm_link); + if (send_command != 0) { + /* + * Freeze the SIM queue while we issue the task management + * command. According to the Fusion-MPT 2.0 spec, task + * management requests are serialized, and so the host + * should not send any I/O requests while task management + * requests are pending. + */ + if (freeze_queue != 0) + xpt_freeze_simq(sc->sassc->sim, 1); + + error = mpssas_map_tm_request(sc, cm); + + /* + * At present, there is no error path back from + * mpssas_map_tm_request() (which calls mps_map_command()) + * when cm->cm_data == NULL. But since there is a return + * value, we check it just in case the implementation + * changes later. + */ + if ((error != 0) + && (error != EINPROGRESS)) + mpssas_tm_complete(sc, cm, + MPI2_SCSITASKMGMT_RSP_TM_FAILED); + } +} + +static void +mpssas_tm_complete(struct mps_softc *sc, struct mps_command *cm, int error) +{ + MPI2_SCSI_TASK_MANAGE_REPLY *resp; + + resp = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; + + resp->ResponseCode = error; + + /* + * Call the callback for this command, it will be + * removed from the list and freed via the callback. + */ + cm->cm_complete(sc, cm); +} + +/* + * Complete a task management request. The basic completion operation will + * always succeed. Returns status for sending any further task management + * commands that were queued. + */ +static int +mpssas_complete_tm_request(struct mps_softc *sc, struct mps_command *cm, + int free_cm) +{ + int error; + + error = 0; + + mtx_assert(&sc->mps_mtx, MA_OWNED); + + TAILQ_REMOVE(&sc->tm_list, cm, cm_link); + cm->cm_flags &= ~MPS_CM_FLAGS_ACTIVE; + sc->tm_cmds_active--; + + if (free_cm != 0) + mps_free_command(sc, cm); + + if (TAILQ_FIRST(&sc->tm_list) == NULL) { + /* + * Release the SIM queue, we froze it when we sent the first + * task management request. + */ + xpt_release_simq(sc->sassc->sim, 1); + } else if ((sc->tm_cmds_active == 0) + || (sc->allow_multiple_tm_cmds != 0)) { + int error; + struct mps_command *cm2; + +restart_traversal: + + /* + * We don't bother using TAILQ_FOREACH_SAFE here, but + * rather use the standard version and just restart the + * list traversal if we run into the error case. + * TAILQ_FOREACH_SAFE allows safe removal of the current + * list element, but if you have a queue of task management + * commands, all of which have mapping errors, you'll end + * up with recursive calls to this routine and so you could + * wind up removing more than just the current list element. + */ + TAILQ_FOREACH(cm2, &sc->tm_list, cm_link) { + MPI2_SCSI_TASK_MANAGE_REQUEST *req; + + /* This command is active, no need to send it again */ + if (cm2->cm_flags & MPS_CM_FLAGS_ACTIVE) + continue; + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm2->cm_req; + + mps_printf(sc, "%s: sending deferred task management " + "request for handle %#04x SMID %d\n", __func__, + req->DevHandle, req->TaskMID); + + error = mpssas_map_tm_request(sc, cm2); + + /* + * Check for errors. If we had an error, complete + * this command with an error, and keep going through + * the list until we are able to send at least one + * command or all of them are completed with errors. + * + * We don't want to wind up in a situation where + * we're stalled out with no way for queued task + * management commands to complete. + * + * Note that there is not currently an error path + * back from mpssas_map_tm_request() (which calls + * mps_map_command()) when cm->cm_data == NULL. + * But we still want to check for errors here in + * case the implementation changes, or in case + * there is some reason for a data payload here. + */ + if ((error != 0) + && (error != EINPROGRESS)) { + mpssas_tm_complete(sc, cm, + MPI2_SCSITASKMGMT_RSP_TM_FAILED); + + /* + * If we don't currently have any commands + * active, go back to the beginning and see + * if there are any more that can be started. + * Otherwise, we're done here. + */ + if (sc->tm_cmds_active == 0) + goto restart_traversal; + else + break; + } + + /* + * If the user only wants one task management command + * active at a time, we're done, since we've + * already successfully sent a command at this point. + */ + if (sc->allow_multiple_tm_cmds == 0) + break; + } + } + + return (error); +} + +static void +mpssas_action_scsiio(struct mpssas_softc *sassc, union ccb *ccb) +{ + MPI2_SCSI_IO_REQUEST *req; + struct ccb_scsiio *csio; + struct mps_softc *sc; + struct mpssas_target *targ; + struct mps_command *cm; + + mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); + + sc = sassc->sc; + + csio = &ccb->csio; + targ = &sassc->targets[csio->ccb_h.target_id]; + if (targ->handle == 0x0) { + csio->ccb_h.status = CAM_SEL_TIMEOUT; + xpt_done(ccb); + return; + } + + cm = mps_alloc_command(sc); + if (cm == NULL) { + if ((sassc->flags & MPSSAS_QUEUE_FROZEN) == 0) { + xpt_freeze_simq(sassc->sim, 1); + sassc->flags |= MPSSAS_QUEUE_FROZEN; + } + ccb->ccb_h.status &= ~CAM_SIM_QUEUED; + ccb->ccb_h.status |= CAM_REQUEUE_REQ; + xpt_done(ccb); + return; + } + + req = (MPI2_SCSI_IO_REQUEST *)cm->cm_req; + req->DevHandle = targ->handle; + req->Function = MPI2_FUNCTION_SCSI_IO_REQUEST; + req->MsgFlags = 0; + req->SenseBufferLowAddress = cm->cm_sense_busaddr; + req->SenseBufferLength = MPS_SENSE_LEN; + req->SGLFlags = 0; + req->ChainOffset = 0; + req->SGLOffset0 = 24; /* 32bit word offset to the SGL */ + req->SGLOffset1= 0; + req->SGLOffset2= 0; + req->SGLOffset3= 0; + req->SkipCount = 0; + req->DataLength = csio->dxfer_len; + req->BidirectionalDataLength = 0; + req->IoFlags = csio->cdb_len; + req->EEDPFlags = 0; + + /* Note: BiDirectional transfers are not supported */ + switch (csio->ccb_h.flags & CAM_DIR_MASK) { + case CAM_DIR_IN: + req->Control = MPI2_SCSIIO_CONTROL_READ; + cm->cm_flags |= MPS_CM_FLAGS_DATAIN; + break; + case CAM_DIR_OUT: + req->Control = MPI2_SCSIIO_CONTROL_WRITE; + cm->cm_flags |= MPS_CM_FLAGS_DATAOUT; + break; + case CAM_DIR_NONE: + default: + req->Control = MPI2_SCSIIO_CONTROL_NODATATRANSFER; + break; + } + + /* + * It looks like the hardware doesn't require an explicit tag + * number for each transaction. SAM Task Management not supported + * at the moment. + */ + switch (csio->tag_action) { + case MSG_HEAD_OF_Q_TAG: + req->Control |= MPI2_SCSIIO_CONTROL_HEADOFQ; + break; + case MSG_ORDERED_Q_TAG: + req->Control |= MPI2_SCSIIO_CONTROL_ORDEREDQ; + break; + case MSG_ACA_TASK: + req->Control |= MPI2_SCSIIO_CONTROL_ACAQ; + break; + case CAM_TAG_ACTION_NONE: + case MSG_SIMPLE_Q_TAG: + default: + req->Control |= MPI2_SCSIIO_CONTROL_SIMPLEQ; + break; + } + + if (MPS_SET_LUN(req->LUN, csio->ccb_h.target_lun) != 0) { + mps_free_command(sc, cm); + ccb->ccb_h.status = CAM_LUN_INVALID; + xpt_done(ccb); + return; + } + + if (csio->ccb_h.flags & CAM_CDB_POINTER) + bcopy(csio->cdb_io.cdb_ptr, &req->CDB.CDB32[0], csio->cdb_len); + else + bcopy(csio->cdb_io.cdb_bytes, &req->CDB.CDB32[0],csio->cdb_len); + req->IoFlags = csio->cdb_len; + + /* + * XXX need to handle S/G lists and physical addresses here. + */ + cm->cm_data = csio->data_ptr; + cm->cm_length = csio->dxfer_len; + cm->cm_sge = &req->SGL; + cm->cm_sglsize = (32 - 24) * 4; + cm->cm_desc.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; + cm->cm_desc.SCSIIO.DevHandle = targ->handle; + cm->cm_complete = mpssas_scsiio_complete; + cm->cm_complete_data = ccb; + cm->cm_targ = targ; + + callout_reset(&cm->cm_callout, (ccb->ccb_h.timeout * hz) / 1000, + mpssas_scsiio_timeout, cm); + + mps_map_command(sc, cm); + return; +} + +static void +mpssas_scsiio_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_IO_REPLY *rep; + union ccb *ccb; + struct mpssas_softc *sassc; + u_int sense_len; + int dir = 0; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + callout_stop(&cm->cm_callout); + + sassc = sc->sassc; + ccb = cm->cm_complete_data; + rep = (MPI2_SCSI_IO_REPLY *)cm->cm_reply; + + if (cm->cm_data != NULL) { + if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) + dir = BUS_DMASYNC_POSTREAD; + else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) + dir = BUS_DMASYNC_POSTWRITE;; + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); + bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); + } + + if (sassc->flags & MPSSAS_QUEUE_FROZEN) { + ccb->ccb_h.flags |= CAM_RELEASE_SIMQ; + sassc->flags &= ~MPSSAS_QUEUE_FROZEN; + } + + /* Take the fast path to completion */ + if (cm->cm_reply == NULL) { + ccb->ccb_h.status = CAM_REQ_CMP; + ccb->csio.scsi_status = SCSI_STATUS_OK; + mps_free_command(sc, cm); + xpt_done(ccb); + return; + } + + mps_dprint(sc, MPS_INFO, "(%d:%d:%d) IOCStatus= 0x%x, " + "ScsiStatus= 0x%x, SCSIState= 0x%x TransferCount= 0x%x\n", + xpt_path_path_id(ccb->ccb_h.path), + xpt_path_target_id(ccb->ccb_h.path), + xpt_path_lun_id(ccb->ccb_h.path), rep->IOCStatus, + rep->SCSIStatus, rep->SCSIState, rep->TransferCount); + + switch (rep->IOCStatus & MPI2_IOCSTATUS_MASK) { + case MPI2_IOCSTATUS_BUSY: + case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: + /* + * The controller is overloaded, try waiting a bit for it + * to free up. + */ + ccb->ccb_h.status = CAM_BUSY; + break; + case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: + ccb->csio.resid = cm->cm_length - rep->TransferCount; + /* FALLTHROUGH */ + case MPI2_IOCSTATUS_SUCCESS: + case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: + ccb->ccb_h.status = CAM_REQ_CMP; + break; + case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: + /* resid is ignored for this condition */ + ccb->csio.resid = 0; + ccb->ccb_h.status = CAM_DATA_RUN_ERR; + break; + case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: + case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: + ccb->ccb_h.status = CAM_DEV_NOT_THERE; + break; + case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: + /* + * This is one of the responses that comes back when an I/O + * has been aborted. If it is because of a timeout that we + * initiated, just set the status to CAM_CMD_TIMEOUT. + * Otherwise set it to CAM_REQ_ABORTED. The effect on the + * command is the same (it gets retried, subject to the + * retry counter), the only difference is what gets printed + * on the console. + */ + if (cm->cm_state == MPS_CM_STATE_TIMEDOUT) + ccb->ccb_h.status = CAM_CMD_TIMEOUT; + else + ccb->ccb_h.status = CAM_REQ_ABORTED; + break; + case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: + case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: + ccb->ccb_h.status = CAM_REQ_ABORTED; + break; + case MPI2_IOCSTATUS_INVALID_SGL: + mps_print_scsiio_cmd(sc, cm); + ccb->ccb_h.status = CAM_UNREC_HBA_ERROR; + break; + case MPI2_IOCSTATUS_INVALID_FUNCTION: + case MPI2_IOCSTATUS_INTERNAL_ERROR: + case MPI2_IOCSTATUS_INVALID_VPID: + case MPI2_IOCSTATUS_INVALID_FIELD: + case MPI2_IOCSTATUS_INVALID_STATE: + case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: + case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: + case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: + case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: + case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: + default: + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + } + + + if ((rep->SCSIState & MPI2_SCSI_STATE_NO_SCSI_STATUS) == 0) { + ccb->csio.scsi_status = rep->SCSIStatus; + + switch (rep->SCSIStatus) { + case MPI2_SCSI_STATUS_TASK_SET_FULL: + case MPI2_SCSI_STATUS_CHECK_CONDITION: + ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; + break; + case MPI2_SCSI_STATUS_COMMAND_TERMINATED: + case MPI2_SCSI_STATUS_TASK_ABORTED: + ccb->ccb_h.status = CAM_REQ_ABORTED; + break; + case MPI2_SCSI_STATUS_GOOD: + default: + break; + } + } + + if (rep->SCSIState & MPI2_SCSI_STATE_AUTOSENSE_VALID) { + sense_len = MIN(rep->SenseCount, + sizeof(struct scsi_sense_data)); + if (sense_len < rep->SenseCount) + ccb->csio.sense_resid = rep->SenseCount - sense_len; + bcopy(cm->cm_sense, &ccb->csio.sense_data, sense_len); + ccb->ccb_h.status |= CAM_AUTOSNS_VALID; + } + + if (rep->SCSIState & MPI2_SCSI_STATE_AUTOSENSE_FAILED) + ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; + + if (rep->SCSIState & MPI2_SCSI_STATE_RESPONSE_INFO_VALID) + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + + mps_free_command(sc, cm); + xpt_done(ccb); +} + +#if __FreeBSD_version >= 900026 +static void +mpssas_smpio_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SMP_PASSTHROUGH_REPLY *rpl; + MPI2_SMP_PASSTHROUGH_REQUEST *req; + uint64_t sasaddr; + union ccb *ccb; + + ccb = cm->cm_complete_data; + rpl = (MPI2_SMP_PASSTHROUGH_REPLY *)cm->cm_reply; + if (rpl == NULL) { + mps_dprint(sc, MPS_INFO, "%s: NULL cm_reply!\n", __func__); + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + goto bailout; + } + + req = (MPI2_SMP_PASSTHROUGH_REQUEST *)cm->cm_req; + sasaddr = le32toh(req->SASAddress.Low); + sasaddr |= ((uint64_t)(le32toh(req->SASAddress.High))) << 32; + + if ((rpl->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS || + rpl->SASStatus != MPI2_SASSTATUS_SUCCESS) { + mps_dprint(sc, MPS_INFO, "%s: IOCStatus %04x SASStatus %02x\n", + __func__, rpl->IOCStatus, rpl->SASStatus); + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + goto bailout; + } + + mps_dprint(sc, MPS_INFO, "%s: SMP request to SAS address " + "%#jx completed successfully\n", __func__, + (uintmax_t)sasaddr); + + if (ccb->smpio.smp_response[2] == SMP_FR_ACCEPTED) + ccb->ccb_h.status = CAM_REQ_CMP; + else + ccb->ccb_h.status = CAM_SMP_STATUS_ERROR; + +bailout: + /* + * We sync in both directions because we had DMAs in the S/G list + * in both directions. + */ + bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); + mps_free_command(sc, cm); + xpt_done(ccb); +} + +static void +mpssas_send_smpcmd(struct mpssas_softc *sassc, union ccb *ccb, uint64_t sasaddr) +{ + struct mps_command *cm; + uint8_t *request, *response; + MPI2_SMP_PASSTHROUGH_REQUEST *req; + struct mps_softc *sc; + struct sglist *sg; + int error; + + sc = sassc->sc; + sg = NULL; + error = 0; + + /* + * XXX We don't yet support physical addresses here. + */ + if (ccb->ccb_h.flags & (CAM_DATA_PHYS|CAM_SG_LIST_PHYS)) { + mps_printf(sc, "%s: physical addresses not supported\n", + __func__); + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + return; + } + + /* + * If the user wants to send an S/G list, check to make sure they + * have single buffers. + */ + if (ccb->ccb_h.flags & CAM_SCATTER_VALID) { + /* + * The chip does not support more than one buffer for the + * request or response. + */ + if ((ccb->smpio.smp_request_sglist_cnt > 1) + || (ccb->smpio.smp_response_sglist_cnt > 1)) { + mps_printf(sc, "%s: multiple request or response " + "buffer segments not supported for SMP\n", + __func__); + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + return; + } + + /* + * The CAM_SCATTER_VALID flag was originally implemented + * for the XPT_SCSI_IO CCB, which only has one data pointer. + * We have two. So, just take that flag to mean that we + * might have S/G lists, and look at the S/G segment count + * to figure out whether that is the case for each individual + * buffer. + */ + if (ccb->smpio.smp_request_sglist_cnt != 0) { + bus_dma_segment_t *req_sg; + + req_sg = (bus_dma_segment_t *)ccb->smpio.smp_request; + request = (uint8_t *)req_sg[0].ds_addr; + } else + request = ccb->smpio.smp_request; + + if (ccb->smpio.smp_response_sglist_cnt != 0) { + bus_dma_segment_t *rsp_sg; + + rsp_sg = (bus_dma_segment_t *)ccb->smpio.smp_response; + response = (uint8_t *)rsp_sg[0].ds_addr; + } else + response = ccb->smpio.smp_response; + } else { + request = ccb->smpio.smp_request; + response = ccb->smpio.smp_response; + } + + cm = mps_alloc_command(sc); + if (cm == NULL) { + mps_printf(sc, "%s: cannot allocate command\n", __func__); + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + } + + req = (MPI2_SMP_PASSTHROUGH_REQUEST *)cm->cm_req; + bzero(req, sizeof(*req)); + req->Function = MPI2_FUNCTION_SMP_PASSTHROUGH; + + /* Allow the chip to use any route to this SAS address. */ + req->PhysicalPort = 0xff; + + req->RequestDataLength = ccb->smpio.smp_request_len; + req->SGLFlags = + MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE | MPI2_SGLFLAGS_SGL_TYPE_MPI; + + mps_dprint(sc, MPS_INFO, "%s: sending SMP request to SAS " + "address %#jx\n", __func__, (uintmax_t)sasaddr); + + mpi_init_sge(cm, req, &req->SGL); + + /* + * Set up a uio to pass into mps_map_command(). This allows us to + * do one map command, and one busdma call in there. + */ + cm->cm_uio.uio_iov = cm->cm_iovec; + cm->cm_uio.uio_iovcnt = 2; + cm->cm_uio.uio_segflg = UIO_SYSSPACE; + + /* + * The read/write flag isn't used by busdma, but set it just in + * case. This isn't exactly accurate, either, since we're going in + * both directions. + */ + cm->cm_uio.uio_rw = UIO_WRITE; + + cm->cm_iovec[0].iov_base = request; + cm->cm_iovec[0].iov_len = req->RequestDataLength; + cm->cm_iovec[1].iov_base = response; + cm->cm_iovec[1].iov_len = ccb->smpio.smp_response_len; + + cm->cm_uio.uio_resid = cm->cm_iovec[0].iov_len + + cm->cm_iovec[1].iov_len; + + /* + * Trigger a warning message in mps_data_cb() for the user if we + * wind up exceeding two S/G segments. The chip expects one + * segment for the request and another for the response. + */ + cm->cm_max_segs = 2; + + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + cm->cm_complete = mpssas_smpio_complete; + cm->cm_complete_data = ccb; + + /* + * Tell the mapping code that we're using a uio, and that this is + * an SMP passthrough request. There is a little special-case + * logic there (in mps_data_cb()) to handle the bidirectional + * transfer. + */ + cm->cm_flags |= MPS_CM_FLAGS_USE_UIO | MPS_CM_FLAGS_SMP_PASS | + MPS_CM_FLAGS_DATAIN | MPS_CM_FLAGS_DATAOUT; + + /* The chip data format is little endian. */ + req->SASAddress.High = htole32(sasaddr >> 32); + req->SASAddress.Low = htole32(sasaddr); + + /* + * XXX Note that we don't have a timeout/abort mechanism here. + * From the manual, it looks like task management requests only + * work for SCSI IO and SATA passthrough requests. We may need to + * have a mechanism to retry requests in the event of a chip reset + * at least. Hopefully the chip will insure that any errors short + * of that are relayed back to the driver. + */ + error = mps_map_command(sc, cm); + if ((error != 0) && (error != EINPROGRESS)) { + mps_printf(sc, "%s: error %d returned from mps_map_command()\n", + __func__, error); + goto bailout_error; + } + + return; + +bailout_error: + mps_free_command(sc, cm); + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + +} + +static void +mpssas_action_smpio(struct mpssas_softc *sassc, union ccb *ccb) +{ + struct mps_softc *sc; + struct mpssas_target *targ; + uint64_t sasaddr = 0; + + sc = sassc->sc; + + /* + * Make sure the target exists. + */ + targ = &sassc->targets[ccb->ccb_h.target_id]; + if (targ->handle == 0x0) { + mps_printf(sc, "%s: target %d does not exist!\n", __func__, + ccb->ccb_h.target_id); + ccb->ccb_h.status = CAM_SEL_TIMEOUT; + xpt_done(ccb); + return; + } + + /* + * If this device has an embedded SMP target, we'll talk to it + * directly. + * figure out what the expander's address is. + */ + if ((targ->devinfo & MPI2_SAS_DEVICE_INFO_SMP_TARGET) != 0) + sasaddr = targ->sasaddr; + + /* + * If we don't have a SAS address for the expander yet, try + * grabbing it from the page 0x83 information cached in the + * transport layer for this target. LSI expanders report the + * expander SAS address as the port-associated SAS address in + * Inquiry VPD page 0x83. Maxim expanders don't report it in page + * 0x83. + * + * XXX KDM disable this for now, but leave it commented out so that + * it is obvious that this is another possible way to get the SAS + * address. + * + * The parent handle method below is a little more reliable, and + * the other benefit is that it works for devices other than SES + * devices. So you can send a SMP request to a da(4) device and it + * will get routed to the expander that device is attached to. + * (Assuming the da(4) device doesn't contain an SMP target...) + */ +#if 0 + if (sasaddr == 0) + sasaddr = xpt_path_sas_addr(ccb->ccb_h.path); +#endif + + /* + * If we still don't have a SAS address for the expander, look for + * the parent device of this device, which is probably the expander. + */ + if (sasaddr == 0) { + struct mpssas_target *parent_target; + + if (targ->parent_handle == 0x0) { + mps_printf(sc, "%s: handle %d does not have a valid " + "parent handle!\n", __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + parent_target = mpssas_find_target(sassc, 0, + targ->parent_handle); + + if (parent_target == NULL) { + mps_printf(sc, "%s: handle %d does not have a valid " + "parent target!\n", __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + + if ((parent_target->devinfo & + MPI2_SAS_DEVICE_INFO_SMP_TARGET) == 0) { + mps_printf(sc, "%s: handle %d parent %d does not " + "have an SMP target!\n", __func__, + targ->handle, parent_target->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + + } + + sasaddr = parent_target->sasaddr; + } + + if (sasaddr == 0) { + mps_printf(sc, "%s: unable to find SAS address for handle %d\n", + __func__, targ->handle); + ccb->ccb_h.status = CAM_REQ_INVALID; + goto bailout; + } + mpssas_send_smpcmd(sassc, ccb, sasaddr); + + return; + +bailout: + xpt_done(ccb); + +} + +#endif /* __FreeBSD_version >= 900026 */ + +static void +mpssas_action_resetdev(struct mpssas_softc *sassc, union ccb *ccb) +{ + struct mps_softc *sc; + struct mps_command *cm; + struct mpssas_target *targ; + + sc = sassc->sc; + targ = &sassc->targets[ccb->ccb_h.target_id]; + + if (targ->flags & MPSSAS_TARGET_INRECOVERY) { + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + } + + cm = mps_alloc_command(sc); + if (cm == NULL) { + mps_printf(sc, "%s: cannot alloc command\n", __func__); + ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + xpt_done(ccb); + return; + } + + cm->cm_targ = targ; + cm->cm_complete = mpssas_resetdev_complete; + cm->cm_complete_data = ccb; + + mpssas_resetdev(sassc, cm); +} + +static void +mpssas_resetdev(struct mpssas_softc *sassc, struct mps_command *cm) +{ + MPI2_SCSI_TASK_MANAGE_REQUEST *req; + struct mps_softc *sc; + + mps_dprint(sassc->sc, MPS_TRACE, "%s\n", __func__); + + sc = sassc->sc; + + req = (MPI2_SCSI_TASK_MANAGE_REQUEST *)cm->cm_req; + req->DevHandle = cm->cm_targ->handle; + req->Function = MPI2_FUNCTION_SCSI_TASK_MGMT; + req->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET; + + /* SAS Hard Link Reset / SATA Link Reset */ + req->MsgFlags = MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET; + + cm->cm_data = NULL; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + + mpssas_issue_tm_request(sc, cm); +} + +static void +mpssas_resetdev_complete(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_TASK_MANAGE_REPLY *resp; + union ccb *ccb; + + mps_dprint(sc, MPS_TRACE, "%s\n", __func__); + + resp = (MPI2_SCSI_TASK_MANAGE_REPLY *)cm->cm_reply; + ccb = cm->cm_complete_data; + + printf("resetdev complete IOCStatus= 0x%x ResponseCode= 0x%x\n", + resp->IOCStatus, resp->ResponseCode); + + if (resp->ResponseCode == MPI2_SCSITASKMGMT_RSP_TM_COMPLETE) + ccb->ccb_h.status = CAM_REQ_CMP; + else + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + + mpssas_complete_tm_request(sc, cm, /*free_cm*/ 1); + + xpt_done(ccb); +} + +static void +mpssas_poll(struct cam_sim *sim) +{ + struct mpssas_softc *sassc; + + sassc = cam_sim_softc(sim); + mps_intr_locked(sassc->sc); +} + +static void +mpssas_freeze_device(struct mpssas_softc *sassc, struct mpssas_target *targ) +{ +} + +static void +mpssas_unfreeze_device(struct mpssas_softc *sassc, struct mpssas_target *targ) +{ +} + diff -x .svn -urN sys/dev/mps/mps_table.c ../../stable/8/sys/dev/mps/mps_table.c --- sys/dev/mps/mps_table.c 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_table.c 2011-01-07 14:33:12.718781641 -0700 @@ -0,0 +1,493 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD: stable/8/sys/dev/mps/mps_table.c 212420 2010-09-10 15:03:56Z ken $"); + +/* Debugging tables for MPT2 */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include + +char * +mps_describe_table(struct mps_table_lookup *table, u_int code) +{ + int i; + + for (i = 0; table[i].string != NULL; i++) { + if (table[i].code == code) + return(table[i].string); + } + return(table[i+1].string); +} + +struct mps_table_lookup mps_event_names[] = { + {"LogData", 0x01}, + {"StateChange", 0x02}, + {"HardResetReceived", 0x05}, + {"EventChange", 0x0a}, + {"TaskSetFull", 0x0e}, + {"SasDeviceStatusChange", 0x0f}, + {"IrOperationStatus", 0x14}, + {"SasDiscovery", 0x16}, + {"SasBroadcastPrimitive", 0x17}, + {"SasInitDeviceStatusChange", 0x18}, + {"SasInitTableOverflow", 0x19}, + {"SasTopologyChangeList", 0x1c}, + {"SasEnclDeviceStatusChange", 0x1d}, + {"IrVolume", 0x1e}, + {"IrPhysicalDisk", 0x1f}, + {"IrConfigurationChangeList", 0x20}, + {"LogEntryAdded", 0x21}, + {"SasPhyCounter", 0x22}, + {"GpioInterrupt", 0x23}, + {"HbdPhyEvent", 0x24}, + {NULL, 0}, + {"Unknown Event", 0} +}; + +struct mps_table_lookup mps_phystatus_names[] = { + {"NewTargetAdded", 0x01}, + {"TargetGone", 0x02}, + {"PHYLinkStatusChange", 0x03}, + {"PHYLinkStatusUnchanged", 0x04}, + {"TargetMissing", 0x05}, + {NULL, 0}, + {"Unknown Status", 0} +}; + +struct mps_table_lookup mps_linkrate_names[] = { + {"PHY disabled", 0x01}, + {"Speed Negotiation Failed", 0x02}, + {"SATA OOB Complete", 0x03}, + {"SATA Port Selector", 0x04}, + {"SMP Reset in Progress", 0x05}, + {"1.5Gbps", 0x08}, + {"3.0Gbps", 0x09}, + {"6.0Gbps", 0x0a}, + {NULL, 0}, + {"LinkRate Unknown", 0x00} +}; + +struct mps_table_lookup mps_sasdev0_devtype[] = { + {"End Device", 0x01}, + {"Edge Expander", 0x02}, + {"Fanout Expander", 0x03}, + {NULL, 0}, + {"No Device", 0x00} +}; + +struct mps_table_lookup mps_phyinfo_reason_names[] = { + {"Power On", 0x01}, + {"Hard Reset", 0x02}, + {"SMP Phy Control Link Reset", 0x03}, + {"Loss DWORD Sync", 0x04}, + {"Multiplex Sequence", 0x05}, + {"I-T Nexus Loss Timer", 0x06}, + {"Break Timeout Timer", 0x07}, + {"PHY Test Function", 0x08}, + {NULL, 0}, + {"Unknown Reason", 0x00} +}; + +struct mps_table_lookup mps_whoinit_names[] = { + {"System BIOS", 0x01}, + {"ROM BIOS", 0x02}, + {"PCI Peer", 0x03}, + {"Host Driver", 0x04}, + {"Manufacturing", 0x05}, + {NULL, 0}, + {"Not Initialized", 0x00} +}; + +struct mps_table_lookup mps_sasdisc_reason[] = { + {"Discovery Started", 0x01}, + {"Discovery Complete", 0x02}, + {NULL, 0}, + {"Unknown", 0x00} +}; + +struct mps_table_lookup mps_sastopo_exp[] = { + {"Added", 0x01}, + {"Not Responding", 0x02}, + {"Responding", 0x03}, + {"Delay Not Responding", 0x04}, + {NULL, 0}, + {"Unknown", 0x00} +}; + +struct mps_table_lookup mps_sasdev_reason[] = { + {"SMART Data", 0x05}, + {"Unsupported", 0x07}, + {"Internal Device Reset", 0x08}, + {"Task Abort Internal", 0x09}, + {"Abort Task Set Internal", 0x0a}, + {"Clear Task Set Internal", 0x0b}, + {"Query Task Internal", 0x0c}, + {"Async Notification", 0x0d}, + {"Cmp Internal Device Reset", 0x0e}, + {"Cmp Task Abort Internal", 0x0f}, + {"Sata Init Failure", 0x10}, + {NULL, 0}, + {"Unknown", 0x00} +}; + +void +mps_describe_devinfo(uint32_t devinfo, char *string, int len) +{ + snprintf(string, len, "%b,%s", devinfo, + "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" + "\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct" + "\15LsiDev" "\16AtapiDev" "\17SepDev", + mps_describe_table(mps_sasdev0_devtype, devinfo & 0x03)); +} + +void +mps_print_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts) +{ + + MPS_PRINTFIELD_START(sc, "IOCFacts"); + MPS_PRINTFIELD(sc, facts, MsgVersion, 0x%x); + MPS_PRINTFIELD(sc, facts, HeaderVersion, 0x%x); + MPS_PRINTFIELD(sc, facts, IOCNumber, %d); + MPS_PRINTFIELD(sc, facts, IOCExceptions, 0x%x); + MPS_PRINTFIELD(sc, facts, MaxChainDepth, %d); + mps_dprint_field(sc, MPS_INFO, "WhoInit: %s\n", + mps_describe_table(mps_whoinit_names, facts->WhoInit)); + MPS_PRINTFIELD(sc, facts, NumberOfPorts, %d); + MPS_PRINTFIELD(sc, facts, RequestCredit, %d); + MPS_PRINTFIELD(sc, facts, ProductID, 0x%x); + mps_dprint_field(sc, MPS_INFO, "IOCCapabilities: %b\n", + facts->IOCCapabilities, "\20" "\3ScsiTaskFull" "\4DiagTrace" + "\5SnapBuf" "\6ExtBuf" "\7EEDP" "\10BiDirTarg" "\11Multicast" + "\14TransRetry" "\15IR" "\16EventReplay" "\17RaidAccel" + "\20MSIXIndex" "\21HostDisc"); + mps_dprint_field(sc, MPS_INFO, "FWVersion= %d-%d-%d-%d\n", + facts->FWVersion.Struct.Major, + facts->FWVersion.Struct.Minor, + facts->FWVersion.Struct.Unit, + facts->FWVersion.Struct.Dev); + MPS_PRINTFIELD(sc, facts, IOCRequestFrameSize, %d); + MPS_PRINTFIELD(sc, facts, MaxInitiators, %d); + MPS_PRINTFIELD(sc, facts, MaxTargets, %d); + MPS_PRINTFIELD(sc, facts, MaxSasExpanders, %d); + MPS_PRINTFIELD(sc, facts, MaxEnclosures, %d); + mps_dprint_field(sc, MPS_INFO, "ProtocolFlags: %b\n", + facts->ProtocolFlags, "\20" "\1ScsiTarg" "\2ScsiInit"); + MPS_PRINTFIELD(sc, facts, HighPriorityCredit, %d); + MPS_PRINTFIELD(sc, facts, MaxReplyDescriptorPostQueueDepth, %d); + MPS_PRINTFIELD(sc, facts, ReplyFrameSize, %d); + MPS_PRINTFIELD(sc, facts, MaxVolumes, %d); + MPS_PRINTFIELD(sc, facts, MaxDevHandle, %d); + MPS_PRINTFIELD(sc, facts, MaxPersistentEntries, %d); +} + +void +mps_print_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts) +{ + + MPS_PRINTFIELD_START(sc, "PortFacts"); + MPS_PRINTFIELD(sc, facts, PortNumber, %d); + MPS_PRINTFIELD(sc, facts, PortType, 0x%x); + MPS_PRINTFIELD(sc, facts, MaxPostedCmdBuffers, %d); +} + +void +mps_print_event(struct mps_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event) +{ + + MPS_EVENTFIELD_START(sc, "EventReply"); + MPS_EVENTFIELD(sc, event, EventDataLength, %d); + MPS_EVENTFIELD(sc, event, AckRequired, %d); + mps_dprint_field(sc, MPS_EVENT, "Event: %s (0x%x)\n", + mps_describe_table(mps_event_names, event->Event), event->Event); + MPS_EVENTFIELD(sc, event, EventContext, 0x%x); +} + +void +mps_print_sasdev0(struct mps_softc *sc, MPI2_CONFIG_PAGE_SAS_DEV_0 *buf) +{ + MPS_PRINTFIELD_START(sc, "SAS Device Page 0"); + MPS_PRINTFIELD(sc, buf, Slot, %d); + MPS_PRINTFIELD(sc, buf, EnclosureHandle, 0x%x); + mps_dprint_field(sc, MPS_INFO, "SASAddress: 0x%jx\n", + mps_to_u64(&buf->SASAddress)); + MPS_PRINTFIELD(sc, buf, ParentDevHandle, 0x%x); + MPS_PRINTFIELD(sc, buf, PhyNum, %d); + MPS_PRINTFIELD(sc, buf, AccessStatus, 0x%x); + MPS_PRINTFIELD(sc, buf, DevHandle, 0x%x); + MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, 0x%x); + MPS_PRINTFIELD(sc, buf, ZoneGroup, %d); + mps_dprint_field(sc, MPS_INFO, "DeviceInfo: %b,%s\n", buf->DeviceInfo, + "\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit" + "\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct" + "\15LsiDev" "\16AtapiDev" "\17SepDev", + mps_describe_table(mps_sasdev0_devtype, buf->DeviceInfo & 0x03)); + MPS_PRINTFIELD(sc, buf, Flags, 0x%x); + MPS_PRINTFIELD(sc, buf, PhysicalPort, %d); + MPS_PRINTFIELD(sc, buf, MaxPortConnections, %d); + mps_dprint_field(sc, MPS_INFO, "DeviceName: 0x%jx\n", + mps_to_u64(&buf->DeviceName)); + MPS_PRINTFIELD(sc, buf, PortGroups, %d); + MPS_PRINTFIELD(sc, buf, DmaGroup, %d); + MPS_PRINTFIELD(sc, buf, ControlGroup, %d); +} + +void +mps_print_evt_sas(struct mps_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event) +{ + + mps_print_event(sc, event); + + switch(event->Event) { + case MPI2_EVENT_SAS_DISCOVERY: + { + MPI2_EVENT_DATA_SAS_DISCOVERY *data; + + data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)&event->EventData; + mps_dprint_field(sc, MPS_EVENT, "Flags: %b\n", data->Flags, + "\20" "\1InProgress" "\2DeviceChange"); + mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n", + mps_describe_table(mps_sasdisc_reason, data->ReasonCode)); + MPS_EVENTFIELD(sc, data, PhysicalPort, %d); + mps_dprint_field(sc, MPS_EVENT, "DiscoveryStatus: %b\n", + data->DiscoveryStatus, "\20" + "\1Loop" "\2UnaddressableDev" "\3DupSasAddr" "\5SmpTimeout" + "\6ExpRouteFull" "\7RouteIndexError" "\10SmpFailed" + "\11SmpCrcError" "\12SubSubLink" "\13TableTableLink" + "\14UnsupDevice" "\15TableSubLink" "\16MultiDomain" + "\17MultiSub" "\20MultiSubSub" "\34DownstreamInit" + "\35MaxPhys" "\36MaxTargs" "\37MaxExpanders" + "\40MaxEnclosures"); + break; + } + case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: + { + MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *data; + MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy; + int i, phynum; + + data = (MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *) + &event->EventData; + MPS_EVENTFIELD(sc, data, EnclosureHandle, 0x%x); + MPS_EVENTFIELD(sc, data, ExpanderDevHandle, 0x%x); + MPS_EVENTFIELD(sc, data, NumPhys, %d); + MPS_EVENTFIELD(sc, data, NumEntries, %d); + MPS_EVENTFIELD(sc, data, StartPhyNum, %d); + mps_dprint_field(sc, MPS_EVENT, "ExpStatus: %s (0x%x)\n", + mps_describe_table(mps_sastopo_exp, data->ExpStatus), + data->ExpStatus); + MPS_EVENTFIELD(sc, data, PhysicalPort, %d); + for (i = 0; i < data->NumEntries; i++) { + phy = &data->PHY[i]; + phynum = data->StartPhyNum + i; + mps_dprint_field(sc, MPS_EVENT, + "PHY[%d].AttachedDevHandle: 0x%04x\n", phynum, + phy->AttachedDevHandle); + mps_dprint_field(sc, MPS_EVENT, + "PHY[%d].LinkRate: %s (0x%x)\n", phynum, + mps_describe_table(mps_linkrate_names, + (phy->LinkRate >> 4) & 0xf), phy->LinkRate); + mps_dprint_field(sc,MPS_EVENT,"PHY[%d].PhyStatus: %s\n", + phynum, mps_describe_table(mps_phystatus_names, + phy->PhyStatus)); + } + break; + } + case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: + { + MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *data; + + data = (MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *) + &event->EventData; + MPS_EVENTFIELD(sc, data, EnclosureHandle, 0x%x); + mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n", + mps_describe_table(mps_sastopo_exp, data->ReasonCode)); + MPS_EVENTFIELD(sc, data, PhysicalPort, %d); + MPS_EVENTFIELD(sc, data, NumSlots, %d); + MPS_EVENTFIELD(sc, data, StartSlot, %d); + MPS_EVENTFIELD(sc, data, PhyBits, 0x%x); + break; + } + case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: + { + MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *data; + + data = (MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *) + &event->EventData; + MPS_EVENTFIELD(sc, data, TaskTag, 0x%x); + mps_dprint_field(sc, MPS_EVENT, "ReasonCode: %s\n", + mps_describe_table(mps_sasdev_reason, data->ReasonCode)); + MPS_EVENTFIELD(sc, data, ASC, 0x%x); + MPS_EVENTFIELD(sc, data, ASCQ, 0x%x); + MPS_EVENTFIELD(sc, data, DevHandle, 0x%x); + mps_dprint_field(sc, MPS_EVENT, "SASAddress: 0x%jx\n", + mps_to_u64(&data->SASAddress)); + } + default: + break; + } +} + +void +mps_print_expander1(struct mps_softc *sc, MPI2_CONFIG_PAGE_EXPANDER_1 *buf) +{ + MPS_PRINTFIELD_START(sc, "SAS Expander Page 1 #%d", buf->Phy); + MPS_PRINTFIELD(sc, buf, PhysicalPort, %d); + MPS_PRINTFIELD(sc, buf, NumPhys, %d); + MPS_PRINTFIELD(sc, buf, Phy, %d); + MPS_PRINTFIELD(sc, buf, NumTableEntriesProgrammed, %d); + mps_dprint_field(sc, MPS_INFO, "ProgrammedLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + (buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate); + mps_dprint_field(sc, MPS_INFO, "HwLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + (buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate); + MPS_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x); + mps_dprint_field(sc, MPS_INFO, "PhyInfo Reason: %s (0x%x)\n", + mps_describe_table(mps_phyinfo_reason_names, + (buf->PhyInfo >> 16) & 0xf), buf->PhyInfo); + mps_dprint_field(sc, MPS_INFO, "AttachedDeviceInfo: %b,%s\n", + buf->AttachedDeviceInfo, "\20" "\4SATAhost" "\5SMPinit" "\6STPinit" + "\7SSPinit" "\10SATAdev" "\11SMPtarg" "\12STPtarg" "\13SSPtarg" + "\14Direct" "\15LSIdev" "\16ATAPIdev" "\17SEPdev", + mps_describe_table(mps_sasdev0_devtype, + buf->AttachedDeviceInfo & 0x03)); + MPS_PRINTFIELD(sc, buf, ExpanderDevHandle, 0x%04x); + MPS_PRINTFIELD(sc, buf, ChangeCount, %d); + mps_dprint_field(sc, MPS_INFO, "NegotiatedLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate); + MPS_PRINTFIELD(sc, buf, PhyIdentifier, %d); + MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d); + MPS_PRINTFIELD(sc, buf, DiscoveryInfo, 0x%x); + MPS_PRINTFIELD(sc, buf, AttachedPhyInfo, 0x%x); + mps_dprint_field(sc, MPS_INFO, "AttachedPhyInfo Reason: %s (0x%x)\n", + mps_describe_table(mps_phyinfo_reason_names, + buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo); + MPS_PRINTFIELD(sc, buf, ZoneGroup, %d); + MPS_PRINTFIELD(sc, buf, SelfConfigStatus, 0x%x); +} + +void +mps_print_sasphy0(struct mps_softc *sc, MPI2_CONFIG_PAGE_SAS_PHY_0 *buf) +{ + MPS_PRINTFIELD_START(sc, "SAS PHY Page 0"); + MPS_PRINTFIELD(sc, buf, OwnerDevHandle, 0x%04x); + MPS_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x); + MPS_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d); + mps_dprint_field(sc, MPS_INFO, "AttachedPhyInfo Reason: %s (0x%x)\n", + mps_describe_table(mps_phyinfo_reason_names, + buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo); + mps_dprint_field(sc, MPS_INFO, "ProgrammedLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + (buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate); + mps_dprint_field(sc, MPS_INFO, "HwLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + (buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate); + MPS_PRINTFIELD(sc, buf, ChangeCount, %d); + MPS_PRINTFIELD(sc, buf, Flags, 0x%x); + mps_dprint_field(sc, MPS_INFO, "PhyInfo Reason: %s (0x%x)\n", + mps_describe_table(mps_phyinfo_reason_names, + (buf->PhyInfo >> 16) & 0xf), buf->PhyInfo); + mps_dprint_field(sc, MPS_INFO, "NegotiatedLinkRate: %s (0x%x)\n", + mps_describe_table(mps_linkrate_names, + buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate); +} + +void +mps_print_sgl(struct mps_softc *sc, struct mps_command *cm, int offset) +{ + MPI2_SGE_SIMPLE64 *sge; + MPI2_SGE_CHAIN32 *sgc; + MPI2_REQUEST_HEADER *req; + struct mps_chain *chain = NULL; + char *frame; + u_int i = 0, flags; + + req = (MPI2_REQUEST_HEADER *)cm->cm_req; + frame = (char *)cm->cm_req; + sge = (MPI2_SGE_SIMPLE64 *)&frame[offset * 4]; + printf("SGL for command %p\n", cm); + + while (frame != NULL) { + flags = sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT; + printf("seg%d flags=0x%x len=0x%x addr=0x%jx\n", i, flags, + sge->FlagsLength & 0xffffff, mps_to_u64(&sge->Address)); + if (flags & (MPI2_SGE_FLAGS_END_OF_LIST | + MPI2_SGE_FLAGS_END_OF_BUFFER)) + break; + sge++; + i++; + if (flags & MPI2_SGE_FLAGS_LAST_ELEMENT) { + sgc = (MPI2_SGE_CHAIN32 *)sge; + printf("chain flags=0x%x len=0x%x Offset=0x%x " + "Address=0x%x\n", sgc->Flags, sgc->Length, + sgc->NextChainOffset, sgc->Address); + if (chain == NULL) + chain = TAILQ_FIRST(&cm->cm_chain_list); + else + chain = TAILQ_NEXT(chain, chain_link); + frame = (char *)chain->chain; + sge = (MPI2_SGE_SIMPLE64 *)frame; + hexdump(frame, 128, NULL, 0); + } + } +} + +void +mps_print_scsiio_cmd(struct mps_softc *sc, struct mps_command *cm) +{ + MPI2_SCSI_IO_REQUEST *req; + + req = (MPI2_SCSI_IO_REQUEST *)cm->cm_req; + mps_print_sgl(sc, cm, req->SGLOffset0); +} + diff -x .svn -urN sys/dev/mps/mps_table.h ../../stable/8/sys/dev/mps/mps_table.h --- sys/dev/mps/mps_table.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_table.h 2011-01-07 14:33:12.726814052 -0700 @@ -0,0 +1,53 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: stable/8/sys/dev/mps/mps_table.h 212420 2010-09-10 15:03:56Z ken $ + */ + +#ifndef _MPS_TABLE_H +#define _MPS_TABLE_H + +struct mps_table_lookup { + char *string; + u_int code; +}; + +char * mps_describe_table(struct mps_table_lookup *table, u_int code); +void mps_describe_devinfo(uint32_t devinfo, char *string, int len); + +extern struct mps_table_lookup mps_event_names[]; +extern struct mps_table_lookup mps_phystatus_names[]; +extern struct mps_table_lookup mps_linkrate_names[]; + +void mps_print_iocfacts(struct mps_softc *, MPI2_IOC_FACTS_REPLY *); +void mps_print_portfacts(struct mps_softc *, MPI2_PORT_FACTS_REPLY *); +void mps_print_event(struct mps_softc *, MPI2_EVENT_NOTIFICATION_REPLY *); +void mps_print_sasdev0(struct mps_softc *, MPI2_CONFIG_PAGE_SAS_DEV_0 *); +void mps_print_evt_sas(struct mps_softc *, MPI2_EVENT_NOTIFICATION_REPLY *); +void mps_print_expander1(struct mps_softc *, MPI2_CONFIG_PAGE_EXPANDER_1 *); +void mps_print_sasphy0(struct mps_softc *, MPI2_CONFIG_PAGE_SAS_PHY_0 *); +void mps_print_sgl(struct mps_softc *, struct mps_command *, int); +void mps_print_scsiio_cmd(struct mps_softc *, struct mps_command *); +#endif diff -x .svn -urN sys/dev/mps/mps_user.c ../../stable/8/sys/dev/mps/mps_user.c --- sys/dev/mps/mps_user.c 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mps_user.c 2011-01-07 14:36:19.755462069 -0700 @@ -0,0 +1,944 @@ +/*- + * Copyright (c) 2008 Yahoo!, Inc. + * All rights reserved. + * Written by: John Baldwin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * LSI MPS-Fusion Host Adapter FreeBSD userland interface + */ + +#include +__FBSDID("$FreeBSD: stable/8/sys/dev/mps/mps_user.c 212420 2010-09-10 15:03:56Z ken $"); + +#include "opt_compat.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include + +static d_open_t mps_open; +static d_close_t mps_close; +static d_ioctl_t mps_ioctl_devsw; + +static struct cdevsw mps_cdevsw = { + .d_version = D_VERSION, + .d_flags = 0, + .d_open = mps_open, + .d_close = mps_close, + .d_ioctl = mps_ioctl_devsw, + .d_name = "mps", +}; + +typedef int (mps_user_f)(struct mps_command *, struct mps_usr_command *); +static mps_user_f mpi_pre_ioc_facts; +static mps_user_f mpi_pre_port_facts; +static mps_user_f mpi_pre_fw_download; +static mps_user_f mpi_pre_fw_upload; +static mps_user_f mpi_pre_sata_passthrough; +static mps_user_f mpi_pre_smp_passthrough; +static mps_user_f mpi_pre_config; +static mps_user_f mpi_pre_sas_io_unit_control; + +static int mps_user_read_cfg_header(struct mps_softc *, + struct mps_cfg_page_req *); +static int mps_user_read_cfg_page(struct mps_softc *, + struct mps_cfg_page_req *, void *); +static int mps_user_read_extcfg_header(struct mps_softc *, + struct mps_ext_cfg_page_req *); +static int mps_user_read_extcfg_page(struct mps_softc *, + struct mps_ext_cfg_page_req *, void *); +static int mps_user_write_cfg_page(struct mps_softc *, + struct mps_cfg_page_req *, void *); +static int mps_user_setup_request(struct mps_command *, + struct mps_usr_command *); +static int mps_user_command(struct mps_softc *, struct mps_usr_command *); + +static MALLOC_DEFINE(M_MPSUSER, "mps_user", "Buffers for mps(4) ioctls"); + +int +mps_attach_user(struct mps_softc *sc) +{ + int unit; + + unit = device_get_unit(sc->mps_dev); + sc->mps_cdev = make_dev(&mps_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0640, + "mps%d", unit); + if (sc->mps_cdev == NULL) { + return (ENOMEM); + } + sc->mps_cdev->si_drv1 = sc; + return (0); +} + +void +mps_detach_user(struct mps_softc *sc) +{ + + /* XXX: do a purge of pending requests? */ + destroy_dev(sc->mps_cdev); + +} + +static int +mps_open(struct cdev *dev, int flags, int fmt, struct thread *td) +{ + + return (0); +} + +static int +mps_close(struct cdev *dev, int flags, int fmt, struct thread *td) +{ + + return (0); +} + +static int +mps_user_read_cfg_header(struct mps_softc *sc, + struct mps_cfg_page_req *page_req) +{ + MPI2_CONFIG_PAGE_HEADER *hdr; + struct mps_config_params params; + int error; + + hdr = ¶ms.hdr.Struct; + params.action = MPI2_CONFIG_ACTION_PAGE_HEADER; + params.page_address = le32toh(page_req->page_address); + hdr->PageVersion = 0; + hdr->PageLength = 0; + hdr->PageNumber = page_req->header.PageNumber; + hdr->PageType = page_req->header.PageType; + params.buffer = NULL; + params.length = 0; + params.callback = NULL; + + if ((error = mps_read_config_page(sc, ¶ms)) != 0) { + /* + * Leave the request. Without resetting the chip, it's + * still owned by it and we'll just get into trouble + * freeing it now. Mark it as abandoned so that if it + * shows up later it can be freed. + */ + mps_printf(sc, "read_cfg_header timed out\n"); + return (ETIMEDOUT); + } + + page_req->ioc_status = htole16(params.status); + if ((page_req->ioc_status & MPI2_IOCSTATUS_MASK) == + MPI2_IOCSTATUS_SUCCESS) { + bcopy(hdr, &page_req->header, sizeof(page_req->header)); + } + + return (0); +} + +static int +mps_user_read_cfg_page(struct mps_softc *sc, struct mps_cfg_page_req *page_req, + void *buf) +{ + MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr; + struct mps_config_params params; + int error; + + reqhdr = buf; + hdr = ¶ms.hdr.Struct; + hdr->PageVersion = reqhdr->PageVersion; + hdr->PageLength = reqhdr->PageLength; + hdr->PageNumber = reqhdr->PageNumber; + hdr->PageType = reqhdr->PageType & MPI2_CONFIG_PAGETYPE_MASK; + params.action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; + params.page_address = le32toh(page_req->page_address); + params.buffer = buf; + params.length = le32toh(page_req->len); + params.callback = NULL; + + if ((error = mps_read_config_page(sc, ¶ms)) != 0) { + mps_printf(sc, "mps_user_read_cfg_page timed out\n"); + return (ETIMEDOUT); + } + + page_req->ioc_status = htole16(params.status); + return (0); +} + +static int +mps_user_read_extcfg_header(struct mps_softc *sc, + struct mps_ext_cfg_page_req *ext_page_req) +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr; + struct mps_config_params params; + int error; + + hdr = ¶ms.hdr.Ext; + params.action = MPI2_CONFIG_ACTION_PAGE_HEADER; + hdr->PageVersion = ext_page_req->header.PageVersion; + hdr->ExtPageLength = 0; + hdr->PageNumber = ext_page_req->header.PageNumber; + hdr->ExtPageType = ext_page_req->header.ExtPageType; + params.page_address = le32toh(ext_page_req->page_address); + if ((error = mps_read_config_page(sc, ¶ms)) != 0) { + /* + * Leave the request. Without resetting the chip, it's + * still owned by it and we'll just get into trouble + * freeing it now. Mark it as abandoned so that if it + * shows up later it can be freed. + */ + mps_printf(sc, "mps_user_read_extcfg_header timed out\n"); + return (ETIMEDOUT); + } + + ext_page_req->ioc_status = htole16(params.status); + if ((ext_page_req->ioc_status & MPI2_IOCSTATUS_MASK) == + MPI2_IOCSTATUS_SUCCESS) { + ext_page_req->header.PageVersion = hdr->PageVersion; + ext_page_req->header.PageNumber = hdr->PageNumber; + ext_page_req->header.PageType = hdr->PageType; + ext_page_req->header.ExtPageLength = hdr->ExtPageLength; + ext_page_req->header.ExtPageType = hdr->ExtPageType; + } + + return (0); +} + +static int +mps_user_read_extcfg_page(struct mps_softc *sc, + struct mps_ext_cfg_page_req *ext_page_req, void *buf) +{ + MPI2_CONFIG_EXTENDED_PAGE_HEADER *reqhdr, *hdr; + struct mps_config_params params; + int error; + + reqhdr = buf; + hdr = ¶ms.hdr.Ext; + params.action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; + params.page_address = le32toh(ext_page_req->page_address); + hdr->PageVersion = reqhdr->PageVersion; + hdr->PageNumber = reqhdr->PageNumber; + hdr->ExtPageType = reqhdr->ExtPageType; + hdr->ExtPageLength = reqhdr->ExtPageLength; + params.buffer = buf; + params.length = le32toh(ext_page_req->len); + params.callback = NULL; + + if ((error = mps_read_config_page(sc, ¶ms)) != 0) { + mps_printf(sc, "mps_user_read_extcfg_page timed out\n"); + return (ETIMEDOUT); + } + + ext_page_req->ioc_status = htole16(params.status); + return (0); +} + +static int +mps_user_write_cfg_page(struct mps_softc *sc, + struct mps_cfg_page_req *page_req, void *buf) +{ + MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr; + struct mps_config_params params; + u_int hdr_attr; + int error; + + reqhdr = buf; + hdr = ¶ms.hdr.Struct; + hdr_attr = reqhdr->PageType & MPI2_CONFIG_PAGEATTR_MASK; + if (hdr_attr != MPI2_CONFIG_PAGEATTR_CHANGEABLE && + hdr_attr != MPI2_CONFIG_PAGEATTR_PERSISTENT) { + mps_printf(sc, "page type 0x%x not changeable\n", + reqhdr->PageType & MPI2_CONFIG_PAGETYPE_MASK); + return (EINVAL); + } + + /* + * There isn't any point in restoring stripped out attributes + * if you then mask them going down to issue the request. + */ + + hdr->PageVersion = reqhdr->PageVersion; + hdr->PageLength = reqhdr->PageLength; + hdr->PageNumber = reqhdr->PageNumber; + hdr->PageType = reqhdr->PageType; + params.action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT; + params.page_address = le32toh(page_req->page_address); + params.buffer = buf; + params.length = le32toh(page_req->len); + params.callback = NULL; + + if ((error = mps_write_config_page(sc, ¶ms)) != 0) { + mps_printf(sc, "mps_write_cfg_page timed out\n"); + return (ETIMEDOUT); + } + + page_req->ioc_status = htole16(params.status); + return (0); +} + +void +mpi_init_sge(struct mps_command *cm, void *req, void *sge) +{ + int off, space; + + space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4; + off = (uintptr_t)sge - (uintptr_t)req; + + KASSERT(off < space, ("bad pointers %p %p, off %d, space %d", + req, sge, off, space)); + + cm->cm_sge = sge; + cm->cm_sglsize = space - off; +} + +/* + * Prepare the mps_command for an IOC_FACTS request. + */ +static int +mpi_pre_ioc_facts(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_IOC_FACTS_REQUEST *req = (void *)cm->cm_req; + MPI2_IOC_FACTS_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * Prepare the mps_command for a PORT_FACTS request. + */ +static int +mpi_pre_port_facts(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_PORT_FACTS_REQUEST *req = (void *)cm->cm_req; + MPI2_PORT_FACTS_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * Prepare the mps_command for a FW_DOWNLOAD request. + */ +static int +mpi_pre_fw_download(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_FW_DOWNLOAD_REQUEST *req = (void *)cm->cm_req; + MPI2_FW_DOWNLOAD_REPLY *rpl; + MPI2_FW_DOWNLOAD_TCSGE tc; + int error; + + /* + * This code assumes there is room in the request's SGL for + * the TransactionContext plus at least a SGL chain element. + */ + CTASSERT(sizeof req->SGL >= sizeof tc + MPS_SGC_SIZE); + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + if (cmd->len == 0) + return (EINVAL); + + error = copyin(cmd->buf, cm->cm_data, cmd->len); + if (error != 0) + return (error); + + mpi_init_sge(cm, req, &req->SGL); + bzero(&tc, sizeof tc); + + /* + * For now, the F/W image must be provided in a single request. + */ + if ((req->MsgFlags & MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT) == 0) + return (EINVAL); + if (req->TotalImageSize != cmd->len) + return (EINVAL); + + /* + * The value of the first two elements is specified in the + * Fusion-MPT Message Passing Interface document. + */ + tc.ContextSize = 0; + tc.DetailsLength = 12; + tc.ImageOffset = 0; + tc.ImageSize = cmd->len; + + cm->cm_flags |= MPS_CM_FLAGS_DATAOUT; + + return (mps_push_sge(cm, &tc, sizeof tc, 0)); +} + +/* + * Prepare the mps_command for a FW_UPLOAD request. + */ +static int +mpi_pre_fw_upload(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_FW_UPLOAD_REQUEST *req = (void *)cm->cm_req; + MPI2_FW_UPLOAD_REPLY *rpl; + MPI2_FW_UPLOAD_TCSGE tc; + + /* + * This code assumes there is room in the request's SGL for + * the TransactionContext plus at least a SGL chain element. + */ + CTASSERT(sizeof req->SGL >= sizeof tc + MPS_SGC_SIZE); + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + if (cmd->len == 0) { + /* Perhaps just asking what the size of the fw is? */ + return (0); + } + + bzero(&tc, sizeof tc); + + /* + * The value of the first two elements is specified in the + * Fusion-MPT Message Passing Interface document. + */ + tc.ContextSize = 0; + tc.DetailsLength = 12; + /* + * XXX Is there any reason to fetch a partial image? I.e. to + * set ImageOffset to something other than 0? + */ + tc.ImageOffset = 0; + tc.ImageSize = cmd->len; + + return (mps_push_sge(cm, &tc, sizeof tc, 0)); +} + +/* + * Prepare the mps_command for a SATA_PASSTHROUGH request. + */ +static int +mpi_pre_sata_passthrough(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_SATA_PASSTHROUGH_REQUEST *req = (void *)cm->cm_req; + MPI2_SATA_PASSTHROUGH_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + return (0); +} + +/* + * Prepare the mps_command for a SMP_PASSTHROUGH request. + */ +static int +mpi_pre_smp_passthrough(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_SMP_PASSTHROUGH_REQUEST *req = (void *)cm->cm_req; + MPI2_SMP_PASSTHROUGH_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->SGL); + return (0); +} + +/* + * Prepare the mps_command for a CONFIG request. + */ +static int +mpi_pre_config(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_CONFIG_REQUEST *req = (void *)cm->cm_req; + MPI2_CONFIG_REPLY *rpl; + + if (cmd->req_len != sizeof *req) + return (EINVAL); + if (cmd->rpl_len != sizeof *rpl) + return (EINVAL); + + mpi_init_sge(cm, req, &req->PageBufferSGE); + return (0); +} + +/* + * Prepare the mps_command for a SAS_IO_UNIT_CONTROL request. + */ +static int +mpi_pre_sas_io_unit_control(struct mps_command *cm, + struct mps_usr_command *cmd) +{ + + cm->cm_sge = NULL; + cm->cm_sglsize = 0; + return (0); +} + +/* + * A set of functions to prepare an mps_command for the various + * supported requests. + */ +struct mps_user_func { + U8 Function; + mps_user_f *f_pre; +} mps_user_func_list[] = { + { MPI2_FUNCTION_IOC_FACTS, mpi_pre_ioc_facts }, + { MPI2_FUNCTION_PORT_FACTS, mpi_pre_port_facts }, + { MPI2_FUNCTION_FW_DOWNLOAD, mpi_pre_fw_download }, + { MPI2_FUNCTION_FW_UPLOAD, mpi_pre_fw_upload }, + { MPI2_FUNCTION_SATA_PASSTHROUGH, mpi_pre_sata_passthrough }, + { MPI2_FUNCTION_SMP_PASSTHROUGH, mpi_pre_smp_passthrough}, + { MPI2_FUNCTION_CONFIG, mpi_pre_config}, + { MPI2_FUNCTION_SAS_IO_UNIT_CONTROL, mpi_pre_sas_io_unit_control }, + { 0xFF, NULL } /* list end */ +}; + +static int +mps_user_setup_request(struct mps_command *cm, struct mps_usr_command *cmd) +{ + MPI2_REQUEST_HEADER *hdr = (MPI2_REQUEST_HEADER *)cm->cm_req; + struct mps_user_func *f; + + for (f = mps_user_func_list; f->f_pre != NULL; f++) { + if (hdr->Function == f->Function) + return (f->f_pre(cm, cmd)); + } + return (EINVAL); +} + +static int +mps_user_command(struct mps_softc *sc, struct mps_usr_command *cmd) +{ + MPI2_REQUEST_HEADER *hdr; + MPI2_DEFAULT_REPLY *rpl; + void *buf = NULL; + struct mps_command *cm = NULL; + int err = 0; + int sz; + + mps_lock(sc); + cm = mps_alloc_command(sc); + + if (cm == NULL) { + mps_printf(sc, "mps_user_command: no mps requests\n"); + err = ENOMEM; + goto Ret; + } + mps_unlock(sc); + + hdr = (MPI2_REQUEST_HEADER *)cm->cm_req; + + mps_dprint(sc, MPS_INFO, "mps_user_command: req %p %d rpl %p %d\n", + cmd->req, cmd->req_len, cmd->rpl, cmd->rpl_len ); + + if (cmd->req_len > (int)sc->facts->IOCRequestFrameSize * 4) { + err = EINVAL; + goto RetFreeUnlocked; + } + err = copyin(cmd->req, hdr, cmd->req_len); + if (err != 0) + goto RetFreeUnlocked; + + mps_dprint(sc, MPS_INFO, "mps_user_command: Function %02X " + "MsgFlags %02X\n", hdr->Function, hdr->MsgFlags ); + + err = mps_user_setup_request(cm, cmd); + if (err != 0) { + mps_printf(sc, "mps_user_command: unsupported function 0x%X\n", + hdr->Function ); + goto RetFreeUnlocked; + } + + if (cmd->len > 0) { + buf = malloc(cmd->len, M_MPSUSER, M_WAITOK|M_ZERO); + cm->cm_data = buf; + cm->cm_length = cmd->len; + } else { + cm->cm_data = NULL; + cm->cm_length = 0; + } + + cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_WAKEUP; + cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; + + mps_lock(sc); + err = mps_map_command(sc, cm); + + if (err != 0 && err != EINPROGRESS) { + mps_printf(sc, "%s: invalid request: error %d\n", + __func__, err); + goto Ret; + } + msleep(cm, &sc->mps_mtx, 0, "mpsuser", 0); + + rpl = (MPI2_DEFAULT_REPLY *)cm->cm_reply; + sz = rpl->MsgLength * 4; + + if (sz > cmd->rpl_len) { + mps_printf(sc, + "mps_user_command: reply buffer too small %d required %d\n", + cmd->rpl_len, sz ); + err = EINVAL; + sz = cmd->rpl_len; + } + + mps_unlock(sc); + copyout(rpl, cmd->rpl, sz); + if (buf != NULL) + copyout(buf, cmd->buf, cmd->len); + mps_dprint(sc, MPS_INFO, "mps_user_command: reply size %d\n", sz ); + +RetFreeUnlocked: + mps_lock(sc); + if (cm != NULL) + mps_free_command(sc, cm); +Ret: + mps_unlock(sc); + if (buf != NULL) + free(buf, M_MPSUSER); + return (err); +} + +static int +mps_ioctl(struct cdev *dev, u_long cmd, void *arg, int flag, + struct thread *td) +{ + struct mps_softc *sc; + struct mps_cfg_page_req *page_req; + struct mps_ext_cfg_page_req *ext_page_req; + void *mps_page; + int error; + + mps_page = NULL; + sc = dev->si_drv1; + page_req = (void *)arg; + ext_page_req = (void *)arg; + + switch (cmd) { + case MPSIO_READ_CFG_HEADER: + mps_lock(sc); + error = mps_user_read_cfg_header(sc, page_req); + mps_unlock(sc); + break; + case MPSIO_READ_CFG_PAGE: + mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK | M_ZERO); + error = copyin(page_req->buf, mps_page, + sizeof(MPI2_CONFIG_PAGE_HEADER)); + if (error) + break; + mps_lock(sc); + error = mps_user_read_cfg_page(sc, page_req, mps_page); + mps_unlock(sc); + if (error) + break; + error = copyout(mps_page, page_req->buf, page_req->len); + break; + case MPSIO_READ_EXT_CFG_HEADER: + mps_lock(sc); + error = mps_user_read_extcfg_header(sc, ext_page_req); + mps_unlock(sc); + break; + case MPSIO_READ_EXT_CFG_PAGE: + mps_page = malloc(ext_page_req->len, M_MPSUSER, M_WAITOK|M_ZERO); + error = copyin(ext_page_req->buf, mps_page, + sizeof(MPI2_CONFIG_EXTENDED_PAGE_HEADER)); + if (error) + break; + mps_lock(sc); + error = mps_user_read_extcfg_page(sc, ext_page_req, mps_page); + mps_unlock(sc); + if (error) + break; + error = copyout(mps_page, ext_page_req->buf, ext_page_req->len); + break; + case MPSIO_WRITE_CFG_PAGE: + mps_page = malloc(page_req->len, M_MPSUSER, M_WAITOK|M_ZERO); + error = copyin(page_req->buf, mps_page, page_req->len); + if (error) + break; + mps_lock(sc); + error = mps_user_write_cfg_page(sc, page_req, mps_page); + mps_unlock(sc); + break; + case MPSIO_MPS_COMMAND: + error = mps_user_command(sc, (struct mps_usr_command *)arg); + break; + default: + error = ENOIOCTL; + break; + } + + if (mps_page != NULL) + free(mps_page, M_MPSUSER); + + return (error); +} + +#ifdef COMPAT_FREEBSD32 + +/* Macros from compat/freebsd32/freebsd32.h */ +#define PTRIN(v) (void *)(uintptr_t)(v) +#define PTROUT(v) (uint32_t)(uintptr_t)(v) + +#define CP(src,dst,fld) do { (dst).fld = (src).fld; } while (0) +#define PTRIN_CP(src,dst,fld) \ + do { (dst).fld = PTRIN((src).fld); } while (0) +#define PTROUT_CP(src,dst,fld) \ + do { (dst).fld = PTROUT((src).fld); } while (0) + +struct mps_cfg_page_req32 { + MPI2_CONFIG_PAGE_HEADER header; + uint32_t page_address; + uint32_t buf; + int len; + uint16_t ioc_status; +}; + +struct mps_ext_cfg_page_req32 { + MPI2_CONFIG_EXTENDED_PAGE_HEADER header; + uint32_t page_address; + uint32_t buf; + int len; + uint16_t ioc_status; +}; + +struct mps_raid_action32 { + uint8_t action; + uint8_t volume_bus; + uint8_t volume_id; + uint8_t phys_disk_num; + uint32_t action_data_word; + uint32_t buf; + int len; + uint32_t volume_status; + uint32_t action_data[4]; + uint16_t action_status; + uint16_t ioc_status; + uint8_t write; +}; + +struct mps_usr_command32 { + uint32_t req; + uint32_t req_len; + uint32_t rpl; + uint32_t rpl_len; + uint32_t buf; + int len; + uint32_t flags; +}; + +#define MPSIO_READ_CFG_HEADER32 _IOWR('M', 200, struct mps_cfg_page_req32) +#define MPSIO_READ_CFG_PAGE32 _IOWR('M', 201, struct mps_cfg_page_req32) +#define MPSIO_READ_EXT_CFG_HEADER32 _IOWR('M', 202, struct mps_ext_cfg_page_req32) +#define MPSIO_READ_EXT_CFG_PAGE32 _IOWR('M', 203, struct mps_ext_cfg_page_req32) +#define MPSIO_WRITE_CFG_PAGE32 _IOWR('M', 204, struct mps_cfg_page_req32) +#define MPSIO_RAID_ACTION32 _IOWR('M', 205, struct mps_raid_action32) +#define MPSIO_MPS_COMMAND32 _IOWR('M', 210, struct mps_usr_command32) + +static int +mps_ioctl32(struct cdev *dev, u_long cmd32, void *_arg, int flag, + struct thread *td) +{ + struct mps_cfg_page_req32 *page32 = _arg; + struct mps_ext_cfg_page_req32 *ext32 = _arg; + struct mps_raid_action32 *raid32 = _arg; + struct mps_usr_command32 *user32 = _arg; + union { + struct mps_cfg_page_req page; + struct mps_ext_cfg_page_req ext; + struct mps_raid_action raid; + struct mps_usr_command user; + } arg; + u_long cmd; + int error; + + switch (cmd32) { + case MPSIO_READ_CFG_HEADER32: + case MPSIO_READ_CFG_PAGE32: + case MPSIO_WRITE_CFG_PAGE32: + if (cmd32 == MPSIO_READ_CFG_HEADER32) + cmd = MPSIO_READ_CFG_HEADER; + else if (cmd32 == MPSIO_READ_CFG_PAGE32) + cmd = MPSIO_READ_CFG_PAGE; + else + cmd = MPSIO_WRITE_CFG_PAGE; + CP(*page32, arg.page, header); + CP(*page32, arg.page, page_address); + PTRIN_CP(*page32, arg.page, buf); + CP(*page32, arg.page, len); + CP(*page32, arg.page, ioc_status); + break; + + case MPSIO_READ_EXT_CFG_HEADER32: + case MPSIO_READ_EXT_CFG_PAGE32: + if (cmd32 == MPSIO_READ_EXT_CFG_HEADER32) + cmd = MPSIO_READ_EXT_CFG_HEADER; + else + cmd = MPSIO_READ_EXT_CFG_PAGE; + CP(*ext32, arg.ext, header); + CP(*ext32, arg.ext, page_address); + PTRIN_CP(*ext32, arg.ext, buf); + CP(*ext32, arg.ext, len); + CP(*ext32, arg.ext, ioc_status); + break; + + case MPSIO_RAID_ACTION32: + cmd = MPSIO_RAID_ACTION; + CP(*raid32, arg.raid, action); + CP(*raid32, arg.raid, volume_bus); + CP(*raid32, arg.raid, volume_id); + CP(*raid32, arg.raid, phys_disk_num); + CP(*raid32, arg.raid, action_data_word); + PTRIN_CP(*raid32, arg.raid, buf); + CP(*raid32, arg.raid, len); + CP(*raid32, arg.raid, volume_status); + bcopy(raid32->action_data, arg.raid.action_data, + sizeof arg.raid.action_data); + CP(*raid32, arg.raid, ioc_status); + CP(*raid32, arg.raid, write); + break; + + case MPSIO_MPS_COMMAND32: + cmd = MPSIO_MPS_COMMAND; + PTRIN_CP(*user32, arg.user, req); + CP(*user32, arg.user, req_len); + PTRIN_CP(*user32, arg.user, rpl); + CP(*user32, arg.user, rpl_len); + PTRIN_CP(*user32, arg.user, buf); + CP(*user32, arg.user, len); + CP(*user32, arg.user, flags); + break; + default: + return (ENOIOCTL); + } + + error = mps_ioctl(dev, cmd, &arg, flag, td); + if (error == 0 && (cmd32 & IOC_OUT) != 0) { + switch (cmd32) { + case MPSIO_READ_CFG_HEADER32: + case MPSIO_READ_CFG_PAGE32: + case MPSIO_WRITE_CFG_PAGE32: + CP(arg.page, *page32, header); + CP(arg.page, *page32, page_address); + PTROUT_CP(arg.page, *page32, buf); + CP(arg.page, *page32, len); + CP(arg.page, *page32, ioc_status); + break; + + case MPSIO_READ_EXT_CFG_HEADER32: + case MPSIO_READ_EXT_CFG_PAGE32: + CP(arg.ext, *ext32, header); + CP(arg.ext, *ext32, page_address); + PTROUT_CP(arg.ext, *ext32, buf); + CP(arg.ext, *ext32, len); + CP(arg.ext, *ext32, ioc_status); + break; + + case MPSIO_RAID_ACTION32: + CP(arg.raid, *raid32, action); + CP(arg.raid, *raid32, volume_bus); + CP(arg.raid, *raid32, volume_id); + CP(arg.raid, *raid32, phys_disk_num); + CP(arg.raid, *raid32, action_data_word); + PTROUT_CP(arg.raid, *raid32, buf); + CP(arg.raid, *raid32, len); + CP(arg.raid, *raid32, volume_status); + bcopy(arg.raid.action_data, raid32->action_data, + sizeof arg.raid.action_data); + CP(arg.raid, *raid32, ioc_status); + CP(arg.raid, *raid32, write); + break; + + case MPSIO_MPS_COMMAND32: + PTROUT_CP(arg.user, *user32, req); + CP(arg.user, *user32, req_len); + PTROUT_CP(arg.user, *user32, rpl); + CP(arg.user, *user32, rpl_len); + PTROUT_CP(arg.user, *user32, buf); + CP(arg.user, *user32, len); + CP(arg.user, *user32, flags); + break; + } + } + + return (error); +} +#endif /* COMPAT_FREEBSD32 */ + +static int +mps_ioctl_devsw(struct cdev *dev, u_long com, caddr_t arg, int flag, + struct thread *td) +{ +#ifdef COMPAT_FREEBSD32 + if (SV_CURPROC_FLAG(SV_ILP32)) + return (mps_ioctl32(dev, com, arg, flag, td)); +#endif + return (mps_ioctl(dev, com, arg, flag, td)); +} diff -x .svn -urN sys/dev/mps/mpsvar.h ../../stable/8/sys/dev/mps/mpsvar.h --- sys/dev/mps/mpsvar.h 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/dev/mps/mpsvar.h 2011-01-07 14:37:54.308555093 -0700 @@ -0,0 +1,390 @@ +/*- + * Copyright (c) 2009 Yahoo! Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: stable/8/sys/dev/mps/mpsvar.h 212420 2010-09-10 15:03:56Z ken $ + */ + +#ifndef _MPSVAR_H +#define _MPSVAR_H + +#define MPS_DB_MAX_WAIT 2500 + +#define MPS_REQ_FRAMES 1024 +#define MPS_EVT_REPLY_FRAMES 32 +#define MPS_REPLY_FRAMES MPS_REQ_FRAMES +#define MPS_CHAIN_FRAMES 1024 +#define MPS_SENSE_LEN SSD_FULL_SIZE +#define MPS_MSI_COUNT 1 +#define MPS_SGE64_SIZE 12 +#define MPS_SGE32_SIZE 8 +#define MPS_SGC_SIZE 8 + +#define MPS_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ + +struct mps_softc; +struct mps_command; +struct mpssas_softc; +struct mpssas_target; + +MALLOC_DECLARE(M_MPT2); + +typedef void mps_evt_callback_t(struct mps_softc *, uintptr_t, + MPI2_EVENT_NOTIFICATION_REPLY *reply); +typedef void mps_command_callback_t(struct mps_softc *, struct mps_command *cm); + +struct mps_chain { + TAILQ_ENTRY(mps_chain) chain_link; + MPI2_SGE_IO_UNION *chain; + uint32_t chain_busaddr; +}; + +/* + * This needs to be at least 2 to support SMP passthrough. + */ +#define MPS_IOVEC_COUNT 2 + +struct mps_command { + TAILQ_ENTRY(mps_command) cm_link; + struct mps_softc *cm_sc; + void *cm_data; + u_int cm_length; + struct uio cm_uio; + struct iovec cm_iovec[MPS_IOVEC_COUNT]; + u_int cm_max_segs; + u_int cm_sglsize; + MPI2_SGE_IO_UNION *cm_sge; + uint8_t *cm_req; + uint8_t *cm_reply; + uint32_t cm_reply_data; + mps_command_callback_t *cm_complete; + void *cm_complete_data; + struct mpssas_target *cm_targ; + MPI2_REQUEST_DESCRIPTOR_UNION cm_desc; + u_int cm_flags; +#define MPS_CM_FLAGS_POLLED (1 << 0) +#define MPS_CM_FLAGS_COMPLETE (1 << 1) +#define MPS_CM_FLAGS_SGE_SIMPLE (1 << 2) +#define MPS_CM_FLAGS_DATAOUT (1 << 3) +#define MPS_CM_FLAGS_DATAIN (1 << 4) +#define MPS_CM_FLAGS_WAKEUP (1 << 5) +#define MPS_CM_FLAGS_ACTIVE (1 << 6) +#define MPS_CM_FLAGS_USE_UIO (1 << 7) +#define MPS_CM_FLAGS_SMP_PASS (1 << 8) + u_int cm_state; +#define MPS_CM_STATE_FREE 0 +#define MPS_CM_STATE_BUSY 1 +#define MPS_CM_STATE_TIMEDOUT 2 + bus_dmamap_t cm_dmamap; + struct scsi_sense_data *cm_sense; + TAILQ_HEAD(, mps_chain) cm_chain_list; + uint32_t cm_req_busaddr; + uint32_t cm_sense_busaddr; + struct callout cm_callout; +}; + +struct mps_event_handle { + TAILQ_ENTRY(mps_event_handle) eh_list; + mps_evt_callback_t *callback; + void *data; + uint8_t mask[16]; +}; + +struct mps_softc { + device_t mps_dev; + struct cdev *mps_cdev; + u_int mps_flags; +#define MPS_FLAGS_INTX (1 << 0) +#define MPS_FLAGS_MSI (1 << 1) +#define MPS_FLAGS_BUSY (1 << 2) +#define MPS_FLAGS_SHUTDOWN (1 << 3) + u_int mps_debug; + u_int allow_multiple_tm_cmds; + int tm_cmds_active; + struct sysctl_ctx_list sysctl_ctx; + struct sysctl_oid *sysctl_tree; + struct mps_command *commands; + struct mps_chain *chains; + struct callout periodic; + + struct mpssas_softc *sassc; + + TAILQ_HEAD(, mps_command) req_list; + TAILQ_HEAD(, mps_chain) chain_list; + TAILQ_HEAD(, mps_command) tm_list; + int replypostindex; + int replyfreeindex; + + struct resource *mps_regs_resource; + bus_space_handle_t mps_bhandle; + bus_space_tag_t mps_btag; + int mps_regs_rid; + + bus_dma_tag_t mps_parent_dmat; + bus_dma_tag_t buffer_dmat; + + MPI2_IOC_FACTS_REPLY *facts; + MPI2_PORT_FACTS_REPLY *pfacts; + int num_reqs; + int num_replies; + int fqdepth; /* Free queue */ + int pqdepth; /* Post queue */ + + uint8_t event_mask[16]; + TAILQ_HEAD(, mps_event_handle) event_list; + struct mps_event_handle *mps_log_eh; + + struct mtx mps_mtx; + struct intr_config_hook mps_ich; + struct resource *mps_irq[MPS_MSI_COUNT]; + void *mps_intrhand[MPS_MSI_COUNT]; + int mps_irq_rid[MPS_MSI_COUNT]; + + uint8_t *req_frames; + bus_addr_t req_busaddr; + bus_dma_tag_t req_dmat; + bus_dmamap_t req_map; + + uint8_t *reply_frames; + bus_addr_t reply_busaddr; + bus_dma_tag_t reply_dmat; + bus_dmamap_t reply_map; + + struct scsi_sense_data *sense_frames; + bus_addr_t sense_busaddr; + bus_dma_tag_t sense_dmat; + bus_dmamap_t sense_map; + + uint8_t *chain_frames; + bus_addr_t chain_busaddr; + bus_dma_tag_t chain_dmat; + bus_dmamap_t chain_map; + + MPI2_REPLY_DESCRIPTORS_UNION *post_queue; + bus_addr_t post_busaddr; + uint32_t *free_queue; + bus_addr_t free_busaddr; + bus_dma_tag_t queues_dmat; + bus_dmamap_t queues_map; +}; + +struct mps_config_params { + MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr; + u_int action; + u_int page_address; /* Attributes, not a phys address */ + u_int status; + void *buffer; + u_int length; + int timeout; + void (*callback)(struct mps_softc *, struct mps_config_params *); + void *cbdata; +}; + +static __inline uint32_t +mps_regread(struct mps_softc *sc, uint32_t offset) +{ + return (bus_space_read_4(sc->mps_btag, sc->mps_bhandle, offset)); +} + +static __inline void +mps_regwrite(struct mps_softc *sc, uint32_t offset, uint32_t val) +{ + bus_space_write_4(sc->mps_btag, sc->mps_bhandle, offset, val); +} + +static __inline void +mps_free_reply(struct mps_softc *sc, uint32_t busaddr) +{ + + if (++sc->replyfreeindex >= sc->fqdepth) + sc->replyfreeindex = 0; + sc->free_queue[sc->replyfreeindex] = busaddr; + mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex); +} + +static __inline struct mps_chain * +mps_alloc_chain(struct mps_softc *sc) +{ + struct mps_chain *chain; + + if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) + TAILQ_REMOVE(&sc->chain_list, chain, chain_link); + return (chain); +} + +static __inline void +mps_free_chain(struct mps_softc *sc, struct mps_chain *chain) +{ +#if 0 + bzero(chain->chain, 128); +#endif + TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link); +} + +static __inline void +mps_free_command(struct mps_softc *sc, struct mps_command *cm) +{ + struct mps_chain *chain, *chain_temp; + + if (cm->cm_reply != NULL) { + mps_free_reply(sc, cm->cm_reply_data); + cm->cm_reply = NULL; + } + cm->cm_flags = 0; + cm->cm_complete = NULL; + cm->cm_complete_data = NULL; + cm->cm_targ = 0; + cm->cm_max_segs = 0; + cm->cm_state = MPS_CM_STATE_FREE; + TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) { + TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link); + mps_free_chain(sc, chain); + } + TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link); +} + +static __inline struct mps_command * +mps_alloc_command(struct mps_softc *sc) +{ + struct mps_command *cm; + + cm = TAILQ_FIRST(&sc->req_list); + if (cm == NULL) + return (NULL); + + TAILQ_REMOVE(&sc->req_list, cm, cm_link); + KASSERT(cm->cm_state == MPS_CM_STATE_FREE, ("mps: Allocating busy command\n")); + cm->cm_state = MPS_CM_STATE_BUSY; + return (cm); +} + +static __inline void +mps_lock(struct mps_softc *sc) +{ + mtx_lock(&sc->mps_mtx); +} + +static __inline void +mps_unlock(struct mps_softc *sc) +{ + mtx_unlock(&sc->mps_mtx); +} + +#define MPS_INFO (1 << 0) +#define MPS_TRACE (1 << 1) +#define MPS_FAULT (1 << 2) +#define MPS_EVENT (1 << 3) +#define MPS_LOG (1 << 4) + +#define mps_printf(sc, args...) \ + device_printf((sc)->mps_dev, ##args) + +#define mps_dprint(sc, level, msg, args...) \ +do { \ + if (sc->mps_debug & level) \ + device_printf(sc->mps_dev, msg, ##args); \ +} while (0) + +#define mps_dprint_field(sc, level, msg, args...) \ +do { \ + if (sc->mps_debug & level) \ + printf("\t" msg, ##args); \ +} while (0) + +#define MPS_PRINTFIELD_START(sc, tag...) \ + mps_dprint((sc), MPS_INFO, ##tag); \ + mps_dprint_field((sc), MPS_INFO, ":\n") +#define MPS_PRINTFIELD_END(sc, tag) \ + mps_dprint((sc), MPS_INFO, tag "\n") +#define MPS_PRINTFIELD(sc, facts, attr, fmt) \ + mps_dprint_field((sc), MPS_INFO, #attr ": " #fmt "\n", (facts)->attr) + +#define MPS_EVENTFIELD_START(sc, tag...) \ + mps_dprint((sc), MPS_EVENT, ##tag); \ + mps_dprint_field((sc), MPS_EVENT, ":\n") +#define MPS_EVENTFIELD(sc, facts, attr, fmt) \ + mps_dprint_field((sc), MPS_EVENT, #attr ": " #fmt "\n", (facts)->attr) + +static __inline void +mps_from_u64(uint64_t data, U64 *mps) +{ + (mps)->High = (uint32_t)((data) >> 32); + (mps)->Low = (uint32_t)((data) & 0xffffffff); +} + +static __inline uint64_t +mps_to_u64(U64 *data) +{ + + return (((uint64_t)data->High << 32) | data->Low); +} + +static __inline void +mps_mask_intr(struct mps_softc *sc) +{ + uint32_t mask; + + mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); + mask |= MPI2_HIM_REPLY_INT_MASK; + mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); +} + +static __inline void +mps_unmask_intr(struct mps_softc *sc) +{ + uint32_t mask; + + mask = mps_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET); + mask &= ~MPI2_HIM_REPLY_INT_MASK; + mps_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask); +} + +int mps_pci_setup_interrupts(struct mps_softc *); +int mps_attach(struct mps_softc *sc); +int mps_free(struct mps_softc *sc); +void mps_intr(void *); +void mps_intr_msi(void *); +void mps_intr_locked(void *); +int mps_register_events(struct mps_softc *, uint8_t *, mps_evt_callback_t *, + void *, struct mps_event_handle **); +int mps_update_events(struct mps_softc *, struct mps_event_handle *, uint8_t *); +int mps_deregister_events(struct mps_softc *, struct mps_event_handle *); +int mps_request_polled(struct mps_softc *sc, struct mps_command *cm); +void mps_enqueue_request(struct mps_softc *, struct mps_command *); +int mps_push_sge(struct mps_command *, void *, size_t, int); +int mps_add_dmaseg(struct mps_command *, vm_paddr_t, size_t, u_int, int); +int mps_attach_sas(struct mps_softc *sc); +int mps_detach_sas(struct mps_softc *sc); +int mps_map_command(struct mps_softc *sc, struct mps_command *cm); +int mps_read_config_page(struct mps_softc *, struct mps_config_params *); +int mps_write_config_page(struct mps_softc *, struct mps_config_params *); +void mps_memaddr_cb(void *, bus_dma_segment_t *, int , int ); +void mpi_init_sge(struct mps_command *cm, void *req, void *sge); +int mps_attach_user(struct mps_softc *); +void mps_detach_user(struct mps_softc *); + +SYSCTL_DECL(_hw_mps); + +#endif + diff -x .svn -urN sys/dev/siba/siba_bwn.c ../../stable/8/sys/dev/siba/siba_bwn.c --- sys/dev/siba/siba_bwn.c 2011-01-07 15:00:45.469801884 -0700 +++ ../../stable/8/sys/dev/siba/siba_bwn.c 2011-01-07 14:37:44.836153655 -0700 @@ -326,7 +326,7 @@ siba_bwn_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { struct siba_dev_softc *sd; - struct siba_softc *siba;; + struct siba_softc *siba; sd = device_get_ivars(child); siba = sd->sd_bus; diff -x .svn -urN sys/dev/sis/if_sisreg.h ../../stable/8/sys/dev/sis/if_sisreg.h --- sys/dev/sis/if_sisreg.h 2011-01-07 15:00:36.994918194 -0700 +++ ../../stable/8/sys/dev/sis/if_sisreg.h 2011-01-07 14:37:44.596577947 -0700 @@ -497,7 +497,7 @@ int sis_tx_prod; int sis_tx_cons; int sis_tx_cnt; - int sis_rx_cons;; + int sis_rx_cons; bus_addr_t sis_rx_paddr; bus_addr_t sis_tx_paddr; struct callout sis_stat_ch; diff -x .svn -urN sys/mips/mips/mp_machdep.c ../../stable/8/sys/mips/mips/mp_machdep.c --- sys/mips/mips/mp_machdep.c 2011-01-07 15:00:11.980853153 -0700 +++ ../../stable/8/sys/mips/mips/mp_machdep.c 2011-01-07 14:37:44.269017853 -0700 @@ -165,7 +165,7 @@ #if 0 case IPI_HARDCLOCK: CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); - hardclockintr();; + hardclockintr(); break; #endif default: diff -x .svn -urN sys/modules/Makefile ../../stable/8/sys/modules/Makefile --- sys/modules/Makefile 2011-02-16 10:02:33.828579762 -0700 +++ ../../stable/8/sys/modules/Makefile 2011-02-16 10:08:41.397265959 -0700 @@ -186,6 +186,7 @@ mmc \ mmcsd \ ${_mpt} \ + mps \ mqueue \ msdosfs \ msdosfs_iconv \ diff -x .svn -urN sys/modules/mps/Makefile ../../stable/8/sys/modules/mps/Makefile --- sys/modules/mps/Makefile 1969-12-31 17:00:00.000000000 -0700 +++ ../../stable/8/sys/modules/mps/Makefile 2011-02-16 10:24:45.658558415 -0700 @@ -0,0 +1,14 @@ +# $FreeBSD: stable/8/sys/modules/mps/Makefile 212420 2010-09-10 15:03:56Z ken $ + +.PATH: ${.CURDIR}/../../dev/mps + +KMOD= mps +SRCS= mps_pci.c mps.c mps_sas.c mps_table.c mps_user.c +SRCS+= opt_compat.h +SRCS+= opt_cam.h +SRCS+= device_if.h bus_if.h pci_if.h + +#CFLAGS += -DMPS_DEBUG +DEBUG += -g + +.include --qMm9M+Fa2AknHoGS-- From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 02:18:31 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3CD66106566B for ; Thu, 17 Feb 2011 02:18:31 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id A438C8FC12 for ; Thu, 17 Feb 2011 02:18:30 +0000 (UTC) Received: by wwf26 with SMTP id 26so2043587wwf.31 for ; Wed, 16 Feb 2011 18:18:29 -0800 (PST) Received: by 10.216.5.65 with SMTP id 43mr1269544wek.9.1297909094592; Wed, 16 Feb 2011 18:18:14 -0800 (PST) Received: from [192.168.0.20] (paris.c-mal.com [88.170.200.60]) by mx.google.com with ESMTPS id r57sm169024wes.25.2011.02.16.18.18.13 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 16 Feb 2011 18:18:13 -0800 (PST) References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> <20110216203542.GA41226@nargothrond.kdm.org> In-Reply-To: <20110216203542.GA41226@nargothrond.kdm.org> Mime-Version: 1.0 (iPhone Mail 8A293) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii Message-Id: X-Mailer: iPhone Mail (8A293) From: Damien Fleuriot Date: Thu, 17 Feb 2011 03:17:57 +0100 To: "Kenneth D. Merry" Cc: "freebsd-stable@freebsd.org" , Dmitry Morozovsky , Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 02:18:31 -0000 On 16 Feb 2011, at 21:35, "Kenneth D. Merry" wrote: > On Wed, Feb 16, 2011 at 22:07:11 +0300, Dmitry Morozovsky wrote: >> On Wed, 16 Feb 2011, Kenneth D. Merry wrote: >>=20 >> KDM> > Ah that makes sense. I'm a bit reluctant to use -current on this p= articular=20 >> KDM> > machine, so I would discuss MFCing mps driver wirh ken@ >> KDM>=20 >> KDM> I have attached a patch against -stable, try it out and let me know w= hether >> KDM> it works. If so I'll go ahead and MFC it. >>=20 >> I'm afraid something goes wrong at your side, at least in some files in=20= >> sys/dev/mps, like >>=20 >> Index: sys/dev/mps/mps_ioctl.h >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >> --- sys/dev/mps/mps_ioctl.h (revision 212420) >> +++ sys/dev/mps/mps_ioctl.h (working copy) >>=20 >> as there is no sys/dev/mps in stable/8 kernel sources >=20 > Whoops, svn diff doesn't do the right thing when there are multiple change= s > merged. >=20 > I re-did the diffs manually, you should be able to do something like: >=20 > cd src > cat patch |patch -p4 >=20 > Ken > --=20 > Kenneth Merry > ken@FreeBSD.ORG > I am willing to test on a Dell r210 with a h200 raid card tomorrow if needed= . I destroyed the logical volume and built mps copied from -current (I opened a= thread on stable@ a few weeks ago about this) but my "patch" was *nowhere* a= s big as this. There's prolly tons of missed stuff... (seems to work though, just wouldn't s= how me the logical drive so I had to set them to passthrough) Would that help any ? The host being half in production now, I'd rather try stuff around only if i= t helps you guys... It runs 8.2-RC3 with the sys/dev/mps/ folder from -current, a somewhat patch= ed conf/files resembling yours, and the makefile to build mps as a module. Let me know.= From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 03:12:31 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 66DB2106566B for ; Thu, 17 Feb 2011 03:12:30 +0000 (UTC) (envelope-from mike@jellydonut.org) Received: from mail-ey0-f182.google.com (mail-ey0-f182.google.com [209.85.215.182]) by mx1.freebsd.org (Postfix) with ESMTP id 083BF8FC13 for ; Thu, 17 Feb 2011 03:12:29 +0000 (UTC) Received: by eyf6 with SMTP id 6so1244699eyf.13 for ; Wed, 16 Feb 2011 19:12:28 -0800 (PST) MIME-Version: 1.0 Received: by 10.213.32.199 with SMTP id e7mr1560109ebd.93.1297910797254; Wed, 16 Feb 2011 18:46:37 -0800 (PST) Received: by 10.213.17.143 with HTTP; Wed, 16 Feb 2011 18:46:37 -0800 (PST) In-Reply-To: <201102091420.p19EKJ5u001268@m5p.com> References: <201102091420.p19EKJ5u001268@m5p.com> Date: Wed, 16 Feb 2011 21:46:37 -0500 Message-ID: From: Michael Proto To: george+freebsd@m5p.com Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: freebsd-stable@freebsd.org Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 03:12:31 -0000 On Wed, Feb 9, 2011 at 9:20 AM, wrote: > Under 8.2-PRERELEASE (GENERIC kernel), about 15% of the times I boot up > (with rpc.statd and rpc.lockd enabled in rc.conf), I get: > > Feb =A04 07:31:11 wonderland rpc.statd: bindresvport_sa: Address already = in use > Feb =A04 07:31:11 wonderland root: /etc/rc: WARNING: failed to start stat= d > > and slightly later: > > Feb =A04 07:31:36 wonderland kernel: NLM: unexpected error contacting NSM= , stat=3D5, errno=3D35 > > I can start rpc.statd and rpc.lockd manually at this point (and I have to > start them to run firefox and mail with my NFS-mounted home directory and > mail spool). =A0But what might cause the above errors? =A0 -- George Mitc= hell > > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > Don't rpc.statd and lockd try to choose a random port upon startup? I seem to remember a similar problem I had a long time ago. I opted to use a consistent, not-used port and haven't seen the problem since (this was years ago, so I can't remember if the error you're seeing was identical to mine). /etc/rc.conf: rpc_statd_flags=3D"-p 898" rpc_lockd_flags=3D"-p 4045" -Proto From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 03:29:00 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5D879106566B for ; Thu, 17 Feb 2011 03:29:00 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from qmta10.emeryville.ca.mail.comcast.net (qmta10.emeryville.ca.mail.comcast.net [76.96.30.17]) by mx1.freebsd.org (Postfix) with ESMTP id 2FD088FC15 for ; Thu, 17 Feb 2011 03:28:59 +0000 (UTC) Received: from omta13.emeryville.ca.mail.comcast.net ([76.96.30.52]) by qmta10.emeryville.ca.mail.comcast.net with comcast id 8rRn1g00617UAYkAArUzNY; Thu, 17 Feb 2011 03:28:59 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta13.emeryville.ca.mail.comcast.net with comcast id 8rUy1g00A0PUQVN8ZrUy3f; Thu, 17 Feb 2011 03:28:59 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id 2661A9B422; Wed, 16 Feb 2011 19:28:58 -0800 (PST) Date: Wed, 16 Feb 2011 19:28:58 -0800 From: Jeremy Chadwick To: Michael Proto Message-ID: <20110217032858.GA17686@icarus.home.lan> References: <201102091420.p19EKJ5u001268@m5p.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: george+freebsd@m5p.com, freebsd-stable@freebsd.org Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 03:29:00 -0000 On Wed, Feb 16, 2011 at 09:46:37PM -0500, Michael Proto wrote: > On Wed, Feb 9, 2011 at 9:20 AM, wrote: > > Under 8.2-PRERELEASE (GENERIC kernel), about 15% of the times I boot up > > (with rpc.statd and rpc.lockd enabled in rc.conf), I get: > > > > Feb  4 07:31:11 wonderland rpc.statd: bindresvport_sa: Address already in use > > Feb  4 07:31:11 wonderland root: /etc/rc: WARNING: failed to start statd > > > > and slightly later: > > > > Feb  4 07:31:36 wonderland kernel: NLM: unexpected error contacting NSM, stat=5, errno=35 > > > > I can start rpc.statd and rpc.lockd manually at this point (and I have to > > start them to run firefox and mail with my NFS-mounted home directory and > > mail spool).  But what might cause the above errors?   -- George Mitchell > > > > _______________________________________________ > > freebsd-stable@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > > > > Don't rpc.statd and lockd try to choose a random port upon startup? I > seem to remember a similar problem I had a long time ago. I opted to > use a consistent, not-used port and haven't seen the problem since > (this was years ago, so I can't remember if the error you're seeing > was identical to mine). > > /etc/rc.conf: > rpc_statd_flags="-p 898" > rpc_lockd_flags="-p 4045" Yes, this is correct. The NLM error is probably related to the previous errors (possibly due to firewall rule entries, or something that already had bound the port). Some RPC services can be bound to a random port number by default, and on occasion during a reboot two things will try to map to the same port number. It's very annoying when it happens. Running "rpcinfo" on the machine can help determine what's bound to what. Locking down the port numbers as you showed is the best choice, plus allows for proper firewall rules to be added. However, be aware not all daemons support this. Reliable firewall rules for NFS = good luck. -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB | From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 06:28:27 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D4262106564A for ; Thu, 17 Feb 2011 06:28:27 +0000 (UTC) (envelope-from ken73.chen@gmail.com) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id 6C3F58FC13 for ; Thu, 17 Feb 2011 06:28:27 +0000 (UTC) Received: by wwf26 with SMTP id 26so2182815wwf.31 for ; Wed, 16 Feb 2011 22:28:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=XWg+J5vuuzVjSQoVethaGQd002adxAeHJK/11gJvFWU=; b=iegylbGHhJ1YW42dDwrNaT/WZEUlqRUHtMokYi0C7GpGIMx9CxhHrrgu1dDGYaw8Pz jpbcJ1BWkicl0yTu84r9e8gqqiTAY4YWCNwNp1xlNOOc954m48P1WQRyOpdxWriGCOjo WQp+52znrxPoRHoRhepLgoAiL9vrdSRV07TNg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=Rl7DUoyUSBgdAwxGX5dtNhbwOSvHxPgpgIAFlKD7HrY1WBNShZEOa/JRNAza+z1v5s Pew8dr43KhKriB8ebaA3ZBajJAC/U+AJYeJnFGFfcJiaFWTb18uwqRdJQb4ERbkPpo5i n3dihJGgoPtsn4OqZ1YgAa6fsoHas/vEjnmxg= Received: by 10.227.183.203 with SMTP id ch11mr1252192wbb.214.1297922231169; Wed, 16 Feb 2011 21:57:11 -0800 (PST) MIME-Version: 1.0 Received: by 10.227.155.85 with HTTP; Wed, 16 Feb 2011 21:56:48 -0800 (PST) From: Ken Chen Date: Thu, 17 Feb 2011 13:56:48 +0800 Message-ID: To: freebsd-stable@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Subject: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 06:28:27 -0000 Hello All, I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on at ''Entropy harvesting: '. I try to change configuration in /etc/defaults/rc.conf, it helpless. harvest_interrupt="NO" # Entropy device harvests interrupt randomness harvest_ethernet="NO" # Entropy device harvests ethernet randomness harvest_p_to_p="NO" # Entropy device harvests point-to-point randomness Then, I 'chmod 0 /etc/rc.d/initrandom'. The 8.1 skipped 'Entropy harvesting', but hold-on again at 'pre-seeding PRNG'. Any suggestion? Thanks and happy Lantern Festival. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 06:40:46 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A3AA2106566C for ; Thu, 17 Feb 2011 06:40:46 +0000 (UTC) (envelope-from doconnor@gsoft.com.au) Received: from cain.gsoft.com.au (cain.gsoft.com.au [203.31.81.10]) by mx1.freebsd.org (Postfix) with ESMTP id 282DD8FC1C for ; Thu, 17 Feb 2011 06:40:45 +0000 (UTC) Received: from ur.gsoft.com.au (Ur.gsoft.com.au [203.31.81.44]) (authenticated bits=0) by cain.gsoft.com.au (8.14.4/8.14.3) with ESMTP id p1H6egoe086506 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Thu, 17 Feb 2011 17:10:42 +1030 (CST) (envelope-from doconnor@gsoft.com.au) Mime-Version: 1.0 (Apple Message framework v1082) Content-Type: text/plain; charset=us-ascii From: "Daniel O'Connor" In-Reply-To: Date: Thu, 17 Feb 2011 17:10:42 +1030 Content-Transfer-Encoding: quoted-printable Message-Id: <282BBBA9-14FC-4B24-82C2-6EF4AFDE4953@gsoft.com.au> References: To: Ken Chen X-Mailer: Apple Mail (2.1082) X-Spam-Score: -2.51 () ALL_TRUSTED,BAYES_00,T_RP_MATCHES_RCVD X-Scanned-By: MIMEDefang 2.67 on 203.31.81.10 Cc: freebsd-stable@freebsd.org Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 06:40:46 -0000 On 17/02/2011, at 16:26, Ken Chen wrote: > I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by > 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on at > ''Entropy harvesting: '. I try to change configuration in > /etc/defaults/rc.conf, it helpless. >=20 >=20 > harvest_interrupt=3D"NO" # Entropy device harvests interrupt = randomness > harvest_ethernet=3D"NO" # Entropy device harvests ethernet randomness > harvest_p_to_p=3D"NO" # Entropy device harvests point-to-point = randomness >=20 >=20 > Then, I 'chmod 0 /etc/rc.d/initrandom'. The 8.1 skipped 'Entropy > harvesting', but hold-on again at 'pre-seeding PRNG'. >=20 > Any suggestion? Thanks and happy Lantern Festival. You should re-enable those, they help feed the entropy pool. You can seed it with a file by setting entropy_file in rc.conf to a file = full of (hopefully) random junk. -- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 07:23:34 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 06B54106566C for ; Thu, 17 Feb 2011 07:23:34 +0000 (UTC) (envelope-from dougb@dougbarton.us) Received: from mail2.fluidhosting.com (mx22.fluidhosting.com [204.14.89.5]) by mx1.freebsd.org (Postfix) with ESMTP id 8C19F8FC08 for ; Thu, 17 Feb 2011 07:23:33 +0000 (UTC) Received: (qmail 5238 invoked by uid 399); 17 Feb 2011 06:56:49 -0000 Received: from router.ka9q.net (HELO doug-optiplex.ka9q.net) (dougb@dougbarton.us@75.60.237.91) by mail2.fluidhosting.com with ESMTPAM; 17 Feb 2011 06:56:49 -0000 X-Originating-IP: 75.60.237.91 X-Sender: dougb@dougbarton.us Message-ID: <4D5CC6B0.3060600@dougbarton.us> Date: Wed, 16 Feb 2011 22:56:48 -0800 From: Doug Barton Organization: http://SupersetSolutions.com/ User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20110129 Thunderbird/3.1.7 MIME-Version: 1.0 To: Ken Chen References: In-Reply-To: X-Enigmail-Version: 1.1.2 OpenPGP: id=1A1ABC84 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-stable@freebsd.org Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 07:23:34 -0000 On 02/16/2011 21:56, Ken Chen wrote: > Hello All, > > I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by > 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on at > ''Entropy harvesting: '. I try to change configuration in > /etc/defaults/rc.conf, it helpless. Did you update /etc after updating the binaries, or is this the first reboot after freebsd-update installs the new kernel? Doug -- Nothin' ever doesn't change, but nothin' changes much. -- OK Go Breadth of IT experience, and depth of knowledge in the DNS. Yours for the right price. :) http://SupersetSolutions.com/ From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 07:24:51 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 84AB91065673 for ; Thu, 17 Feb 2011 07:24:51 +0000 (UTC) (envelope-from ken73.chen@gmail.com) Received: from mail-ww0-f42.google.com (mail-ww0-f42.google.com [74.125.82.42]) by mx1.freebsd.org (Postfix) with ESMTP id 180888FC1B for ; Thu, 17 Feb 2011 07:24:50 +0000 (UTC) Received: by wwi17 with SMTP id 17so5191047wwi.1 for ; Wed, 16 Feb 2011 23:24:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type; bh=GAK9gtJHKlnP+ztIPuYVslzcwPWoXJPLhjssEXB2QfE=; b=q9aRZktuFiEzZZmoaH1SMleGPc4ehynJ4LDAr8DjSrPfEFH6rEcQz1TmZk1imkBVsm 2y0WCLIEGYMcHvQu5tYc4/b3c1mNGgALqLJCfdIizfQlsCHA22i2v1bi5ohF/pUjy5zv nZFPmj7g+UBLLnGln0leu4jSJclPGkUPFO6Kc= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=QfuwnNvY4OMdtTGgdS+BlbHeknh7bhEu/zxPAn03PTXfon1rrsn6+aRmz8n/yvgJNB 2RV/rNyEeSCHrIOhTAE9k4zPv7pn85rF445whltEfTk/9j3umyOS86rTDNqIL29UQIG9 5qxqdsiBD8IdLyx16rvSC9wRbYLUFoSftZK+8= Received: by 10.227.183.203 with SMTP id ch11mr1306483wbb.214.1297927489811; Wed, 16 Feb 2011 23:24:49 -0800 (PST) MIME-Version: 1.0 Received: by 10.227.155.85 with HTTP; Wed, 16 Feb 2011 23:24:29 -0800 (PST) In-Reply-To: <4D5CC6B0.3060600@dougbarton.us> References: <4D5CC6B0.3060600@dougbarton.us> From: Ken Chen Date: Thu, 17 Feb 2011 15:24:29 +0800 Message-ID: To: Doug Barton Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: freebsd-stable@freebsd.org Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 07:24:51 -0000 It's first reboot with 8.1 kernel. nextboot -k GENERIC shutdown -r now 2011/2/17 Doug Barton > On 02/16/2011 21:56, Ken Chen wrote: > >> Hello All, >> >> I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by >> 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on at >> ''Entropy harvesting: '. I try to change configuration in >> /etc/defaults/rc.conf, it helpless. >> > > Did you update /etc after updating the binaries, or is this the first > reboot after freebsd-update installs the new kernel? > > > Doug > > > -- > > Nothin' ever doesn't change, but nothin' changes much. > -- OK Go > > Breadth of IT experience, and depth of knowledge in the DNS. > Yours for the right price. :) http://SupersetSolutions.com/ > > From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 07:31:20 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 824C61065672 for ; Thu, 17 Feb 2011 07:31:20 +0000 (UTC) (envelope-from chris#@1command.com) Received: from mail.1command.com (mail.1command.com [168.103.150.6]) by mx1.freebsd.org (Postfix) with ESMTP id 2B9E08FC0A for ; Thu, 17 Feb 2011 07:31:19 +0000 (UTC) Received: from webmail.1command.com (localhost.1command.com [127.0.0.1]) by mail.1command.com (8.13.3/8.13.3) with ESMTP id p1H7V99D022733; Wed, 16 Feb 2011 23:31:16 -0800 (PST) (envelope-from chris#@1command.com) Received: from udns0.ultimatedns.net ([168.103.150.26]) (Local authenticated user inf0s) by webmail.1command.com with HTTP; Wed, 16 Feb 2011 23:31:17 -0800 (PST) Message-ID: <6a2a96500acb32a1182e426d7ec89170.HRCIM@webmail.1command.com> Date: Wed, 16 Feb 2011 23:31:17 -0800 (PST) From: "Chris H" To: freebsd-stable@freebsd.org User-Agent: HRC Internet Messaging/1.5.2 [SVN] MIME-Version: 1.0 Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: 8bit Cc: Tom Evans , wblock@wonkity.com, faber@isi.edu Subject: Re: ATI Radeon LW RV200 Mobility 7500 M7 locks up on X exit X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 07:31:20 -0000 > On Wed, Feb 16, 2011 at 12:07 PM, Chris H wrote: >> >> On Wed, February 16, 2011 1:34 am, Tom Evans wrote: >>> On Wed, Feb 16, 2011 at 12:19 AM, Chris H wrote: >>> >>>> Well, the box I'm writing this message from is running a >>>> G98 [GeForce 8400 GS] + 3Gb videoram, while not the "latest and greatest", it >>>> isn't really "legacy" either. I was /sure/ it'd be a "snap" to setup, but while >>>> "functional", it isn't the optimal experience I had hoped for. >>>> >>>> >>>> I guess that's the price one pays for choosing a "closed source" piece of >>>> hardware. :( >>>> >>>> --Chris >>>> >>>> >>> >>> I've used this card for 2 years with FreeBSD + hald, never had the >>> slightest issues, truly plug and play. >>> >>> nvidia0: on vgapci0 >>> nvidia-driver-256.53 NVidia graphics card binary drivers >> That's great news. I don't suppose you'd be willing to share your >> setup with me (xorg.conf, and anything else you think might help). I'd >> really love to get the most out of this card, but always felt a bit >> deprived. >> >> --Chris >> >> >> Sure, its attached. I should probably note that this isn't used as a >> 'PC', its hooked up to my TV, without a mouse or keyboard, and plays >> movies via mplayer (with vdpau acceleration). I also use a Geforce >> 7200 GS in my desktop machine (with keyboard + mouse!), for 3 years >> with no problems (no vdpau with that mind). >> >> Cheers >> >> Tom Well, I just wanted to report back that after comparing your settings in Xorg.conf(5) to my own, that /really/ the only significant difference was the omission of the following: InputDevice "Mouse0" "CorePointer" InputDevice "Keyboard0" "CoreKeyboard" Section "ServerFlags" Option "AllowEmptyInput" "false" Option "AutoAddDevices" "true" Option "AutoEnableDevices" "true" EndSection Section "InputDevice" Identifier "Keyboard0" Driver "kbd" EndSection Section "InputDevice" Identifier "Mouse0" Driver "mouse" Option "Protocol" "auto" Option "Device" "/dev/sysmouse" Option "ZAxisMapping" "4 5 6 7 8" EndSection So I simply comment all of those lines from my own xorg.conf(5) file, changed the rc.conf(5) line: hald_enable="NO" to hald_enable="YES" rebooted > startx && all was well. Thanks for taking the time to share your conf file Tom, now I can live harmoniously with hald(8) :) --Chris -- From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 07:55:52 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BCC0A106564A for ; Thu, 17 Feb 2011 07:55:52 +0000 (UTC) (envelope-from dougb@dougbarton.us) Received: from mail2.fluidhosting.com (mx22.fluidhosting.com [204.14.89.5]) by mx1.freebsd.org (Postfix) with ESMTP id 49E1D8FC15 for ; Thu, 17 Feb 2011 07:55:52 +0000 (UTC) Received: (qmail 9340 invoked by uid 399); 17 Feb 2011 07:55:49 -0000 Received: from router.ka9q.net (HELO doug-optiplex.ka9q.net) (dougb@dougbarton.us@75.60.237.91) by mail2.fluidhosting.com with ESMTPAM; 17 Feb 2011 07:55:49 -0000 X-Originating-IP: 75.60.237.91 X-Sender: dougb@dougbarton.us Message-ID: <4D5CD484.2020201@dougbarton.us> Date: Wed, 16 Feb 2011 23:55:48 -0800 From: Doug Barton Organization: http://SupersetSolutions.com/ User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20110129 Thunderbird/3.1.7 MIME-Version: 1.0 To: Ken Chen References: <4D5CC6B0.3060600@dougbarton.us> In-Reply-To: X-Enigmail-Version: 1.1.2 OpenPGP: id=1A1ABC84 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-stable@freebsd.org Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 07:55:52 -0000 Ok, likely you can bypass the problem by hitting Ctrl-C. Once you get kernel and userland updated make sure that you get /etc/ updated as well and you should be fine. hth, Doug On 02/16/2011 23:24, Ken Chen wrote: > It's first reboot with 8.1 kernel. > > nextboot -k GENERIC > shutdown -r now > > > 2011/2/17 Doug Barton > > > On 02/16/2011 21:56, Ken Chen wrote: > > Hello All, > > I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by > 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on at > ''Entropy harvesting: '. I try to change configuration in > /etc/defaults/rc.conf, it helpless. > > > Did you update /etc after updating the binaries, or is this the > first reboot after freebsd-update installs the new kernel? -- Nothin' ever doesn't change, but nothin' changes much. -- OK Go Breadth of IT experience, and depth of knowledge in the DNS. Yours for the right price. :) http://SupersetSolutions.com/ From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 11:56:55 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 49021106566C for ; Thu, 17 Feb 2011 11:56:55 +0000 (UTC) (envelope-from lists@c0mplx.org) Received: from home.opsec.eu (home.opsec.eu [IPv6:2001:14f8:200::1]) by mx1.freebsd.org (Postfix) with ESMTP id 0CEC98FC0A for ; Thu, 17 Feb 2011 11:56:55 +0000 (UTC) Received: from pi by home.opsec.eu with local (Exim 4.72 (FreeBSD)) (envelope-from ) id 1Pq2Td-0002IY-9e for freebsd-stable@freebsd.org; Thu, 17 Feb 2011 12:56:53 +0100 Date: Thu, 17 Feb 2011 12:56:53 +0100 From: Kurt Jaeger To: freebsd-stable@freebsd.org Message-ID: <20110217115653.GH34314@home.opsec.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 11:56:55 -0000 Hi! I have one of the new 3TB drives: da0: Fixed Direct Access SCSI-5 device da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) Now as far as I understand, one can operate it with many 512byte blocks or one can try to use the internal 4kbyte blocks. How would one do that with FreeBSD ? -- pi@opsec.eu +49 171 3101372 9 years to go ! From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 12:11:38 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8D0E81065675 for ; Thu, 17 Feb 2011 12:11:38 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id 1F1B18FC19 for ; Thu, 17 Feb 2011 12:11:36 +0000 (UTC) Received: by bwz12 with SMTP id 12so2413754bwz.13 for ; Thu, 17 Feb 2011 04:11:36 -0800 (PST) Received: by 10.204.53.199 with SMTP id n7mr1556190bkg.53.1297944695571; Thu, 17 Feb 2011 04:11:35 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id rc9sm596786bkb.14.2011.02.17.04.11.34 (version=SSLv3 cipher=OTHER); Thu, 17 Feb 2011 04:11:34 -0800 (PST) Message-ID: <4D5D1075.2060708@my.gd> Date: Thu, 17 Feb 2011 13:11:33 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Oliver Brandmueller , "freebsd-stable@freebsd.org" References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> In-Reply-To: <20110217111010.GC25240@e-Gitt.NET> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 12:11:38 -0000 On 2/17/11 12:10 PM, Oliver Brandmueller wrote: > Hi, > > On Thu, Feb 17, 2011 at 12:07:17PM +0100, Damien Fleuriot wrote: >> It looks rather unhappy: >> >> mybsd root /usr/ports/sysutils/smartmontools >> # >> /usr/local/sbin/smartctl -a /dev/da0 >> smartctl 5.40 2010-10-16 r3189 [FreeBSD 8.2-RC3 amd64] (local build) >> Copyright (C) 2002-10 by Bruce Allen, http://smartmontools.sourceforge.net >> >> /dev/da0: No such file or directory >> Smartctl: please specify device type with the -d option. > > Thanx for the test and the quick reply! I'm really getting crazy on > this. All the SAS controllers seems to have nifty RAID features and > stuff... *sigh* > > Thanx again, > Oliver > What is sad is that these controllers are becoming very mainstream now, we're getting them more and more on Dell servers , and the fbsd project still struggles with them (for reasons I don't know, might be LSI's fault, might be a lack of resources or interest...) I'm having a very hard time defending the use of fbsd for firewalls at work, with the recent release of debian kfreebsd. What's saving fbsd for the moment is the lack of a proper CARP implementation on debian kfree. Actually, cc'ing the list, I'd like to share my feelings on this. @list: I'm trying very hard to keep freebsd at work for our firewalls. Recently, I installed new blade servers shipping with h700 controllers (these attached to mfi w/o problems). If, for some reason, we get h200 cards using the mps driver, I'll have to install using software RAID instead. This would be a *disaster* and extremely hard for me to justify to my boss. The staff in the datacenters check the machines every day, making a routing inspection to ensure no server has orange warning lights. Typically when a hardware RAID's hard drive fails, the lights go orange thus prompting them to warn us (in case we missed the nagios alert) for a replacement. If I had to use software RAID, we'd be giving up on this extra security and, again, I'd have a very hard time justifying it. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 12:18:59 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E9F271065672 for ; Thu, 17 Feb 2011 12:18:59 +0000 (UTC) (envelope-from tevans.uk@googlemail.com) Received: from mail-qw0-f54.google.com (mail-qw0-f54.google.com [209.85.216.54]) by mx1.freebsd.org (Postfix) with ESMTP id 9AC238FC17 for ; Thu, 17 Feb 2011 12:18:59 +0000 (UTC) Received: by qwj9 with SMTP id 9so2291185qwj.13 for ; Thu, 17 Feb 2011 04:18:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type :content-transfer-encoding; bh=oz9p+YiaQgVvmYMP9EgNIqAAgzwCeezoV/TXf09T+0E=; b=maTVE+fNe1iBdLXYsg0lHYAsxgJZC8MsAhnTJ5fSfs4A8At92+gXlB7nR7IbxUR6bR TiXoh2hde68RdTMpHqfE6w+dshekl0LYILMWHd1A6bRaW0g1Gs2TrHSyepxI7gAq3fmG VOKDxwgpniLasczG9GPfSKjqA66y7ZjPBwelA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; b=E+w+pZzfMH9lmYbjG4POcVmTVMq1fPXq7ZsKr/UVtKX6coEL91CoXnPAdGXk453HEY V6EKISeHHjnKFmGD+I9H7EY+zFsyZePl/zYFql2c+lOhk6KnoPgSA4aSg8NJhPPWsB6A 0kgyCpiCZpoBvhiXGQiN6YfRqNbhiKexDEVUE= MIME-Version: 1.0 Received: by 10.229.235.4 with SMTP id ke4mr2226975qcb.63.1297945138748; Thu, 17 Feb 2011 04:18:58 -0800 (PST) Received: by 10.229.246.8 with HTTP; Thu, 17 Feb 2011 04:18:58 -0800 (PST) In-Reply-To: <4D5D1075.2060708@my.gd> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> Date: Thu, 17 Feb 2011 12:18:58 +0000 Message-ID: From: Tom Evans To: Damien Fleuriot Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 12:19:00 -0000 On Thu, Feb 17, 2011 at 12:11 PM, Damien Fleuriot wrote: > What is sad is that these controllers are becoming very mainstream now, > we're getting them more and more on Dell servers , and the fbsd project > still struggles with them (for reasons I don't know, might be LSI's > fault, might be a lack of resources or interest...) > > I'm having a very hard time defending the use of fbsd for firewalls at > work, with the recent release of debian kfreebsd. > Forgive my na=C3=AFvet=C3=A9, but surely kfreebsd would have precisely the = same issues with the same controllers, since it uses FreeBSD's kernel. Am I missing something? Cheers Tom From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 12:29:10 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8FDB2106564A for ; Thu, 17 Feb 2011 12:29:10 +0000 (UTC) (envelope-from prvs=10296b544f=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 1DA998FC13 for ; Thu, 17 Feb 2011 12:29:09 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Thu, 17 Feb 2011 12:18:04 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Thu, 17 Feb 2011 12:18:03 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012241621.msg for ; Thu, 17 Feb 2011 12:18:02 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10296b544f=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk X-MDaemon-Deliver-To: freebsd-stable@freebsd.org Message-ID: From: "Steven Hartland" To: "Jeremy Chadwick" , "Olaf Seibert" , References: <20100909131017.GO4404@twoquid.cs.ru.nl> <20100909140529.GB76889@icarus.home.lan> Date: Thu, 17 Feb 2011 12:18:28 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: Subject: Re: mountd has resolving problems X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 12:29:10 -0000 This has become a issue for us in 8.x as well. I'm pretty sure in pre 8.x these nfs mounts would simply background but recently machines are now failing to boot. It seems that failure to lookup nfs mount point hosts now causes this fatal error :( We've just tried Jeremy's netwait script and it works perfectly so either this or something similar needs to get pushed into base. For reference the reason we need a delay here is our core Cisco router takes a while to bring the port up properly on boot. Thanks for sharing the script Jeremy :) Regards Steve ----- Original Message ----- From: "Jeremy Chadwick" To: "Olaf Seibert" Cc: Sent: Thursday, September 09, 2010 2:05 PM Subject: Re: mountd has resolving problems > On Thu, Sep 09, 2010 at 03:10:17PM +0200, Olaf Seibert wrote: >> I just upgraded a box from 8.0 to 8.1, and already when rebooting with >> the new kernel (i.e. before installing new userland), I got the >> following problem. >> >> Of course many of the messages scrolled off screen, but some were >> preserved in the syslog. >> >> Sep 9 14:26:51 fourquid mountd[839]: can't get address info for host XYZ >> Sep 9 14:26:51 fourquid mountd[839]: bad host XYZ in netgroup vbgroup, skipping >> >> Mountd was run and wanted to determine which hosts to export to. >> However, it could not resolve any of them. So, that suggests some >> network issue. >> >> However, I use a static IP address (no DHCP) and static info in >> /etc/resolv.conf, using one of the university's name servers. So >> resolving should always be available. >> >> Running /etc/rc.d/mountd restart so far always solved the export >> problem. >> >> I have also seen (presumably similar) issues with mounting NFS file >> systems, but that was deemed so fatal that the boot was aborted. A mount >> ``by hand'' of the affected file system also worked. >> >> Any ideas? Maybe with the new kernel the network interface is a bit >> slower in coming up, and not fully working by the time /etc/rc.d/mountd >> runs? In fact, I now notice this sequence of messages in >> /var/log/messages: >> >> Sep 9 14:26:51 fourquid mountd[839]: bad host XYZ in netgroup vbgroup, skipping >> Sep 9 14:26:51 fourquid mountd[839]: bad exports list line /xxxxxx >> Sep 9 14:26:54 fourquid kernel: fuse4bsd: version 0.3.9-pre1, FUSE ABI 7.8 >> Sep 9 14:26:54 fourquid init: /bin/sh on /etc/rc terminated abnormally, going to single user mode >> Sep 9 14:26:55 fourquid kernel: nfe0: link state changed to UP >> >> so here the network interface takes a full 4 more seconds to come up, >> after it was already needed. >> >> I can try to put a 10 sec delay somewhere, but there should be a better >> solution... > > The problem is that the network isn't "truly" up and available by the > time mountd runs, and therefore DNS resolution doesn't work. Please use > my netwait script to solve this problem: > > http://jdc.parodius.com/freebsd/netwait > > Place it in /usr/local/etc/rc.d, make sure it's chmod'd to 755, > then enable use of it by using /etc/rc.conf variables like so: > > netwait_enable="yes" > netwait_ip="4.2.2.1 4.2.2.2" > netwait_if="nfe0" > > For what the variables do, please see the script comments. > > -- > | Jeremy Chadwick jdc@parodius.com | > | Parodius Networking http://www.parodius.com/ | > | UNIX Systems Administrator Mountain View, CA, USA | > | Making life hard for others since 1977. PGP: 4BD6C0CB | > > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 or return the E.mail to postmaster@multiplay.co.uk. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 12:32:39 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id F1E281065672 for ; Thu, 17 Feb 2011 12:32:39 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id 8404C8FC08 for ; Thu, 17 Feb 2011 12:32:39 +0000 (UTC) Received: by bwz12 with SMTP id 12so2429559bwz.13 for ; Thu, 17 Feb 2011 04:32:38 -0800 (PST) Received: by 10.204.72.207 with SMTP id n15mr1638468bkj.62.1297945958221; Thu, 17 Feb 2011 04:32:38 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id w3sm609710bkt.17.2011.02.17.04.32.36 (version=SSLv3 cipher=OTHER); Thu, 17 Feb 2011 04:32:36 -0800 (PST) Message-ID: <4D5D1563.4050807@my.gd> Date: Thu, 17 Feb 2011 13:32:35 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Tom Evans References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 12:32:40 -0000 On 2/17/11 1:18 PM, Tom Evans wrote: > On Thu, Feb 17, 2011 at 12:11 PM, Damien Fleuriot wrote: >> What is sad is that these controllers are becoming very mainstream now, >> we're getting them more and more on Dell servers , and the fbsd project >> still struggles with them (for reasons I don't know, might be LSI's >> fault, might be a lack of resources or interest...) >> >> I'm having a very hard time defending the use of fbsd for firewalls at >> work, with the recent release of debian kfreebsd. >> > > Forgive my naïveté, but surely kfreebsd would have precisely the same > issues with the same controllers, since it uses FreeBSD's kernel. Am I > missing something? > > Cheers > > Tom I am not sure, but you make a good point. Don't get me wrong though, I don't mean to offend anyone when I say the fbsd project struggles with this driver. There may very well be very valid reasons like lack of cooperation on LSI's part, I wouldn't know. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 12:45:15 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 82507106564A for ; Thu, 17 Feb 2011 12:45:15 +0000 (UTC) (envelope-from lists@c0mplx.org) Received: from home.opsec.eu (home.opsec.eu [IPv6:2001:14f8:200::1]) by mx1.freebsd.org (Postfix) with ESMTP id 416BE8FC18 for ; Thu, 17 Feb 2011 12:45:15 +0000 (UTC) Received: from pi by home.opsec.eu with local (Exim 4.72 (FreeBSD)) (envelope-from ) id 1Pq3ER-00034e-Sx for freebsd-stable@freebsd.org; Thu, 17 Feb 2011 13:45:15 +0100 Date: Thu, 17 Feb 2011 13:45:15 +0100 From: Kurt Jaeger To: freebsd-stable@freebsd.org Message-ID: <20110217124515.GI34314@home.opsec.eu> References: <20110217115653.GH34314@home.opsec.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 12:45:15 -0000 Hi! Edho P Arief wrote: > > I have one of the new 3TB drives: > > > > da0: Fixed Direct Access SCSI-5 device > > da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) > > > > Now as far as I understand, one can operate it with many 512byte blocks > > or one can try to use the internal 4kbyte blocks. > ...I think it goes like this. > > ZFS: > >>>create GPT > # gpart create -s gpt da0 > >>>add partition, start at 4k-aligned sector > # gpart add -t freebsd-zfs -b 1024 da0 Thanks -- is it also possible to have something like da0: 2861588MB (732566646 4096 byte sectors: 255H 63S/T 364801C) appear during the boot ? Has anyone ever tried ? Would FreeBSD support it ? -- pi@opsec.eu +49 171 3101372 9 years to go ! From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 13:05:31 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EDE57106564A for ; Thu, 17 Feb 2011 13:05:31 +0000 (UTC) (envelope-from daniel@digsys.bg) Received: from smtp-sofia.digsys.bg (smtp-sofia.digsys.bg [193.68.3.230]) by mx1.freebsd.org (Postfix) with ESMTP id 613B78FC08 for ; Thu, 17 Feb 2011 13:05:30 +0000 (UTC) Received: from dcave.digsys.bg (dcave.digsys.bg [192.92.129.5]) (authenticated bits=0) by smtp-sofia.digsys.bg (8.14.4/8.14.4) with ESMTP id p1HD5LFV074427 (version=TLSv1/SSLv3 cipher=DHE-RSA-CAMELLIA256-SHA bits=256 verify=NO) for ; Thu, 17 Feb 2011 15:05:26 +0200 (EET) (envelope-from daniel@digsys.bg) Message-ID: <4D5D1D10.7010000@digsys.bg> Date: Thu, 17 Feb 2011 15:05:20 +0200 From: Daniel Kalchev User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20101217 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: <20110217115653.GH34314@home.opsec.eu> <20110217124515.GI34314@home.opsec.eu> In-Reply-To: <20110217124515.GI34314@home.opsec.eu> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 13:05:32 -0000 >>> da0: Fixed Direct Access SCSI-5 device >>> da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) > > Thanks -- is it also possible to have something like > > da0: 2861588MB (732566646 4096 byte sectors: 255H 63S/T 364801C) > According to Hitachi, this is an 512b drive. Daniel From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 13:07:58 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9C1A41065673 for ; Thu, 17 Feb 2011 13:07:58 +0000 (UTC) (envelope-from edhoprima@gmail.com) Received: from mail-qy0-f182.google.com (mail-qy0-f182.google.com [209.85.216.182]) by mx1.freebsd.org (Postfix) with ESMTP id 56A928FC0A for ; Thu, 17 Feb 2011 13:07:58 +0000 (UTC) Received: by qyg14 with SMTP id 14so1627407qyg.13 for ; Thu, 17 Feb 2011 05:07:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type; bh=HqP7B1f3vIlDywNWI8+bcFVpNPBMjoSLcBOnGTbqlzw=; b=o8ftnKOBd0WfXy/DAK5Ijf03aWIUwbRbh7ty4OeweRTgZ4ycHGawFZHXgaIxrzcJHv HhOLSM8YO2326XtRUx9DZhK77VuZBw9k+RomOenjU2rWgJFT3qXzQBxYFTk+FSnIbaZQ T1s8O22lxH1zeiDot7M5thvKJApBesDVghN/k= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=bfgsAnqpE9UxKV0lYCEuRTKJGmkrxQG9KQiQHyWl36tMWrCCEhdpUHyoEloctTIP4s GXAqnoNt3pNHEJ/ZZA/4b87hMUgISCncGyJe2Z5G+XkqYOppmz05/SZx00/+fIsfwdD7 IjbeZuU1AlPBL4oJo3eBIMFwDw0+oj2DD/hu8= Received: by 10.224.60.68 with SMTP id o4mr2518485qah.12.1297946319775; Thu, 17 Feb 2011 04:38:39 -0800 (PST) MIME-Version: 1.0 Received: by 10.229.213.141 with HTTP; Thu, 17 Feb 2011 04:38:19 -0800 (PST) In-Reply-To: <20110217115653.GH34314@home.opsec.eu> References: <20110217115653.GH34314@home.opsec.eu> From: Edho P Arief Date: Thu, 17 Feb 2011 19:38:19 +0700 Message-ID: To: Kurt Jaeger Content-Type: text/plain; charset=UTF-8 Cc: freebsd-stable@freebsd.org Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 13:07:58 -0000 On Thu, Feb 17, 2011 at 6:56 PM, Kurt Jaeger wrote: > Hi! > > I have one of the new 3TB drives: > > da0: Fixed Direct Access SCSI-5 device > da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) > > Now as far as I understand, one can operate it with many 512byte blocks > or one can try to use the internal 4kbyte blocks. > > How would one do that with FreeBSD ? > ...I think it goes like this. ZFS: >>>create GPT # gpart create -s gpt da0 >>>add partition, start at 4k-aligned sector # gpart add -t freebsd-zfs -b 1024 da0 >>>create NOP device for simulating 4k sector # gnop create -S 4096 da0p1 >>>create zfs pool and export # zpool create mydata da0p1.nop # zpool export mydata >>>destroy the NOP since it's only needed to set ashift=12 when creating the pool # gnop destroy da0p1.nop >>>optional, but I use this to ensure the pool imports da0p1, not gpt-id/ # dd if=/dev/da0p1 of=/dev/null bs=1M count=1 >>>import back the pool # zpool import mydata UFS: >>>create GPT # gpart create -s gpt da0 >>>create partition, with start position 4k-aligned # gpart add -t freebsd-ufs -b 1024 -l mydata da0 >>>default newfs is good enough # newfs -U /dev/gpt/mydata corrections welcome. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 14:21:54 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 170F21065673 for ; Thu, 17 Feb 2011 14:21:54 +0000 (UTC) (envelope-from roberto@keltia.freenix.fr) Received: from keltia.net (centre.keltia.net [IPv6:2a01:240:fe5c::41]) by mx1.freebsd.org (Postfix) with ESMTP id 739C78FC15 for ; Thu, 17 Feb 2011 14:21:53 +0000 (UTC) Received: from roberto-al.eurocontrol.fr (aran.keltia.net [88.191.250.24]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: roberto) by keltia.net (Postfix/TLS) with ESMTPSA id 5BD49D15C; Thu, 17 Feb 2011 15:21:50 +0100 (CET) Date: Thu, 17 Feb 2011 15:21:48 +0100 From: Ollivier Robert To: freebsd-stable@freebsd.org, Dmitry Morozovsky Message-ID: <20110217142147.GB15577@roberto-al.eurocontrol.fr> References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> <20110216203542.GA41226@nargothrond.kdm.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Operating-System: MacOS X / Macbook Pro - FreeBSD 7.2 / Dell D820 SMP User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.3 (keltia.net); Thu, 17 Feb 2011 15:21:50 +0100 (CET) Cc: Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 14:21:54 -0000 According to Damien Fleuriot: > I destroyed the logical volume and built mps copied from -current (I opened a thread on stable@ a few weeks ago about this) but my "patch" was *nowhere* as big as this. Here Ken's patch: amd64/conf/GENERIC | 1 conf/files | 5 dev/bwn/if_bwn.c | 4 dev/mps/mpi/mpi2.h | 1121 ++++++++++++++++++ dev/mps/mpi/mpi2_cnfg.h | 2646 +++++++++++++++++++++++++++++++++++++++++++ dev/mps/mpi/mpi2_hbd.h | 114 + dev/mps/mpi/mpi2_history.txt | 382 ++++++ dev/mps/mpi/mpi2_init.h | 454 +++++++ dev/mps/mpi/mpi2_ioc.h | 1414 ++++++++++++++++++++++ dev/mps/mpi/mpi2_ra.h | 86 + dev/mps/mpi/mpi2_raid.h | 302 ++++ dev/mps/mpi/mpi2_sas.h | 285 ++++ dev/mps/mpi/mpi2_targ.h | 441 +++++++ dev/mps/mpi/mpi2_tool.h | 391 ++++++ dev/mps/mpi/mpi2_type.h | 99 + dev/mps/mps.c | 1821 +++++++++++++++++++++++++++++ dev/mps/mps_ioctl.h | 106 + dev/mps/mps_pci.c | 365 +++++ dev/mps/mps_sas.c | 2007 ++++++++++++++++++++++++++++++++ dev/mps/mps_table.c | 493 ++++++++ dev/mps/mps_table.h | 53 dev/mps/mps_user.c | 944 +++++++++++++++ dev/mps/mpsvar.h | 390 ++++++ dev/siba/siba_bwn.c | 2 dev/sis/if_sisreg.h | 2 mips/mips/mp_machdep.c | 2 modules/Makefile | 1 modules/mps/Makefile | 14 There may be some patches that are not really related to mps (siba? if_sisreg?). > It runs 8.2-RC3 with the sys/dev/mps/ folder from -current, a somewhat patched conf/files resembling yours, and the makefile to build mps as a module. Dropping dev/mps leads to a diff close to Ken's: amd64/conf/GENERIC | 1 + conf/files | 5 dev/mps/mpi/mpi2.h | 1121 ++++++++++++++++++ dev/mps/mpi/mpi2_cnfg.h | 2646 +++++++++++++++++++++++++++++++++++++++++++ dev/mps/mpi/mpi2_hbd.h | 114 + dev/mps/mpi/mpi2_history.txt | 382 ++++++ dev/mps/mpi/mpi2_init.h | 454 +++++++ dev/mps/mpi/mpi2_ioc.h | 1414 ++++++++++++++++++++++ dev/mps/mpi/mpi2_ra.h | 86 + dev/mps/mpi/mpi2_raid.h | 302 ++++ dev/mps/mpi/mpi2_sas.h | 285 ++++ dev/mps/mpi/mpi2_targ.h | 441 +++++++ dev/mps/mpi/mpi2_tool.h | 391 ++++++ dev/mps/mpi/mpi2_type.h | 99 + dev/mps/mps.c | 1821 +++++++++++++++++++++++++++++ dev/mps/mps_ioctl.h | 106 + dev/mps/mps_pci.c | 365 +++++ dev/mps/mps_sas.c | 2007 ++++++++++++++++++++++++++++++++ dev/mps/mps_table.c | 493 ++++++++ dev/mps/mps_table.h | 53 dev/mps/mps_user.c | 944 +++++++++++++++ dev/mps/mpsvar.h | 390 ++++++ modules/Makefile | 1 modules/mps/Makefile | 13 -- Ollivier ROBERT -=- FreeBSD: The Power to Serve! -=- roberto@keltia.net In memoriam to Ondine, our 2nd child: http://ondine.keltia.net/ From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 14:42:55 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 24C39106566C for ; Thu, 17 Feb 2011 14:42:55 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id AC77A8FC0C for ; Thu, 17 Feb 2011 14:42:54 +0000 (UTC) Received: by bwz12 with SMTP id 12so2549937bwz.13 for ; Thu, 17 Feb 2011 06:42:53 -0800 (PST) Received: by 10.204.98.12 with SMTP id o12mr1785903bkn.32.1297953773331; Thu, 17 Feb 2011 06:42:53 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id z18sm698179bkf.8.2011.02.17.06.42.52 (version=SSLv3 cipher=OTHER); Thu, 17 Feb 2011 06:42:52 -0800 (PST) Message-ID: <4D5D33EB.1060505@my.gd> Date: Thu, 17 Feb 2011 15:42:51 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> <20110216203542.GA41226@nargothrond.kdm.org> <20110217142147.GB15577@roberto-al.eurocontrol.fr> In-Reply-To: <20110217142147.GB15577@roberto-al.eurocontrol.fr> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 14:42:55 -0000 On 2/17/11 3:21 PM, Ollivier Robert wrote: > According to Damien Fleuriot: >> I destroyed the logical volume and built mps copied from -current (I opened a thread on stable@ a few weeks ago about this) but my "patch" was *nowhere* as big as this. > > Here Ken's patch: [snip] > There may be some patches that are not really related to mps (siba? if_sisreg?). > >> It runs 8.2-RC3 with the sys/dev/mps/ folder from -current, a somewhat patched conf/files resembling yours, and the makefile to build mps as a module. > > Dropping dev/mps leads to a diff close to Ken's: > [snip too] Indeed, this looks very much more like what I have, only the conf/files , modules makefiles, and dev/mps entries being changed. This reassures me that I correctly copied mps from -current, and that the inability to see the logical drive wasn't due to my incompetence ;) From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 16:58:47 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 35C811065672; Thu, 17 Feb 2011 16:58:47 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-ew0-f54.google.com (mail-ew0-f54.google.com [209.85.215.54]) by mx1.freebsd.org (Postfix) with ESMTP id 952778FC16; Thu, 17 Feb 2011 16:58:46 +0000 (UTC) Received: by ewy24 with SMTP id 24so1165116ewy.13 for ; Thu, 17 Feb 2011 08:58:45 -0800 (PST) Received: by 10.204.59.72 with SMTP id k8mr1939725bkh.208.1297961924670; Thu, 17 Feb 2011 08:58:44 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id 12sm795520bki.7.2011.02.17.08.58.42 (version=SSLv3 cipher=OTHER); Thu, 17 Feb 2011 08:58:43 -0800 (PST) Message-ID: <4D5D53C2.3010707@my.gd> Date: Thu, 17 Feb 2011 17:58:42 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Jack Vogel References: <4D41417A.20904@my.gd> <1DB50624F8348F48840F2E2CF6040A9D014BEB8833@orsmsx508.amr.corp.intel.com> <4D41B197.6070308@my.gd> <201101280146.57028.wmn@siberianet.ru> <4D41C9FC.10503@my.gd> <20110127195741.GA40449@icarus.home.lan> <4D41D7BE.3030208@my.gd> <20110127205845.GA41537@icarus.home.lan> <4D429A9F.8040307@my.gd> In-Reply-To: <4D429A9F.8040307@my.gd> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Sergey Lobanov , "freebsd-stable@freebsd.org" , Jeremy Chadwick , "freebsd-pf@freebsd.org" Subject: Re: High interrupt rate on a PF box + performance X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 16:58:47 -0000 On 1/28/11 11:29 AM, Damien Fleuriot wrote: > On 1/27/11 10:44 PM, Jack Vogel wrote: >> >> The 8.X kernel is NOT single-threaded. Anything but. And the stack has >> also been improved, I believe there are still bottlenecks but its far better >> than the old days. >> >> The igb driver in 8.2 creates up to 8 queues on the right hardware, they >> are each auto-bound to a particular CPU. >> >> The older version you are running had issues and hence multiqueue was >> not enabled. So, do upgrade once 8.2 is finalized :) >> >> Cheers, >> >> Jack >> > > Going to push for us to install 8.2 as soon as the release hits, thanks > for your feedback Jack :) Hello guys, list, This is a quick headsup regarding this issue. We have now swapped our PF firewalls to active-active and observed, as one would expect, approx. 50% drop of traffic, seeing it's now balanced between 2 machines :) We have also disabled pfsync (which also resulted in a massive drop of interrupts). One of the hosts is running 8.2-PRERELEASE , and this is the one for which I'm providing stats now. For completeness, also find the graphs: http://my.gd/fw_graphs/ # vmstat -i interrupt total rate irq16: mpt0 320899 0 irq21: atapci1 35 0 irq22: ehci0 ehci1 1992267 2 cpu0: timer 1330310985 1979 irq258: igb0:que 0 829898 1 irq259: igb0:que 1 3255 0 irq260: igb0:que 2 2059 0 irq261: igb0:que 3 1060 0 irq262: igb0:link 2 0 irq263: igb1:que 0 2676083520 3981 irq264: igb1:que 1 2676853656 3982 irq265: igb1:que 2 2682493388 3990 irq266: igb1:que 3 2688637571 3999 irq267: igb1:link 2 0 irq273: igb3:que 0 2654678899 3949 irq274: igb3:que 1 2648682488 3940 irq275: igb3:que 2 2650599952 3943 irq276: igb3:que 3 2657367887 3953 irq277: igb3:link 2 0 cpu1: timer 1330301807 1978 cpu2: timer 1330301315 1978 cpu3: timer 1330301347 1978 Total 26659762294 39659 # pfctl -si Status: Enabled for 7 days 18:43:34 Debug: Urgent Interface Stats for igb3 IPv4 IPv6 Bytes In 1585211309166 0 Bytes Out 2044715081803 0 Packets In Passed 6238056055 0 Blocked 15350206 0 Packets Out Passed 6300823415 0 Blocked 1223577 0 State Table Total Rate current entries 37627 searches 25108284353 37351.6/s inserts 2157108574 3209.0/s removals 2157070947 3208.9/s Counters match 2175657232 3236.6/s bad-offset 0 0.0/s fragment 104 0.0/s short 5 0.0/s normalize 557 0.0/s memory 0 0.0/s bad-timestamp 0 0.0/s congestion 0 0.0/s ip-option 6 0.0/s proto-cksum 52649 0.1/s state-mismatch 340029 0.5/s state-insert 0 0.0/s state-limit 0 0.0/s src-limit 90 0.0/s igb0@pci0:7:0:0: class=0x020000 card=0x145a8086 chip=0x10d68086 rev=0x02 hdr=0x00 vendor = 'Intel Corporation' device = '82575GB Gigabit Network Connection' class = network subclass = ethernet bar [10] = type Memory, range 32, base 0xdabc0000, size 131072, enabled bar [14] = type Memory, range 32, base 0xdac00000, size 2097152, enabled bar [18] = type I/O Port, range 32, base 0xdcc0, size 32, enabled bar [1c] = type Memory, range 32, base 0xdabb8000, size 16384, enabled cap 01[40] = powerspec 2 supports D0 D3 current D0 cap 05[50] = MSI supports 1 message, 64 bit cap 11[60] = MSI-X supports 10 messages in map 0x1c enabled cap 10[a0] = PCI-Express 2 endpoint max data 256(256) link x4(x4) ecap 0001[100] = AER 1 0 fatal 0 non-fatal 1 corrected ecap 0003[140] = Serial 1 001b21ffff12f438 synproxy 0 0.0/s (there are 4 of these, it's a quad port card) From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 17:00:10 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1FC61065674; Thu, 17 Feb 2011 17:00:09 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id 8F6208FC1C; Thu, 17 Feb 2011 17:00:09 +0000 (UTC) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id 1E61D46B06; Thu, 17 Feb 2011 12:00:09 -0500 (EST) Received: from jhbbsd.localnet (unknown [209.249.190.10]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 88EE88A02A; Thu, 17 Feb 2011 12:00:07 -0500 (EST) From: John Baldwin To: freebsd-stable@freebsd.org Date: Thu, 17 Feb 2011 11:58:24 -0500 User-Agent: KMail/1.13.5 (FreeBSD/7.4-CBSD-20110107; KDE/4.4.5; amd64; ; ) References: <20100909131017.GO4404@twoquid.cs.ru.nl> <20100909140529.GB76889@icarus.home.lan> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201102171158.24636.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (bigwig.baldwin.cx); Thu, 17 Feb 2011 12:00:07 -0500 (EST) X-Virus-Scanned: clamav-milter 0.96.3 at bigwig.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=0.5 required=4.2 tests=BAYES_00,MAY_BE_FORGED, RDNS_DYNAMIC autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on bigwig.baldwin.cx Cc: Olaf Seibert , Steven Hartland , Jeremy Chadwick , net@freebsd.org Subject: Re: mountd has resolving problems X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 17:00:10 -0000 On Thursday, February 17, 2011 7:18:28 am Steven Hartland wrote: > This has become a issue for us in 8.x as well. > > I'm pretty sure in pre 8.x these nfs mounts would simply background but > recently machines are now failing to boot. It seems that failure to > lookup nfs mount point hosts now causes this fatal error :( > > We've just tried Jeremy's netwait script and it works perfectly so either > this or something similar needs to get pushed into base. > > For reference the reason we need a delay here is our core Cisco router > takes a while to bring the port up properly on boot. > > Thanks for sharing the script Jeremy :) I use a similar hack that waits up to 30 seconds for the default gateway to be pingable. I think it is at least partly related to the new ARP code that now drops packets in IP output if the link is down. This can be very problematic during boot since some interfaces take a few seconds to negotiate link but the end result of the new check in IP output is that the attempt to send the packet fails with an error causing gethostbyname() and getaddrinfo() to fail completely without doing any retries. In 7 the packet would either sit in the descriptor ring until link was up, or it would be dropped, but it would silently fail, so the resolver in libc would just retry in 30 seconds or so at which time it would work fine. Waiting for the default route to be pingable actually fixed a few other problems for us on 7 though as well (often ntpdate would not work on boot and now it works reliably, etc.) so we went with that route. > Regards > Steve > > ----- Original Message ----- > From: "Jeremy Chadwick" > To: "Olaf Seibert" > Cc: > Sent: Thursday, September 09, 2010 2:05 PM > Subject: Re: mountd has resolving problems > > > > On Thu, Sep 09, 2010 at 03:10:17PM +0200, Olaf Seibert wrote: > >> I just upgraded a box from 8.0 to 8.1, and already when rebooting with > >> the new kernel (i.e. before installing new userland), I got the > >> following problem. > >> > >> Of course many of the messages scrolled off screen, but some were > >> preserved in the syslog. > >> > >> Sep 9 14:26:51 fourquid mountd[839]: can't get address info for host XYZ > >> Sep 9 14:26:51 fourquid mountd[839]: bad host XYZ in netgroup vbgroup, skipping > >> > >> Mountd was run and wanted to determine which hosts to export to. > >> However, it could not resolve any of them. So, that suggests some > >> network issue. > >> > >> However, I use a static IP address (no DHCP) and static info in > >> /etc/resolv.conf, using one of the university's name servers. So > >> resolving should always be available. > >> > >> Running /etc/rc.d/mountd restart so far always solved the export > >> problem. > >> > >> I have also seen (presumably similar) issues with mounting NFS file > >> systems, but that was deemed so fatal that the boot was aborted. A mount > >> ``by hand'' of the affected file system also worked. > >> > >> Any ideas? Maybe with the new kernel the network interface is a bit > >> slower in coming up, and not fully working by the time /etc/rc.d/mountd > >> runs? In fact, I now notice this sequence of messages in > >> /var/log/messages: > >> > >> Sep 9 14:26:51 fourquid mountd[839]: bad host XYZ in netgroup vbgroup, skipping > >> Sep 9 14:26:51 fourquid mountd[839]: bad exports list line /xxxxxx > >> Sep 9 14:26:54 fourquid kernel: fuse4bsd: version 0.3.9-pre1, FUSE ABI 7.8 > >> Sep 9 14:26:54 fourquid init: /bin/sh on /etc/rc terminated abnormally, going to single user mode > >> Sep 9 14:26:55 fourquid kernel: nfe0: link state changed to UP > >> > >> so here the network interface takes a full 4 more seconds to come up, > >> after it was already needed. > >> > >> I can try to put a 10 sec delay somewhere, but there should be a better > >> solution... > > > > The problem is that the network isn't "truly" up and available by the > > time mountd runs, and therefore DNS resolution doesn't work. Please use > > my netwait script to solve this problem: > > > > http://jdc.parodius.com/freebsd/netwait > > > > Place it in /usr/local/etc/rc.d, make sure it's chmod'd to 755, > > then enable use of it by using /etc/rc.conf variables like so: > > > > netwait_enable="yes" > > netwait_ip="4.2.2.1 4.2.2.2" > > netwait_if="nfe0" > > > > For what the variables do, please see the script comments. > > > > -- > > | Jeremy Chadwick jdc@parodius.com | > > | Parodius Networking http://www.parodius.com/ | > > | UNIX Systems Administrator Mountain View, CA, USA | > > | Making life hard for others since 1977. PGP: 4BD6C0CB | > > > > _______________________________________________ > > freebsd-stable@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > > > > ================================================ > This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. > > In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 > or return the E.mail to postmaster@multiplay.co.uk. > > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > -- John Baldwin From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 17:12:36 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 225DC106566C for ; Thu, 17 Feb 2011 17:12:36 +0000 (UTC) (envelope-from ken73.chen@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id A7CAF8FC0A for ; Thu, 17 Feb 2011 17:12:35 +0000 (UTC) Received: by wyf19 with SMTP id 19so2726985wyf.13 for ; Thu, 17 Feb 2011 09:12:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type; bh=1mQtYGMhTn4Dz/4TSHUbMFu2d+Gb6pQKOnVDWdfY3YM=; b=DmXHHByTHm/QGn/hL8+R+v0d0FPc8UFNM5EvqEecQ6dKc/Fl4QMTsGSm1OWNOvvEwd fxX1kivuOS1fsLLe0ol89eZkRII+JyiYei1/J25llQ0BEoJIUyktQGtTYGsGq7ssZywR /3lLF1xFrVdePSlMF0d+qqsspnGiOIF98gQjY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=RGUCiCBzx2rL1I1zH754NO+A1IJAMHgP6mfsCdE1Ej7sXim/WPQmbHt8TMr/WsNTBJ X/Kni+vimnLMfoA6bq9rWaqJKIPvHSH+FoT8Q64Ff/7JNQSsUStbQ7kdQUKFb9DRdf2S RRKH0zB35hSUyECfWCn+IbLygEz5Aht+V9A+A= Received: by 10.227.135.135 with SMTP id n7mr1953286wbt.185.1297962754574; Thu, 17 Feb 2011 09:12:34 -0800 (PST) MIME-Version: 1.0 Received: by 10.227.155.85 with HTTP; Thu, 17 Feb 2011 09:12:13 -0800 (PST) In-Reply-To: <4D5CD484.2020201@dougbarton.us> References: <4D5CC6B0.3060600@dougbarton.us> <4D5CD484.2020201@dougbarton.us> From: Ken Chen Date: Fri, 18 Feb 2011 01:12:13 +0800 Message-ID: To: Doug Barton Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: freebsd-stable@freebsd.org Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 17:12:36 -0000 I have tried. It can not be interrupted by CTRL-C. 2011/2/17 Doug Barton > Ok, likely you can bypass the problem by hitting Ctrl-C. > > Once you get kernel and userland updated make sure that you get /etc/ > updated as well and you should be fine. > > > hth, > > Doug > > > > On 02/16/2011 23:24, Ken Chen wrote: > >> It's first reboot with 8.1 kernel. >> >> nextboot -k GENERIC >> shutdown -r now >> >> >> 2011/2/17 Doug Barton > >> >> >> On 02/16/2011 21:56, Ken Chen wrote: >> >> Hello All, >> >> I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by >> 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on >> at >> ''Entropy harvesting: '. I try to change configuration in >> /etc/defaults/rc.conf, it helpless. >> >> >> Did you update /etc after updating the binaries, or is this the >> first reboot after freebsd-update installs the new kernel? >> > > > -- > > Nothin' ever doesn't change, but nothin' changes much. > -- OK Go > > Breadth of IT experience, and depth of knowledge in the DNS. > Yours for the right price. :) http://SupersetSolutions.com/ > > From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 17:59:28 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D836D106564A for ; Thu, 17 Feb 2011 17:59:28 +0000 (UTC) (envelope-from prvs=10296b544f=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 1986A8FC1B for ; Thu, 17 Feb 2011 17:59:27 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Thu, 17 Feb 2011 17:58:41 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Thu, 17 Feb 2011 17:58:41 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012243924.msg; Thu, 17 Feb 2011 17:58:40 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10296b544f=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: <4215B319C85B46A0AC539A67BC9EAF3C@multiplay.co.uk> From: "Steven Hartland" To: "John Baldwin" , References: <20100909131017.GO4404@twoquid.cs.ru.nl> <20100909140529.GB76889@icarus.home.lan> <201102171158.24636.jhb@freebsd.org> Date: Thu, 17 Feb 2011 17:59:05 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: Olaf Seibert , Jeremy Chadwick , net@freebsd.org Subject: Re: mountd has resolving problems X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 17:59:28 -0000 ----- Original Message ----- From: "John Baldwin" > Waiting for the default route to be pingable actually fixed a few other > problems for us on 7 though as well (often ntpdate would not work on boot and > now it works reliably, etc.) so we went with that route. Also fixed quite a few issues for us as well with services not reporting properly. Definitely something that should be considered as part of core IMO. Regards Steve ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 or return the E.mail to postmaster@multiplay.co.uk. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 18:01:42 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3F39C10656A4 for ; Thu, 17 Feb 2011 18:01:42 +0000 (UTC) (envelope-from dan@dan.emsphone.com) Received: from email2.allantgroup.com (email2.emsphone.com [199.67.51.116]) by mx1.freebsd.org (Postfix) with ESMTP id 01E8E8FC15 for ; Thu, 17 Feb 2011 18:01:41 +0000 (UTC) Received: from dan.emsphone.com (dan.emsphone.com [199.67.51.101]) by email2.allantgroup.com (8.14.4/8.14.4) with ESMTP id p1HI1e9s099338 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 17 Feb 2011 12:01:41 -0600 (CST) (envelope-from dan@dan.emsphone.com) Received: from dan.emsphone.com (smmsp@localhost [127.0.0.1]) by dan.emsphone.com (8.14.4/8.14.4) with ESMTP id p1HI1eXX027340 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 17 Feb 2011 12:01:40 -0600 (CST) (envelope-from dan@dan.emsphone.com) Received: (from dan@localhost) by dan.emsphone.com (8.14.4/8.14.4/Submit) id p1HI1e1O027339 for freebsd-stable@freebsd.org; Thu, 17 Feb 2011 12:01:40 -0600 (CST) (envelope-from dan) Date: Thu, 17 Feb 2011 12:01:40 -0600 From: Dan Nelson To: freebsd-stable@freebsd.org Message-ID: <20110217180140.GL66849@dan.emsphone.com> References: <20110217115653.GH34314@home.opsec.eu> <20110217124515.GI34314@home.opsec.eu> <4D5D1D10.7010000@digsys.bg> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4D5D1D10.7010000@digsys.bg> X-OS: FreeBSD 8.2-PRERELEASE User-Agent: Mutt/1.5.21 (2010-09-15) X-Virus-Scanned: clamav-milter 0.96.4 at email2.allantgroup.com X-Virus-Status: Clean X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (email2.allantgroup.com [199.67.51.78]); Thu, 17 Feb 2011 12:01:41 -0600 (CST) X-Scanned-By: MIMEDefang 2.68 on 199.67.51.78 Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 18:01:42 -0000 In the last episode (Feb 17), Daniel Kalchev said: > >>> da0: Fixed Direct Access SCSI-5 device > >>> da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) > > > > Thanks -- is it also possible to have something like > > > > da0: 2861588MB (732566646 4096 byte sectors: 255H 63S/T 364801C) > > According to Hitachi, this is an 512b drive. Correct. This isn't a 4k drive. Datasheet: http://www.hgst.com/internal-drives/enterprise/ultrastar/ultrastar-7k3000 Sector size (variable, Bytes/sector) 512 -- Dan Nelson dnelson@allantgroup.com From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 18:39:12 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E7ED0106566B for ; Thu, 17 Feb 2011 18:39:12 +0000 (UTC) (envelope-from oberman@es.net) Received: from mailgw.es.net (mail1.es.net [IPv6:2001:400:201:1::2]) by mx1.freebsd.org (Postfix) with ESMTP id CFF398FC17 for ; Thu, 17 Feb 2011 18:39:12 +0000 (UTC) Received: from ptavv.es.net (ptavv.es.net [IPv6:2001:400:910::29]) by mailgw.es.net (8.14.3/8.14.3) with ESMTP id p1HId25j012339 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 17 Feb 2011 10:39:02 -0800 Received: from ptavv.es.net (localhost [127.0.0.1]) by ptavv.es.net (Tachyon Server) with ESMTP id 230681CC16; Thu, 17 Feb 2011 10:39:02 -0800 (PST) To: Ken Chen In-reply-to: Your message of "Fri, 18 Feb 2011 01:12:13 +0800." Date: Thu, 17 Feb 2011 10:39:02 -0800 From: "Kevin Oberman" Message-Id: <20110217183902.230681CC16@ptavv.es.net> Cc: freebsd-stable@freebsd.org, Doug Barton Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 18:39:13 -0000 > From: Ken Chen > Date: Fri, 18 Feb 2011 01:12:13 +0800 > Sender: owner-freebsd-stable@freebsd.org > > I have tried. It can not be interrupted by CTRL-C. > > 2011/2/17 Doug Barton > > > Ok, likely you can bypass the problem by hitting Ctrl-C. > > > > Once you get kernel and userland updated make sure that you get /etc/ > > updated as well and you should be fine. > > > > > > hth, > > > > Doug > > > > > > > > On 02/16/2011 23:24, Ken Chen wrote: > > > >> It's first reboot with 8.1 kernel. > >> > >> nextboot -k GENERIC > >> shutdown -r now > >> > >> > >> 2011/2/17 Doug Barton > > >> > >> > >> On 02/16/2011 21:56, Ken Chen wrote: > >> > >> Hello All, > >> > >> I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by > >> 'freebsd-update'. After boot with 8.1 GENERIC kernel, it holds-on > >> at > >> ''Entropy harvesting: '. I try to change configuration in > >> /etc/defaults/rc.conf, it helpless. > >> > >> > >> Did you update /etc after updating the binaries, or is this the > >> first reboot after freebsd-update installs the new kernel? > >> While the last message to appear is "Entropy harvesting:", that may or may not be the cause of the hang. It really should continue after a ^C if that was the issue. Can you try a ^T to see what is really running? Or, if that does not tell you, try adding rc_debug="YES" to rc.conf. This will produce a LOT of output, but you probably are only interested in the end of it. Doug is WAY better at the rc issues than I am, but at least this should provide a bit more information. -- R. Kevin Oberman, Network Engineer Energy Sciences Network (ESnet) Ernest O. Lawrence Berkeley National Laboratory (Berkeley Lab) E-mail: oberman@es.net Phone: +1 510 486-8634 Key fingerprint:059B 2DDF 031C 9BA3 14A4 EADA 927D EBB3 987B 3751 From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 19:07:23 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4FA7F106566B for ; Thu, 17 Feb 2011 19:07:23 +0000 (UTC) (envelope-from telbizov@gmail.com) Received: from mail-qy0-f175.google.com (mail-qy0-f175.google.com [209.85.216.175]) by mx1.freebsd.org (Postfix) with ESMTP id ED3948FC08 for ; Thu, 17 Feb 2011 19:07:22 +0000 (UTC) Received: by qyk8 with SMTP id 8so4489944qyk.13 for ; Thu, 17 Feb 2011 11:07:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=EmoiwUvuUA5IDZOrq8YFIt1B21t/MkIBmj20AbJQeeA=; b=VAzaSM73Pp7gSVjgTUiMhrF87JnCkxjrh+10NZ98XWqFDj/Rt1bpFU4Tm5UW5MQmSO p8GeKyy9+fBPBpbj6gUqsSim+rV/fdgCKp/NG+bCDQ1/EzCT7zgioQjPNd6BSEyRaZ4d 1TozhfbfEd6wC6T+xecr39qIVfXT6JvaUOSsg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=Ug38TSjZkJE1jUTZb2ING4MUG6tOm2xiC4VNysrMsIkQ/ffszZGSwVcLAVfxzkgOUc 5Hsigvt/qvlJaOxESdEEXKlZniClmLSfJMnjN9KNbcO/2MIu87xE095sNQl/v3/kguNg +F0LOCaiHxYE/qHtz7aU7RQOSpZaE87Qa6tI4= MIME-Version: 1.0 Received: by 10.224.28.199 with SMTP id n7mr3100236qac.31.1297969641995; Thu, 17 Feb 2011 11:07:21 -0800 (PST) Received: by 10.229.0.207 with HTTP; Thu, 17 Feb 2011 11:07:21 -0800 (PST) In-Reply-To: <4D5D1075.2060708@my.gd> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> Date: Thu, 17 Feb 2011 11:07:21 -0800 Message-ID: From: Rumen Telbizov To: Damien Fleuriot Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 19:07:23 -0000 Hello Damien, list: I've been following this discussion with great interest and I hope the result of it will be the merge of a stable driver in STABLE branch soon. I brought this not a long ago ( http://lists.freebsd.org/pipermail/freebsd-stable/2011-January/061237.html) and I was hoping to have this driver in 8.x before 8.3 release. > What is sad is that these controllers are becoming very mainstream now, > we're getting them more and more on Dell servers , and the fbsd project > still struggles with them (for reasons I don't know, might be LSI's > fault, might be a lack of resources or interest...) > I couldn't agree more. I've been testing those (9211-8i) myself here on a bunch of SuperMicro servers and I'd say that I am very pleased with the performance of those HBAs (not the mention the price ~$230-250 CAD). On a 12 x SAS disks with a direct attached backplane 826A (6Gbit SAS2.0) in RAID0 across all of them (md linux software raid) I was able to squeeze * 2.1GBytes/s* sequential write (dd kind of style write). With the same setup and SATA disks I get to 1.2GByte/s. I did use 2 controllers to accomodate ports for all the disks. I get the same speed with ZFS and 9.0-CURRENT. On a related note I must say that I do have serious problems with the bandwidth when I use the SAS expander version of this backplane (826E26) (I cannot get more than 200-250 MBytes/s). I've been investigating this problem with LSI's help and still no conclusion. It looks like I am using only one channel. Anyway this was just my humble attempt to encourage the MFC of this driver. I think the card is pretty good. I'd like to hear other people's opinion on this HBA though. Regards, -- Rumen Telbizov http://telbizov.com From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 19:46:32 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1486106566B; Thu, 17 Feb 2011 19:46:32 +0000 (UTC) (envelope-from brde@optusnet.com.au) Received: from fallbackmx10.syd.optusnet.com.au (fallbackmx10.syd.optusnet.com.au [211.29.132.251]) by mx1.freebsd.org (Postfix) with ESMTP id 19E848FC14; Thu, 17 Feb 2011 19:46:31 +0000 (UTC) Received: from mail04.syd.optusnet.com.au (mail04.syd.optusnet.com.au [211.29.132.185]) by fallbackmx10.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id p1HHlKEl024342; Fri, 18 Feb 2011 04:47:20 +1100 Received: from c122-107-114-89.carlnfd1.nsw.optusnet.com.au (c122-107-114-89.carlnfd1.nsw.optusnet.com.au [122.107.114.89]) by mail04.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id p1HHl4Qm001875 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 18 Feb 2011 04:47:05 +1100 Date: Fri, 18 Feb 2011 04:47:04 +1100 (EST) From: Bruce Evans X-X-Sender: bde@besplex.bde.org To: John Baldwin In-Reply-To: <201102171158.24636.jhb@freebsd.org> Message-ID: <20110218043432.S3233@besplex.bde.org> References: <20100909131017.GO4404@twoquid.cs.ru.nl> <20100909140529.GB76889@icarus.home.lan> <201102171158.24636.jhb@freebsd.org> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: Olaf Seibert , net@freebsd.org, freebsd-stable@freebsd.org, Jeremy Chadwick , Steven Hartland Subject: Re: mountd has resolving problems X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 19:46:32 -0000 On Thu, 17 Feb 2011, John Baldwin wrote: > On Thursday, February 17, 2011 7:18:28 am Steven Hartland wrote: >> This has become a issue for us in 8.x as well. >> >> I'm pretty sure in pre 8.x these nfs mounts would simply background but >> recently machines are now failing to boot. It seems that failure to >> lookup nfs mount point hosts now causes this fatal error :( >> >> We've just tried Jeremy's netwait script and it works perfectly so either >> this or something similar needs to get pushed into base. >> >> For reference the reason we need a delay here is our core Cisco router >> takes a while to bring the port up properly on boot. >> >> Thanks for sharing the script Jeremy :) > > I use a similar hack that waits up to 30 seconds for the default gateway to be > pingable. I think it is at least partly related to the new ARP code that now > drops packets in IP output if the link is down. I use hackish ping -t s and traceroutes in /etc/rc.d/netif. Don't know if it is the same problem. It affects mainly nfs and ntpdate/ntpd to local systems here. Even with all-static routes. > This can be very problematic > during boot since some interfaces take a few seconds to negotiate link but > the end result of the new check in IP output is that the attempt to send the > packet fails with an error causing gethostbyname() and getaddrinfo() to fail > completely without doing any retries. In 7 the packet would either sit in the Also after down/up to change something. If you try to use the network before it is back then you have to wait much longer before it is really back. This is a relatively minor problem since down/up is not needed routinely. > descriptor ring until link was up, or it would be dropped, but it would > silently fail, so the resolver in libc would just retry in 30 seconds or so at > which time it would work fine. > > Waiting for the default route to be pingable actually fixed a few other > problems for us on 7 though as well (often ntpdate would not work on boot and > now it works reliably, etc.) so we went with that route. I thought I first saw the problem a little earlier, and it affected bge more than fxp. Maybe the latter is correct and the problem is smaller with fxp just because it is ready sooner. Bruce From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 20:21:05 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7AD191065670 for ; Thu, 17 Feb 2011 20:21:05 +0000 (UTC) (envelope-from dougb@dougbarton.us) Received: from mail2.fluidhosting.com (mx22.fluidhosting.com [204.14.89.5]) by mx1.freebsd.org (Postfix) with ESMTP id 08FC08FC08 for ; Thu, 17 Feb 2011 20:21:04 +0000 (UTC) Received: (qmail 29316 invoked by uid 399); 17 Feb 2011 20:20:59 -0000 Received: from router.ka9q.net (HELO ?192.168.2.9?) (dougb@dougbarton.us@75.60.237.91) by mail2.fluidhosting.com with ESMTPAM; 17 Feb 2011 20:20:59 -0000 X-Originating-IP: 75.60.237.91 X-Sender: dougb@dougbarton.us Message-ID: <4D5D832A.8060903@dougbarton.us> Date: Thu, 17 Feb 2011 12:20:58 -0800 From: Doug Barton Organization: http://SupersetSolutions.com/ User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Steven Hartland References: <20100909131017.GO4404@twoquid.cs.ru.nl> <20100909140529.GB76889@icarus.home.lan> <201102171158.24636.jhb@freebsd.org> <4215B319C85B46A0AC539A67BC9EAF3C@multiplay.co.uk> In-Reply-To: <4215B319C85B46A0AC539A67BC9EAF3C@multiplay.co.uk> X-Enigmail-Version: 1.1.1 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Olaf Seibert , freebsd-stable@freebsd.org, Jeremy Chadwick , John Baldwin , net@freebsd.org Subject: Re: mountd has resolving problems X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 20:21:05 -0000 On 2/17/2011 9:59 AM, Steven Hartland wrote: > ----- Original Message ----- From: "John Baldwin" >> Waiting for the default route to be pingable actually fixed a few >> other problems for us on 7 though as well (often ntpdate would not >> work on boot and now it works reliably, etc.) so we went with that route. > > Also fixed quite a few issues for us as well with services not reporting > properly. Definitely something that should be considered as part of core I've already said that I plan to commit this once the releases are done. :) Doug -- Nothin' ever doesn't change, but nothin' changes much. -- OK Go Breadth of IT experience, and depth of knowledge in the DNS. Yours for the right price. :) http://SupersetSolutions.com/ From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 20:46:42 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 36F4A106564A for ; Thu, 17 Feb 2011 20:46:42 +0000 (UTC) (envelope-from lists@c0mplx.org) Received: from home.opsec.eu (home.opsec.eu [IPv6:2001:14f8:200::1]) by mx1.freebsd.org (Postfix) with ESMTP id E5C758FC0A for ; Thu, 17 Feb 2011 20:46:41 +0000 (UTC) Received: from pi by home.opsec.eu with local (Exim 4.72 (FreeBSD)) (envelope-from ) id 1PqAkN-000AWG-Ev for freebsd-stable@freebsd.org; Thu, 17 Feb 2011 21:46:43 +0100 Date: Thu, 17 Feb 2011 21:46:43 +0100 From: Kurt Jaeger To: freebsd-stable@freebsd.org Message-ID: <20110217204643.GJ34314@home.opsec.eu> References: <20110217115653.GH34314@home.opsec.eu> <20110217124515.GI34314@home.opsec.eu> <4D5D1D10.7010000@digsys.bg> <20110217180140.GL66849@dan.emsphone.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110217180140.GL66849@dan.emsphone.com> Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 20:46:42 -0000 Hi! > > According to Hitachi, this is an 512b drive. > > Correct. This isn't a 4k drive. Datasheet: > > http://www.hgst.com/internal-drives/enterprise/ultrastar/ultrastar-7k3000 Hmm, wasn't the issues with 3T drives, that they internally use 4K blocks and emulate 512 and that therefore 8 block alignments are an performance issue ? The reason I'm asking: I encounter the problem of the lost secondary GPT table: Feb 17 22:15:44 vserv1 kernel: GEOM: ad7: the secondary GPT table is corrupt or invalid. Feb 17 22:15:44 vserv1 kernel: GEOM: ad7: using the primary only -- recovery suggested. Feb 17 22:15:44 vserv1 kernel: GEOM: ufsid/4d5d8faa10b63ac1: the secondary GPT table is corrupt or invalid. Feb 17 22:15:44 vserv1 kernel: GEOM: ufsid/4d5d8faa10b63ac1: using the primary only -- recovery suggested. I had this disc connected via some usb2sata adapter as da0, and there was no error message when I did the 'gpart create ad7' thing. When I now connect it to the some other box as ad7 and this error message appears: Which of the two has the problem with the controller not getting the large size disc correct ? -- pi@opsec.eu +49 171 3101372 9 years to go ! From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 21:07:06 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EDE57106567A for ; Thu, 17 Feb 2011 21:07:06 +0000 (UTC) (envelope-from ml@netfence.it) Received: from cp-out8.libero.it (cp-out8.libero.it [212.52.84.108]) by mx1.freebsd.org (Postfix) with ESMTP id 7BA7E8FC20 for ; Thu, 17 Feb 2011 21:07:06 +0000 (UTC) X-CTCH-Spam: Unknown X-CTCH-RefID: str=0001.0A0B0205.4D5D8DF8.0208,ss=1,re=0.000,fgs=0 X-libjamoibt: 1555 Received: from soth.ventu (151.51.49.89) by cp-out8.libero.it (8.5.133) id 4D0F2C9809198FE7 for freebsd-stable@freebsd.org; Thu, 17 Feb 2011 22:07:04 +0100 Received: from alamar.ventu (alamar.ventu [10.1.2.18]) by soth.ventu (8.14.4/8.14.4) with ESMTP id p1HL6url046763 for ; Thu, 17 Feb 2011 22:06:56 +0100 (CET) (envelope-from ml@netfence.it) Message-ID: <4D5D8DF0.8080900@netfence.it> Date: Thu, 17 Feb 2011 22:06:56 +0100 From: Andrea Venturoli User-Agent: Mozilla/5.0 (X11; U; FreeBSD i386; it-IT; rv:1.9.2.13) Gecko/20101211 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-stable@freebsd.org References: <201102091420.p19EKJ5u001268@m5p.com> <20110217032858.GA17686@icarus.home.lan> In-Reply-To: <20110217032858.GA17686@icarus.home.lan> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.68 on 10.1.2.13 Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 21:07:07 -0000 On 02/17/11 04:28, Jeremy Chadwick wrote: > On Wed, Feb 16, 2011 at 09:46:37PM -0500, Michael Proto wrote: >> On Wed, Feb 9, 2011 at 9:20 AM, wrote: >>> Under 8.2-PRERELEASE (GENERIC kernel), about 15% of the times I boot up >>> (with rpc.statd and rpc.lockd enabled in rc.conf), I get: >>> >>> Feb 4 07:31:11 wonderland rpc.statd: bindresvport_sa: Address already in use >>> Feb 4 07:31:11 wonderland root: /etc/rc: WARNING: failed to start statd >>> >>> and slightly later: >>> >>> Feb 4 07:31:36 wonderland kernel: NLM: unexpected error contacting NSM, stat=5, errno=35 >>> >>> I can start rpc.statd and rpc.lockd manually at this point (and I have to >>> start them to run firefox and mail with my NFS-mounted home directory and >>> mail spool). But what might cause the above errors? -- George Mitchell >>> >>> _______________________________________________ >>> freebsd-stable@freebsd.org mailing list >>> http://lists.freebsd.org/mailman/listinfo/freebsd-stable >>> To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" >>> >> >> Don't rpc.statd and lockd try to choose a random port upon startup? Yes, by default. > I >> seem to remember a similar problem I had a long time ago. I opted to >> use a consistent, not-used port and haven't seen the problem since >> (this was years ago, so I can't remember if the error you're seeing >> was identical to mine). >> >> /etc/rc.conf: >> rpc_statd_flags="-p 898" >> rpc_lockd_flags="-p 4045" I have: rpc_statd_flags="-p 918" rpc_lockd_flags="-p 868" Still statd occasionally fails to start. It might be that something else has already bound to port 918, though I don't know what. I'll check as soon as I have the chance. > Locking down the port numbers as you showed is the best choice, plus > allows for proper firewall rules to be added. However, be aware not all > daemons support this. Reliable firewall rules for NFS = good luck. Since I put the above in rc.conf, I've had more problems with NFS and ipfw. I also vaguely remember some daemons having hooks to open ipfw ports dinamically. bye & Thanks av. From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 22:29:00 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8C23D106566B; Thu, 17 Feb 2011 22:29:00 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id F091F8FC0C; Thu, 17 Feb 2011 22:28:59 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1HMSr2k086013; Fri, 18 Feb 2011 01:28:53 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Fri, 18 Feb 2011 01:28:53 +0300 (MSK) From: Dmitry Morozovsky To: "Kenneth D. Merry" In-Reply-To: <20110216203542.GA41226@nargothrond.kdm.org> Message-ID: References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> <20110216203542.GA41226@nargothrond.kdm.org> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Fri, 18 Feb 2011 01:28:53 +0300 (MSK) Cc: freebsd-stable@freebsd.org, Daniel Kalchev Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 22:29:00 -0000 On Wed, 16 Feb 2011, Kenneth D. Merry wrote: KDM> > KDM> > Ah that makes sense. I'm a bit reluctant to use -current on this particular KDM> > KDM> > machine, so I would discuss MFCing mps driver wirh ken@ KDM> > KDM> KDM> > KDM> I have attached a patch against -stable, try it out and let me know whether KDM> > KDM> it works. If so I'll go ahead and MFC it. KDM> > KDM> > I'm afraid something goes wrong at your side, at least in some files in KDM> > sys/dev/mps, like KDM> > KDM> > Index: sys/dev/mps/mps_ioctl.h KDM> > =================================================================== KDM> > --- sys/dev/mps/mps_ioctl.h (revision 212420) KDM> > +++ sys/dev/mps/mps_ioctl.h (working copy) KDM> > KDM> > as there is no sys/dev/mps in stable/8 kernel sources KDM> KDM> Whoops, svn diff doesn't do the right thing when there are multiple changes KDM> merged. KDM> KDM> I re-did the diffs manually, you should be able to do something like: KDM> KDM> cd src KDM> cat patch |patch -p4 well, this sequence creates mps-related files directly in src directory, but I managed to overcome this :) test reboot (remotely) said that at least machine tastes mps and single non-configured drive, but further testing is due. Thank you very much! -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Thu Feb 17 22:48:42 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C047B106564A for ; Thu, 17 Feb 2011 22:48:42 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 45EF48FC08 for ; Thu, 17 Feb 2011 22:48:41 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1HMmaDu086295; Fri, 18 Feb 2011 01:48:36 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Fri, 18 Feb 2011 01:48:36 +0300 (MSK) From: Dmitry Morozovsky To: Daniel Kalchev In-Reply-To: <4D5D1D10.7010000@digsys.bg> Message-ID: References: <20110217115653.GH34314@home.opsec.eu> <20110217124515.GI34314@home.opsec.eu> <4D5D1D10.7010000@digsys.bg> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Fri, 18 Feb 2011 01:48:36 +0300 (MSK) Cc: freebsd-stable@freebsd.org Subject: Re: 3TB disc and block alignment X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 17 Feb 2011 22:48:42 -0000 On Thu, 17 Feb 2011, Daniel Kalchev wrote: DK> > > > da0: Fixed Direct Access SCSI-5 device DK> > > > da0: 2861588MB (5860533168 512 byte sectors: 255H 63S/T 364801C) DK> > DK> > Thanks -- is it also possible to have something like DK> > DK> > da0: 2861588MB (732566646 4096 byte sectors: 255H 63S/T 364801C) DK> > DK> According to Hitachi, this is an 512b drive. Yep. A friend of mine a couple of weeks ago was involved in testing 3T disks available now in RU: - Hitachi Deskstar 7K3000: HDS723030ALA640 - Seagate Barracuda XT: ST33000651AS - Western Digital Caviar Green: WD30EZRS-11J99B0 from which only the latter, according to the tests, uses 4k firmware sectors. -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 13:39:56 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0B10E106566C for ; Fri, 18 Feb 2011 13:39:56 +0000 (UTC) (envelope-from ykirill@yahoo.com) Received: from nm3-vm0.bullet.mail.ne1.yahoo.com (nm3-vm0.bullet.mail.ne1.yahoo.com [98.138.91.55]) by mx1.freebsd.org (Postfix) with SMTP id 92AC68FC0A for ; Fri, 18 Feb 2011 13:39:55 +0000 (UTC) Received: from [98.138.90.53] by nm3.bullet.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 13:27:00 -0000 Received: from [98.138.89.194] by tm6.bullet.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 13:27:00 -0000 Received: from [127.0.0.1] by omp1052.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 13:27:00 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 518396.15625.bm@omp1052.mail.ne1.yahoo.com Received: (qmail 94126 invoked by uid 60001); 18 Feb 2011 13:27:00 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yahoo.com; s=s1024; t=1298035620; bh=YKiq9NF6mGbYXuMALnsM/I25KniceoDi9yHrBGk2WNM=; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:MIME-Version:Content-Type; b=IV+4f3dLsH6kvFbi/b3VyHAcdr39Uv7v+FNnHR6BIxDklCXVskt9RTqNXWL2JPYcr3UxiEkrkmaly8LURubL7uxUkucK4J2DS7GE2rjVkOqLmZq5QBGqU/0En5IsHFCeeBOom3MfhvswAAfmX+hRIjQge/nPqZh/5FFTB5KrK90= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.com; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:MIME-Version:Content-Type; b=1+65klwEt3SdutyxcQNPsOjWXM2p9traGQxlrhEBENfYYd3XVfrEayqj0CBJDUERq9yZB4kHJbVDPB/BwttZqLgzCyzCNOv7XAXvnNZuO5pihkusYuGCNremiJV+EdXJtNKOi8gas22igID7JMIn13d1851H4ZF98U40LxqY/Jk=; Message-ID: <394966.92530.qm@web120520.mail.ne1.yahoo.com> X-YMail-OSG: _hJmmGMVM1ne7mtxu5OkvszfbiNk27JQpZ6Z6WiO8rOVgQi LN0lb88Ikqon7S6W..oiFawNaYtVLwePRwfQuqSqgUx37a2ClO.J2OR7h7Cx IOFwXMNKlRyflZifjp3l7HayiEG8qK7EKPV1kElEHuOs5eBovMUifSNGnXP. AB2WVSosZg26K9mONzQXjjVb5GbJP.nUjLKXyZBNX8_P7FmJMIKhXRzdyPFs k0Eu7LGB3aGPB_r_6adTlDCTXFH.kY3JxPfZZD_.4rkAy0LRxfvSZS4Eu4ym vncXoJxevzvUo Received: from [212.74.229.232] by web120520.mail.ne1.yahoo.com via HTTP; Fri, 18 Feb 2011 05:27:00 PST X-Mailer: YahooMailClassic/11.4.20 YahooMailWebService/0.8.109.292656 Date: Fri, 18 Feb 2011 05:27:00 -0800 (PST) From: Kirill Yelizarov To: freebsd-stable@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Subject: NFS client over udp X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 13:39:56 -0000 Good Day! I have a reproducible memory leak when using nfs client with an old nfs server using udp protocol. I'm running rsync every hour from a mounted nfs volume to an ufs local volume. Each time rsync is running wired memory is increased. Wired memory is rising when rsync is in getblk or biord state. When rsync is complete memory is not freed and lately all memory is in active or wired state and system starts swapping. I didn't see such behavior when client os was RELEASE-8.0. Then i switched to STABLE-8.1 of late summer and found this leak so i upgraded to STABLE-8.2Prerelease and got the same leak. vmstat -m shows nothing big. client version: FreeBSD imap1.***.com 8.2-PRERELEASE FreeBSD 8.2-PRERELEASE #0: Thu Feb 17 13:54:25 MSK 2011 root@imap1.****.com:/usr/obj/usr/src/sys/IMAP1 amd64 i tried different mounting options: 1 - rw,rsize=32768,wsize=32768,nfsv3,intr,mntudp,rdirplus, readdirsize=65536,noauto,noexec 2 - rw,nfsv3,mntudp,noexec i also tried setting -tso -txcsum -rxcsum for igb network card Regards, Kirill From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 14:06:06 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C91F51065693 for ; Fri, 18 Feb 2011 14:06:06 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from qmta08.westchester.pa.mail.comcast.net (qmta08.westchester.pa.mail.comcast.net [76.96.62.80]) by mx1.freebsd.org (Postfix) with ESMTP id 737B58FC1D for ; Fri, 18 Feb 2011 14:06:05 +0000 (UTC) Received: from omta10.westchester.pa.mail.comcast.net ([76.96.62.28]) by qmta08.westchester.pa.mail.comcast.net with comcast id 9S3n1g0060cZkys58S66eV; Fri, 18 Feb 2011 14:06:06 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta10.westchester.pa.mail.comcast.net with comcast id 9S5x1g00W0PUQVN3WS60dZ; Fri, 18 Feb 2011 14:06:06 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id B23D79B422; Fri, 18 Feb 2011 06:05:55 -0800 (PST) Date: Fri, 18 Feb 2011 06:05:55 -0800 From: Jeremy Chadwick To: Kirill Yelizarov Message-ID: <20110218140555.GA58978@icarus.home.lan> References: <394966.92530.qm@web120520.mail.ne1.yahoo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <394966.92530.qm@web120520.mail.ne1.yahoo.com> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-stable@freebsd.org Subject: Re: NFS client over udp X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 14:06:06 -0000 On Fri, Feb 18, 2011 at 05:27:00AM -0800, Kirill Yelizarov wrote: > I have a reproducible memory leak when using nfs client with an old > nfs server using udp protocol. I'm running rsync every hour from a > mounted nfs volume to an ufs local volume. Each time rsync is running > wired memory is increased. Wired memory is rising when rsync is in > getblk or biord state. When rsync is complete memory is not freed and > lately all memory is in active or wired state and system starts > swapping. I didn't see such behavior when client os was RELEASE-8.0. > Then i switched to STABLE-8.1 of late summer and found this leak so i > upgraded to STABLE-8.2Prerelease and got the same leak. vmstat -m > shows nothing big. > > client version: FreeBSD imap1.***.com 8.2-PRERELEASE FreeBSD > 8.2-PRERELEASE #0: Thu Feb 17 13:54:25 MSK 2011 > root@imap1.****.com:/usr/obj/usr/src/sys/IMAP1 amd64 > > i tried different mounting options: 1 - > rw,rsize=32768,wsize=32768,nfsv3,intr,mntudp,rdirplus, > readdirsize=65536,noauto,noexec 2 - rw,nfsv3,mntudp,noexec > > i also tried setting -tso -txcsum -rxcsum for igb network card Is ZFS in use on the system which sees rising wired memory? -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB | From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 14:09:40 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DB671106566C for ; Fri, 18 Feb 2011 14:09:39 +0000 (UTC) (envelope-from ykirill@yahoo.com) Received: from nm6-vm0.bullet.mail.ne1.yahoo.com (nm6-vm0.bullet.mail.ne1.yahoo.com [98.138.91.54]) by mx1.freebsd.org (Postfix) with SMTP id 8A7388FC16 for ; Fri, 18 Feb 2011 14:09:39 +0000 (UTC) Received: from [98.138.90.50] by nm6.bullet.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 14:09:38 -0000 Received: from [98.138.89.163] by tm3.bullet.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 14:09:38 -0000 Received: from [127.0.0.1] by omp1019.mail.ne1.yahoo.com with NNFMP; 18 Feb 2011 14:09:38 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 705159.38191.bm@omp1019.mail.ne1.yahoo.com Received: (qmail 27804 invoked by uid 60001); 18 Feb 2011 14:09:38 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yahoo.com; s=s1024; t=1298038178; bh=xp2Va2XUNaVoUuu5MaDlL+0poJoNX4YF09oXHZxPCRc=; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding; b=Z72Vw+0T8WCQloyRMk+KFS7Phe/rolJ5rSO9qcixkiY2sBoiNnFKEis8u1Cd1tvmH5iYmDUK/tivmW8MWqLk3JGVjfXbFU4X4n//E4PB0hsm7k6h2GACIZ5crVXDvm1eFQD9XlPWM3FwTo0VsTv/1FQnPwHSd4bXaa+m8MguLys= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.com; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding; b=juWymBOhrC7c4DlgaNy1eR9oPEfee/rBGQGx0k5OAiH7hHnLSvsm4VLc3RQArbaJZfPEHuuTssn9e3HeosLOns4+htyW3sTSrKmjxpKyuaaaqQLWESsrGAcjVZnDAJQFcT//plhgJMLThDVmyZgxgCjFpoFCiudlGTts0kMvBG8=; Message-ID: <600887.27323.qm@web120520.mail.ne1.yahoo.com> X-YMail-OSG: cfnsuwQVM1k.0giWR2Xxst2km.mbLmpGkZixVLB1c5pQwmF 6RTwTQF2_ZS3xMaG2B0wfHqEQ1jA53ppGvbClRi5zPYyM_x0iGSLTH51vlBD jdeEYe1AdDIZ4VDlNqwadIH7NDav0oC5n5OoD.A85D5Lbv3gxf6zpiktn2fd 0BtJj1kqHDeInVQlrLCymbw4Ys3RmB7MweSe.x0OShrM_BzD1iZF053lEI8D _XtG75ZiY4jqNMjYZKEh1OoS62mvngbXB06xmfwBh84qHqLNp4pDO7ymPn7o ZrP_gsSV_TE09Zg6JWBLF Received: from [212.74.229.232] by web120520.mail.ne1.yahoo.com via HTTP; Fri, 18 Feb 2011 06:09:38 PST X-Mailer: YahooMailClassic/11.4.20 YahooMailWebService/0.8.109.292656 Date: Fri, 18 Feb 2011 06:09:38 -0800 (PST) From: Kirill Yelizarov To: freebsd-stable@freebsd.org In-Reply-To: <20110218140555.GA58978@icarus.home.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: NFS client over udp X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 14:09:40 -0000 =0A=0A--- On Fri, 2/18/11, Jeremy Chadwick wrote= :=0A=0A> From: Jeremy Chadwick =0A> Subject: Re: = NFS client over udp=0A> To: "Kirill Yelizarov" =0A> Cc: = freebsd-stable@freebsd.org=0A> Date: Friday, February 18, 2011, 5:05 PM=0A>= On Fri, Feb 18, 2011 at 05:27:00AM=0A> -0800, Kirill Yelizarov wrote:=0A> = > I have a reproducible memory leak when using nfs=0A> client with an old= =0A> > nfs server using udp protocol. I'm running rsync every=0A> hour from= a=0A> > mounted nfs volume to an ufs local volume. Each time=0A> rsync is = running=0A> > wired memory is increased. Wired memory is rising when=0A> rs= ync is in=0A> > getblk or biord state. When rsync is complete memory=0A> is= not freed and=0A> > lately all memory is in active or wired state and=0A> = system starts=0A> > swapping. I didn't see such behavior when client os=0A>= was RELEASE-8.0.=0A> > Then i switched to STABLE-8.1 of late summer and fo= und=0A> this leak so i=0A> > upgraded to STABLE-8.2Prerelease and got the s= ame=0A> leak. vmstat -m=0A> > shows nothing big. =0A> > =0A> > client versi= on: FreeBSD imap1.***.com 8.2-PRERELEASE=0A> FreeBSD=0A> > 8.2-PRERELEASE #= 0: Thu Feb 17 13:54:25 MSK 2011=0A> > root@imap1.****.com:/usr/obj/usr/src/= sys/IMAP1=A0=0A> amd64=0A> > =0A> > i tried different mounting options:=A0 = =A0=0A> =A0=A0=A01 -=0A> >=0A> rw,rsize=3D32768,wsize=3D32768,nfsv3,intr,mn= tudp,rdirplus,=0A> > readdirsize=3D65536,noauto,noexec 2 -=0A> rw,nfsv3,mnt= udp,noexec=0A> > =0A> > i also tried setting -tso -txcsum -rxcsum for igb= =0A> network card=0A> =0A> Is ZFS in use on the system which sees rising wi= red=0A> memory?=0ANo, ufs only. =0A> =0A> -- =0A> | Jeremy Chadwick=A0 =A0 = =A0 =A0 =A0 =A0=0A> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=0A> =A0 =A0 =A0=A0=A0jd= c@parodius.com=0A> |=0A> | Parodius Networking=A0 =A0 =A0 =A0 =A0=0A> =A0 = =A0 =A0 =A0 =A0 =A0=A0=A0http://www.parodius.com/ |=0A> | UNIX Systems Admi= nistrator=A0 =A0 =A0 =A0=0A> =A0 =A0 =A0 =A0 =A0 Mountain View, CA, USA |= =0A> | Making life hard for others since 1977.=A0 =A0=0A> =A0 =A0 =A0 =A0 = =A0=A0=A0PGP 4BD6C0CB=0A> |=0A> =0A> =0A=0A=0A From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 16:45:18 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 82046106564A for ; Fri, 18 Feb 2011 16:45:18 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 488AE8FC0A for ; Fri, 18 Feb 2011 16:45:17 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IGjAdY078092; Fri, 18 Feb 2011 09:45:10 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IGj98w078091; Fri, 18 Feb 2011 09:45:09 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 09:45:09 -0700 From: "Kenneth D. Merry" To: Damien Fleuriot Message-ID: <20110218164509.GB77903@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4D5D1075.2060708@my.gd> User-Agent: Mutt/1.4.2i Cc: "freebsd-stable@freebsd.org" , Oliver Brandmueller Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 16:45:18 -0000 On Thu, Feb 17, 2011 at 13:11:33 +0100, Damien Fleuriot wrote: > On 2/17/11 12:10 PM, Oliver Brandmueller wrote: > > Hi, > > > > On Thu, Feb 17, 2011 at 12:07:17PM +0100, Damien Fleuriot wrote: > >> It looks rather unhappy: > >> > >> mybsd root /usr/ports/sysutils/smartmontools > >> # > >> /usr/local/sbin/smartctl -a /dev/da0 > >> smartctl 5.40 2010-10-16 r3189 [FreeBSD 8.2-RC3 amd64] (local build) > >> Copyright (C) 2002-10 by Bruce Allen, http://smartmontools.sourceforge.net > >> > >> /dev/da0: No such file or directory > >> Smartctl: please specify device type with the -d option. > > > > Thanx for the test and the quick reply! I'm really getting crazy on > > this. All the SAS controllers seems to have nifty RAID features and > > stuff... *sigh* > > > > Thanx again, > > Oliver > > > > What is sad is that these controllers are becoming very mainstream now, > we're getting them more and more on Dell servers , and the fbsd project > still struggles with them (for reasons I don't know, might be LSI's > fault, might be a lack of resources or interest...) LSI has actually been working on the driver, and has almost completed their version of it. It will go into FreeBSD in the near future. In the mean time I have merged the mps(4) driver into -stable. Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 16:46:47 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 14A8610656A4 for ; Fri, 18 Feb 2011 16:46:47 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id AC2208FC13 for ; Fri, 18 Feb 2011 16:46:46 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IGkj8j078127; Fri, 18 Feb 2011 09:46:45 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IGkiwX078126; Fri, 18 Feb 2011 09:46:44 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 09:46:44 -0700 From: "Kenneth D. Merry" To: Ollivier Robert Message-ID: <20110218164644.GC77903@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <20110216172643.GA37858@nargothrond.kdm.org> <20110216203542.GA41226@nargothrond.kdm.org> <20110217142147.GB15577@roberto-al.eurocontrol.fr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110217142147.GB15577@roberto-al.eurocontrol.fr> User-Agent: Mutt/1.4.2i Cc: freebsd-stable@freebsd.org, Dmitry Morozovsky Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 16:46:47 -0000 On Thu, Feb 17, 2011 at 15:21:48 +0100, Ollivier Robert wrote: > According to Damien Fleuriot: > > I destroyed the logical volume and built mps copied from -current (I opened a thread on stable@ a few weeks ago about this) but my "patch" was *nowhere* as big as this. > > Here Ken's patch: > > amd64/conf/GENERIC | 1 > conf/files | 5 > dev/bwn/if_bwn.c | 4 > dev/mps/mpi/mpi2.h | 1121 ++++++++++++++++++ > dev/mps/mpi/mpi2_cnfg.h | 2646 +++++++++++++++++++++++++++++++++++++++++++ > dev/mps/mpi/mpi2_hbd.h | 114 + > dev/mps/mpi/mpi2_history.txt | 382 ++++++ > dev/mps/mpi/mpi2_init.h | 454 +++++++ > dev/mps/mpi/mpi2_ioc.h | 1414 ++++++++++++++++++++++ > dev/mps/mpi/mpi2_ra.h | 86 + > dev/mps/mpi/mpi2_raid.h | 302 ++++ > dev/mps/mpi/mpi2_sas.h | 285 ++++ > dev/mps/mpi/mpi2_targ.h | 441 +++++++ > dev/mps/mpi/mpi2_tool.h | 391 ++++++ > dev/mps/mpi/mpi2_type.h | 99 + > dev/mps/mps.c | 1821 +++++++++++++++++++++++++++++ > dev/mps/mps_ioctl.h | 106 + > dev/mps/mps_pci.c | 365 +++++ > dev/mps/mps_sas.c | 2007 ++++++++++++++++++++++++++++++++ > dev/mps/mps_table.c | 493 ++++++++ > dev/mps/mps_table.h | 53 > dev/mps/mps_user.c | 944 +++++++++++++++ > dev/mps/mpsvar.h | 390 ++++++ > dev/siba/siba_bwn.c | 2 > dev/sis/if_sisreg.h | 2 > mips/mips/mp_machdep.c | 2 > modules/Makefile | 1 > modules/mps/Makefile | 14 > > There may be some patches that are not really related to mps (siba? if_sisreg?). Yeah, they weren't really related. Someone went through and eliminated a few instances of double semicolons, and one of them was in the mps driver. I just merged the whole change since it was rather harmless. Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 16:49:41 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A978D1065673 for ; Fri, 18 Feb 2011 16:49:41 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 5236C8FC0C for ; Fri, 18 Feb 2011 16:49:40 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IGneaL078161; Fri, 18 Feb 2011 09:49:40 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IGneZi078160; Fri, 18 Feb 2011 09:49:40 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 09:49:40 -0700 From: "Kenneth D. Merry" To: Rumen Telbizov Message-ID: <20110218164940.GD77903@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2i Cc: "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 16:49:41 -0000 On Thu, Feb 17, 2011 at 11:07:21 -0800, Rumen Telbizov wrote: > Hello Damien, list: > > I've been following this discussion with great interest and I hope the > result of it > will be the merge of a stable driver in STABLE branch soon. > > I brought this not a long ago ( > http://lists.freebsd.org/pipermail/freebsd-stable/2011-January/061237.html) > and I was hoping to have this driver in 8.x before 8.3 release. It is in -stable now, and so should be in 8.3. We didn't make it in time for 8.2 unfortunately. > > What is sad is that these controllers are becoming very mainstream now, > > we're getting them more and more on Dell servers , and the fbsd project > > still struggles with them (for reasons I don't know, might be LSI's > > fault, might be a lack of resources or interest...) > > > > I couldn't agree more. I've been testing those (9211-8i) myself here on a > bunch of SuperMicro > servers and I'd say that I am very pleased with the performance of those > HBAs (not the mention the > price ~$230-250 CAD). On a 12 x SAS disks with a direct attached backplane > 826A (6Gbit SAS2.0) > in RAID0 across all of them (md linux software raid) I was able to squeeze * > 2.1GBytes/s* sequential write > (dd kind of style write). With the same setup and SATA disks I get to > 1.2GByte/s. I did use 2 controllers > to accomodate ports for all the disks. I get the same speed with ZFS and > 9.0-CURRENT. > > On a related note I must say that I do have serious problems with the > bandwidth when I use > the SAS expander version of this backplane (826E26) (I cannot get more than > 200-250 MBytes/s). > I've been investigating this problem with LSI's help and still no > conclusion. It looks like I am using > only one channel. > > Anyway this was just my humble attempt to encourage the MFC of this driver. > I think the card is > pretty good. I'd like to hear other people's opinion on this HBA though. MFC is done, try it out and let me know if there are any problems. Thanks, Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 16:53:16 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DEE8A106566C; Fri, 18 Feb 2011 16:53:16 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id 477448FC1D; Fri, 18 Feb 2011 16:53:15 +0000 (UTC) Received: by bwz12 with SMTP id 12so373184bwz.13 for ; Fri, 18 Feb 2011 08:53:15 -0800 (PST) Received: by 10.204.61.10 with SMTP id r10mr901679bkh.195.1298047994216; Fri, 18 Feb 2011 08:53:14 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id x38sm1616343bkj.1.2011.02.18.08.53.12 (version=SSLv3 cipher=OTHER); Fri, 18 Feb 2011 08:53:13 -0800 (PST) Message-ID: <4D5EA3F7.1070005@my.gd> Date: Fri, 18 Feb 2011 17:53:11 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: "Kenneth D. Merry" References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> <20110218164940.GD77903@nargothrond.kdm.org> In-Reply-To: <20110218164940.GD77903@nargothrond.kdm.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Rumen Telbizov , "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 16:53:17 -0000 On 2/18/11 5:49 PM, Kenneth D. Merry wrote: > On Thu, Feb 17, 2011 at 11:07:21 -0800, Rumen Telbizov wrote: >> Hello Damien, list: >> >> Anyway this was just my humble attempt to encourage the MFC of this driver. >> I think the card is >> pretty good. I'd like to hear other people's opinion on this HBA though. > > MFC is done, try it out and let me know if there are any problems. > > Thanks, > > Ken CVSup'ing as we speak ;) When you say -stable, I assume that's 8.2-RC3 yes ? I'm not very familiar with the whole CVSup / MFC / release process... From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 16:57:12 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3C0A2106564A for ; Fri, 18 Feb 2011 16:57:12 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 0210D8FC0C for ; Fri, 18 Feb 2011 16:57:11 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IGvBqM078384; Fri, 18 Feb 2011 09:57:11 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IGvB7I078383; Fri, 18 Feb 2011 09:57:11 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 09:57:11 -0700 From: "Kenneth D. Merry" To: Damien Fleuriot Message-ID: <20110218165711.GA78367@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> <20110218164940.GD77903@nargothrond.kdm.org> <4D5EA3F7.1070005@my.gd> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4D5EA3F7.1070005@my.gd> User-Agent: Mutt/1.4.2i Cc: Rumen Telbizov , "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 16:57:12 -0000 On Fri, Feb 18, 2011 at 17:53:11 +0100, Damien Fleuriot wrote: > > > On 2/18/11 5:49 PM, Kenneth D. Merry wrote: > > On Thu, Feb 17, 2011 at 11:07:21 -0800, Rumen Telbizov wrote: > >> Hello Damien, list: > >> > >> Anyway this was just my humble attempt to encourage the MFC of this driver. > >> I think the card is > >> pretty good. I'd like to hear other people's opinion on this HBA though. > > > > MFC is done, try it out and let me know if there are any problems. > > > > Thanks, > > > > Ken > > CVSup'ing as we speak ;) > > When you say -stable, I assume that's 8.2-RC3 yes ? No, that is in a separate branch that is frozen. This won't be in 8.2, we would have had to have gotten it in in December to make 8.2. This is in stable/8. > I'm not very familiar with the whole CVSup / MFC / release process... Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 17:07:29 2011 Return-Path: Delivered-To: stable@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AB461106564A for ; Fri, 18 Feb 2011 17:07:29 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 798208FC28 for ; Fri, 18 Feb 2011 17:07:29 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IGg9fW078053; Fri, 18 Feb 2011 09:42:10 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IGg9Yl078052; Fri, 18 Feb 2011 09:42:09 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 09:42:09 -0700 From: "Kenneth D. Merry" To: stable@FreeBSD.org Message-ID: <20110218164209.GA77903@nargothrond.kdm.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.4.2i Cc: freebsd-scsi@FreeBSD.org Subject: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 17:07:29 -0000 I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb SAS hardware. It is only included in GENERIC on amd64, since that is the only architecture that I know of that it has been tested on. It may work on i386, if anyone would like to try it out. There are known endian issues, so testing on a big-endian platform (like powerpc) won't work. If you'd like to help fix the endian issues, let me know. Integrated RAID support is not included in this version of the driver, but LSI has almost completed their version of the driver that does include IR support. That will hopefully be going into -current in the next few weeks. There are lots of changes in their version of the driver, particularly in the probe code. There are also a couple of othere issues with the driver that I am planning to fix in -current today and merge back into stable/8 in a few days. In particular I have fixes for these issues: - I/O locks up when you run out of S/G chain frames. - The device queue is not frozen on errors. - For some firmware revisions, the firmware will not return all outstanding commands for a device when the device goes away. Cleanup logic is needed. Let me know if you run into any issues. Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 17:28:51 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BB6FF106566B; Fri, 18 Feb 2011 17:28:51 +0000 (UTC) (envelope-from oberman@es.net) Received: from mailgw.es.net (mail1.es.net [IPv6:2001:400:201:1::2]) by mx1.freebsd.org (Postfix) with ESMTP id A37938FC13; Fri, 18 Feb 2011 17:28:51 +0000 (UTC) Received: from ptavv.es.net (ptavv.es.net [IPv6:2001:400:910::29]) by mailgw.es.net (8.14.3/8.14.3) with ESMTP id p1IHSovZ029027 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 18 Feb 2011 09:28:51 -0800 Received: from ptavv.es.net (localhost [127.0.0.1]) by ptavv.es.net (Tachyon Server) with ESMTP id 258B41CC29; Fri, 18 Feb 2011 09:28:50 -0800 (PST) To: "Kenneth D. Merry" In-reply-to: Your message of "Fri, 18 Feb 2011 09:57:11 MST." <20110218165711.GA78367@nargothrond.kdm.org> Date: Fri, 18 Feb 2011 09:28:50 -0800 From: "Kevin Oberman" Message-Id: <20110218172850.258B41CC29@ptavv.es.net> Cc: Rumen Telbizov , "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 17:28:51 -0000 > Date: Fri, 18 Feb 2011 09:57:11 -0700 > From: "Kenneth D. Merry" > Sender: owner-freebsd-stable@freebsd.org > > On Fri, Feb 18, 2011 at 17:53:11 +0100, Damien Fleuriot wrote: > > > > > > On 2/18/11 5:49 PM, Kenneth D. Merry wrote: > > > On Thu, Feb 17, 2011 at 11:07:21 -0800, Rumen Telbizov wrote: > > >> Hello Damien, list: > > >> > > >> Anyway this was just my humble attempt to encourage the MFC of this driver. > > >> I think the card is > > >> pretty good. I'd like to hear other people's opinion on this HBA though. > > > > > > MFC is done, try it out and let me know if there are any problems. > > > > > > Thanks, > > > > > > Ken > > > > CVSup'ing as we speak ;) > > > > When you say -stable, I assume that's 8.2-RC3 yes ? > > No, that is in a separate branch that is frozen. This won't be in 8.2, we > would have had to have gotten it in in December to make 8.2. > > This is in stable/8. > > > I'm not very familiar with the whole CVSup / MFC / release process... To be very clear, stable/8 is tagged "RELENG_8" in cvs, so you need to specify a tag of "RELENG_8" in your supfile. *default release=cvs tag=RELENG_8 -- R. Kevin Oberman, Network Engineer Energy Sciences Network (ESnet) Ernest O. Lawrence Berkeley National Laboratory (Berkeley Lab) E-mail: oberman@es.net Phone: +1 510 486-8634 Key fingerprint:059B 2DDF 031C 9BA3 14A4 EADA 927D EBB3 987B 3751 From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 17:31:42 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2B2B0106566C; Fri, 18 Feb 2011 17:31:42 +0000 (UTC) (envelope-from mickael.maillot@gmail.com) Received: from mail-qw0-f54.google.com (mail-qw0-f54.google.com [209.85.216.54]) by mx1.freebsd.org (Postfix) with ESMTP id B40B18FC15; Fri, 18 Feb 2011 17:31:41 +0000 (UTC) Received: by qwj9 with SMTP id 9so3418041qwj.13 for ; Fri, 18 Feb 2011 09:31:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=Yb+zP2t0b79qR3fpar0YC5LZs1ZSW28Bva+42SvII7U=; b=lZx/FVAda0QSCJ7NL+/9+lRiDOQNHdktQm895R6xNvSCfCuGd0PTtyyaLsW2rLVJBO 2vTnfTvzHx3qiBgkp7j77Rj4/3EQGgd27/GMlDZCEWYJx0ai6SkiVPWA3jKR0205nECl AWZweRAGmGo5ebRxqhKWFUweCSqEIRibzzo4A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=sVr3g7pDxA5f+nhhsluUPT1vscrMoiwgNyqa6SsUt7pEDlJ6DZh54GNRJpBdG00Ocl WJ8oeeNWolFXScP/rzT/r6KKolfRnbS9v3C2wjnJiwLNrZCzFQ2insa7EVu2avUFk4jf +9uOsOgHKZcnOXa2YAneAbN4F5QUIynhnRxiI= MIME-Version: 1.0 Received: by 10.229.101.206 with SMTP id d14mr777558qco.32.1298048965951; Fri, 18 Feb 2011 09:09:25 -0800 (PST) Received: by 10.229.22.136 with HTTP; Fri, 18 Feb 2011 09:09:25 -0800 (PST) In-Reply-To: <20110218164940.GD77903@nargothrond.kdm.org> References: <4D5BF78E.7010306@digsys.bg> <4D5BFCC1.3010404@my.gd> <20110217110230.GB25240@e-Gitt.NET> <4D5D0165.1030000@my.gd> <20110217111010.GC25240@e-Gitt.NET> <4D5D1075.2060708@my.gd> <20110218164940.GD77903@nargothrond.kdm.org> Date: Fri, 18 Feb 2011 18:09:25 +0100 Message-ID: From: =?ISO-8859-1?Q?Micka=EBl_Maillot?= To: "Kenneth D. Merry" Content-Type: text/plain; charset=ISO-8859-1 Cc: "freebsd-stable@freebsd.org" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 17:31:42 -0000 2011/2/18 Kenneth D. Merry : > > MFC is done, try it out and let me know if there are any problems. > Oh ! thank you, i have a supermicro X8DT-6F at work, i'll test that asap. From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 17:33:44 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E72931065673; Fri, 18 Feb 2011 17:33:44 +0000 (UTC) (envelope-from ml@my.gd) Received: from mail-fx0-f54.google.com (mail-fx0-f54.google.com [209.85.161.54]) by mx1.freebsd.org (Postfix) with ESMTP id 5C0738FC22; Fri, 18 Feb 2011 17:33:43 +0000 (UTC) Received: by fxm19 with SMTP id 19so637672fxm.13 for ; Fri, 18 Feb 2011 09:33:43 -0800 (PST) Received: by 10.223.114.203 with SMTP id f11mr1294445faq.20.1298050374465; Fri, 18 Feb 2011 09:32:54 -0800 (PST) Received: from dfleuriot-at-hi-media.com ([83.167.62.196]) by mx.google.com with ESMTPS id y1sm1187370fak.39.2011.02.18.09.32.53 (version=SSLv3 cipher=OTHER); Fri, 18 Feb 2011 09:32:53 -0800 (PST) Message-ID: <4D5EAD44.5020201@my.gd> Date: Fri, 18 Feb 2011 18:32:52 +0100 From: Damien Fleuriot User-Agent: Mozilla/5.0 (Macintosh; U; Intel Mac OS X 10.6; en-US; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-Version: 1.0 To: Kevin Oberman References: <20110218172850.258B41CC29@ptavv.es.net> In-Reply-To: <20110218172850.258B41CC29@ptavv.es.net> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Rumen Telbizov , "freebsd-stable@freebsd.org" , "Kenneth D. Merry" Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 17:33:45 -0000 On 2/18/11 6:28 PM, Kevin Oberman wrote: >> Date: Fri, 18 Feb 2011 09:57:11 -0700 >> From: "Kenneth D. Merry" >> Sender: owner-freebsd-stable@freebsd.org >> >> On Fri, Feb 18, 2011 at 17:53:11 +0100, Damien Fleuriot wrote: >>> >>> >>> On 2/18/11 5:49 PM, Kenneth D. Merry wrote: >>>> On Thu, Feb 17, 2011 at 11:07:21 -0800, Rumen Telbizov wrote: >>>>> Hello Damien, list: >>>>> >>>>> Anyway this was just my humble attempt to encourage the MFC of this driver. >>>>> I think the card is >>>>> pretty good. I'd like to hear other people's opinion on this HBA though. >>>> >>>> MFC is done, try it out and let me know if there are any problems. >>>> >>>> Thanks, >>>> >>>> Ken >>> >>> CVSup'ing as we speak ;) >>> >>> When you say -stable, I assume that's 8.2-RC3 yes ? >> >> No, that is in a separate branch that is frozen. This won't be in 8.2, we >> would have had to have gotten it in in December to make 8.2. >> >> This is in stable/8. >> >>> I'm not very familiar with the whole CVSup / MFC / release process... > > To be very clear, stable/8 is tagged "RELENG_8" in cvs, so you need to > specify a tag of "RELENG_8" in your supfile. > *default release=cvs tag=RELENG_8 Hi Kevin and thanks for your reply, As I just told Kenneth (switched to private exchanges to not spam the list with meaningless stuff), I'm afraid I don't get a sys/dev/mps/ folder when I sync against RELENG_8 nas# grep release /etc/cvsup/stable-supfile *default release=cvs tag=RELENG_8 #src-release nas# ls -lad /usr/src/sys/dev/mp* drwxr-xr-x 3 root wheel 512 Feb 18 19:17 /usr/src/sys/dev/mpt Oh wait, it occurs to me the mirror I sync on might not be up to date yet... SUPHOST= cvsup1.fr.freebsd.org SUPFILE= /etc/cvsup/stable-supfile From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 18:08:22 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 598051065696 for ; Fri, 18 Feb 2011 18:08:22 +0000 (UTC) (envelope-from rmacklem@uoguelph.ca) Received: from esa-annu.mail.uoguelph.ca (esa-annu.mail.uoguelph.ca [131.104.91.36]) by mx1.freebsd.org (Postfix) with ESMTP id 070888FC0A for ; Fri, 18 Feb 2011 18:08:21 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: ApwEANdDXk2DaFvO/2dsb2JhbACEH6J5qweQOYRodgSFC4cG X-IronPort-AV: E=Sophos;i="4.62,188,1297054800"; d="scan'208";a="110310918" Received: from erie.cs.uoguelph.ca (HELO zcs3.mail.uoguelph.ca) ([131.104.91.206]) by esa-annu-pri.mail.uoguelph.ca with ESMTP; 18 Feb 2011 13:08:21 -0500 Received: from zcs3.mail.uoguelph.ca (localhost.localdomain [127.0.0.1]) by zcs3.mail.uoguelph.ca (Postfix) with ESMTP id E7E85B3F3D; Fri, 18 Feb 2011 13:08:20 -0500 (EST) Date: Fri, 18 Feb 2011 13:08:20 -0500 (EST) From: Rick Macklem To: mike@jellydonut.org Message-ID: <15348085.102038.1298052500896.JavaMail.root@erie.cs.uoguelph.ca> In-Reply-To: <679701594.102003.1298052457071.JavaMail.root@erie.cs.uoguelph.ca> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_102037_470845040.1298052500894" X-Originating-IP: [172.17.91.202] X-Mailer: Zimbra 6.0.10_GA_2692 (ZimbraWebClient - IE8 (Win)/6.0.10_GA_2692) Cc: george+freebsd@m5p.com, freebsd-stable@freebsd.org, Jeremy Chadwick Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 18:08:22 -0000 ------=_Part_102037_470845040.1298052500894 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit I've seen this intermittently for mountd. I think the problem is that the code finds an unused port for udp/ip6 and then tries to use the same port# for tcp/ip6, udp/ip4, tcp/ip4. All three daemons have essentially the same function for doing this. The attached patches changes the behaviour so that it tries to get an unused port for each of the 4 cases. (This all applies to the "wildcard" case, where no port# or hosts have been specified as command args.) If you have the chance to try these patches, please let us know how they work for you? rick ps: I lost track of the thread, so I don't know who started it, but hopefully, they are on the cc list? ------=_Part_102037_470845040.1298052500894 Content-Type: text/x-patch; name=mountd.patch Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename=mountd.patch LS0tIHVzci5zYmluL21vdW50ZC9tb3VudGQuYy5zYXYJMjAxMS0wMi0xNyAyMTo0NTozMi4wMDAw MDAwMDAgLTA1MDAKKysrIHVzci5zYmluL21vdW50ZC9tb3VudGQuYwkyMDExLTAyLTE3IDIzOjIz OjM3LjAwMDAwMDAwMCAtMDUwMApAQCAtNTEwLDYgKzUxMCw3IEBAIGNyZWF0ZV9zZXJ2aWNlKHN0 cnVjdCBuZXRjb25maWcgKm5jb25mKQogCWludCByOwogCWludCByZWdpc3RlcmVkID0gMDsKIAl1 X2ludDMyX3QgaG9zdF9hZGRyWzRdOyAgLyogSVB2NCBvciBJUHY2ICovCisJaW50IG1hbGxvY2Rf c3ZjcG9ydCA9IDA7CiAKIAlpZiAoKG5jb25mLT5uY19zZW1hbnRpY3MgIT0gTkNfVFBJX0NMVFMp ICYmCiAJICAgIChuY29uZi0+bmNfc2VtYW50aWNzICE9IE5DX1RQSV9DT1RTKSAmJgpAQCAtNjIw LDcgKzYyMSw3IEBAIGNyZWF0ZV9zZXJ2aWNlKHN0cnVjdCBuZXRjb25maWcgKm5jb25mKQogCQkJ CQlzaW4tPnNpbl9hZGRyLnNfYWRkciA9IGh0b25sKElOQUREUl9BTlkpOwogCQkJCQlyZXMtPmFp X2FkZHIgPSAoc3RydWN0IHNvY2thZGRyKikgc2luOwogCQkJCQlyZXMtPmFpX2FkZHJsZW4gPSAo c29ja2xlbl90KQotCQkJCQkgICAgc2l6ZW9mKHJlcy0+YWlfYWRkcik7CisJCQkJCSAgICBzaXpl b2Yoc3RydWN0IHNvY2thZGRyX2luKTsKIAkJCQkJYnJlYWs7CiAJCQkJY2FzZSBBRl9JTkVUNjoK IAkJCQkJc2luNiA9IG1hbGxvYyhzaXplb2Yoc3RydWN0IHNvY2thZGRyX2luNikpOwpAQCAtNjMx LDEwICs2MzIsMTIgQEAgY3JlYXRlX3NlcnZpY2Uoc3RydWN0IG5ldGNvbmZpZyAqbmNvbmYpCiAJ CQkJCXNpbjYtPnNpbjZfYWRkciA9IGluNmFkZHJfYW55OwogCQkJCQlyZXMtPmFpX2FkZHIgPSAo c3RydWN0IHNvY2thZGRyKikgc2luNjsKIAkJCQkJcmVzLT5haV9hZGRybGVuID0gKHNvY2tsZW5f dCkKLQkJCQkJICAgIHNpemVvZihyZXMtPmFpX2FkZHIpOworCQkJCQkgICAgc2l6ZW9mKHN0cnVj dCBzb2NrYWRkcl9pbjYpOwogCQkJCQkJYnJlYWs7CiAJCQkJZGVmYXVsdDoKLQkJCQkJYnJlYWs7 CisJCQkJCXN5c2xvZyhMT0dfRVJSLCAiYmFkIGFkZHIgZmFtICVkIiwKKwkJCQkJICAgIHJlcy0+ YWlfZmFtaWx5KTsKKwkJCQkJZXhpdCgxKTsKIAkJCQl9CiAJCQl9IGVsc2UgeyAKIAkJCQlpZiAo KGFpY29kZSA9IGdldGFkZHJpbmZvKE5VTEwsIHN2Y3BvcnRfc3RyLApAQCAtNzAwLDYgKzcwMyw3 IEBAIGNyZWF0ZV9zZXJ2aWNlKHN0cnVjdCBuZXRjb25maWcgKm5jb25mKQogCQkJCXN2Y3BvcnRf c3RyID0gbWFsbG9jKE5JX01BWFNFUlYgKiBzaXplb2YoY2hhcikpOwogCQkJCWlmIChzdmNwb3J0 X3N0ciA9PSBOVUxMKQogCQkJCQlvdXRfb2ZfbWVtKCk7CisJCQkJbWFsbG9jZF9zdmNwb3J0ID0g MTsKIAogCQkJCWlmIChnZXRuYW1laW5mbyhyZXMtPmFpX2FkZHIsCiAJCQkJICAgIHJlcy0+YWlf YWRkci0+c2FfbGVuLCBOVUxMLCBOSV9NQVhIT1NULApAQCAtNzE1LDYgKzcxOSwxMiBAQCBjcmVh dGVfc2VydmljZShzdHJ1Y3QgbmV0Y29uZmlnICpuY29uZikKIAkJCQlleGl0KDEpOwogCQkJfQog CisJCQlpZiAobWFsbG9jZF9zdmNwb3J0ICE9IDApIHsKKwkJCQlmcmVlKHN2Y3BvcnRfc3RyKTsK KwkJCQlzdmNwb3J0X3N0ciA9IE5VTEw7CisJCQkJbWFsbG9jZF9zdmNwb3J0ID0gMDsKKwkJCX0K KwogCQkJc2VydmFkZHIuYnVmID0gbWFsbG9jKHJlcy0+YWlfYWRkcmxlbik7CiAJCQltZW1jcHko c2VydmFkZHIuYnVmLCByZXMtPmFpX2FkZHIsIHJlcy0+YWlfYWRkcmxlbik7CiAJCQlzZXJ2YWRk ci5sZW4gPSByZXMtPmFpX2FkZHJsZW47Cg== ------=_Part_102037_470845040.1298052500894 Content-Type: text/x-patch; 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charset=utf-8 Content-Transfer-Encoding: Quoted-printable Content-Disposition: inline X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Subject: On The Grind *New Music Update* X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: BeatsBeast Producer List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 19:49:42 -0000 B. Ezy is back again with a BeatsBeast produced track "On The Grind" ft. Ganksta Clyde.Ganksta Clyde recently signed a deal with Def Jam last summer.Stay Tuned for more great music from B. Ezy and BeatsBeast Update Contact Info: http://www.reverbnation.com/c/fr7/artist_158288?eid=3D= A158288_7576270_30674416&fsc=3D791e9d14a39 Unsubscribe: http://www.reverbnation.com/c/fr2/artist_158288?eid=3DA15828= 8_7576270_30674416&fsc=3D791e9d14a39 Report Abuse: http://www.reverbnation.com/c/fr6/artist_158288?eid=3DA1582= 88_7576270_30674416&fsc=3D791e9d14a39 Privacy Policy: http://www.reverbnation.com/fan_reach/privacy/artist_1582= 88 Physical inquiries can be sent to: po box 777, eastpointe, MI, 48021, US = If our email is in your Spam/Junk Folder, please add beatsbeast@emailhost= ing.com to your address book. = Powered by FanReach Pro = From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 22:29:19 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A30F7106564A; Fri, 18 Feb 2011 22:29:19 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 237D98FC08; Fri, 18 Feb 2011 22:29:18 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1IM8fNv015241; Sat, 19 Feb 2011 01:08:41 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Sat, 19 Feb 2011 01:08:41 +0300 (MSK) From: Dmitry Morozovsky To: "Kenneth D. Merry" In-Reply-To: <20110218164209.GA77903@nargothrond.kdm.org> Message-ID: References: <20110218164209.GA77903@nargothrond.kdm.org> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Sat, 19 Feb 2011 01:08:41 +0300 (MSK) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 22:29:19 -0000 On Fri, 18 Feb 2011, Kenneth D. Merry wrote: KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb KDM> SAS hardware. [snip] Again, thank you very much Ken. I'm planning to stress test this on 846 case filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the results. Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else could you suppose? -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 22:38:35 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D04EA1065697 for ; Fri, 18 Feb 2011 22:38:35 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from QMTA11.westchester.pa.mail.comcast.net (qmta11.westchester.pa.mail.comcast.net [76.96.59.211]) by mx1.freebsd.org (Postfix) with ESMTP id 907E58FC21 for ; Fri, 18 Feb 2011 22:38:35 +0000 (UTC) Received: from omta22.westchester.pa.mail.comcast.net ([76.96.62.73]) by QMTA11.westchester.pa.mail.comcast.net with comcast id 9aJ51g0031ap0As5Baebej; Fri, 18 Feb 2011 22:38:35 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta22.westchester.pa.mail.comcast.net with comcast id 9aea1g0070PUQVN3iaeaHb; Fri, 18 Feb 2011 22:38:35 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id 8A39C9B422; Fri, 18 Feb 2011 14:38:32 -0800 (PST) Date: Fri, 18 Feb 2011 14:38:32 -0800 From: Jeremy Chadwick To: Dmitry Morozovsky Message-ID: <20110218223832.GA68261@icarus.home.lan> References: <20110218164209.GA77903@nargothrond.kdm.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 22:38:35 -0000 On Sat, Feb 19, 2011 at 01:08:41AM +0300, Dmitry Morozovsky wrote: > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > KDM> SAS hardware. > > [snip] > > Again, thank you very much Ken. I'm planning to stress test this on 846 case > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > results. > > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > could you suppose? Please be aware of a performance issue affecting certain models of WD RE4 disks. Specifics are still sketchy, but you should read the thread "immense delayed write to file system (ZFS and UFS2), performance issues" in full to get an idea of the problem: http://lists.freebsd.org/pipermail/freebsd-stable/2010-January/thread.html#54185 There's confirmation of the problem here, with the statement that WD gave at least one person a firmware image that fixed the problem: http://lists.freebsd.org/pipermail/freebsd-stable/2010-January/054489.html Buyer beware. :-) And remember, it's not an issue with the brand/vendor, just certain models. Caviar Black drives don't appear affected (and don't let the TLER stuff make you lose focus), which is one reason why I advocate them. -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB | From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 22:52:05 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8D8001065673; Fri, 18 Feb 2011 22:52:05 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 593648FC1D; Fri, 18 Feb 2011 22:52:05 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1IMq4Cd084258; Fri, 18 Feb 2011 15:52:04 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1IMq4Wb084257; Fri, 18 Feb 2011 15:52:04 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 15:52:04 -0700 From: "Kenneth D. Merry" To: Dmitry Morozovsky Message-ID: <20110218225204.GA84087@nargothrond.kdm.org> References: <20110218164209.GA77903@nargothrond.kdm.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2i Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 22:52:05 -0000 On Sat, Feb 19, 2011 at 01:08:41 +0300, Dmitry Morozovsky wrote: > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > KDM> SAS hardware. > > [snip] > > Again, thank you very much Ken. I'm planning to stress test this on 846 case > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > results. > > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > could you suppose? The best stress test I have found has been to just do a single sequential write stream with ZFS. i.e.: cd /path/to/zfs/pool dd if=/dev/zero of=foo bs=1M Just let it run for a long period of time and see what happens. What model controller do you have, and what firmware do you have on it? I have run into some bugs with the LSI 2.0 firmware, notably that you'll get IOC Busy errors as well as some bogus invalid LBA errors with SATA disks. (I'm guessing it wouldn't happen with SAS disks.) The 8.0 firmware is better, but the version for the 9211-8i is not able to recognize large numbers (more than 20) drives. (I reported that to LSI and they supplied a fix.) Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 23:02:59 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 77F281065673; Fri, 18 Feb 2011 23:02:59 +0000 (UTC) (envelope-from ftigeot@sekishi.zefyris.com) Received: from pizza.zefyris.com (pizza.zefyris.com [IPv6:2001:7a8:bd07:2::253]) by mx1.freebsd.org (Postfix) with ESMTP id DA4818FC18; Fri, 18 Feb 2011 23:02:58 +0000 (UTC) Received: from sekishi.zefyris.com (sekishi.zefyris.com [IPv6:2001:7a8:bd07:2:219:d1ff:fe81:e03]) by pizza.zefyris.com (8.14.4/8.14.4) with ESMTP id p1IN2u0Z059827; Sat, 19 Feb 2011 00:02:56 +0100 (CET) Received: from sekishi.zefyris.com (localhost [127.0.0.1]) by sekishi.zefyris.com (8.14.4/8.14.1) with ESMTP id p1IN2uUL002107; Sat, 19 Feb 2011 00:02:56 +0100 (CET) Received: (from ftigeot@localhost) by sekishi.zefyris.com (8.14.4/8.14.1/Submit) id p1IN2uE0002106; Sat, 19 Feb 2011 00:02:56 +0100 (CET) Date: Sat, 19 Feb 2011 00:02:56 +0100 From: Francois Tigeot To: Jeremy Chadwick Message-ID: <20110218230256.GA2038@sekishi.zefyris.com> References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218223832.GA68261@icarus.home.lan> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110218223832.GA68261@icarus.home.lan> User-Agent: Mutt/1.4.2.3i X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (pizza.zefyris.com [IPv6:2001:7a8:bd07:2::253]); Sat, 19 Feb 2011 00:02:56 +0100 (CET) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 23:02:59 -0000 On Fri, Feb 18, 2011 at 02:38:32PM -0800, Jeremy Chadwick wrote: > > > Please be aware of a performance issue affecting certain models of WD > RE4 disks. Specifics are still sketchy, but you should read the thread > "immense delayed write to file system (ZFS and UFS2), performance > issues" in full to get an idea of the problem: > > http://lists.freebsd.org/pipermail/freebsd-stable/2010-January/thread.html#54185 > > There's confirmation of the problem here, with the statement that WD > gave at least one person a firmware image that fixed the problem: > > http://lists.freebsd.org/pipermail/freebsd-stable/2010-January/054489.html I'm not sure if this is exactly the same issue, but I also had to flash some WD drives a few month ago. There was a bad firmware version on some 2TB RE4-GP models; disks kept getting removed from RAID volumes due to write timeouts. > Buyer beware. :-) And remember, it's not an issue with the > brand/vendor, just certain models. Disks these days are no longer just disks, but complete computers with ram, many processors, and the associated software issues... -- Francois Tigeot From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 23:03:24 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C075410656C1; Fri, 18 Feb 2011 23:03:24 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 3B8248FC16; Fri, 18 Feb 2011 23:03:23 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1IN3MXR015886; Sat, 19 Feb 2011 02:03:22 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Sat, 19 Feb 2011 02:03:22 +0300 (MSK) From: Dmitry Morozovsky To: Jeremy Chadwick In-Reply-To: <20110218223832.GA68261@icarus.home.lan> Message-ID: References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218223832.GA68261@icarus.home.lan> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Sat, 19 Feb 2011 02:03:22 +0300 (MSK) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 23:03:24 -0000 On Fri, 18 Feb 2011, Jeremy Chadwick wrote: JC> > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb JC> > KDM> SAS hardware. JC> > JC> > [snip] JC> > JC> > Again, thank you very much Ken. I'm planning to stress test this on 846 case JC> > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the JC> > results. JC> > JC> > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning JC> > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else JC> > could you suppose? JC> JC> Please be aware of a performance issue affecting certain models of WD JC> RE4 disks. Specifics are still sketchy, but you should read the thread JC> "immense delayed write to file system (ZFS and UFS2), performance JC> issues" in full to get an idea of the problem: Well, my disks are (possibly happily ;) not RE4-GP but real RE4 (yellow labels, Raid Edition Ready) But thanks, I'll take additional time to log smartctl data during the tests... -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 23:05:34 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BDC761065697; Fri, 18 Feb 2011 23:05:34 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 43CB28FC12; Fri, 18 Feb 2011 23:05:33 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1IN5XhB015920; Sat, 19 Feb 2011 02:05:33 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Sat, 19 Feb 2011 02:05:33 +0300 (MSK) From: Dmitry Morozovsky To: "Kenneth D. Merry" In-Reply-To: <20110218225204.GA84087@nargothrond.kdm.org> Message-ID: References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218225204.GA84087@nargothrond.kdm.org> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Sat, 19 Feb 2011 02:05:33 +0300 (MSK) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 23:05:34 -0000 On Fri, 18 Feb 2011, Kenneth D. Merry wrote: KDM> > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb KDM> > KDM> SAS hardware. KDM> > KDM> > [snip] KDM> > KDM> > Again, thank you very much Ken. I'm planning to stress test this on 846 case KDM> > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the KDM> > results. KDM> > KDM> > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning KDM> > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else KDM> > could you suppose? KDM> KDM> The best stress test I have found has been to just do a single sequential KDM> write stream with ZFS. i.e.: KDM> KDM> cd /path/to/zfs/pool KDM> dd if=/dev/zero of=foo bs=1M KDM> KDM> Just let it run for a long period of time and see what happens. Well, provided that I'm plannign to use ZFSv28 to be in place, wouldn't be /dev/random more appropriate? -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 23:13:09 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5D3D8106566C for ; Fri, 18 Feb 2011 23:13:09 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from qmta01.westchester.pa.mail.comcast.net (qmta01.westchester.pa.mail.comcast.net [76.96.62.16]) by mx1.freebsd.org (Postfix) with ESMTP id 1271D8FC0A for ; Fri, 18 Feb 2011 23:13:08 +0000 (UTC) Received: from omta16.westchester.pa.mail.comcast.net ([76.96.62.88]) by qmta01.westchester.pa.mail.comcast.net with comcast id 9aye1g00A1uE5Es51bD99m; Fri, 18 Feb 2011 23:13:09 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta16.westchester.pa.mail.comcast.net with comcast id 9bD71g00P0PUQVN3cbD8VC; Fri, 18 Feb 2011 23:13:09 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id 625759B422; Fri, 18 Feb 2011 15:13:06 -0800 (PST) Date: Fri, 18 Feb 2011 15:13:06 -0800 From: Jeremy Chadwick To: Dmitry Morozovsky Message-ID: <20110218231306.GA69028@icarus.home.lan> References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218225204.GA84087@nargothrond.kdm.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 23:13:09 -0000 On Sat, Feb 19, 2011 at 02:05:33AM +0300, Dmitry Morozovsky wrote: > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > KDM> > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > KDM> > KDM> SAS hardware. > KDM> > > KDM> > [snip] > KDM> > > KDM> > Again, thank you very much Ken. I'm planning to stress test this on 846 case > KDM> > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > KDM> > results. > KDM> > > KDM> > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > KDM> > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > KDM> > could you suppose? > KDM> > KDM> The best stress test I have found has been to just do a single sequential > KDM> write stream with ZFS. i.e.: > KDM> > KDM> cd /path/to/zfs/pool > KDM> dd if=/dev/zero of=foo bs=1M > KDM> > KDM> Just let it run for a long period of time and see what happens. > > Well, provided that I'm plannign to use ZFSv28 to be in place, wouldn't be > /dev/random more appropriate? No -- /dev/urandom maybe, but not /dev/random. /dev/urandom will also induce significantly higher CPU load than /dev/zero will. Don't forget that ZFS is a processor-centric (read: no offloading) system. I tend to try different block sizes (starting at bs=8k and working up to bs=256k) for sequential benchmarks. The "sweet spot" on most disks I've found is 64k. Otherwise use benchmarks/bonnie++. -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB | From owner-freebsd-stable@FreeBSD.ORG Fri Feb 18 23:55:20 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 67A641065670; Fri, 18 Feb 2011 23:55:20 +0000 (UTC) (envelope-from amvandemore@gmail.com) Received: from mail-bw0-f54.google.com (mail-bw0-f54.google.com [209.85.214.54]) by mx1.freebsd.org (Postfix) with ESMTP id 919B68FC40; Fri, 18 Feb 2011 23:55:19 +0000 (UTC) Received: by bwz12 with SMTP id 12so707597bwz.13 for ; Fri, 18 Feb 2011 15:55:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=vayPhJBiuvPXqD73KhaNf0l47F2ikiy1SJZBpBFxJnQ=; b=WpcsO2CvEoSYncu05TB1gEtRBQ4fw9feQ/diyv1iwVjwtWoNsAqZPH9MYLnm8+z0e7 F7rcx+7b3w6iSXyoSQxzqXKyvCghUdAIgEJevGFsLRcTJ8Hpm7qzIkKcNPuksUAEDkr/ TvZ8B2X1Y7WJ61JnaJJtoHgbcAbpnn0+EbxsI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=EyY7C4sQAgtBgOlnZW1K9ij3kjUy95uF5ngJUQMvpuekvWCrWZlff2GYiwBt6FeWRA VEq0fdrwh5sHpUDwdcnXxxaINB4wHo2abiMGT9wmejIUMqsQq/tvfxuaBD2hHKxZt2CJ 7laQjc6I30KCdBD+nJ5mgXmwsEi1eBXgMNGKc= MIME-Version: 1.0 Received: by 10.204.137.199 with SMTP id x7mr1208168bkt.165.1298071649530; Fri, 18 Feb 2011 15:27:29 -0800 (PST) Received: by 10.204.85.98 with HTTP; Fri, 18 Feb 2011 15:27:29 -0800 (PST) In-Reply-To: <20110218231306.GA69028@icarus.home.lan> References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218225204.GA84087@nargothrond.kdm.org> <20110218231306.GA69028@icarus.home.lan> Date: Fri, 18 Feb 2011 17:27:29 -0600 Message-ID: From: Adam Vande More To: Jeremy Chadwick Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" , Dmitry Morozovsky Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Feb 2011 23:55:20 -0000 On Fri, Feb 18, 2011 at 5:13 PM, Jeremy Chadwick wrote: > No -- /dev/urandom maybe, but not /dev/random. /dev/urandom will also > induce significantly higher CPU load than /dev/zero will. Don't forget > that ZFS is a processor-centric (read: no offloading) system. > /dev/urandom is linked to /dev/random. Is there some other difference I'm not aware of, or are you confusing it with Linux's random? -- Adam Vande More From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 00:05:22 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4EAEB106566B; Sat, 19 Feb 2011 00:05:22 +0000 (UTC) (envelope-from oberman@es.net) Received: from mailgw.es.net (mail1.es.net [IPv6:2001:400:201:1::2]) by mx1.freebsd.org (Postfix) with ESMTP id 38CE08FC19; Sat, 19 Feb 2011 00:05:22 +0000 (UTC) Received: from ptavv.es.net (ptavv.es.net [IPv6:2001:400:910::29]) by mailgw.es.net (8.14.3/8.14.3) with ESMTP id p1J05Lgn029757 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 18 Feb 2011 16:05:21 -0800 Received: from ptavv.es.net (localhost [127.0.0.1]) by ptavv.es.net (Tachyon Server) with ESMTP id 9918B1CC29; Fri, 18 Feb 2011 16:05:21 -0800 (PST) To: Jeremy Chadwick In-reply-to: Your message of "Fri, 18 Feb 2011 15:13:06 PST." <20110218231306.GA69028@icarus.home.lan> Date: Fri, 18 Feb 2011 16:05:21 -0800 From: "Kevin Oberman" Message-Id: <20110219000521.9918B1CC29@ptavv.es.net> Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" , Dmitry Morozovsky Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 00:05:22 -0000 > Date: Fri, 18 Feb 2011 15:13:06 -0800 > From: Jeremy Chadwick > Sender: owner-freebsd-stable@freebsd.org > > On Sat, Feb 19, 2011 at 02:05:33AM +0300, Dmitry Morozovsky wrote: > > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > > > KDM> > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > > KDM> > KDM> SAS hardware. > > KDM> > > > KDM> > [snip] > > KDM> > > > KDM> > Again, thank you very much Ken. I'm planning to stress test this on 846 case > > KDM> > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > > KDM> > results. > > KDM> > > > KDM> > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > > KDM> > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > > KDM> > could you suppose? > > KDM> > > KDM> The best stress test I have found has been to just do a single sequential > > KDM> write stream with ZFS. i.e.: > > KDM> > > KDM> cd /path/to/zfs/pool > > KDM> dd if=/dev/zero of=foo bs=1M > > KDM> > > KDM> Just let it run for a long period of time and see what happens. > > > > Well, provided that I'm plannign to use ZFSv28 to be in place, wouldn't be > > /dev/random more appropriate? > > No -- /dev/urandom maybe, but not /dev/random. /dev/urandom will also > induce significantly higher CPU load than /dev/zero will. Don't forget > that ZFS is a processor-centric (read: no offloading) system. > > I tend to try different block sizes (starting at bs=8k and working up to > bs=256k) for sequential benchmarks. The "sweet spot" on most disks I've > found is 64k. Otherwise use benchmarks/bonnie++. When FreeBSD updated its random number engine a couple of years ago, random and urandom became the same thing. Unless I am missing something, a switch should make no difference. -- R. Kevin Oberman, Network Engineer Energy Sciences Network (ESnet) Ernest O. Lawrence Berkeley National Laboratory (Berkeley Lab) E-mail: oberman@es.net Phone: +1 510 486-8634 Key fingerprint:059B 2DDF 031C 9BA3 14A4 EADA 927D EBB3 987B 3751 From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 00:09:35 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BA83A10656A4 for ; Sat, 19 Feb 2011 00:09:35 +0000 (UTC) (envelope-from dougb@dougbarton.us) Received: from mail2.fluidhosting.com (mx22.fluidhosting.com [204.14.89.5]) by mx1.freebsd.org (Postfix) with ESMTP id 4B4328FC1A for ; Sat, 19 Feb 2011 00:09:34 +0000 (UTC) Received: (qmail 15686 invoked by uid 399); 19 Feb 2011 00:09:33 -0000 Received: from router.ka9q.net (HELO doug-optiplex.ka9q.net) (dougb@dougbarton.us@75.60.237.91) by mail2.fluidhosting.com with ESMTPAM; 19 Feb 2011 00:09:33 -0000 X-Originating-IP: 75.60.237.91 X-Sender: dougb@dougbarton.us Message-ID: <4D5F0A3B.1060305@dougbarton.us> Date: Fri, 18 Feb 2011 16:09:31 -0800 From: Doug Barton Organization: http://SupersetSolutions.com/ User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20110129 Thunderbird/3.1.7 MIME-Version: 1.0 To: Rick Macklem References: <15348085.102038.1298052500896.JavaMail.root@erie.cs.uoguelph.ca> In-Reply-To: <15348085.102038.1298052500896.JavaMail.root@erie.cs.uoguelph.ca> X-Enigmail-Version: 1.1.2 OpenPGP: id=1A1ABC84 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: mike@jellydonut.org, george+freebsd@m5p.com, freebsd-stable@freebsd.org, Jeremy Chadwick Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 00:09:35 -0000 On 02/18/2011 10:08, Rick Macklem wrote: > The attached patches changes the behaviour so that it tries to > get an unused port for each of the 4 cases. Am I correct in assuming that what you're proposing is to (potentially) have different ports for all 4 combinations? I would suggest that this is not the right way to solve the problem. If I misunderstand, I apologize. Doug -- Nothin' ever doesn't change, but nothin' changes much. -- OK Go Breadth of IT experience, and depth of knowledge in the DNS. Yours for the right price. :) http://SupersetSolutions.com/ From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 00:48:03 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 64528106566C for ; Sat, 19 Feb 2011 00:48:03 +0000 (UTC) (envelope-from jdc@koitsu.dyndns.org) Received: from qmta13.emeryville.ca.mail.comcast.net (qmta13.emeryville.ca.mail.comcast.net [76.96.27.243]) by mx1.freebsd.org (Postfix) with ESMTP id 4814D8FC08 for ; Sat, 19 Feb 2011 00:48:03 +0000 (UTC) Received: from omta20.emeryville.ca.mail.comcast.net ([76.96.30.87]) by qmta13.emeryville.ca.mail.comcast.net with comcast id 9cVd1g00C1smiN4ADcapT3; Sat, 19 Feb 2011 00:34:49 +0000 Received: from koitsu.dyndns.org ([98.248.33.18]) by omta20.emeryville.ca.mail.comcast.net with comcast id 9can1g00p0PUQVN8gcan5l; Sat, 19 Feb 2011 00:34:48 +0000 Received: by icarus.home.lan (Postfix, from userid 1000) id 43FB59B422; Fri, 18 Feb 2011 16:34:47 -0800 (PST) Date: Fri, 18 Feb 2011 16:34:47 -0800 From: Jeremy Chadwick To: Kevin Oberman Message-ID: <20110219003447.GA70019@icarus.home.lan> References: <20110218231306.GA69028@icarus.home.lan> <20110219000521.9918B1CC29@ptavv.es.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110219000521.9918B1CC29@ptavv.es.net> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" , Dmitry Morozovsky Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 00:48:03 -0000 On Fri, Feb 18, 2011 at 04:05:21PM -0800, Kevin Oberman wrote: > > Date: Fri, 18 Feb 2011 15:13:06 -0800 > > From: Jeremy Chadwick > > Sender: owner-freebsd-stable@freebsd.org > > > > On Sat, Feb 19, 2011 at 02:05:33AM +0300, Dmitry Morozovsky wrote: > > > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > > > > > KDM> > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > > > KDM> > KDM> SAS hardware. > > > KDM> > > > > KDM> > [snip] > > > KDM> > > > > KDM> > Again, thank you very much Ken. I'm planning to stress test this on 846 case > > > KDM> > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > > > KDM> > results. > > > KDM> > > > > KDM> > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > > > KDM> > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > > > KDM> > could you suppose? > > > KDM> > > > KDM> The best stress test I have found has been to just do a single sequential > > > KDM> write stream with ZFS. i.e.: > > > KDM> > > > KDM> cd /path/to/zfs/pool > > > KDM> dd if=/dev/zero of=foo bs=1M > > > KDM> > > > KDM> Just let it run for a long period of time and see what happens. > > > > > > Well, provided that I'm plannign to use ZFSv28 to be in place, wouldn't be > > > /dev/random more appropriate? > > > > No -- /dev/urandom maybe, but not /dev/random. /dev/urandom will also > > induce significantly higher CPU load than /dev/zero will. Don't forget > > that ZFS is a processor-centric (read: no offloading) system. > > > > I tend to try different block sizes (starting at bs=8k and working up to > > bs=256k) for sequential benchmarks. The "sweet spot" on most disks I've > > found is 64k. Otherwise use benchmarks/bonnie++. > > When FreeBSD updated its random number engine a couple of years ago, > random and urandom became the same thing. Unless I am missing something, > a switch should make no difference. You and Adam's comments are both valid. I tend to work on a multitude of OSes (specifically Solaris, Linux, and FreeBSD), so I tend to use what behaves the same universally (/dev/urandom in this case). Sorry for the mix-up/noise. -- | Jeremy Chadwick jdc@parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP 4BD6C0CB | From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 01:07:35 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id F416C1065670; Sat, 19 Feb 2011 01:07:34 +0000 (UTC) (envelope-from cswiger@mac.com) Received: from asmtpout025.mac.com (asmtpout025.mac.com [17.148.16.100]) by mx1.freebsd.org (Postfix) with ESMTP id D73EE8FC0C; Sat, 19 Feb 2011 01:07:34 +0000 (UTC) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; CHARSET=US-ASCII Received: from cswiger1.apple.com ([17.209.4.71]) by asmtp025.mac.com (Oracle Communications Messaging Exchange Server 7u4-20.01 64bit (built Nov 21 2010)) with ESMTPSA id <0LGU00AIO8BSB990@asmtp025.mac.com>; Fri, 18 Feb 2011 16:07:04 -0800 (PST) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.2.15,1.0.148,0.0.0000 definitions=2011-02-18_10:2011-02-19, 2011-02-18, 1970-01-01 signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 ipscore=0 suspectscore=0 phishscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx engine=6.0.2-1012030000 definitions=main-1102180158 From: Chuck Swiger In-reply-to: Date: Fri, 18 Feb 2011 16:07:04 -0800 Message-id: References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218225204.GA84087@nargothrond.kdm.org> <20110218231306.GA69028@icarus.home.lan> To: Adam Vande More X-Mailer: Apple Mail (2.1082) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 01:07:35 -0000 On Feb 18, 2011, at 3:27 PM, Adam Vande More wrote: > /dev/urandom is linked to /dev/random. Is there some other difference I'm > not aware of, or are you confusing it with Linux's random? There is no difference between the two on FreeBSD, although anyone using the platform is hoping that Yarrow is "good enough". Wikipedia has a fine article on the subject: http://en.wikipedia.org/wiki//dev/random Regards, -- -Chuck From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 01:12:08 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3C3471065670; Sat, 19 Feb 2011 01:12:08 +0000 (UTC) (envelope-from ethernext@gmail.com) Received: from mail-qw0-f54.google.com (mail-qw0-f54.google.com [209.85.216.54]) by mx1.freebsd.org (Postfix) with ESMTP id C0D008FC16; Sat, 19 Feb 2011 01:12:07 +0000 (UTC) Received: by qwj9 with SMTP id 9so3671632qwj.13 for ; Fri, 18 Feb 2011 17:12:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; bh=L8+97cUNHKfmddpaCr2so9YzR97tSi13JAsTtWaenA8=; b=Ssj1G3/xkuGh2JAndTmkOcQI5l9FNpvi98REN0Khf+FbEv9nSbTyoHGkIFhl4H2XYf TYzw2/8760bWzEmzQwnqQpAbNL848ItJ2JCJauBpFE1d9Qlv+7/M3CGRfWxV1PHUuCbu dkxNPCnCKQPIoFv5T4kHcp+oW+PcuVs2SxeVI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:in-reply-to:references:date :x-google-sender-auth:message-id:subject:from:to:cc:content-type; b=VAtKY6aaY1ip39pP3DYzmGprGoJRTwy977tH8ak7ZTlUUOA/W3P/iWCOBxzYjLP+9D nv6yjni2tDZKp6amr6zVEotMnTC9h9X4V3yecYh2pDc4/bDouG55QLvnVMnwTbp/8OZH oMWDMO5YSfmJuNM5NNAWtRijrSFK07kVEwNos= MIME-Version: 1.0 Received: by 10.229.88.213 with SMTP id b21mr1073265qcm.166.1298076414365; Fri, 18 Feb 2011 16:46:54 -0800 (PST) Sender: ethernext@gmail.com Received: by 10.229.217.129 with HTTP; Fri, 18 Feb 2011 16:46:54 -0800 (PST) In-Reply-To: <20110218164209.GA77903@nargothrond.kdm.org> References: <20110218164209.GA77903@nargothrond.kdm.org> Date: Fri, 18 Feb 2011 19:46:54 -0500 X-Google-Sender-Auth: Zr7Ss-pYEEXetbgqIdGhW03SyE0 Message-ID: From: Bill Desjardins To: "Kenneth D. Merry" Content-Type: text/plain; charset=ISO-8859-1 Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 01:12:08 -0000 On Fri, Feb 18, 2011 at 11:42 AM, Kenneth D. Merry wrote: > > I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > SAS hardware. Thank you Ken for getting this done. Any plan to support the LSI 9240 (skinny) cards? if its a matter of hardware to develop with, contact me off list and I can provide you with a development system. thx -- Bill From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 01:57:16 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AC387106564A for ; Sat, 19 Feb 2011 01:57:16 +0000 (UTC) (envelope-from rcm@fuzzwad.org) Received: from mail.volente.us (mail.volente.us [204.109.56.216]) by mx1.freebsd.org (Postfix) with ESMTP id 58A8C8FC12 for ; Sat, 19 Feb 2011 01:57:16 +0000 (UTC) Received: from [172.27.3.4] (localhost [127.0.0.1]) by mail.volente.us (8.14.4/8.14.4) with ESMTP id p1J1UQ7R033287 for ; Fri, 18 Feb 2011 19:30:29 -0600 (CST) (envelope-from rcm@fuzzwad.org) Message-ID: <4D5F1CCA.1070701@fuzzwad.org> Date: Fri, 18 Feb 2011 19:28:42 -0600 From: Ron McDowell User-Agent: Thunderbird 2.0.0.23 (Macintosh/20090812) MIME-Version: 1.0 To: stable@freebsd.org Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Subject: 8.2-RC3-amd64 install hangs on Dell T110 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 01:57:16 -0000 If I've come to the wrong list with this, please redirect me. I have a brand new Dell T110, 2.53ghz Xeon 3440, 8gb [2x4gb] ram, 4x1tb Hitachi SAS hd, Apple USB keyboard and mouse [just to cover all the hardware] Booting 8.2-RC3 amd64 disc1 looks good through all the bright-white text, but it's hard to read scrolling by that fast :) then shows one line of normal-bright text: /stand/sysinstall running as init on vty0 then hangs, never gets to the blue install screens. This is new hardware to me, but it loads Ubuntu 10.04 amd64 and OpenBSD 4.8 amd64 fine, so I'm assuming it's not flaky hardware. I'd be happy to try any patches or debugging tips, but this is my only amd64 box and since I can't yet get FreeBSD onto it, it would have to be something I don't have to build. Thanks. -- Ron McDowell San Antonio TX From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 02:25:45 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2BA0C1065672 for ; Sat, 19 Feb 2011 02:25:45 +0000 (UTC) (envelope-from spork@bway.net) Received: from xena.bway.net (xena.bway.net [216.220.96.26]) by mx1.freebsd.org (Postfix) with ESMTP id 6581B8FC0A for ; Sat, 19 Feb 2011 02:25:44 +0000 (UTC) Received: (qmail 4093 invoked by uid 0); 19 Feb 2011 01:59:02 -0000 Received: from smtp.bway.net (216.220.96.25) by xena.bway.net with (DHE-RSA-AES256-SHA encrypted) SMTP; 19 Feb 2011 01:59:02 -0000 Received: (qmail 4081 invoked by uid 90); 19 Feb 2011 01:59:02 -0000 Received: from unknown (HELO hotlap.nat.fasttrackmonkey.com) (spork@96.57.144.66) by smtp.bway.net with (DHE-RSA-AES256-SHA encrypted) SMTP; 19 Feb 2011 01:59:02 -0000 Date: Fri, 18 Feb 2011 20:59:02 -0500 (EST) From: Charles Sprickman X-X-Sender: spork@hotlap.nat.fasttrackmonkey.com To: Dmitry Morozovsky In-Reply-To: Message-ID: References: <20110218164209.GA77903@nargothrond.kdm.org> User-Agent: Alpine 2.00 (OSX 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 02:25:45 -0000 On Sat, 19 Feb 2011, Dmitry Morozovsky wrote: > On Fri, 18 Feb 2011, Kenneth D. Merry wrote: > > KDM> I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > KDM> SAS hardware. > > [snip] > > Again, thank you very much Ken. I'm planning to stress test this on 846 case > filled with 12 (yet) WD RE4 disks organized as raidz2, and will post the > results. > > Any hints to particularly I/O stressing patterns? Out of my mind, I'm planning > multiple parallel -j'ed builds, parallel tars, *SQL benchmarks -- what else > could you suppose? benchmarks/iozone is nice, and you can get nifty graphs out of it. It walks through various block sizes and is very long running. It can probably tickle lots of stuff. The results are also pretty informative - you can see very clearly in the graphs whatever your weak spots are. http://www.iozone.org/ Charles > > -- > Sincerely, > D.Marck [DM5020, MCK-RIPE, DM3-RIPN] > [ FreeBSD committer: marck@FreeBSD.org ] > ------------------------------------------------------------------------ > *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** > ------------------------------------------------------------------------ > _______________________________________________ > freebsd-stable@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-stable > To unsubscribe, send any mail to "freebsd-stable-unsubscribe@freebsd.org" > From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 04:42:41 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 906E6106564A; Sat, 19 Feb 2011 04:42:41 +0000 (UTC) (envelope-from ken@kdm.org) Received: from nargothrond.kdm.org (nargothrond.kdm.org [70.56.43.81]) by mx1.freebsd.org (Postfix) with ESMTP id 5A2E98FC08; Sat, 19 Feb 2011 04:42:41 +0000 (UTC) Received: from nargothrond.kdm.org (localhost [127.0.0.1]) by nargothrond.kdm.org (8.14.2/8.14.2) with ESMTP id p1J4gcGf089064; Fri, 18 Feb 2011 21:42:38 -0700 (MST) (envelope-from ken@nargothrond.kdm.org) Received: (from ken@localhost) by nargothrond.kdm.org (8.14.2/8.14.2/Submit) id p1J4gb2j089063; Fri, 18 Feb 2011 21:42:37 -0700 (MST) (envelope-from ken) Date: Fri, 18 Feb 2011 21:42:37 -0700 From: "Kenneth D. Merry" To: Bill Desjardins Message-ID: <20110219044237.GA89045@nargothrond.kdm.org> References: <20110218164209.GA77903@nargothrond.kdm.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2i Cc: freebsd-scsi@freebsd.org, stable@freebsd.org Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 04:42:41 -0000 On Fri, Feb 18, 2011 at 19:46:54 -0500, Bill Desjardins wrote: > On Fri, Feb 18, 2011 at 11:42 AM, Kenneth D. Merry wrote: > > > > I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > > SAS hardware. > > Thank you Ken for getting this done. Any plan to support the LSI 9240 > (skinny) cards? if its a matter of hardware to develop with, contact > me off list and I can provide you with a development system. That'll be up to LSI most likely. If it has the mpt2 interface, then I'm sure they'll support it through the mps driver. If it has the MegaRAID interface, then the mfi driver would need to be modified. Ken -- Kenneth Merry ken@FreeBSD.ORG From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 08:37:22 2011 Return-Path: Delivered-To: stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id CE662106566B; Sat, 19 Feb 2011 08:37:22 +0000 (UTC) (envelope-from marck@rinet.ru) Received: from woozle.rinet.ru (woozle.rinet.ru [195.54.192.68]) by mx1.freebsd.org (Postfix) with ESMTP id 4EF8D8FC1A; Sat, 19 Feb 2011 08:37:21 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by woozle.rinet.ru (8.14.4/8.14.4) with ESMTP id p1J8bKnr009385; Sat, 19 Feb 2011 11:37:20 +0300 (MSK) (envelope-from marck@rinet.ru) Date: Sat, 19 Feb 2011 11:37:20 +0300 (MSK) From: Dmitry Morozovsky To: Jeremy Chadwick In-Reply-To: <20110218231306.GA69028@icarus.home.lan> Message-ID: References: <20110218164209.GA77903@nargothrond.kdm.org> <20110218225204.GA84087@nargothrond.kdm.org> <20110218231306.GA69028@icarus.home.lan> User-Agent: Alpine 2.00 (BSF 1167 2008-08-23) X-NCC-RegID: ru.rinet X-OpenPGP-Key-ID: 6B691B03 MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.2.6 (woozle.rinet.ru [0.0.0.0]); Sat, 19 Feb 2011 11:37:20 +0300 (MSK) Cc: freebsd-scsi@freebsd.org, stable@freebsd.org, "Kenneth D. Merry" Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 08:37:22 -0000 On Fri, 18 Feb 2011, Jeremy Chadwick wrote: JC> > KDM> The best stress test I have found has been to just do a single sequential JC> > KDM> write stream with ZFS. i.e.: JC> > KDM> JC> > KDM> cd /path/to/zfs/pool JC> > KDM> dd if=/dev/zero of=foo bs=1M JC> > KDM> JC> > KDM> Just let it run for a long period of time and see what happens. JC> > JC> > Well, provided that I'm plannign to use ZFSv28 to be in place, wouldn't be JC> > /dev/random more appropriate? JC> JC> No -- /dev/urandom maybe, but not /dev/random. /dev/urandom will also JC> induce significantly higher CPU load than /dev/zero will. Don't forget JC> that ZFS is a processor-centric (read: no offloading) system. We're not on Linux: root@beaver:/FreeBSD/src.8# l /dev/*random crw-rw-rw- 1 root wheel 0, 23 Feb 15 13:50 /dev/random lrwxr-xr-x 1 root wheel 6 Feb 15 13:50 /dev/urandom@ -> random JC> I tend to try different block sizes (starting at bs=8k and working up to JC> bs=256k) for sequential benchmarks. The "sweet spot" on most disks I've JC> found is 64k. Otherwise use benchmarks/bonnie++. Ah yes, bonnie++ was on my list too, thanks for the reminder. -- Sincerely, D.Marck [DM5020, MCK-RIPE, DM3-RIPN] [ FreeBSD committer: marck@FreeBSD.org ] ------------------------------------------------------------------------ *** Dmitry Morozovsky --- D.Marck --- Wild Woozle --- marck@rinet.ru *** ------------------------------------------------------------------------ From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 10:51:48 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2E9E71065672 for ; Sat, 19 Feb 2011 10:51:48 +0000 (UTC) (envelope-from ken73.chen@gmail.com) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx1.freebsd.org (Postfix) with ESMTP id B154E8FC18 for ; Sat, 19 Feb 2011 10:51:47 +0000 (UTC) Received: by wwf26 with SMTP id 26so4478738wwf.31 for ; Sat, 19 Feb 2011 02:51:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type; bh=INMvsPVvu00166TaHMsSTJzQYpoZe/WFKA3ORjapkUU=; b=HqrsSd3ioYxjXWt1ASTXqT/VB7ZWupDwzr61WAjRhnknVLe54E7nn8cR0rnRwDsOUY 3h4adkznSIWyBbo8XlU8MxRyhSlY/WIXKtcGsu6hjtmIucWzgue6XHKWMJ0sdwUPUaEK Bgu8GIQAOfnhvtXFqWKiVacwuP6lSnZZnXnzs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; b=OD7EYH6jC2Ol20A9MP2QXw79eZAU+U30yirkzelmq2vcF3TIRzojP+Fzcya4jiXqMn uw5r4ujcKpfCg49PYStse8G/Sj9Ne6vX7lMMGreSXB5UVqa/9CGuGOB2iySJEYK+VZK/ gPK4Ql5iaMKAC+oKXwuaIQC4AWatGTqrU4LXc= Received: by 10.227.143.198 with SMTP id w6mr1577457wbu.37.1298112706517; Sat, 19 Feb 2011 02:51:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.227.128.72 with HTTP; Sat, 19 Feb 2011 02:51:25 -0800 (PST) In-Reply-To: <20110217183902.230681CC16@ptavv.es.net> References: <20110217183902.230681CC16@ptavv.es.net> From: Ken Chen Date: Sat, 19 Feb 2011 18:51:25 +0800 Message-ID: To: Kevin Oberman Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: freebsd-stable@freebsd.org, Doug Barton Subject: Re: hold-on at 'Entropy harvesting' afer upgrading to 8.1 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 10:51:48 -0000 Thanks! It's a production server, I will arrange some day to try. 2011/2/18 Kevin Oberman > > From: Ken Chen > > Date: Fri, 18 Feb 2011 01:12:13 +0800 > > Sender: owner-freebsd-stable@freebsd.org > > > > I have tried. It can not be interrupted by CTRL-C. > > > > 2011/2/17 Doug Barton > > > > > Ok, likely you can bypass the problem by hitting Ctrl-C. > > > > > > Once you get kernel and userland updated make sure that you get /etc/ > > > updated as well and you should be fine. > > > > > > > > > hth, > > > > > > Doug > > > > > > > > > > > > On 02/16/2011 23:24, Ken Chen wrote: > > > > > >> It's first reboot with 8.1 kernel. > > >> > > >> nextboot -k GENERIC > > >> shutdown -r now > > >> > > >> > > >> 2011/2/17 Doug Barton dougb@dougbarton.us>> > > >> > > >> > > >> On 02/16/2011 21:56, Ken Chen wrote: > > >> > > >> Hello All, > > >> > > >> I upgrade a very old machine from 6.3-RELEASE to 8.1-RELEASE by > > >> 'freebsd-update'. After boot with 8.1 GENERIC kernel, it > holds-on > > >> at > > >> ''Entropy harvesting: '. I try to change configuration in > > >> /etc/defaults/rc.conf, it helpless. > > >> > > >> > > >> Did you update /etc after updating the binaries, or is this the > > >> first reboot after freebsd-update installs the new kernel? > > >> > > While the last message to appear is "Entropy harvesting:", that may or > may not be the cause of the hang. It really should continue after a ^C > if that was the issue. > > Can you try a ^T to see what is really running? Or, if that does not > tell you, try adding rc_debug="YES" to rc.conf. This will produce a LOT > of output, but you probably are only interested in the end of it. > > Doug is WAY better at the rc issues than I am, but at least this should > provide a bit more information. > -- > R. Kevin Oberman, Network Engineer > Energy Sciences Network (ESnet) > Ernest O. Lawrence Berkeley National Laboratory (Berkeley Lab) > E-mail: oberman@es.net Phone: +1 510 486-8634 > Key fingerprint:059B 2DDF 031C 9BA3 14A4 EADA 927D EBB3 987B 3751 > From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 11:23:42 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 97CCF106564A for ; Sat, 19 Feb 2011 11:23:42 +0000 (UTC) (envelope-from rickvanderzwet@gmail.com) Received: from mail-vw0-f54.google.com (mail-vw0-f54.google.com [209.85.212.54]) by mx1.freebsd.org (Postfix) with ESMTP id 05B3B8FC14 for ; Sat, 19 Feb 2011 11:23:41 +0000 (UTC) Received: by vws9 with SMTP id 9so2532758vws.13 for ; Sat, 19 Feb 2011 03:23:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:sender:date:x-google-sender-auth :message-id:subject:from:to:content-type; bh=j/E/WUSQbsQ/zPSyx67pI5UAbAIIxHnRnYM99o3YjgM=; b=tU3EX9dmiVqw5wJ/8vornICxMJTXkIKZMGf1KIJPX46l8QiW6uZlLPEGy1JKn5OB7Y xlxzn7PeBzJ7GdW7vMcZwUD7xWjkC817iS+45NKzPWfixNSt6CDboOdo+V+Dnx/olGqk PrCXE3385BomYLkRTfAoko5HjXC4tejc6w6Co= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:sender:date:x-google-sender-auth:message-id:subject :from:to:content-type; b=ju0iMuVx79X2k1fncbxVcDn95DXdLvI+GrEZqOfS4GYtdwuK4Tg5FySN1TeihNuIg2 VbhuBnkrznYVH2ZtClEK1yWi6Kh/c3jqql/jYXSt8oJYJ4KR7F6CYFDKJ4Ow+cL3cVqz +geqcM4tCbDkkk/kUzUFmd2qvlIQHxFq9bfSc= MIME-Version: 1.0 Received: by 10.52.165.164 with SMTP id yz4mr3016961vdb.274.1298113321113; Sat, 19 Feb 2011 03:02:01 -0800 (PST) Sender: rickvanderzwet@gmail.com Received: by 10.220.11.78 with HTTP; Sat, 19 Feb 2011 03:02:01 -0800 (PST) Date: Sat, 19 Feb 2011 12:02:01 +0100 X-Google-Sender-Auth: LORHoap7q3mPycxOyRToWE0pN3M Message-ID: From: Rick van der Zwet To: freebsd-stable@freebsd.org Content-Type: multipart/mixed; boundary=bcaec53f398f621ae9049ca08fa8 Subject: 8.2-PRERELEASE MacbookPro4,1, atapci/ata stall during boot X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 11:23:42 -0000 --bcaec53f398f621ae9049ca08fa8 Content-Type: text/plain; charset=ISO-8859-1 I am testing 8.2-PRERELEASE (http://svn.freebsd.org/base/stable/8) and I find my MacBookPro 4,1 stalls during boot (see picture http://www.flickr.com/photos/rickvanderzwet/5453484178/, unable to gather textdumps), during probing of the disk ata3. Problem is also present in head, but 8.1-RELEASE was working fine. I have isolated the problem by reverting sys/dev/ata back when to 8.1-RELEASE and boot seems to work again (but this is more a workaround and by far a proper fix). # cd /usr/src-stable/sys/dev/ata/ # svn diff -rHEAD:210188 > revert-to-8.1-RELEASE.patch # patch -p0 -i revert-to-8.1-RELEASE.patch Attached dmidecode, verbose dmesg of 8.1-RELEASE, verbose booting of 8.2-PRERELEASE with the patches applied. If you have a specific revision change you like me to test or need more information please let me know. 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owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 12:46:56 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0CDA01065672; Sat, 19 Feb 2011 12:46:56 +0000 (UTC) (envelope-from prvs=10311e3df6=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 746428FC08; Sat, 19 Feb 2011 12:46:55 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 12:36:29 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 12:36:29 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012257628.msg; Sat, 19 Feb 2011 12:36:28 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10311e3df6=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: <8332E9240ECA403480B48D21FA3A8694@multiplay.co.uk> From: "Steven Hartland" To: , Date: Sat, 19 Feb 2011 12:36:57 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: Subject: machdep.hlt_cpus not safe with ULE? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 12:46:56 -0000 I'm trying to debug a possibly failing CPU, so I thought it would be easy just disable the cores using machdep.hlt_cpus and see if we see the panic's we've been seeing. The problem is it seems ULE doesnt properly support machdep.hlt_cpus and still schedules processes onto the halted cpus which obviously causes problems. Can anyone confirm this behaviour? Should machdep.hlt_cpus and I assume the logical counterpart never be used with ULE? Regards Steve ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 or return the E.mail to postmaster@multiplay.co.uk. From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 14:05:29 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 790B8106566C for ; Sat, 19 Feb 2011 14:05:29 +0000 (UTC) (envelope-from gljennjohn@googlemail.com) Received: from mail-fx0-f54.google.com (mail-fx0-f54.google.com [209.85.161.54]) by mx1.freebsd.org (Postfix) with ESMTP id 07E838FC0A for ; Sat, 19 Feb 2011 14:05:28 +0000 (UTC) Received: by fxm19 with SMTP id 19so1273113fxm.13 for ; Sat, 19 Feb 2011 06:05:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:date:from:to:cc:subject:message-id:in-reply-to :references:reply-to:x-mailer:mime-version:content-type :content-transfer-encoding; bh=6Lq3TBrFHc9ZfdYL8VSAGMNxvack6eN91u3dMoQt+6k=; b=KsDl2LkJL1nqNYFkNTSWF+KbxGner7Nnt9JhAs1dZ7NoSLHHnPIAw1oB8ri4mSWOGM Q2I1TyMcbOmGAiqTSB5z3Ik8b0MVJbNgUeB3MAB8exVXRjo8TVKlpkAJfZlJ1NrfSjPT t5CSJwt7YTvy6H+DdBdLYCNlYt2sFMJP+qm6A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=date:from:to:cc:subject:message-id:in-reply-to:references:reply-to :x-mailer:mime-version:content-type:content-transfer-encoding; b=AMEQTVxgw32pCmF3QLaWJqDYjJjxCIYc3d5ynfvwuErocDi/UE8S4eJqmqqaaYaMYn DPd9WMfP9+y/JsvlaoBHX5MO8o2CtWAnlFs2qZHw+uJiVzpKvoJgRp48moBibKIl4HqK 5y5H1nmGFLTz26PkSfDkGjeiMBZp6ENU5q4qc= Received: by 10.223.96.195 with SMTP id i3mr2442168fan.77.1298122532221; Sat, 19 Feb 2011 05:35:32 -0800 (PST) Received: from ernst.jennejohn.org (p578E384B.dip.t-dialin.net [87.142.56.75]) by mx.google.com with ESMTPS id n3sm1561522faa.5.2011.02.19.05.35.31 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 19 Feb 2011 05:35:31 -0800 (PST) Date: Sat, 19 Feb 2011 14:35:30 +0100 From: Gary Jennejohn To: "Steven Hartland" Message-ID: <20110219143530.45d0f958@ernst.jennejohn.org> In-Reply-To: <8332E9240ECA403480B48D21FA3A8694@multiplay.co.uk> References: <8332E9240ECA403480B48D21FA3A8694@multiplay.co.uk> X-Mailer: Claws Mail 3.7.8 (GTK+ 2.18.7; amd64-portbld-freebsd9.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-hackers@freebsd.org, freebsd-stable@freebsd.org Subject: Re: machdep.hlt_cpus not safe with ULE? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: gljennjohn@googlemail.com List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 14:05:29 -0000 On Sat, 19 Feb 2011 12:36:57 -0000 "Steven Hartland" wrote: > I'm trying to debug a possibly failing CPU, so I thought it would > be easy just disable the cores using machdep.hlt_cpus and see if > we see the panic's we've been seeing. > > The problem is it seems ULE doesnt properly support machdep.hlt_cpus > and still schedules processes onto the halted cpus which obviously > causes problems. > > Can anyone confirm this behaviour? Should machdep.hlt_cpus and I assume > the logical counterpart never be used with ULE? > Looking at the kernel source it appears that only sched_4bsd.c makes use of hlt_cpus_mask. -- Gary Jennejohn From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 14:23:12 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D0C0C106566B for ; Sat, 19 Feb 2011 14:23:12 +0000 (UTC) (envelope-from prvs=10311e3df6=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 6B6EC8FC0A for ; Sat, 19 Feb 2011 14:23:11 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 14:22:53 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 14:22:53 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012258197.msg; Sat, 19 Feb 2011 14:22:51 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10311e3df6=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: From: "Steven Hartland" To: , Date: Sat, 19 Feb 2011 14:22:58 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: Subject: bge0 watchdog timeout -- resetting on 8.2-PREREL never recovers X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 14:23:12 -0000 Just updated a box to the 8.2-PREREL as of friday and now when we do any serious amounts of network traffice we see:- bge0: watchdog timeout -- resetting bge0: link state changed to DOWN bge0: link state changed to UP The interface never recovers, we have to use remote console to down, wait 30 seconds then up the interface to restore network access. This is the details from dmesg:- bge0: mem 0xfc9f0000-0xfc9fffff irq 26 at device 5.0 on pci3 bge0: CHIP ID 0x00002100; ASIC REV 0x02; CHIP REV 0x21; PCI-X miibus0: on bge0 brgphy0: PHY 1 on miibus0 brgphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto, auto-flow bge0: Ethernet address: 00:30:48:75:32:42 bge0: [ITHREAD] pciconf -lbvc:- bge0@pci0:3:5:0: class=0x020000 card=0x164815d9 chip=0x164814e4 rev=0x10 hdr=0x00 vendor = 'Broadcom Corporation' device = 'NetXtreme Dual Gigabit Adapter (BCM5704)' class = network subclass = ethernet bar [10] = type Memory, range 64, base 0xfc9f0000, size 65536, enabled cap 07[40] = PCI-X 64-bit supports 133MHz, 2048 burst read, 1 split transaction cap 01[48] = powerspec 2 supports D0 D3 current D0 cap 03[50] = VPD cap 05[58] = MSI supports 8 messages, 64 bit Searching around I thought that r216970 might fix this but it looks like this is already present in another (if_bge.c,v 1.226.2.49) Regards Steve ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. 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From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 14:24:52 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id CEDF51065698; Sat, 19 Feb 2011 14:24:52 +0000 (UTC) (envelope-from prvs=10311e3df6=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 4019E8FC13; Sat, 19 Feb 2011 14:24:52 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 14:24:34 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 14:24:34 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012258207.msg; Sat, 19 Feb 2011 14:24:32 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10311e3df6=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: <482E22A771C8471C8D3F31ACFBAE817B@multiplay.co.uk> From: "Steven Hartland" To: References: <8332E9240ECA403480B48D21FA3A8694@multiplay.co.uk> <20110219143530.45d0f958@ernst.jennejohn.org> Date: Sat, 19 Feb 2011 14:24:59 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: freebsd-hackers@freebsd.org, freebsd-stable@freebsd.org Subject: Re: machdep.hlt_cpus not safe with ULE? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 14:24:52 -0000 ----- Original Message ----- From: "Gary Jennejohn" > > Looking at the kernel source it appears that only sched_4bsd.c makes use > of hlt_cpus_mask. Given ULE is default do these need to be either removed totally or at least conditionally based on the scheduler choice as currently they are quite dangerous to a systems health? Regards Steve ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. 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From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 15:59:45 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 166481065672; Sat, 19 Feb 2011 15:59:45 +0000 (UTC) (envelope-from prvs=10311e3df6=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id 7B3428FC0C; Sat, 19 Feb 2011 15:59:44 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 15:59:25 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 15:59:25 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012258721.msg; Sat, 19 Feb 2011 15:59:25 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10311e3df6=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: <2FA20352DEB643BEA7EAB90A14346894@multiplay.co.uk> From: "Steven Hartland" To: "Steven Hartland" , , References: Date: Sat, 19 Feb 2011 15:59:57 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=response Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: Subject: Re: bge0 watchdog timeout -- resetting on 8.2-PREREL never recovers X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 15:59:45 -0000 This may be totally unrelated to bge, investigating a potential failing stick of ram in the machine in question so until we've ruled this out as the cause don't want to waste anyone's time. I did however notice the logic between the two fixes for DMA on 5704's on PCIX in svn differ so wondering which ones correct:- http://svn.freebsd.org/viewvc/base/head/sys/dev/bge/if_bge.c?r1=216085&r2=216970 http://svn.freebsd.org/viewvc/base/head/sys/dev/bge/if_bge.c?r1=217225&r2=217226 r216970 results in: 1, 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, where as r217226 results in: 1, BGE_DMA_BNDRY, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, Regards Steve ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 or return the E.mail to postmaster@multiplay.co.uk. From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 16:00:18 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8DE2E106566C; Sat, 19 Feb 2011 16:00:18 +0000 (UTC) (envelope-from prvs=10311e3df6=killing@multiplay.co.uk) Received: from mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) by mx1.freebsd.org (Postfix) with ESMTP id EEB0F8FC1B; Sat, 19 Feb 2011 16:00:09 +0000 (UTC) X-MDAV-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 15:59:52 +0000 X-Spam-Processed: mail1.multiplay.co.uk, Sat, 19 Feb 2011 15:59:52 +0000 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on mail1.multiplay.co.uk X-Spam-Level: X-Spam-Status: No, score=-5.0 required=6.0 tests=USER_IN_WHITELIST shortcircuit=ham autolearn=disabled version=3.2.5 Received: from r2d2 ([188.220.16.49]) by mail1.multiplay.co.uk (mail1.multiplay.co.uk [85.236.96.23]) (MDaemon PRO v10.0.4) with ESMTP id md50012258726.msg; Sat, 19 Feb 2011 15:59:50 +0000 X-MDRemoteIP: 188.220.16.49 X-Return-Path: prvs=10311e3df6=killing@multiplay.co.uk X-Envelope-From: killing@multiplay.co.uk Message-ID: From: "Steven Hartland" To: "Steven Hartland" , References: <8332E9240ECA403480B48D21FA3A8694@multiplay.co.uk><20110219143530.45d0f958@ernst.jennejohn.org> <482E22A771C8471C8D3F31ACFBAE817B@multiplay.co.uk> Date: Sat, 19 Feb 2011 16:00:19 -0000 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=response Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.5994 Cc: freebsd-hackers@freebsd.org, freebsd-stable@freebsd.org Subject: Re: machdep.hlt_cpus not safe with ULE? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 16:00:18 -0000 For reference I've found that an alternative is to set the following in loader.conf:- hint.lapic.2.disabled=1 hint.lapic.3.disabled=1 2 and 3 here are the apic numbers displayed by dmesg on boot for the cpu's Obviously this requires a reboot so no perfect for all uses but it does work for what we're testing. ================================================ This e.mail is private and confidential between Multiplay (UK) Ltd. and the person or entity to whom it is addressed. In the event of misdirection, the recipient is prohibited from using, copying, printing or otherwise disseminating it or any information contained in it. In the event of misdirection, illegible or incomplete transmission please telephone +44 845 868 1337 or return the E.mail to postmaster@multiplay.co.uk. From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 16:56:47 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3680A10656BB for ; Sat, 19 Feb 2011 16:56:47 +0000 (UTC) (envelope-from ykirill@yahoo.com) Received: from nm8.bullet.mail.ne1.yahoo.com (nm8.bullet.mail.ne1.yahoo.com [98.138.90.71]) by mx1.freebsd.org (Postfix) with SMTP id CC3E08FC13 for ; Sat, 19 Feb 2011 16:56:46 +0000 (UTC) Received: from [98.138.90.53] by nm8.bullet.mail.ne1.yahoo.com with NNFMP; 19 Feb 2011 16:56:46 -0000 Received: from [98.138.89.193] by tm6.bullet.mail.ne1.yahoo.com with NNFMP; 19 Feb 2011 16:56:46 -0000 Received: from [127.0.0.1] by omp1051.mail.ne1.yahoo.com with NNFMP; 19 Feb 2011 16:56:45 -0000 X-Yahoo-Newman-Property: ymail-3 X-Yahoo-Newman-Id: 991863.25230.bm@omp1051.mail.ne1.yahoo.com Received: (qmail 7106 invoked by uid 60001); 19 Feb 2011 16:56:45 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yahoo.com; s=s1024; t=1298134605; bh=O5xqR9LFgazYabGY0ZRjXdOpLgE5NgtjYpDWq9H8ZJE=; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding; b=n+W1NaontAXmEc8t9znMPKTTNpxC04jQrGo7a9ZoKoT9KlyMSkiQfArLC5tULd8wT6TMsRIKe1ySKM9ZqWMEqfUiv9v82jEeZbsm5/tQAP9JNdPPV/V7fiPXBf/SKnt3bQezwNpsBU/XRfkI6+xXMy1YapnNdugqExaH+lYqxpI= DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=s1024; d=yahoo.com; h=Message-ID:X-YMail-OSG:Received:X-Mailer:Date:From:Subject:To:In-Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding; b=QvTOx4ae+zTipmt2vuAAmdDI3Hbe9Osfm9hAkRImB4jMxHaf167RYBbqcTsKof8cAmVSG+vbd1sL8QDuDdG2ZS5oC73jIQCWey7H9ZPJxpnZBgf3TdFvbNE7WOCkQen0k31In2aB3+s7lR8tsDgqNIpGEMr5925WvjcPJo1X1i0=; Message-ID: <795118.6346.qm@web120517.mail.ne1.yahoo.com> X-YMail-OSG: 7rz4kZMVM1ktFWQt9hd6D9R2ilIaOJhmBO0z7kwEviEdheK cqybb2j7zjogPRYgdAXiiX3Fg9kEld93xoibnYx5bi7mQEfx2t5LYeZ6HELY 3p7W9iXgG0HnZk4BvGdsi8HhlwXqtLe23l_43I.7DNNGX5aI5gEY_BkBc55m Fc6lg7HVA8.rNRZ9dzaZGyF6pcZyatV8h_nJbinOt5MCKetEMS_pSq2Cxs8p N3GnYBS_A1W9MsGb6YRtM6tpWq_xYbKQef2nGmJV68eC.owXWwhnT0n93TZu UhyZseNphZLTTM7yjeT3y Received: from [212.45.22.73] by web120517.mail.ne1.yahoo.com via HTTP; Sat, 19 Feb 2011 08:56:45 PST X-Mailer: YahooMailClassic/11.4.20 YahooMailWebService/0.8.109.292656 Date: Sat, 19 Feb 2011 08:56:45 -0800 (PST) From: Kirill Yelizarov To: freebsd-stable@freebsd.org In-Reply-To: <600887.27323.qm@web120520.mail.ne1.yahoo.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: NFS client over udp X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 16:56:47 -0000 =0A=0A--- On Fri, 2/18/11, Kirill Yelizarov wrote:=0A= =0A> From: Kirill Yelizarov =0A> Subject: Re: NFS client= over udp=0A> To: freebsd-stable@freebsd.org=0A> Date: Friday, February 18,= 2011, 5:09 PM=0A> =0A> =0A> --- On Fri, 2/18/11, Jeremy Chadwick =0A> wrote:=0A> =0A> > From: Jeremy Chadwick =0A> > Subject: Re: NFS client over udp=0A> > To: "Kirill Yeli= zarov" =0A> > Cc: freebsd-stable@freebsd.org=0A> > Date:= Friday, February 18, 2011, 5:05 PM=0A> > On Fri, Feb 18, 2011 at 05:27:00A= M=0A> > -0800, Kirill Yelizarov wrote:=0A> > > I have a reproducible memory= leak when using nfs=0A> > client with an old=0A> > > nfs server using udp = protocol. I'm running rsync=0A> every=0A> > hour from a=0A> > > mounted nfs= volume to an ufs local volume. Each=0A> time=0A> > rsync is running=0A> > = > wired memory is increased. Wired memory is rising=0A> when=0A> > rsync is= in=0A> > > getblk or biord state. When rsync is complete=0A> memory=0A> > = is not freed and=0A> > > lately all memory is in active or wired state=0A> = and=0A> > system starts=0A> > > swapping. I didn't see such behavior when c= lient=0A> os=0A> > was RELEASE-8.0.=0A> > > Then i switched to STABLE-8.1 o= f late summer and=0A> found=0A> > this leak so i=0A> > > upgraded to STABLE= -8.2Prerelease and got the=0A> same=0A> > leak. vmstat -m=0A> > > shows not= hing big. =0A> > > =0A> > > client version: FreeBSD imap1.***.com=0A> 8.2-P= RERELEASE=0A> > FreeBSD=0A> > > 8.2-PRERELEASE #0: Thu Feb 17 13:54:25 MSK = 2011=0A> > > root@imap1.****.com:/usr/obj/usr/src/sys/IMAP1=A0=0A> > amd64= =0A> > > =0A> > > i tried different mounting options:=A0 =A0=0A> > =A0=A0= =A01 -=0A> > >=0A> >=0A> rw,rsize=3D32768,wsize=3D32768,nfsv3,intr,mntudp,r= dirplus,=0A> > > readdirsize=3D65536,noauto,noexec 2 -=0A> > rw,nfsv3,mntud= p,noexec=0A> > > =0A> > > i also tried setting -tso -txcsum -rxcsum for=0A>= igb=0A> > network card=0A> > =0A> > Is ZFS in use on the system which sees= rising wired=0A> > memory?=0A> No, ufs only. =0AI found an old post statin= g there is a leak with nfs udp client over zfs:=0Ahttp://lists.freebsd.org/= pipermail/freebsd-fs/2010-February/007876.html=0AIn my case i don't have zf= s on server or client but the mount is over udp.=0AHere is top after a day = of hourly rsync=0Alast pid: 17306; load averages: 0.00, 0.00, 0.00 u= p 0+22:07:34 19:52:53=0A53 processes: 1 running, 52 sleeping=0ACPU: %= user, % nice, % system, % interrupt, % idle=0AMem: 12G Act= ive, 1306M Inact, 1609M Wired, 748M Cache, 1641M Buf, 55M Free=0ASwap: 16G = Total, 14M Used, 16G Free=0A=0Aand mbufs used=0A8193/1722/9915 mbufs in use= (current/cache/total)=0A8192/1264/9456/25600 mbuf clusters in use (current= /cache/total/max)=0A8192/605 mbuf+clusters out of packet secondary zone in = use (current/cache)=0A0/768/768/12800 4k (page size) jumbo clusters in use = (current/cache/total/max)=0A0/0/0/6400 9k jumbo clusters in use (current/ca= che/total/max)=0A0/0/0/3200 16k jumbo clusters in use (current/cache/total/= max)=0A18432K/6030K/24462K bytes allocated to network (current/cache/total)= =0A0/0/0 requests for mbufs denied (mbufs/clusters/mbuf+clusters)=0A0/0/0 r= equests for jumbo clusters denied (4k/9k/16k)=0A0/0/0 sfbufs in use (curren= t/peak/max)=0A0 requests for sfbufs denied=0A0 requests for sfbufs delayed= =0A0 requests for I/O initiated by sendfile=0A0 calls to protocol drain rou= tines=0A=0AKirill=0A=0A=0A From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 17:54:00 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9734E1065670; Sat, 19 Feb 2011 17:54:00 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from tensor.andric.com (cl-327.ede-01.nl.sixxs.net [IPv6:2001:7b8:2ff:146::2]) by mx1.freebsd.org (Postfix) with ESMTP id 58CE88FC08; Sat, 19 Feb 2011 17:54:00 +0000 (UTC) Received: from [IPv6:2001:7b8:3a7:0:10c2:cf58:2d4b:a206] (unknown [IPv6:2001:7b8:3a7:0:10c2:cf58:2d4b:a206]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by tensor.andric.com (Postfix) with ESMTPSA id 451235C59; Sat, 19 Feb 2011 18:53:59 +0100 (CET) Message-ID: <4D6003B8.2070603@FreeBSD.org> Date: Sat, 19 Feb 2011 18:54:00 +0100 From: Dimitry Andric Organization: The FreeBSD Project User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.2; en-US; rv:1.9.2.15pre) Gecko/20110219 Lanikai/3.1.9pre MIME-Version: 1.0 To: freebsd-current@freebsd.org References: <4D277E4B.1030006@FreeBSD.org> <4D5C2CF3.1020407@FreeBSD.org> <4D5FD547.3090108@FreeBSD.org> In-Reply-To: <4D5FD547.3090108@FreeBSD.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-stable@freebsd.org Subject: Re: HEADS UP: Merge of binutils 2.17 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 17:54:00 -0000 On 2011-02-19 15:35, Dimitry Andric wrote: > Okay, binutils 2.17.50 has now been merged to head in r218822. If you > compile kernels by hand, make sure to first run "make buildworld", or at > least "make kernel-toolchain", to get a new ld in /usr/obj. Otherwise, > linking your kernel might fail. Note, this also applies when you want to build a -CURRENT kernel on -STABLE. In this case, you must run a "make buildworld", or minimally "make kernel-toolchain", before running "make buildkernel" or "make kernel". From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 21:16:19 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 30A1B1065675 for ; Sat, 19 Feb 2011 21:16:19 +0000 (UTC) (envelope-from rmacklem@uoguelph.ca) Received: from esa-annu.mail.uoguelph.ca (esa-annu.mail.uoguelph.ca [131.104.91.36]) by mx1.freebsd.org (Postfix) with ESMTP id E1F8A8FC19 for ; Sat, 19 Feb 2011 21:16:18 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: ApwEAN/BX02DaFvO/2dsb2JhbACEIKMMqWCPdYEng0F2BIUNhwY X-IronPort-AV: E=Sophos;i="4.62,192,1297054800"; d="scan'208";a="110434382" Received: from erie.cs.uoguelph.ca (HELO zcs3.mail.uoguelph.ca) ([131.104.91.206]) by esa-annu-pri.mail.uoguelph.ca with ESMTP; 19 Feb 2011 16:16:18 -0500 Received: from zcs3.mail.uoguelph.ca (localhost.localdomain [127.0.0.1]) by zcs3.mail.uoguelph.ca (Postfix) with ESMTP id F2ABEB3F52; Sat, 19 Feb 2011 16:16:17 -0500 (EST) Date: Sat, 19 Feb 2011 16:16:17 -0500 (EST) From: Rick Macklem To: Doug Barton Message-ID: <931979672.138955.1298150177898.JavaMail.root@erie.cs.uoguelph.ca> In-Reply-To: <4D5F0A3B.1060305@dougbarton.us> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [172.17.91.203] X-Mailer: Zimbra 6.0.10_GA_2692 (ZimbraWebClient - IE8 (Win)/6.0.10_GA_2692) Cc: mike@jellydonut.org, george+freebsd@m5p.com, freebsd-stable@freebsd.org, Jeremy Chadwick Subject: Re: statd/lockd startup failure X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 21:16:19 -0000 > On 02/18/2011 10:08, Rick Macklem wrote: > > The attached patches changes the behaviour so that it tries to > > get an unused port for each of the 4 cases. > > Am I correct in assuming that what you're proposing is to > (potentially) > have different ports for all 4 combinations? I would suggest that this > is not the right way to solve the problem. If I misunderstand, I > apologize. > Well, that was what I was proposing. I could be wrong, but as far as I know, this is allowed by Sun RPC. The port#s are assigned dynamically and registered with rpcbind. (I don't necessarily agree with the design, but this was/is how Sun RPC does it. The philosophy was/is that apps. don't know what port# is being used and shouldn't care. If sysadmins want to use a fixed port#, they can use command line options to override the default dynamic assignment. And, yes, this is one reason that Sun RPC is a pita w.r.t. firewalls. 1980s design...) I don't know an easy way to get a non-assugned port# that is available for all 4 combinations of udp,tcp X ip4,ip6. If others know how to get a port# that is available for all 4 cases, I could implement that. rick From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 22:43:53 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2B9921065702; Sat, 19 Feb 2011 22:43:53 +0000 (UTC) (envelope-from pyunyh@gmail.com) Received: from mail-pw0-f54.google.com (mail-pw0-f54.google.com [209.85.160.54]) by mx1.freebsd.org (Postfix) with ESMTP id E8DA18FC12; Sat, 19 Feb 2011 22:43:52 +0000 (UTC) Received: by pwj8 with SMTP id 8so297080pwj.13 for ; Sat, 19 Feb 2011 14:43:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:date:to:cc:subject:message-id:reply-to :references:mime-version:content-type:content-disposition :in-reply-to:user-agent; bh=OxRdyR5aMoKzJrEBKqxIdrv+olu+gYIv6kZn2Kj0NCA=; b=k8qpxXMto/t+/9ccYfoaRo70/ed9VGGFLK4rCE2fgJv7aKEPqHvkCCebbjcKyWSYbF 4mHZk2kp7OcK8EtJ8vlxQsrQXvaIKBJhk6r0EVxeV2uLbHezsFWOO8k5Qwm4CUXfFnou WBydXAOH3Nn+SVV4vIbMwaBtg+c2Q33eWCkeU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:date:to:cc:subject:message-id:reply-to:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; b=AXScOhI3U9ndxGcDxuxuYWRHTOwU61vtpJwr2Ft9QOvkCbPVi1xZLqv7myM1DqTTBZ O29R/hwWcq/nkH7Kj7P1GoRYmrTqG6ITZwZSKX+xO6N4jv/XzoMjqGzHPio0Oth/g64W HGk6/kaq1+bvwsxf9LkxP6Cdd1+u/HPQdMoWo= Received: by 10.142.126.14 with SMTP id y14mr1777649wfc.322.1298155431926; Sat, 19 Feb 2011 14:43:51 -0800 (PST) Received: from pyunyh@gmail.com ([174.35.1.224]) by mx.google.com with ESMTPS id w11sm5047323wfh.18.2011.02.19.14.43.48 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 19 Feb 2011 14:43:49 -0800 (PST) Received: by pyunyh@gmail.com (sSMTP sendmail emulation); Sat, 19 Feb 2011 14:44:01 -0800 From: Pyun YongHyeon Date: Sat, 19 Feb 2011 14:44:01 -0800 To: Steven Hartland Message-ID: <20110219224401.GA28005@michelle.cdnetworks.com> References: <2FA20352DEB643BEA7EAB90A14346894@multiplay.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2FA20352DEB643BEA7EAB90A14346894@multiplay.co.uk> User-Agent: Mutt/1.4.2.3i Cc: freebsd-net@freebsd.org, freebsd-stable@freebsd.org Subject: Re: bge0 watchdog timeout -- resetting on 8.2-PREREL never recovers X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: pyunyh@gmail.com List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 22:43:53 -0000 On Sat, Feb 19, 2011 at 03:59:57PM -0000, Steven Hartland wrote: > This may be totally unrelated to bge, investigating a potential failing > stick > of ram in the machine in question so until we've ruled this out as the cause > don't want to waste anyone's time. > > I did however notice the logic between the two fixes for DMA on 5704's on > PCIX > in svn differ so wondering which ones correct:- > http://svn.freebsd.org/viewvc/base/head/sys/dev/bge/if_bge.c?r1=216085&r2=216970 > http://svn.freebsd.org/viewvc/base/head/sys/dev/bge/if_bge.c?r1=217225&r2=217226 > > r216970 results in: > 1, 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, > where as r217226 results in: > 1, BGE_DMA_BNDRY, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, > I think it would be same for your case(BCM5704 PCI-X). However r217226 would be better one to address the issue. Actually I didn't like the workaround but there was no much time left to fix it for upcoming 8.2/7.4. From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 23:21:04 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 977EC106566C; Sat, 19 Feb 2011 23:21:04 +0000 (UTC) (envelope-from roberto@keltia.freenix.fr) Received: from keltia.net (centre.keltia.net [IPv6:2a01:240:fe5c::41]) by mx1.freebsd.org (Postfix) with ESMTP id 43D348FC17; Sat, 19 Feb 2011 23:21:04 +0000 (UTC) Received: from bau44-1-88-173-173-77.fbx.proxad.net (aran.keltia.net [88.191.250.24]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: roberto) by keltia.net (Postfix/TLS) with ESMTPSA id 3411487F1; Sun, 20 Feb 2011 00:21:01 +0100 (CET) Date: Sun, 20 Feb 2011 00:20:57 +0100 From: Ollivier Robert To: freebsd-stable@freebsd.org, freebsd-scsi@FreeBSD.org Message-ID: <20110219232057.GA20053@bau44-1-88-173-173-77.fbx.proxad.net> References: <20110218164209.GA77903@nargothrond.kdm.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110218164209.GA77903@nargothrond.kdm.org> X-Operating-System: MacOS X / Macbook Pro - FreeBSD 7.2 / Dell D820 SMP User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.3 (keltia.net); Sun, 20 Feb 2011 00:21:01 +0100 (CET) Cc: Subject: Re: mps(4) driver (LSI 6Gb SAS) commited to stable/8 X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 23:21:04 -0000 According to Kenneth D. Merry: > I just merged the mps(4) driver to stable/8, for those of you with LSI 6Gb > SAS hardware. Thanks a lot Ken! You'll make people very happy (incl. me!) in France :) > There are also a couple of othere issues with the driver that I am planning > to fix in -current today and merge back into stable/8 in a few days. In > particular I have fixes for these issues: I'll wait till you commit these in stable/8 before regenerating my mfsbsd image. Thanks again. -- Ollivier ROBERT -=- FreeBSD: The Power to Serve! -=- roberto@keltia.net In memoriam to Ondine, our 2nd child: http://ondine.keltia.net/ From owner-freebsd-stable@FreeBSD.ORG Sat Feb 19 23:29:18 2011 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C74AF1065673 for ; Sat, 19 Feb 2011 23:29:18 +0000 (UTC) (envelope-from roberto@keltia.freenix.fr) Received: from keltia.net (centre.keltia.net [IPv6:2a01:240:fe5c::41]) by mx1.freebsd.org (Postfix) with ESMTP id 73C738FC12 for ; Sat, 19 Feb 2011 23:29:18 +0000 (UTC) Received: from bau44-1-88-173-173-77.fbx.proxad.net (aran.keltia.net [88.191.250.24]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: roberto) by keltia.net (Postfix/TLS) with ESMTPSA id 5A6BE87F7 for ; Sun, 20 Feb 2011 00:29:17 +0100 (CET) Date: Sun, 20 Feb 2011 00:29:16 +0100 From: Ollivier Robert To: freebsd-stable@freebsd.org Message-ID: <20110219232916.GB20053@bau44-1-88-173-173-77.fbx.proxad.net> References: <20110218172850.258B41CC29@ptavv.es.net> <4D5EAD44.5020201@my.gd> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4D5EAD44.5020201@my.gd> X-Operating-System: MacOS X / Macbook Pro - FreeBSD 7.2 / Dell D820 SMP User-Agent: Mutt/1.5.20 (2009-06-14) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.3 (keltia.net); Sun, 20 Feb 2011 00:29:17 +0100 (CET) Subject: Re: LSI SAS 2008 (mfi) on SuperMicro X8SI6-F X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Feb 2011 23:29:18 -0000 According to Damien Fleuriot: > Oh wait, it occurs to me the mirror I sync on might not be up to date yet... > > SUPHOST= cvsup1.fr.freebsd.org It should, it syncs itself on cvsup-master very regularely. -- Ollivier ROBERT -=- FreeBSD: The Power to Serve! -=- roberto@keltia.net In memoriam to Ondine, our 2nd child: http://ondine.keltia.net/