From owner-freebsd-arch@FreeBSD.ORG Sun Jan 29 07:13:27 2012 Return-Path: Delivered-To: freebsd-arch@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AA77E1065672; Sun, 29 Jan 2012 07:13:27 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (bsdimp.com [199.45.160.85]) by mx1.freebsd.org (Postfix) with ESMTP id 575BA8FC12; Sun, 29 Jan 2012 07:13:27 +0000 (UTC) Received: from 63.imp.bsdimp.com (63.imp.bsdimp.com [10.0.0.63]) (authenticated bits=0) by harmony.bsdimp.com (8.14.4/8.14.3) with ESMTP id q0T75otE054565 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES128-SHA bits=128 verify=NO); Sun, 29 Jan 2012 00:05:50 -0700 (MST) (envelope-from imp@bsdimp.com) Mime-Version: 1.0 (Apple Message framework v1084) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Sun, 29 Jan 2012 00:05:50 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20120120221319.ca8b631f.ray@freebsd.org> <30A45A1E-CA13-4AC8-86FB-F8E06301D1F6@lassitu.de> <20120122195130.360261ce.ray@freebsd.org> <0E31FEC4-963D-4AC8-9AB7-EE6D6D7F86EE@lassitu.de> <20120129001251.7e4cfe83.ray@ddteam.net> To: Juli Mallett X-Mailer: Apple Mail (2.1084) X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.0.1 (harmony.bsdimp.com [10.0.0.6]); Sun, 29 Jan 2012 00:05:53 -0700 (MST) Cc: Aleksandr Rybalko , Stefan Bethke , freebsd-net@FreeBSD.org, Adrian Chadd , Aleksandr Rybalko , freebsd-arch@FreeBSD.org Subject: Re: Ethernet Switch Framework X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 29 Jan 2012 07:13:27 -0000 On Jan 28, 2012, at 4:00 PM, Juli Mallett wrote: > It makes me wonder if the understanding of the relationship in FreeBSD > isn't backwards. Yes, the MAC sits on a bus and is memory-mapped, but > you can conceptualize of it as a child of the PHY, rather than the > parent of it, especially in systems with switch chipsets. Especially > in systems where there is a switch chipset attached to multiple MACs. >=20 > In that model, it makes sense to semi-generically attach a > CPU-to-switch port's pseudo-PHY (or actual PHY, depending on hardware) > to a MAC generically, but that doesn't meant that the switch itself is > attached generically to the MAC. I think that the main issue here is that we have an assumption that we = have a tree structure. However, it is more of a DAG across different = domains. The hierarchy works well when each device owns all the devices = below it and only interacted with them. Most devices are that way. = However, in the embedded world, there's lots of reach-accrosses that are = expected that break the model. Plus, MDIO is more than what we call mii/phy, so there's an imperfect = match there. Warner