From owner-freebsd-virtualization@FreeBSD.ORG Tue Jul 22 02:28:02 2014 Return-Path: Delivered-To: freebsd-virtualization@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 79BF8E40 for ; Tue, 22 Jul 2014 02:28:02 +0000 (UTC) Received: from alto.onthenet.com.au (alto.OntheNet.com.au [203.13.68.12]) by mx1.freebsd.org (Postfix) with ESMTP id 3B0482D97 for ; Tue, 22 Jul 2014 02:28:01 +0000 (UTC) Received: from dommail.onthenet.com.au (dommail.OntheNet.com.au [203.13.70.57]) by alto.onthenet.com.au (Postfix) with ESMTPS id 7DADE124F5; Tue, 22 Jul 2014 12:27:59 +1000 (EST) Received: from Peter-Grehans-MacBook-Pro-2.local ([64.245.0.210]) by dommail.onthenet.com.au (MOS 4.4.4-GA) with ESMTP id BXG26295 (AUTH peterg@ptree32.com.au); Tue, 22 Jul 2014 12:27:58 +1000 Message-ID: <53CDCC2C.8030608@freebsd.org> Date: Mon, 21 Jul 2014 19:27:56 -0700 From: Peter Grehan User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.6; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: Prakhar Deep Subject: Re: Panic: 32-bit PAE enabled OS with 4GB RAM and 2 vCPUs on Bhyve References: In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: "freebsd-virtualization@freebsd.org" X-BeenThere: freebsd-virtualization@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "Discussion of various virtualization techniques FreeBSD supports." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 22 Jul 2014 02:28:02 -0000 Hi Prakhar, >> 1. Why are the pages mapped to AP are being zeroed when PGE flag is set for >> AP in it's CR4 ? >> > > It is hard to say but my guess would be that the 4 PDPTE registers in > the VMCS are not being properly updated during AP spinup. It would be > helpful to see the assembly instructions in the AP spinup code that > modify %cr0, %cr4 and %cr3 to know for sure. Further to what Neel is saying, are you setting the PAE bit in CR4 prior to setting PGE in CRO ? Is CR0 being set with a direct write, or a read/modify/write ? later, Peter.