From owner-freebsd-arch@freebsd.org Tue Jul 14 22:00:52 2015 Return-Path: Delivered-To: freebsd-arch@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E534E9A1C8A for ; Tue, 14 Jul 2015 22:00:51 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id BF44210C8 for ; Tue, 14 Jul 2015 22:00:51 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from ralph.baldwin.cx (75-48-78-19.lightspeed.cncrca.sbcglobal.net [75.48.78.19]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 4F141B9C3; Tue, 14 Jul 2015 18:00:50 -0400 (EDT) From: John Baldwin To: freebsd-arch@freebsd.org Cc: Jason Harmening Subject: Re: RFC: New KPI for fast temporary single-page KVA mappings Date: Tue, 14 Jul 2015 11:30:23 -0700 Message-ID: <6021359.Zicubn765k@ralph.baldwin.cx> User-Agent: KMail/4.14.3 (FreeBSD/10.1-STABLE; KDE/4.14.3; amd64; ; ) In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Tue, 14 Jul 2015 18:00:50 -0400 (EDT) X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 Jul 2015 22:00:52 -0000 On Tuesday, July 07, 2015 11:37:55 AM Jason Harmening wrote: > Hi everyone, > > I'd like to propose a couple of new pmap functions: > vm_offset_t pmap_quick_enter_page(vm_page_t m) > void pmap_quick_remove_page(vm_offset_t kva) > > These functions will create and destroy a temporary, usually CPU-local > mapping of the specified page. Where available, they will use the direct > map. Otherwise, they will use a per-CPU pageframe that's allocated at boot. > > Guarantees: > --Will not sleep > --Will not fail > --Safe to call under a non-spin lock or from an ithread > > Restrictions: > --Not safe to call from interrupt filter or under a spin mutex on all arches > --Mappings should be held for as little time as possible; don't do any > locking or sleeping while holding a mapping > --Current implementation only guarantees a single page of mapping space > across all arches. MI code should not make nested calls to > pmap_quick_enter_page(). > > My idea is that the first consumer of this would be busdma. All non-iommu > implementations would use this for bounce buffer copies of pages that don't > have resident mappings. Currently busdma uses physcopy[in|out] for > unmapped buffers, which on most arches uses sf_bufs that can sleep, making > bus_dmamap_sync() unsafe to call in a lot of cases. busdma would also use > this for virtually-indexed cache maintenance on arm and mips. It currently > ignores cache maintenance for buffers that don't have a KVA or resident UVA > mapping, which may not be correct for buffers that don't belong to curproc > or have cache-resident VAs on other cores. > > I've created 2 Differential reviews: > https://reviews.freebsd.org/D3013: the implementation > https://reviews.freebsd.org/D3014: the kmod I've been using to test it > > I'd like any and all feedback, both on the general approach and the > implementation details. Some things to note on the implementation: > --I've intentionally avoided touching existing pmap code for the time > being. Some of the new code could likely be shared with other pmap KPIs in > a lot of cases. > --I've structured the KPI to make it easy to extend to guarantee more than > one per-CPU page in the future. I could see that being useful for copying > between pages, for example > --There's no immediate consumer for the sparc64 implementation, since > busdma there needs neither bounce buffers nor cache maintenance. > --I would very much like feedback and testing from experts on non-x86 > arches. I only have hardware to test the i386 and amd64 implementations; > I've only cross-compiled it for everything else. Some of the non-x86 > details, like the Book E powerpc TLB invalidation code, are a bit scary and > probably not quite right. I do think something like this would be useful. What I had wanted to do was to add a 'memory cursor' to go along with memory descriptors. The idea would be that you can use a cursor to iterate over any descriptor, and that one of the options when creating a virtual address cursor was to ask it to preallocate any resources it needs at creation time (e.g. a page of KVA on platforms without a direct map). Then if a driver or GEOM module needs to walk over arbitrary I/O buffers that come down via virtual addresses, it could allocate one or more cursors. I have a partial implementation of cursors in a p4 branch, but it of course is missing the hard part of VA mappings without a direct map. However, this would let you have N of these things and to also control the lifecycle of the temporary KVA addresses instead of having a fixed set. -- John Baldwin