From owner-svn-soc-all@freebsd.org Wed Mar 2 17:02:44 2016 Return-Path: Delivered-To: svn-soc-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1BB8DAC08B2 for ; Wed, 2 Mar 2016 17:02:44 +0000 (UTC) (envelope-from mihai@FreeBSD.org) Received: from socsvn.freebsd.org (socsvn.freebsd.org [IPv6:2001:1900:2254:206a::50:2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id EA98D1968 for ; Wed, 2 Mar 2016 17:02:43 +0000 (UTC) (envelope-from mihai@FreeBSD.org) Received: from socsvn.freebsd.org ([127.0.1.124]) by socsvn.freebsd.org (8.15.2/8.15.2) with ESMTP id u22H2hYB055002 for ; Wed, 2 Mar 2016 17:02:43 GMT (envelope-from mihai@FreeBSD.org) Received: (from www@localhost) by socsvn.freebsd.org (8.15.2/8.15.2/Submit) id u22H2h5s054985 for svn-soc-all@FreeBSD.org; Wed, 2 Mar 2016 17:02:43 GMT (envelope-from mihai@FreeBSD.org) Date: Wed, 2 Mar 2016 17:02:43 GMT Message-Id: <201603021702.u22H2h5s054985@socsvn.freebsd.org> X-Authentication-Warning: socsvn.freebsd.org: www set sender to mihai@FreeBSD.org using -f From: mihai@FreeBSD.org To: svn-soc-all@FreeBSD.org Subject: socsvn commit: r299444 - soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-soc-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the entire Summer of Code repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Mar 2016 17:02:44 -0000 Author: mihai Date: Wed Mar 2 17:02:42 2016 New Revision: 299444 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=299444 Log: sys: arm: vmm: vgic.h: add vars to save the state of the distributor Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/vgic.h Modified: soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/vgic.h ============================================================================== --- soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/vgic.h Wed Mar 2 16:36:24 2016 (r299443) +++ soc2015/mihai/bhyve-on-arm-head/sys/arm/vmm/vgic.h Wed Mar 2 17:02:42 2016 (r299444) @@ -1,18 +1,48 @@ #ifndef _VMM_VGIC_H_ #define _VMM_VGIC_H_ + +#define VGIC_NR_IRQ 128 +#define VGIC_NR_SGI 16 +#define VGIC_NR_PPI 16 +#define VGIC_NR_PRV_IRQ (VGIC_NR_SGI + VGIC_NR_PPI) +#define VGIC_NR_SHR_IRQ (VGIC_NR_IRQ - VGIC_NR_PRV_IRQ) +#define VGIC_MAXCPU VM_MAXCPU #define VGIC_LR_NUM 64 + + struct vm; struct vm_exit; struct vgic_distributor { - uint64_t distributor_base; - uint64_t cpu_int_base; + uint64_t distributor_base; + uint64_t cpu_int_base; + + /* Bitmaps for IRQ state in the distributor*/ + + /* Interrupt enabled */ + uint32_t irq_enabled_prv[VGIC_MAXCPU][VGIC_NR_PRV_IRQ / sizeof(uint32_t)]; + uint32_t irq_enabled_shr[VGIC_NR_SHR_IRQ / sizeof(uint32_t)]; + + /* Interrupt level */ + uint32_t irq_state_prv[VGIC_MAXCPU][VGIC_NR_PRV_IRQ / sizeof(uint32_t)]; + uint32_t irq_state_shr[VGIC_NR_SHR_IRQ / sizeof(uint32_t)]; + + /* Level interrupts in progress */ + uint32_t irq_active_prv[VGIC_MAXCPU][VGIC_NR_PRV_IRQ / sizeof(uint32_t)]; + uint32_t irq_active_shr[VGIC_NR_SHR_IRQ / sizeof(uint32_t)]; + + /* Configure type of IRQ: level or edge triggered */ + uint32_t irq_conf_prv[VGIC_MAXCPU][VGIC_NR_PRV_IRQ / sizeof(uint32_t)]; + uint32_t irq_conf_shr[VGIC_NR_SHR_IRQ / sizeof(uint32_t)]; - int nr_irqs; }; struct vgic_cpu_int { + /* Bitmaps for pending IRQs */ + uint32_t pending_prv[VGIC_NR_PRV_IRQ / sizeof(uint32_t)]; + uint32_t pending_shr[VGIC_NR_SHR_IRQ / sizeof(uint32_t)]; + uint64_t virtual_int_ctrl; uint32_t lr_num; uint32_t hcr; @@ -22,6 +52,8 @@ uint64_t elsr; uint32_t apr; uint32_t lr[VGIC_LR_NUM]; + uint8_t lr_used[VGIC_LR_NUM]; + uint8_t irq_to_lr[VGIC_NR_IRQ]; }; int vgic_hyp_init(void);