From owner-svn-src-user@freebsd.org Sun Jan 3 04:54:12 2016 Return-Path: Delivered-To: svn-src-user@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 24E7BA53CA0 for ; Sun, 3 Jan 2016 04:54:12 +0000 (UTC) (envelope-from ngie@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D71D01A0C; Sun, 3 Jan 2016 04:54:11 +0000 (UTC) (envelope-from ngie@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u034sA5c049698; Sun, 3 Jan 2016 04:54:10 GMT (envelope-from ngie@FreeBSD.org) Received: (from ngie@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u034sAFZ049697; Sun, 3 Jan 2016 04:54:10 GMT (envelope-from ngie@FreeBSD.org) Message-Id: <201601030454.u034sAFZ049697@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ngie set sender to ngie@FreeBSD.org using -f From: Garrett Cooper Date: Sun, 3 Jan 2016 04:54:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r293071 - user/ngie/stable-10-libnv/sys/dev/pci X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 03 Jan 2016 04:54:12 -0000 Author: ngie Date: Sun Jan 3 04:54:10 2016 New Revision: 293071 URL: https://svnweb.freebsd.org/changeset/base/293071 Log: MFC r279441: r279441 (by rstone): Refactor PCI device creation Refactor creation of PCI devices into helper methods that can be used by the VF creation code. Modified: user/ngie/stable-10-libnv/sys/dev/pci/pci.c Directory Properties: user/ngie/stable-10-libnv/ (props changed) Modified: user/ngie/stable-10-libnv/sys/dev/pci/pci.c ============================================================================== --- user/ngie/stable-10-libnv/sys/dev/pci/pci.c Sun Jan 3 04:38:17 2016 (r293070) +++ user/ngie/stable-10-libnv/sys/dev/pci/pci.c Sun Jan 3 04:54:10 2016 (r293071) @@ -120,6 +120,9 @@ static int pci_remap_intr_method(device static uint16_t pci_get_rid_method(device_t dev, device_t child); +static struct pci_devinfo * pci_fill_devinfo(device_t pcib, int d, int b, int s, + int f, uint16_t vid, uint16_t did, size_t size); + static device_method_t pci_methods[] = { /* Device interface */ DEVMETHOD(device_probe, pci_probe), @@ -604,71 +607,82 @@ struct pci_devinfo * pci_read_device(device_t pcib, int d, int b, int s, int f, size_t size) { #define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w) - pcicfgregs *cfg = NULL; - struct pci_devinfo *devlist_entry; - struct devlist *devlist_head; + uint16_t vid, did; - devlist_head = &pci_devq; + vid = REG(PCIR_VENDOR, 2); + did = REG(PCIR_DEVICE, 2); + if (vid != 0xffff) + return (pci_fill_devinfo(pcib, d, b, s, f, vid, did, size)); + + return (NULL); +} + +static struct pci_devinfo * +pci_fill_devinfo(device_t pcib, int d, int b, int s, int f, uint16_t vid, + uint16_t did, size_t size) +{ + struct pci_devinfo *devlist_entry; + pcicfgregs *cfg; - devlist_entry = NULL; + devlist_entry = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); - if (REG(PCIR_DEVVENDOR, 4) != 0xfffffffful) { - devlist_entry = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); + cfg = &devlist_entry->cfg; - cfg = &devlist_entry->cfg; + cfg->domain = d; + cfg->bus = b; + cfg->slot = s; + cfg->func = f; + cfg->vendor = vid; + cfg->device = did; + cfg->cmdreg = REG(PCIR_COMMAND, 2); + cfg->statreg = REG(PCIR_STATUS, 2); + cfg->baseclass = REG(PCIR_CLASS, 1); + cfg->subclass = REG(PCIR_SUBCLASS, 1); + cfg->progif = REG(PCIR_PROGIF, 1); + cfg->revid = REG(PCIR_REVID, 1); + cfg->hdrtype = REG(PCIR_HDRTYPE, 1); + cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); + cfg->lattimer = REG(PCIR_LATTIMER, 1); + cfg->intpin = REG(PCIR_INTPIN, 1); + cfg->intline = REG(PCIR_INTLINE, 1); + + cfg->mingnt = REG(PCIR_MINGNT, 1); + cfg->maxlat = REG(PCIR_MAXLAT, 1); + + cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0; + cfg->hdrtype &= ~PCIM_MFDEV; + STAILQ_INIT(&cfg->maps); + + pci_fixancient(cfg); + pci_hdrtypedata(pcib, b, s, f, cfg); + + if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT) + pci_read_cap(pcib, cfg); + + STAILQ_INSERT_TAIL(&pci_devq, devlist_entry, pci_links); + + devlist_entry->conf.pc_sel.pc_domain = cfg->domain; + devlist_entry->conf.pc_sel.pc_bus = cfg->bus; + devlist_entry->conf.pc_sel.pc_dev = cfg->slot; + devlist_entry->conf.pc_sel.pc_func = cfg->func; + devlist_entry->conf.pc_hdr = cfg->hdrtype; + + devlist_entry->conf.pc_subvendor = cfg->subvendor; + devlist_entry->conf.pc_subdevice = cfg->subdevice; + devlist_entry->conf.pc_vendor = cfg->vendor; + devlist_entry->conf.pc_device = cfg->device; + + devlist_entry->conf.pc_class = cfg->baseclass; + devlist_entry->conf.pc_subclass = cfg->subclass; + devlist_entry->conf.pc_progif = cfg->progif; + devlist_entry->conf.pc_revid = cfg->revid; - cfg->domain = d; - cfg->bus = b; - cfg->slot = s; - cfg->func = f; - cfg->vendor = REG(PCIR_VENDOR, 2); - cfg->device = REG(PCIR_DEVICE, 2); - cfg->cmdreg = REG(PCIR_COMMAND, 2); - cfg->statreg = REG(PCIR_STATUS, 2); - cfg->baseclass = REG(PCIR_CLASS, 1); - cfg->subclass = REG(PCIR_SUBCLASS, 1); - cfg->progif = REG(PCIR_PROGIF, 1); - cfg->revid = REG(PCIR_REVID, 1); - cfg->hdrtype = REG(PCIR_HDRTYPE, 1); - cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); - cfg->lattimer = REG(PCIR_LATTIMER, 1); - cfg->intpin = REG(PCIR_INTPIN, 1); - cfg->intline = REG(PCIR_INTLINE, 1); - - cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0; - cfg->hdrtype &= ~PCIM_MFDEV; - STAILQ_INIT(&cfg->maps); - - pci_fixancient(cfg); - pci_hdrtypedata(pcib, b, s, f, cfg); - - if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT) - pci_read_cap(pcib, cfg); - - STAILQ_INSERT_TAIL(devlist_head, devlist_entry, pci_links); - - devlist_entry->conf.pc_sel.pc_domain = cfg->domain; - devlist_entry->conf.pc_sel.pc_bus = cfg->bus; - devlist_entry->conf.pc_sel.pc_dev = cfg->slot; - devlist_entry->conf.pc_sel.pc_func = cfg->func; - devlist_entry->conf.pc_hdr = cfg->hdrtype; - - devlist_entry->conf.pc_subvendor = cfg->subvendor; - devlist_entry->conf.pc_subdevice = cfg->subdevice; - devlist_entry->conf.pc_vendor = cfg->vendor; - devlist_entry->conf.pc_device = cfg->device; - - devlist_entry->conf.pc_class = cfg->baseclass; - devlist_entry->conf.pc_subclass = cfg->subclass; - devlist_entry->conf.pc_progif = cfg->progif; - devlist_entry->conf.pc_revid = cfg->revid; + pci_numdevs++; + pci_generation++; - pci_numdevs++; - pci_generation++; - } return (devlist_entry); -#undef REG } +#undef REG static void pci_read_cap(device_t pcib, pcicfgregs *cfg)