From owner-svn-src-vendor@freebsd.org Thu Feb 15 14:34:19 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 020E9F22DA7; Thu, 15 Feb 2018 14:34:19 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 9B1FD7B41A; Thu, 15 Feb 2018 14:34:18 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 92D6920050; Thu, 15 Feb 2018 14:34:18 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1FEYIvO059339; Thu, 15 Feb 2018 14:34:18 GMT (envelope-from avg@FreeBSD.org) Received: (from avg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1FEYIbB059337; Thu, 15 Feb 2018 14:34:18 GMT (envelope-from avg@FreeBSD.org) Message-Id: <201802151434.w1FEYIbB059337@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: avg set sender to avg@FreeBSD.org using -f From: Andriy Gapon Date: Thu, 15 Feb 2018 14:34:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329313 - in vendor-sys/illumos/dist/uts/common/fs/zfs: . sys X-SVN-Group: vendor-sys X-SVN-Commit-Author: avg X-SVN-Commit-Paths: in vendor-sys/illumos/dist/uts/common/fs/zfs: . sys X-SVN-Commit-Revision: 329313 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 15 Feb 2018 14:34:19 -0000 Author: avg Date: Thu Feb 15 14:34:18 2018 New Revision: 329313 URL: https://svnweb.freebsd.org/changeset/base/329313 Log: 8857 zio_remove_child() panic due to already destroyed parent zio illumos/illumos-gate@d6e1c446d7897003fd9fd36ef5aa7da350b7f6af https://github.com/illumos/illumos-gate/commit/d6e1c446d7897003fd9fd36ef5aa7da350b7f6af https://www.illumos.org/issues/8857 I had an OS panic on one of our servers: ffffff01809128c0 vpanic() ffffff01809128e0 mutex_panic+0x58(fffffffffb94c904, ffffff597dde7f80) ffffff0180912950 mutex_vector_enter+0x347(ffffff597dde7f80) ffffff01809129b0 zio_remove_child+0x50(ffffff597dde7c58, ffffff32bd901ac0, ffffff3373370908) ffffff0180912a40 zio_done+0x390(ffffff32bd901ac0) ffffff0180912a70 zio_execute+0x78(ffffff32bd901ac0) ffffff0180912b30 taskq_thread+0x2d0(ffffff33bae44140) ffffff0180912b40 thread_start+8() It panicked here: http://src.illumos.org/source/xref/illumos-gate/usr/src/uts/common/fs/zfs/ zio.c#430 pio->io_lock is DEAD, thus a panic. Further analysis shows the "pio" (parent zio of "cio") has already been destroyed. Reviewed by: Matthew Ahrens Reviewed by: Andriy Gapon Reviewed by: Youzhong Yang Approved by: Dan McDonald Author: George Wilson Modified: vendor-sys/illumos/dist/uts/common/fs/zfs/sys/zio.h vendor-sys/illumos/dist/uts/common/fs/zfs/zio.c Modified: vendor-sys/illumos/dist/uts/common/fs/zfs/sys/zio.h ============================================================================== --- vendor-sys/illumos/dist/uts/common/fs/zfs/sys/zio.h Thu Feb 15 11:41:38 2018 (r329312) +++ vendor-sys/illumos/dist/uts/common/fs/zfs/sys/zio.h Thu Feb 15 14:34:18 2018 (r329313) @@ -208,6 +208,9 @@ enum zio_flag { (((zio)->io_flags & ZIO_FLAG_VDEV_INHERIT) | \ ZIO_FLAG_CANFAIL) +#define ZIO_CHILD_BIT(x) (1 << (x)) +#define ZIO_CHILD_BIT_IS_SET(val, x) ((val) & (1 << (x))) + enum zio_child { ZIO_CHILD_VDEV = 0, ZIO_CHILD_GANG, @@ -215,6 +218,14 @@ enum zio_child { ZIO_CHILD_LOGICAL, ZIO_CHILD_TYPES }; + +#define ZIO_CHILD_VDEV_BIT ZIO_CHILD_BIT(ZIO_CHILD_VDEV) +#define ZIO_CHILD_GANG_BIT ZIO_CHILD_BIT(ZIO_CHILD_GANG) +#define ZIO_CHILD_DDT_BIT ZIO_CHILD_BIT(ZIO_CHILD_DDT) +#define ZIO_CHILD_LOGICAL_BIT ZIO_CHILD_BIT(ZIO_CHILD_LOGICAL) +#define ZIO_CHILD_ALL_BITS \ + (ZIO_CHILD_VDEV_BIT | ZIO_CHILD_GANG_BIT | \ + ZIO_CHILD_DDT_BIT | ZIO_CHILD_LOGICAL_BIT) enum zio_wait_type { ZIO_WAIT_READY = 0, Modified: vendor-sys/illumos/dist/uts/common/fs/zfs/zio.c ============================================================================== --- vendor-sys/illumos/dist/uts/common/fs/zfs/zio.c Thu Feb 15 11:41:38 2018 (r329312) +++ vendor-sys/illumos/dist/uts/common/fs/zfs/zio.c Thu Feb 15 14:34:18 2018 (r329313) @@ -442,21 +442,26 @@ zio_remove_child(zio_t *pio, zio_t *cio, zio_link_t *z } static boolean_t -zio_wait_for_children(zio_t *zio, enum zio_child child, enum zio_wait_type wait) +zio_wait_for_children(zio_t *zio, uint8_t childbits, enum zio_wait_type wait) { - uint64_t *countp = &zio->io_children[child][wait]; boolean_t waiting = B_FALSE; mutex_enter(&zio->io_lock); ASSERT(zio->io_stall == NULL); - if (*countp != 0) { - zio->io_stage >>= 1; - ASSERT3U(zio->io_stage, !=, ZIO_STAGE_OPEN); - zio->io_stall = countp; - waiting = B_TRUE; + for (int c = 0; c < ZIO_CHILD_TYPES; c++) { + if (!(ZIO_CHILD_BIT_IS_SET(childbits, c))) + continue; + + uint64_t *countp = &zio->io_children[c][wait]; + if (*countp != 0) { + zio->io_stage >>= 1; + ASSERT3U(zio->io_stage, !=, ZIO_STAGE_OPEN); + zio->io_stall = countp; + waiting = B_TRUE; + break; + } } mutex_exit(&zio->io_lock); - return (waiting); } @@ -1237,9 +1242,10 @@ zio_write_compress(zio_t *zio) * If our children haven't all reached the ready stage, * wait for them and then repeat this pipeline stage. */ - if (zio_wait_for_children(zio, ZIO_CHILD_GANG, ZIO_WAIT_READY) || - zio_wait_for_children(zio, ZIO_CHILD_LOGICAL, ZIO_WAIT_READY)) + if (zio_wait_for_children(zio, ZIO_CHILD_LOGICAL_BIT | + ZIO_CHILD_GANG_BIT, ZIO_WAIT_READY)) { return (ZIO_PIPELINE_STOP); + } if (!IO_IS_ALLOCATING(zio)) return (ZIO_PIPELINE_CONTINUE); @@ -2080,8 +2086,9 @@ zio_gang_issue(zio_t *zio) { blkptr_t *bp = zio->io_bp; - if (zio_wait_for_children(zio, ZIO_CHILD_GANG, ZIO_WAIT_DONE)) + if (zio_wait_for_children(zio, ZIO_CHILD_GANG_BIT, ZIO_WAIT_DONE)) { return (ZIO_PIPELINE_STOP); + } ASSERT(BP_IS_GANG(bp) && zio->io_gang_leader == zio); ASSERT(zio->io_child_type > ZIO_CHILD_GANG); @@ -2402,8 +2409,9 @@ zio_ddt_read_done(zio_t *zio) { blkptr_t *bp = zio->io_bp; - if (zio_wait_for_children(zio, ZIO_CHILD_DDT, ZIO_WAIT_DONE)) + if (zio_wait_for_children(zio, ZIO_CHILD_DDT_BIT, ZIO_WAIT_DONE)) { return (ZIO_PIPELINE_STOP); + } ASSERT(BP_GET_DEDUP(bp)); ASSERT(BP_GET_PSIZE(bp) == zio->io_size); @@ -3109,8 +3117,9 @@ zio_vdev_io_done(zio_t *zio) vdev_ops_t *ops = vd ? vd->vdev_ops : &vdev_mirror_ops; boolean_t unexpected_error = B_FALSE; - if (zio_wait_for_children(zio, ZIO_CHILD_VDEV, ZIO_WAIT_DONE)) + if (zio_wait_for_children(zio, ZIO_CHILD_VDEV_BIT, ZIO_WAIT_DONE)) { return (ZIO_PIPELINE_STOP); + } ASSERT(zio->io_type == ZIO_TYPE_READ || zio->io_type == ZIO_TYPE_WRITE); @@ -3176,8 +3185,9 @@ zio_vdev_io_assess(zio_t *zio) { vdev_t *vd = zio->io_vd; - if (zio_wait_for_children(zio, ZIO_CHILD_VDEV, ZIO_WAIT_DONE)) + if (zio_wait_for_children(zio, ZIO_CHILD_VDEV_BIT, ZIO_WAIT_DONE)) { return (ZIO_PIPELINE_STOP); + } if (vd == NULL && !(zio->io_flags & ZIO_FLAG_CONFIG_WRITER)) spa_config_exit(zio->io_spa, SCL_ZIO, zio); @@ -3392,9 +3402,10 @@ zio_ready(zio_t *zio) zio_t *pio, *pio_next; zio_link_t *zl = NULL; - if (zio_wait_for_children(zio, ZIO_CHILD_GANG, ZIO_WAIT_READY) || - zio_wait_for_children(zio, ZIO_CHILD_DDT, ZIO_WAIT_READY)) + if (zio_wait_for_children(zio, ZIO_CHILD_GANG_BIT | ZIO_CHILD_DDT_BIT, + ZIO_WAIT_READY)) { return (ZIO_PIPELINE_STOP); + } if (zio->io_ready) { ASSERT(IO_IS_ALLOCATING(zio)); @@ -3534,11 +3545,9 @@ zio_done(zio_t *zio) * If our children haven't all completed, * wait for them and then repeat this pipeline stage. */ - if (zio_wait_for_children(zio, ZIO_CHILD_VDEV, ZIO_WAIT_DONE) || - zio_wait_for_children(zio, ZIO_CHILD_GANG, ZIO_WAIT_DONE) || - zio_wait_for_children(zio, ZIO_CHILD_DDT, ZIO_WAIT_DONE) || - zio_wait_for_children(zio, ZIO_CHILD_LOGICAL, ZIO_WAIT_DONE)) + if (zio_wait_for_children(zio, ZIO_CHILD_ALL_BITS, ZIO_WAIT_DONE)) { return (ZIO_PIPELINE_STOP); + } /* * If the allocation throttle is enabled, then update the accounting. From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:19 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id CAEBAF09577; Fri, 16 Feb 2018 19:10:18 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 6FC026C25A; Fri, 16 Feb 2018 19:10:18 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 6A5CE11BB5; Fri, 16 Feb 2018 19:10:18 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAI63068910; Fri, 16 Feb 2018 19:10:18 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAFgb068879; Fri, 16 Feb 2018 19:10:15 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAFgb068879@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:15 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329394 - in vendor/llvm/dist-release_60: docs include/llvm/IR include/llvm/MC include/llvm/Support lib/CodeGen lib/CodeGen/AsmPrinter lib/CodeGen/SelectionDAG lib/IR lib/MC/MCParser li... X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/llvm/dist-release_60: docs include/llvm/IR include/llvm/MC include/llvm/Support lib/CodeGen lib/CodeGen/AsmPrinter lib/CodeGen/SelectionDAG lib/IR lib/MC/MCParser lib/Target/AMDGPU lib/Targe... X-SVN-Commit-Revision: 329394 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:19 -0000 Author: dim Date: Fri Feb 16 19:10:15 2018 New Revision: 329394 URL: https://svnweb.freebsd.org/changeset/base/329394 Log: Vendor import of llvm release_60 branch r325330: https://llvm.org/svn/llvm-project/llvm/branches/release_60@325330 Added: vendor/llvm/dist-release_60/include/llvm/MC/MCAsmMacro.h (contents, props changed) vendor/llvm/dist-release_60/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll vendor/llvm/dist-release_60/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll vendor/llvm/dist-release_60/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll vendor/llvm/dist-release_60/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll vendor/llvm/dist-release_60/test/CodeGen/ARM/splitkit.ll vendor/llvm/dist-release_60/test/CodeGen/Thumb/stm-scavenging.ll vendor/llvm/dist-release_60/test/CodeGen/X86/inline-asm-modifier-V.ll vendor/llvm/dist-release_60/test/CodeGen/X86/pr36199.ll vendor/llvm/dist-release_60/test/CodeGen/X86/retpoline-regparm.ll vendor/llvm/dist-release_60/test/DebugInfo/X86/void-typedef.ll vendor/llvm/dist-release_60/test/MC/AsmParser/inline_macro_duplication.ll Modified: vendor/llvm/dist-release_60/docs/ReleaseNotes.rst vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsAMDGPU.td vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsX86.td vendor/llvm/dist-release_60/include/llvm/MC/MCContext.h vendor/llvm/dist-release_60/include/llvm/Support/GenericDomTreeConstruction.h vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DwarfUnit.cpp vendor/llvm/dist-release_60/lib/CodeGen/LivePhysRegs.cpp vendor/llvm/dist-release_60/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.cpp vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.h vendor/llvm/dist-release_60/lib/IR/AutoUpgrade.cpp vendor/llvm/dist-release_60/lib/MC/MCParser/AsmParser.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.h vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.h vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.td vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/SIISelLowering.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h vendor/llvm/dist-release_60/lib/Target/AMDGPU/VOP2Instructions.td vendor/llvm/dist-release_60/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp vendor/llvm/dist-release_60/lib/Target/X86/X86AsmPrinter.cpp vendor/llvm/dist-release_60/lib/Target/X86/X86DomainReassignment.cpp vendor/llvm/dist-release_60/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist-release_60/lib/Target/X86/X86IntrinsicsInfo.h vendor/llvm/dist-release_60/lib/Target/X86/X86RetpolineThunks.cpp vendor/llvm/dist-release_60/lib/Transforms/InstCombine/InstCombineCalls.cpp vendor/llvm/dist-release_60/test/CodeGen/ARM/pr25838.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512-intrinsics-upgrade.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512-intrinsics.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512-mask-op.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll vendor/llvm/dist-release_60/test/CodeGen/X86/avx512bw-intrinsics.ll vendor/llvm/dist-release_60/test/CodeGen/X86/domain-reassignment.mir vendor/llvm/dist-release_60/test/CodeGen/X86/retpoline-external.ll vendor/llvm/dist-release_60/test/CodeGen/X86/retpoline.ll vendor/llvm/dist-release_60/test/MC/X86/x86-64.s vendor/llvm/dist-release_60/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll Modified: vendor/llvm/dist-release_60/docs/ReleaseNotes.rst ============================================================================== --- vendor/llvm/dist-release_60/docs/ReleaseNotes.rst Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/docs/ReleaseNotes.rst Fri Feb 16 19:10:15 2018 (r329394) @@ -71,6 +71,13 @@ Non-comprehensive list of changes in this release Changes to the LLVM IR ---------------------- +Changes to the AArch64 Target +----------------------------- + +During this release: + + * Enabled the new GlobalISel instruction selection framework by default at ``-O0``. + Changes to the ARM Target ------------------------- @@ -80,6 +87,28 @@ During this release the ARM target has: isn't the default. +Changes to the Hexagon Target +----------------------------- + +* The Hexagon backend now supports V65 ISA. + +* The ``-mhvx`` option now takes an optional value that specified the ISA + version of the HVX coprocessor. The available values are v60, v62 and v65. + By default, the value is set to be the same as the CPU version. + +* The compiler option ``-mhvx-double`` is deprecated and will be removed in + the next release of the compiler. Programmers should use ``-mhvx-length`` + option to specify the desired vector length: ``-mhvx-length=64b`` for + 64-byte vectors and ``-mhvx-length=128b`` for 128-byte vectors. While the + current default vector length is 64 bytes, users should always specify the + length explicitly, since the default value may change in the future. + +* The target feature ``hvx-double`` is deprecated and will be removed in the + next release. LLVM IR generators should use target features ``hvx-length64b`` + and ``hvx-length128b`` to indicate the vector length. The length should + always be specified when HVX code generation is enabled. + + Changes to the MIPS Target -------------------------- @@ -90,6 +119,15 @@ Changes to the PowerPC Target ----------------------------- During this release ... + +Changes to the SystemZ Target +----------------------------- + +During this release the SystemZ target has: + +* Added support for 128-bit atomic operations. + +* Added support for the "o" constraint for inline asm statements. Changes to the X86 Target ------------------------- Modified: vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsAMDGPU.td ============================================================================== --- vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsAMDGPU.td Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsAMDGPU.td Fri Feb 16 19:10:15 2018 (r329394) @@ -238,6 +238,26 @@ def int_amdgcn_cvt_pkrtz : Intrinsic< [IntrNoMem, IntrSpeculatable] >; +def int_amdgcn_cvt_pknorm_i16 : Intrinsic< + [llvm_v2i16_ty], [llvm_float_ty, llvm_float_ty], + [IntrNoMem, IntrSpeculatable] +>; + +def int_amdgcn_cvt_pknorm_u16 : Intrinsic< + [llvm_v2i16_ty], [llvm_float_ty, llvm_float_ty], + [IntrNoMem, IntrSpeculatable] +>; + +def int_amdgcn_cvt_pk_i16 : Intrinsic< + [llvm_v2i16_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem, IntrSpeculatable] +>; + +def int_amdgcn_cvt_pk_u16 : Intrinsic< + [llvm_v2i16_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem, IntrSpeculatable] +>; + def int_amdgcn_class : Intrinsic< [llvm_i1_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem, IntrSpeculatable] Modified: vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsX86.td ============================================================================== --- vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsX86.td Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/include/llvm/IR/IntrinsicsX86.td Fri Feb 16 19:10:15 2018 (r329394) @@ -3738,6 +3738,15 @@ let TargetPrefix = "x86" in { // All intrinsics start def int_x86_avx512_kxnor_w : // TODO: remove this intrinsic Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty], [IntrNoMem]>; + def int_x86_avx512_kunpck_bw : GCCBuiltin<"__builtin_ia32_kunpckhi">, + Intrinsic<[llvm_i16_ty], [llvm_i16_ty, llvm_i16_ty], + [IntrNoMem]>; + def int_x86_avx512_kunpck_wd : GCCBuiltin<"__builtin_ia32_kunpcksi">, + Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], + [IntrNoMem]>; + def int_x86_avx512_kunpck_dq : GCCBuiltin<"__builtin_ia32_kunpckdi">, + Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], + [IntrNoMem]>; def int_x86_avx512_kortestz_w : GCCBuiltin<"__builtin_ia32_kortestzhi">, Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty], [IntrNoMem]>; Added: vendor/llvm/dist-release_60/include/llvm/MC/MCAsmMacro.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/llvm/dist-release_60/include/llvm/MC/MCAsmMacro.h Fri Feb 16 19:10:15 2018 (r329394) @@ -0,0 +1,38 @@ +//===- MCAsmMacro.h - Assembly Macros ---------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_MC_MCASMMACRO_H +#define LLVM_MC_MCASMMACRO_H + +#include "llvm/MC/MCParser/MCAsmLexer.h" + +namespace llvm { + +struct MCAsmMacroParameter { + StringRef Name; + std::vector Value; + bool Required = false; + bool Vararg = false; + + MCAsmMacroParameter() = default; +}; + +typedef std::vector MCAsmMacroParameters; +struct MCAsmMacro { + StringRef Name; + StringRef Body; + MCAsmMacroParameters Parameters; + +public: + MCAsmMacro(StringRef N, StringRef B, MCAsmMacroParameters P) + : Name(N), Body(B), Parameters(std::move(P)) {} +}; +}; // namespace llvm + +#endif Modified: vendor/llvm/dist-release_60/include/llvm/MC/MCContext.h ============================================================================== --- vendor/llvm/dist-release_60/include/llvm/MC/MCContext.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/include/llvm/MC/MCContext.h Fri Feb 16 19:10:15 2018 (r329394) @@ -18,6 +18,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/ADT/Twine.h" #include "llvm/BinaryFormat/Dwarf.h" +#include "llvm/MC/MCAsmMacro.h" #include "llvm/MC/MCDwarf.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/SectionKind.h" @@ -268,6 +269,9 @@ namespace llvm { unsigned UniqueID, const MCSymbolELF *Associated); + /// \brief Map of currently defined macros. + StringMap MacroMap; + public: explicit MCContext(const MCAsmInfo *MAI, const MCRegisterInfo *MRI, const MCObjectFileInfo *MOFI, @@ -618,6 +622,17 @@ namespace llvm { // FIXME: We should really do something about that. LLVM_ATTRIBUTE_NORETURN void reportFatalError(SMLoc L, const Twine &Msg); + + const MCAsmMacro *lookupMacro(StringRef Name) { + StringMap::iterator I = MacroMap.find(Name); + return (I == MacroMap.end()) ? nullptr : &I->getValue(); + } + + void defineMacro(StringRef Name, MCAsmMacro Macro) { + MacroMap.insert(std::make_pair(Name, std::move(Macro))); + } + + void undefineMacro(StringRef Name) { MacroMap.erase(Name); } }; } // end namespace llvm Modified: vendor/llvm/dist-release_60/include/llvm/Support/GenericDomTreeConstruction.h ============================================================================== --- vendor/llvm/dist-release_60/include/llvm/Support/GenericDomTreeConstruction.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/include/llvm/Support/GenericDomTreeConstruction.h Fri Feb 16 19:10:15 2018 (r329394) @@ -698,24 +698,20 @@ struct SemiNCAInfo { return; // Recalculate the set of roots. - DT.Roots = FindRoots(DT, BUI); - for (const NodePtr R : DT.Roots) { - const TreeNodePtr TN = DT.getNode(R); - // A CFG node was selected as a tree root, but the corresponding tree node - // is not connected to the virtual root. This is because the incremental - // algorithm does not really know or use the set of roots and can make a - // different (implicit) decision about which nodes within an infinite loop - // becomes a root. - if (TN && !DT.isVirtualRoot(TN->getIDom())) { - DEBUG(dbgs() << "Root " << BlockNamePrinter(R) - << " is not virtual root's child\n" - << "The entire tree needs to be rebuilt\n"); - // It should be possible to rotate the subtree instead of recalculating - // the whole tree, but this situation happens extremely rarely in - // practice. - CalculateFromScratch(DT, BUI); - return; - } + auto Roots = FindRoots(DT, BUI); + if (DT.Roots.size() != Roots.size() || + !std::is_permutation(DT.Roots.begin(), DT.Roots.end(), Roots.begin())) { + // The roots chosen in the CFG have changed. This is because the + // incremental algorithm does not really know or use the set of roots and + // can make a different (implicit) decision about which node within an + // infinite loop becomes a root. + + DEBUG(dbgs() << "Roots are different in updated trees\n" + << "The entire tree needs to be rebuilt\n"); + // It may be possible to update the tree without recalculating it, but + // we do not know yet how to do it, and it happens rarely in practise. + CalculateFromScratch(DT, BUI); + return; } } Modified: vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -163,7 +163,8 @@ uint64_t DebugHandlerBase::getBaseTypeSize(const DITyp DIType *BaseType = DDTy->getBaseType().resolve(); - assert(BaseType && "Unexpected invalid base type"); + if (!BaseType) + return 0; // If this is a derived type, go ahead and get the base type, unless it's a // reference then it's just the size of the field. Pointer types have no need Modified: vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DwarfUnit.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DwarfUnit.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/AsmPrinter/DwarfUnit.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -1391,7 +1391,8 @@ void DwarfUnit::constructMemberDIE(DIE &Buffer, const if (!Name.empty()) addString(MemberDie, dwarf::DW_AT_name, Name); - addType(MemberDie, resolve(DT->getBaseType())); + if (DIType *Resolved = resolve(DT->getBaseType())) + addType(MemberDie, Resolved); addSourceLine(MemberDie, DT); Modified: vendor/llvm/dist-release_60/lib/CodeGen/LivePhysRegs.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/LivePhysRegs.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/LivePhysRegs.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -205,14 +205,18 @@ void LivePhysRegs::addPristines(const MachineFunction } void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) { - if (!MBB.succ_empty()) { - // To get the live-outs we simply merge the live-ins of all successors. - for (const MachineBasicBlock *Succ : MBB.successors()) - addBlockLiveIns(*Succ); - } else if (MBB.isReturnBlock()) { - // For the return block: Add all callee saved registers that are saved and - // restored (somewhere); This does not include callee saved registers that - // are unused and hence not saved and restored; they are called pristine. + // To get the live-outs we simply merge the live-ins of all successors. + for (const MachineBasicBlock *Succ : MBB.successors()) + addBlockLiveIns(*Succ); + if (MBB.isReturnBlock()) { + // Return blocks are a special case because we currently don't mark up + // return instructions completely: specifically, there is no explicit + // use for callee-saved registers. So we add all callee saved registers + // that are saved and restored (somewhere). This does not include + // callee saved registers that are unused and hence not saved and + // restored; they are called pristine. + // FIXME: PEI should add explicit markings to return instructions + // instead of implicitly handling them here. const MachineFunction &MF = *MBB.getParent(); const MachineFrameInfo &MFI = MF.getFrameInfo(); if (MFI.isCalleeSavedInfoValid()) { @@ -225,15 +229,8 @@ void LivePhysRegs::addLiveOutsNoPristines(const Machin void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) { const MachineFunction &MF = *MBB.getParent(); - if (!MBB.succ_empty()) { - addPristines(MF); - addLiveOutsNoPristines(MBB); - } else if (MBB.isReturnBlock()) { - // For the return block: Add all callee saved registers. - const MachineFrameInfo &MFI = MF.getFrameInfo(); - if (MFI.isCalleeSavedInfoValid()) - addCalleeSavedRegs(*this, MF); - } + addPristines(MF); + addLiveOutsNoPristines(MBB); } void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) { Modified: vendor/llvm/dist-release_60/lib/CodeGen/SelectionDAG/DAGCombiner.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -16409,7 +16409,9 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) N1.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR && N1.getOperand(0).getOperand(1) == N2 && N1.getOperand(0).getOperand(0).getValueType().getVectorNumElements() == - VT.getVectorNumElements()) { + VT.getVectorNumElements() && + N1.getOperand(0).getOperand(0).getValueType().getSizeInBits() == + VT.getSizeInBits()) { return DAG.getBitcast(VT, N1.getOperand(0).getOperand(0)); } Modified: vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -491,9 +491,8 @@ VNInfo *SplitEditor::defValue(unsigned RegIdx, return VNI; } -void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) { - assert(ParentVNI && "Mapping NULL value"); - ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)]; +void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI) { + ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI.id)]; VNInfo *VNI = VFP.getPointer(); // ParentVNI was either unmapped or already complex mapped. Either way, just @@ -777,7 +776,7 @@ SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) { // the source live range. The spiller also won't try to hoist this copy. if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) && MI->readsVirtualRegister(Edit->getReg())) { - forceRecompute(0, ParentVNI); + forceRecompute(0, *ParentVNI); defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); return Idx; } @@ -835,7 +834,7 @@ void SplitEditor::overlapIntv(SlotIndex Start, SlotInd // The complement interval will be extended as needed by LRCalc.extend(). if (ParentVNI) - forceRecompute(0, ParentVNI); + forceRecompute(0, *ParentVNI); DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):"); RegAssign.insert(Start, End, OpenIdx); DEBUG(dump()); @@ -878,7 +877,7 @@ void SplitEditor::removeBackCopies(SmallVectorImplreadsVirtualRegister(Edit->getReg())) { DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx << '\n'); - forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def)); + forceRecompute(RegIdx, *Edit->getParent().getVNInfoAt(Def)); } else { SlotIndex Kill = LIS.getInstructionIndex(*MBBI).getRegSlot(); DEBUG(dbgs() << " move kill to " << Kill << '\t' << *MBBI); @@ -982,7 +981,7 @@ void SplitEditor::computeRedundantBackCopies( } } if (!DominatedVNIs.empty()) { - forceRecompute(0, ParentVNI); + forceRecompute(0, *ParentVNI); for (auto VNI : DominatedVNIs) { BackCopies.push_back(VNI); } @@ -1102,7 +1101,7 @@ void SplitEditor::hoistCopies() { NotToHoistSet.count(ParentVNI->id)) continue; BackCopies.push_back(VNI); - forceRecompute(0, ParentVNI); + forceRecompute(0, *ParentVNI); } // If it is not beneficial to hoist all the BackCopies, simply remove @@ -1428,6 +1427,41 @@ void SplitEditor::deleteRematVictims() { Edit->eliminateDeadDefs(Dead, None, &AA); } +void SplitEditor::forceRecomputeVNI(const VNInfo &ParentVNI) { + // Fast-path for common case. + if (!ParentVNI.isPHIDef()) { + for (unsigned I = 0, E = Edit->size(); I != E; ++I) + forceRecompute(I, ParentVNI); + return; + } + + // Trace value through phis. + SmallPtrSet Visited; ///< whether VNI was/is in worklist. + SmallVector WorkList; + Visited.insert(&ParentVNI); + WorkList.push_back(&ParentVNI); + + const LiveInterval &ParentLI = Edit->getParent(); + const SlotIndexes &Indexes = *LIS.getSlotIndexes(); + do { + const VNInfo &VNI = *WorkList.back(); + WorkList.pop_back(); + for (unsigned I = 0, E = Edit->size(); I != E; ++I) + forceRecompute(I, VNI); + if (!VNI.isPHIDef()) + continue; + + MachineBasicBlock &MBB = *Indexes.getMBBFromIndex(VNI.def); + for (const MachineBasicBlock *Pred : MBB.predecessors()) { + SlotIndex PredEnd = Indexes.getMBBEndIdx(Pred); + VNInfo *PredVNI = ParentLI.getVNInfoBefore(PredEnd); + assert(PredVNI && "Value available in PhiVNI predecessor"); + if (Visited.insert(PredVNI).second) + WorkList.push_back(PredVNI); + } + } while(!WorkList.empty()); +} + void SplitEditor::finish(SmallVectorImpl *LRMap) { ++NumFinished; @@ -1444,8 +1478,7 @@ void SplitEditor::finish(SmallVectorImpl *LR // Force rematted values to be recomputed everywhere. // The new live ranges may be truncated. if (Edit->didRematerialize(ParentVNI)) - for (unsigned i = 0, e = Edit->size(); i != e; ++i) - forceRecompute(i, ParentVNI); + forceRecomputeVNI(*ParentVNI); } // Hoist back-copies to the complement interval when in spill mode. Modified: vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.h ============================================================================== --- vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/CodeGen/SplitKit.h Fri Feb 16 19:10:15 2018 (r329394) @@ -357,7 +357,11 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor { (private) /// recomputed by LiveRangeCalc::extend regardless of the number of defs. /// This is used for values whose live range doesn't match RegAssign exactly. /// They could have rematerialized, or back-copies may have been moved. - void forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI); + void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI); + + /// Calls forceRecompute() on any affected regidx and on ParentVNI + /// predecessors in case of a phi definition. + void forceRecomputeVNI(const VNInfo &ParentVNI); /// defFromParent - Define Reg from ParentVNI at UseIdx using either /// rematerialization or a COPY from parent. Return the new value. Modified: vendor/llvm/dist-release_60/lib/IR/AutoUpgrade.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/IR/AutoUpgrade.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/IR/AutoUpgrade.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -75,7 +75,6 @@ static bool ShouldUpgradeX86Intrinsic(Function *F, Str Name=="ssse3.pabs.d.128" || // Added in 6.0 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 - Name.startswith("avx512.kunpck") || //added in 6.0 Name.startswith("avx2.pabs.") || // Added in 6.0 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 Name.startswith("avx512.broadcastm") || // Added in 6.0 @@ -1063,12 +1062,6 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, CI->getArgOperand(1)); - } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { - uint64_t Shift = CI->getType()->getScalarSizeInBits() / 2; - uint64_t And = (1ULL << Shift) - 1; - Value* LowBits = Builder.CreateAnd(CI->getArgOperand(0), And); - Value* HighBits = Builder.CreateShl(CI->getArgOperand(1), Shift); - Rep = Builder.CreateOr(LowBits, HighBits); } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd")) { Type *I32Ty = Type::getInt32Ty(C); Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), Modified: vendor/llvm/dist-release_60/lib/MC/MCParser/AsmParser.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/MC/MCParser/AsmParser.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/MC/MCParser/AsmParser.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -83,27 +83,6 @@ namespace { typedef std::vector MCAsmMacroArgument; typedef std::vector MCAsmMacroArguments; -struct MCAsmMacroParameter { - StringRef Name; - MCAsmMacroArgument Value; - bool Required = false; - bool Vararg = false; - - MCAsmMacroParameter() = default; -}; - -typedef std::vector MCAsmMacroParameters; - -struct MCAsmMacro { - StringRef Name; - StringRef Body; - MCAsmMacroParameters Parameters; - -public: - MCAsmMacro(StringRef N, StringRef B, MCAsmMacroParameters P) - : Name(N), Body(B), Parameters(std::move(P)) {} -}; - /// \brief Helper class for storing information about an active macro /// instantiation. struct MacroInstantiation { @@ -164,9 +143,6 @@ class AsmParser : public MCAsmParser { (private) /// addDirectiveHandler. StringMap ExtensionDirectiveMap; - /// \brief Map of currently defined macros. - StringMap MacroMap; - /// \brief Stack of active macro instantiations. std::vector ActiveMacros; @@ -308,17 +284,6 @@ class AsmParser : public MCAsmParser { (private) /// \brief Control a flag in the parser that enables or disables macros. void setMacrosEnabled(bool Flag) {MacrosEnabledFlag = Flag;} - /// \brief Lookup a previously defined macro. - /// \param Name Macro name. - /// \returns Pointer to macro. NULL if no such macro was defined. - const MCAsmMacro* lookupMacro(StringRef Name); - - /// \brief Define a new macro with the given name and information. - void defineMacro(StringRef Name, MCAsmMacro Macro); - - /// \brief Undefine a macro. If no such macro was defined, it's a no-op. - void undefineMacro(StringRef Name); - /// \brief Are we inside a macro instantiation? bool isInsideMacroInstantiation() {return !ActiveMacros.empty();} @@ -1841,7 +1806,7 @@ bool AsmParser::parseStatement(ParseStatementInfo &Inf // If macros are enabled, check to see if this is a macro instantiation. if (areMacrosEnabled()) - if (const MCAsmMacro *M = lookupMacro(IDVal)) { + if (const MCAsmMacro *M = getContext().lookupMacro(IDVal)) { return handleMacroEntry(M, IDLoc); } @@ -2720,17 +2685,6 @@ bool AsmParser::parseMacroArguments(const MCAsmMacro * return TokError("too many positional arguments"); } -const MCAsmMacro *AsmParser::lookupMacro(StringRef Name) { - StringMap::iterator I = MacroMap.find(Name); - return (I == MacroMap.end()) ? nullptr : &I->getValue(); -} - -void AsmParser::defineMacro(StringRef Name, MCAsmMacro Macro) { - MacroMap.insert(std::make_pair(Name, std::move(Macro))); -} - -void AsmParser::undefineMacro(StringRef Name) { MacroMap.erase(Name); } - bool AsmParser::handleMacroEntry(const MCAsmMacro *M, SMLoc NameLoc) { // Arbitrarily limit macro nesting depth (default matches 'as'). We can // eliminate this, although we should protect against infinite loops. @@ -4249,7 +4203,7 @@ bool AsmParser::parseDirectiveMacro(SMLoc DirectiveLoc eatToEndOfStatement(); } - if (lookupMacro(Name)) { + if (getContext().lookupMacro(Name)) { return Error(DirectiveLoc, "macro '" + Name + "' is already defined"); } @@ -4257,7 +4211,7 @@ bool AsmParser::parseDirectiveMacro(SMLoc DirectiveLoc const char *BodyEnd = EndToken.getLoc().getPointer(); StringRef Body = StringRef(BodyStart, BodyEnd - BodyStart); checkForBadMacro(DirectiveLoc, Name, Body, Parameters); - defineMacro(Name, MCAsmMacro(Name, Body, std::move(Parameters))); + getContext().defineMacro(Name, MCAsmMacro(Name, Body, std::move(Parameters))); return false; } @@ -4416,10 +4370,10 @@ bool AsmParser::parseDirectivePurgeMacro(SMLoc Directi "unexpected token in '.purgem' directive")) return true; - if (!lookupMacro(Name)) + if (!getContext().lookupMacro(Name)) return Error(DirectiveLoc, "macro '" + Name + "' is not defined"); - undefineMacro(Name); + getContext().undefineMacro(Name); return false; } Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -3957,6 +3957,10 @@ const char* AMDGPUTargetLowering::getTargetNodeName(un NODE_NAME_CASE(CVT_F32_UBYTE2) NODE_NAME_CASE(CVT_F32_UBYTE3) NODE_NAME_CASE(CVT_PKRTZ_F16_F32) + NODE_NAME_CASE(CVT_PKNORM_I16_F32) + NODE_NAME_CASE(CVT_PKNORM_U16_F32) + NODE_NAME_CASE(CVT_PK_I16_I32) + NODE_NAME_CASE(CVT_PK_U16_U32) NODE_NAME_CASE(FP_TO_FP16) NODE_NAME_CASE(FP16_ZEXT) NODE_NAME_CASE(BUILD_VERTICAL_VECTOR) Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.h ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUISelLowering.h Fri Feb 16 19:10:15 2018 (r329394) @@ -417,6 +417,10 @@ enum NodeType : unsigned { // Convert two float 32 numbers into a single register holding two packed f16 // with round to zero. CVT_PKRTZ_F16_F32, + CVT_PKNORM_I16_F32, + CVT_PKNORM_U16_F32, + CVT_PK_I16_I32, + CVT_PK_U16_U32, // Same as the standard node, except the high bits of the resulting integer // are known 0. Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -108,3 +108,21 @@ int AMDGPUInstrInfo::pseudoToMCOpcode(int Opcode) cons return MCOp; } + +// TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence. +bool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) { + const Value *Ptr = MMO->getValue(); + // UndefValue means this is a load of a kernel input. These are uniform. + // Sometimes LDS instructions have constant pointers. + // If Ptr is null, then that means this mem operand contains a + // PseudoSourceValue like GOT. + if (!Ptr || isa(Ptr) || + isa(Ptr) || isa(Ptr)) + return true; + + if (const Argument *Arg = dyn_cast(Ptr)) + return AMDGPU::isArgPassedInSGPR(Arg); + + const Instruction *I = dyn_cast(Ptr); + return I && I->getMetadata("amdgpu.uniform"); +} Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.h ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.h Fri Feb 16 19:10:15 2018 (r329394) @@ -50,6 +50,8 @@ class AMDGPUInstrInfo : public AMDGPUGenInstrInfo { (p /// Return -1 if the target-specific opcode for the pseudo instruction does /// not exist. If Opcode is not a pseudo instruction, this is identity. int pseudoToMCOpcode(int Opcode) const; + + static bool isUniformMMO(const MachineMemOperand *MMO); }; } // End llvm namespace Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.td ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.td Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPUInstrInfo.td Fri Feb 16 19:10:15 2018 (r329394) @@ -35,6 +35,10 @@ def AMDGPUFPPackOp : SDTypeProfile<1, 2, [SDTCisFP<1>, SDTCisSameAs<1, 2>] >; +def AMDGPUIntPackOp : SDTypeProfile<1, 2, + [SDTCisInt<1>, SDTCisSameAs<1, 2>] +>; + def AMDGPUDivScaleOp : SDTypeProfile<2, 3, [SDTCisFP<0>, SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisSameAs<0, 4>] >; @@ -142,6 +146,10 @@ def AMDGPUrsq_clamp : SDNode<"AMDGPUISD::RSQ_CLAMP", S def AMDGPUldexp : SDNode<"AMDGPUISD::LDEXP", AMDGPULdExpOp>; def AMDGPUpkrtz_f16_f32 : SDNode<"AMDGPUISD::CVT_PKRTZ_F16_F32", AMDGPUFPPackOp>; +def AMDGPUpknorm_i16_f32 : SDNode<"AMDGPUISD::CVT_PKNORM_I16_F32", AMDGPUFPPackOp>; +def AMDGPUpknorm_u16_f32 : SDNode<"AMDGPUISD::CVT_PKNORM_U16_F32", AMDGPUFPPackOp>; +def AMDGPUpk_i16_i32 : SDNode<"AMDGPUISD::CVT_PK_I16_I32", AMDGPUIntPackOp>; +def AMDGPUpk_u16_u32 : SDNode<"AMDGPUISD::CVT_PK_U16_U32", AMDGPUIntPackOp>; def AMDGPUfp_to_f16 : SDNode<"AMDGPUISD::FP_TO_FP16" , SDTFPToIntOp>; def AMDGPUfp16_zext : SDNode<"AMDGPUISD::FP16_ZEXT" , SDTFPToIntOp>; Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -120,7 +120,7 @@ static bool isInstrUniform(const MachineInstr &MI) { return false; const MachineMemOperand *MMO = *MI.memoperands_begin(); - return AMDGPU::isUniformMMO(MMO); + return AMDGPUInstrInfo::isUniformMMO(MMO); } const RegisterBankInfo::InstructionMapping & Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/SIISelLowering.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/SIISelLowering.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/SIISelLowering.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -205,6 +205,7 @@ SITargetLowering::SITargetLowering(const TargetMachine setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::f32, Custom); setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v4f32, Custom); + setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v2i16, Custom); setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::v2f16, Custom); setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom); @@ -1085,7 +1086,7 @@ bool SITargetLowering::isCheapAddrSpaceCast(unsigned S bool SITargetLowering::isMemOpUniform(const SDNode *N) const { const MemSDNode *MemNode = cast(N); - return AMDGPU::isUniformMMO(MemNode->getMemOperand()); + return AMDGPUInstrInfo::isUniformMMO(MemNode->getMemOperand()); } TargetLoweringBase::LegalizeTypeAction @@ -3517,7 +3518,8 @@ void SITargetLowering::ReplaceNodeResults(SDNode *N, } case ISD::INTRINSIC_WO_CHAIN: { unsigned IID = cast(N->getOperand(0))->getZExtValue(); - if (IID == Intrinsic::amdgcn_cvt_pkrtz) { + switch (IID) { + case Intrinsic::amdgcn_cvt_pkrtz: { SDValue Src0 = N->getOperand(1); SDValue Src1 = N->getOperand(2); SDLoc SL(N); @@ -3526,6 +3528,29 @@ void SITargetLowering::ReplaceNodeResults(SDNode *N, Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); return; } + case Intrinsic::amdgcn_cvt_pknorm_i16: + case Intrinsic::amdgcn_cvt_pknorm_u16: + case Intrinsic::amdgcn_cvt_pk_i16: + case Intrinsic::amdgcn_cvt_pk_u16: { + SDValue Src0 = N->getOperand(1); + SDValue Src1 = N->getOperand(2); + SDLoc SL(N); + unsigned Opcode; + + if (IID == Intrinsic::amdgcn_cvt_pknorm_i16) + Opcode = AMDGPUISD::CVT_PKNORM_I16_F32; + else if (IID == Intrinsic::amdgcn_cvt_pknorm_u16) + Opcode = AMDGPUISD::CVT_PKNORM_U16_F32; + else if (IID == Intrinsic::amdgcn_cvt_pk_i16) + Opcode = AMDGPUISD::CVT_PK_I16_I32; + else + Opcode = AMDGPUISD::CVT_PK_U16_U32; + + SDValue Cvt = DAG.getNode(Opcode, SL, MVT::i32, Src0, Src1); + Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, Cvt)); + return; + } + } break; } case ISD::SELECT: { @@ -4424,10 +4449,27 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDVa case Intrinsic::amdgcn_ubfe: return DAG.getNode(AMDGPUISD::BFE_U32, DL, VT, Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); - case Intrinsic::amdgcn_cvt_pkrtz: { - // FIXME: Stop adding cast if v2f16 legal. + case Intrinsic::amdgcn_cvt_pkrtz: + case Intrinsic::amdgcn_cvt_pknorm_i16: + case Intrinsic::amdgcn_cvt_pknorm_u16: + case Intrinsic::amdgcn_cvt_pk_i16: + case Intrinsic::amdgcn_cvt_pk_u16: { + // FIXME: Stop adding cast if v2f16/v2i16 are legal. EVT VT = Op.getValueType(); - SDValue Node = DAG.getNode(AMDGPUISD::CVT_PKRTZ_F16_F32, DL, MVT::i32, + unsigned Opcode; + + if (IntrinsicID == Intrinsic::amdgcn_cvt_pkrtz) + Opcode = AMDGPUISD::CVT_PKRTZ_F16_F32; + else if (IntrinsicID == Intrinsic::amdgcn_cvt_pknorm_i16) + Opcode = AMDGPUISD::CVT_PKNORM_I16_F32; + else if (IntrinsicID == Intrinsic::amdgcn_cvt_pknorm_u16) + Opcode = AMDGPUISD::CVT_PKNORM_U16_F32; + else if (IntrinsicID == Intrinsic::amdgcn_cvt_pk_i16) + Opcode = AMDGPUISD::CVT_PK_I16_I32; + else + Opcode = AMDGPUISD::CVT_PK_U16_U32; + + SDValue Node = DAG.getNode(Opcode, DL, MVT::i32, Op.getOperand(1), Op.getOperand(2)); return DAG.getNode(ISD::BITCAST, DL, VT, Node); } Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -871,24 +871,6 @@ bool isArgPassedInSGPR(const Argument *A) { } } -// TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence. -bool isUniformMMO(const MachineMemOperand *MMO) { - const Value *Ptr = MMO->getValue(); - // UndefValue means this is a load of a kernel input. These are uniform. - // Sometimes LDS instructions have constant pointers. - // If Ptr is null, then that means this mem operand contains a - // PseudoSourceValue like GOT. - if (!Ptr || isa(Ptr) || - isa(Ptr) || isa(Ptr)) - return true; - - if (const Argument *Arg = dyn_cast(Ptr)) - return isArgPassedInSGPR(Arg); - - const Instruction *I = dyn_cast(Ptr); - return I && I->getMetadata("amdgpu.uniform"); -} - int64_t getSMRDEncodedOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) { if (isGCN3Encoding(ST)) return ByteOffset; Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h Fri Feb 16 19:10:15 2018 (r329394) @@ -363,7 +363,6 @@ LLVM_READNONE bool isInlinableLiteralV216(int32_t Literal, bool HasInv2Pi); bool isArgPassedInSGPR(const Argument *Arg); -bool isUniformMMO(const MachineMemOperand *MMO); /// \returns The encoding that will be used for \p ByteOffset in the SMRD /// offset field. Modified: vendor/llvm/dist-release_60/lib/Target/AMDGPU/VOP2Instructions.td ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/AMDGPU/VOP2Instructions.td Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/AMDGPU/VOP2Instructions.td Fri Feb 16 19:10:15 2018 (r329394) @@ -407,11 +407,11 @@ defm V_MBCNT_LO_U32_B32 : VOP2Inst <"v_mbcnt_lo_u32_b3 defm V_MBCNT_HI_U32_B32 : VOP2Inst <"v_mbcnt_hi_u32_b32", VOP_NO_EXT, int_amdgcn_mbcnt_hi>; defm V_LDEXP_F32 : VOP2Inst <"v_ldexp_f32", VOP_NO_EXT, AMDGPUldexp>; defm V_CVT_PKACCUM_U8_F32 : VOP2Inst <"v_cvt_pkaccum_u8_f32", VOP_NO_EXT>; // TODO: set "Uses = dst" -defm V_CVT_PKNORM_I16_F32 : VOP2Inst <"v_cvt_pknorm_i16_f32", VOP_NO_EXT>; -defm V_CVT_PKNORM_U16_F32 : VOP2Inst <"v_cvt_pknorm_u16_f32", VOP_NO_EXT>; +defm V_CVT_PKNORM_I16_F32 : VOP2Inst <"v_cvt_pknorm_i16_f32", VOP_NO_EXT, AMDGPUpknorm_i16_f32>; +defm V_CVT_PKNORM_U16_F32 : VOP2Inst <"v_cvt_pknorm_u16_f32", VOP_NO_EXT, AMDGPUpknorm_u16_f32>; defm V_CVT_PKRTZ_F16_F32 : VOP2Inst <"v_cvt_pkrtz_f16_f32", VOP_NO_EXT, AMDGPUpkrtz_f16_f32>; -defm V_CVT_PK_U16_U32 : VOP2Inst <"v_cvt_pk_u16_u32", VOP_NO_EXT>; -defm V_CVT_PK_I16_I32 : VOP2Inst <"v_cvt_pk_i16_i32", VOP_NO_EXT>; +defm V_CVT_PK_U16_U32 : VOP2Inst <"v_cvt_pk_u16_u32", VOP_NO_EXT, AMDGPUpk_u16_u32>; +defm V_CVT_PK_I16_I32 : VOP2Inst <"v_cvt_pk_i16_i32", VOP_NO_EXT, AMDGPUpk_i16_i32>; } // End SubtargetPredicate = isGCN Modified: vendor/llvm/dist-release_60/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -396,10 +396,14 @@ void X86MCCodeEmitter::emitMemModRMByte(const MCInst & // rip-relative addressing is actually relative to the *next* instruction. // Since an immediate can follow the mod/rm byte for an instruction, this - // means that we need to bias the immediate field of the instruction with - // the size of the immediate field. If we have this case, add it into the + // means that we need to bias the displacement field of the instruction with + // the size of the immediate field. If we have this case, add it into the // expression to emit. - int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0; + // Note: rip-relative addressing using immediate displacement values should + // not be adjusted, assuming it was the user's intent. + int ImmSize = !Disp.isImm() && X86II::hasImm(TSFlags) + ? X86II::getSizeOfImm(TSFlags) + : 0; EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), CurByte, OS, Fixups, -ImmSize); Modified: vendor/llvm/dist-release_60/lib/Target/X86/X86AsmPrinter.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/X86/X86AsmPrinter.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/X86/X86AsmPrinter.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -370,6 +370,8 @@ static void printIntelMemReference(X86AsmPrinter &P, c static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO, char Mode, raw_ostream &O) { unsigned Reg = MO.getReg(); + bool EmitPercent = true; + switch (Mode) { default: return true; // Unknown mode. case 'b': // Print QImode register @@ -384,6 +386,9 @@ static bool printAsmMRegister(X86AsmPrinter &P, const case 'k': // Print SImode register Reg = getX86SubSuperRegister(Reg, 32); break; + case 'V': + EmitPercent = false; + LLVM_FALLTHROUGH; case 'q': // Print 64-bit register names if 64-bit integer registers are available. // Otherwise, print 32-bit register names. @@ -391,7 +396,10 @@ static bool printAsmMRegister(X86AsmPrinter &P, const break; } - O << '%' << X86ATTInstPrinter::getRegisterName(Reg); + if (EmitPercent) + O << '%'; + + O << X86ATTInstPrinter::getRegisterName(Reg); return false; } @@ -464,6 +472,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr case 'w': // Print HImode register case 'k': // Print SImode register case 'q': // Print DImode register + case 'V': // Print native register without '%' if (MO.isReg()) return printAsmMRegister(*this, MO, ExtraCode[0], O); printOperand(*this, MI, OpNo, O); Modified: vendor/llvm/dist-release_60/lib/Target/X86/X86DomainReassignment.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/X86/X86DomainReassignment.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/X86/X86DomainReassignment.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -663,8 +663,10 @@ void X86DomainReassignment::initConverters() { createReplacer(X86::XOR32rr, X86::KXORDrr); createReplacer(X86::XOR64rr, X86::KXORQrr); - createReplacer(X86::TEST32rr, X86::KTESTDrr); - createReplacer(X86::TEST64rr, X86::KTESTQrr); + // TODO: KTEST is not a replacement for TEST due to flag differences. Need + // to prove only Z flag is used. + //createReplacer(X86::TEST32rr, X86::KTESTDrr); + //createReplacer(X86::TEST64rr, X86::KTESTQrr); } if (STI->hasDQI()) { @@ -684,8 +686,10 @@ void X86DomainReassignment::initConverters() { createReplacer(X86::SHR8ri, X86::KSHIFTRBri); createReplacer(X86::SHL8ri, X86::KSHIFTLBri); - createReplacer(X86::TEST8rr, X86::KTESTBrr); - createReplacer(X86::TEST16rr, X86::KTESTWrr); + // TODO: KTEST is not a replacement for TEST due to flag differences. Need + // to prove only Z flag is used. + //createReplacer(X86::TEST8rr, X86::KTESTBrr); + //createReplacer(X86::TEST16rr, X86::KTESTWrr); createReplacer(X86::XOR8rr, X86::KXORBrr); } Modified: vendor/llvm/dist-release_60/lib/Target/X86/X86ISelLowering.cpp ============================================================================== --- vendor/llvm/dist-release_60/lib/Target/X86/X86ISelLowering.cpp Fri Feb 16 18:50:06 2018 (r329393) +++ vendor/llvm/dist-release_60/lib/Target/X86/X86ISelLowering.cpp Fri Feb 16 19:10:15 2018 (r329394) @@ -17017,24 +17017,6 @@ static bool hasNonFlagsUse(SDValue Op) { return false; } -// Emit KTEST instruction for bit vectors on AVX-512 -static SDValue EmitKTEST(SDValue Op, SelectionDAG &DAG, - const X86Subtarget &Subtarget) { - if (Op.getOpcode() == ISD::BITCAST) { - auto hasKTEST = [&](MVT VT) { - unsigned SizeInBits = VT.getSizeInBits(); - return (Subtarget.hasDQI() && (SizeInBits == 8 || SizeInBits == 16)) || - (Subtarget.hasBWI() && (SizeInBits == 32 || SizeInBits == 64)); - }; - SDValue Op0 = Op.getOperand(0); - MVT Op0VT = Op0.getValueType().getSimpleVT(); - if (Op0VT.isVector() && Op0VT.getVectorElementType() == MVT::i1 && - hasKTEST(Op0VT)) - return DAG.getNode(X86ISD::KTEST, SDLoc(Op), Op0VT, Op0, Op0); - } - return SDValue(); -} - /// Emit nodes that will be selected as "test Op0,Op0", or something /// equivalent. SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, const SDLoc &dl, @@ -17079,9 +17061,6 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsign // doing a separate TEST. TEST always sets OF and CF to 0, so unless // we prove that the arithmetic won't overflow, we can't use OF or CF. if (Op.getResNo() != 0 || NeedOF || NeedCF) { - // Emit KTEST for bit vectors - if (auto Node = EmitKTEST(Op, DAG, Subtarget)) - return Node; // Emit a CMP with 0, which is the TEST pattern. return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op, DAG.getConstant(0, dl, Op.getValueType())); @@ -17310,10 +17289,6 @@ SDValue X86TargetLowering::EmitTest(SDValue Op, unsign } if (Opcode == 0) { - // Emit KTEST for bit vectors - if (auto Node = EmitKTEST(Op, DAG, Subtarget)) - return Node; - // Emit a CMP with 0, which is the TEST pattern. return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op, DAG.getConstant(0, dl, Op.getValueType())); @@ -18093,6 +18068,34 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtar return Result; } +// Try to select this as a KTEST+SETCC if possible. +static SDValue EmitKTEST(SDValue Op0, SDValue Op1, ISD::CondCode CC, + const SDLoc &dl, SelectionDAG &DAG, + const X86Subtarget &Subtarget) { + // Only support equality comparisons. + if (CC != ISD::SETEQ && CC != ISD::SETNE) + return SDValue(); + + // Must be a bitcast from vXi1. + if (Op0.getOpcode() != ISD::BITCAST) + return SDValue(); + + Op0 = Op0.getOperand(0); + MVT VT = Op0.getSimpleValueType(); + if (!(Subtarget.hasDQI() && (VT == MVT::v8i1 || VT == MVT::v16i1)) && + !(Subtarget.hasBWI() && (VT == MVT::v32i1 || VT == MVT::v64i1))) + return SDValue(); + + X86::CondCode X86CC; + if (isNullConstant(Op1)) { + X86CC = CC == ISD::SETEQ ? X86::COND_E : X86::COND_NE; + } else + return SDValue(); + + SDValue KTEST = DAG.getNode(X86ISD::KTEST, dl, MVT::i32, Op0, Op0); + return getSETCC(X86CC, KTEST, dl, DAG); +} + SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { MVT VT = Op.getSimpleValueType(); @@ -18115,6 +18118,10 @@ SDValue X86TargetLowering::LowerSETCC(SDValue Op, Sele return NewSetCC; } + // Try to lower using KTEST. + if (SDValue NewSetCC = EmitKTEST(Op0, Op1, CC, dl, DAG, Subtarget)) + return NewSetCC; + // Look for X == 0, X == 1, X != 0, or X != 1. We can simplify some forms of // these. *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:25 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 36E5BF095AA; Fri, 16 Feb 2018 19:10:25 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 3F66F6C2E1; Fri, 16 Feb 2018 19:10:23 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 1FEF311BB6; Fri, 16 Feb 2018 19:10:23 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAMPE068957; Fri, 16 Feb 2018 19:10:22 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAMmS068956; Fri, 16 Feb 2018 19:10:22 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAMmS068956@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329395 - vendor/llvm/llvm-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/llvm/llvm-release_60-r325330 X-SVN-Commit-Revision: 329395 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:25 -0000 Author: dim Date: Fri Feb 16 19:10:22 2018 New Revision: 329395 URL: https://svnweb.freebsd.org/changeset/base/329395 Log: Tag llvm release_60 branch r325330. Added: vendor/llvm/llvm-release_60-r325330/ - copied from r329394, vendor/llvm/dist-release_60/ From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:40 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0B311F0960C; Fri, 16 Feb 2018 19:10:40 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id C06876C4AD; Fri, 16 Feb 2018 19:10:37 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 71BD511BBE; Fri, 16 Feb 2018 19:10:37 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAbYN069140; Fri, 16 Feb 2018 19:10:37 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAbwG069139; Fri, 16 Feb 2018 19:10:37 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAbwG069139@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:37 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329398 - vendor/compiler-rt/dist-release_60/lib/asan X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/compiler-rt/dist-release_60/lib/asan X-SVN-Commit-Revision: 329398 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:40 -0000 Author: dim Date: Fri Feb 16 19:10:37 2018 New Revision: 329398 URL: https://svnweb.freebsd.org/changeset/base/329398 Log: Vendor import of compiler-rt release_60 branch r325330: https://llvm.org/svn/llvm-project/compiler-rt/branches/release_60@325330 Modified: vendor/compiler-rt/dist-release_60/lib/asan/asan_linux.cc Modified: vendor/compiler-rt/dist-release_60/lib/asan/asan_linux.cc ============================================================================== --- vendor/compiler-rt/dist-release_60/lib/asan/asan_linux.cc Fri Feb 16 19:10:34 2018 (r329397) +++ vendor/compiler-rt/dist-release_60/lib/asan/asan_linux.cc Fri Feb 16 19:10:37 2018 (r329398) @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -214,7 +215,7 @@ void AsanCheckIncompatibleRT() { // the functions in dynamic ASan runtime instead of the functions in // system libraries, causing crashes later in ASan initialization. MemoryMappingLayout proc_maps(/*cache_enabled*/true); - char filename[128]; + char filename[PATH_MAX]; MemoryMappedSegment segment(filename, sizeof(filename)); while (proc_maps.Next(&segment)) { if (IsDynamicRTName(segment.filename)) { From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:34 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id F173DF095DA; Fri, 16 Feb 2018 19:10:33 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id E0EE26C3C8; Fri, 16 Feb 2018 19:10:30 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id B8A5C11BB7; Fri, 16 Feb 2018 19:10:30 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAUMU069042; Fri, 16 Feb 2018 19:10:30 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJARPf069006; Fri, 16 Feb 2018 19:10:27 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJARPf069006@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329396 - in vendor/clang/dist-release_60: docs include/clang/AST lib/AST lib/CodeGen lib/Format lib/Headers lib/Lex lib/Sema test/CodeGen test/CodeGenCXX test/Lexer test/Sema test/Sema... X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/clang/dist-release_60: docs include/clang/AST lib/AST lib/CodeGen lib/Format lib/Headers lib/Lex lib/Sema test/CodeGen test/CodeGenCXX test/Lexer test/Sema test/SemaCXX test/SemaTemplate uni... X-SVN-Commit-Revision: 329396 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:34 -0000 Author: dim Date: Fri Feb 16 19:10:26 2018 New Revision: 329396 URL: https://svnweb.freebsd.org/changeset/base/329396 Log: Vendor import of clang release_60 branch r325330: https://llvm.org/svn/llvm-project/cfe/branches/release_60@325330 Added: vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-missing-key.cpp (contents, props changed) vendor/clang/dist-release_60/test/CodeGenCXX/microsoft-abi-emit-dependent.cpp (contents, props changed) vendor/clang/dist-release_60/test/CodeGenCXX/msabi-swiftcall-cc.cpp (contents, props changed) vendor/clang/dist-release_60/test/Sema/cxx-as-c.c (contents, props changed) Modified: vendor/clang/dist-release_60/docs/ReleaseNotes.rst vendor/clang/dist-release_60/include/clang/AST/DeclBase.h vendor/clang/dist-release_60/lib/AST/ASTContext.cpp vendor/clang/dist-release_60/lib/AST/DeclBase.cpp vendor/clang/dist-release_60/lib/AST/MicrosoftMangle.cpp vendor/clang/dist-release_60/lib/CodeGen/CodeGenModule.cpp vendor/clang/dist-release_60/lib/CodeGen/ItaniumCXXABI.cpp vendor/clang/dist-release_60/lib/CodeGen/TargetInfo.cpp vendor/clang/dist-release_60/lib/Format/TokenAnnotator.cpp vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.cpp vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.h vendor/clang/dist-release_60/lib/Headers/avx512bwintrin.h vendor/clang/dist-release_60/lib/Headers/avx512fintrin.h vendor/clang/dist-release_60/lib/Lex/LiteralSupport.cpp vendor/clang/dist-release_60/lib/Sema/SemaChecking.cpp vendor/clang/dist-release_60/lib/Sema/SemaDecl.cpp vendor/clang/dist-release_60/lib/Sema/SemaInit.cpp vendor/clang/dist-release_60/test/CodeGen/avx512bw-builtins.c vendor/clang/dist-release_60/test/CodeGen/avx512f-builtins.c vendor/clang/dist-release_60/test/CodeGen/ms_abi.c vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-rtti.cpp vendor/clang/dist-release_60/test/Lexer/cxx1y_digit_separators.cpp vendor/clang/dist-release_60/test/Sema/bitfield.c vendor/clang/dist-release_60/test/Sema/compare.c vendor/clang/dist-release_60/test/SemaCXX/init-expr-crash.cpp vendor/clang/dist-release_60/test/SemaCXX/type-traits.cpp vendor/clang/dist-release_60/test/SemaTemplate/instantiate-init.cpp vendor/clang/dist-release_60/unittests/Format/FormatTest.cpp Modified: vendor/clang/dist-release_60/docs/ReleaseNotes.rst ============================================================================== --- vendor/clang/dist-release_60/docs/ReleaseNotes.rst Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/docs/ReleaseNotes.rst Fri Feb 16 19:10:26 2018 (r329396) @@ -132,6 +132,11 @@ New Compiler Flags difference between the ``-std=c17`` and ``-std=c11`` language modes is the value of the ``__STDC_VERSION__`` macro, as C17 is a bug fix release. +- Added the ``-fexperimental-isel`` and ``-fno-experimental-isel`` flags to + enable/disable the new GlobalISel instruction selection framework. This + feature is enabled by default for AArch64 at the ``-O0`` optimization level. + Support for other targets or optimization levels is currently incomplete. + Deprecated Compiler Flags ------------------------- Modified: vendor/clang/dist-release_60/include/clang/AST/DeclBase.h ============================================================================== --- vendor/clang/dist-release_60/include/clang/AST/DeclBase.h Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/include/clang/AST/DeclBase.h Fri Feb 16 19:10:26 2018 (r329396) @@ -836,6 +836,10 @@ class LLVM_ALIGNAS(/*alignof(uint64_t)*/ 8) Decl { (pu void setLexicalDeclContext(DeclContext *DC); + /// Determine whether this declaration is a templated entity (whether it is + // within the scope of a template parameter). + bool isTemplated() const; + /// isDefinedOutsideFunctionOrMethod - This predicate returns true if this /// scoped decl is defined outside the current function or method. This is /// roughly global variables and functions, but also handles enums (which Modified: vendor/clang/dist-release_60/lib/AST/ASTContext.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/AST/ASTContext.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/AST/ASTContext.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -2145,7 +2145,7 @@ static bool unionHasUniqueObjectRepresentations(const if (FieldSize != UnionSize) return false; } - return true; + return !RD->field_empty(); } static bool isStructEmpty(QualType Ty) { Modified: vendor/clang/dist-release_60/lib/AST/DeclBase.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/AST/DeclBase.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/AST/DeclBase.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -236,8 +236,21 @@ TemplateDecl *Decl::getDescribedTemplate() const { return RD->getDescribedClassTemplate(); else if (auto *VD = dyn_cast(this)) return VD->getDescribedVarTemplate(); + else if (auto *AD = dyn_cast(this)) + return AD->getDescribedAliasTemplate(); return nullptr; +} + +bool Decl::isTemplated() const { + // A declaration is dependent if it is a template or a template pattern, or + // is within (lexcially for a friend, semantically otherwise) a dependent + // context. + // FIXME: Should local extern declarations be treated like friends? + if (auto *AsDC = dyn_cast(this)) + return AsDC->isDependentContext(); + auto *DC = getFriendObjectKind() ? getLexicalDeclContext() : getDeclContext(); + return DC->isDependentContext() || isTemplateDecl() || getDescribedTemplate(); } const DeclContext *Decl::getParentFunctionOrMethod() const { Modified: vendor/clang/dist-release_60/lib/AST/MicrosoftMangle.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/AST/MicrosoftMangle.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/AST/MicrosoftMangle.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -950,11 +950,10 @@ void MicrosoftCXXNameMangler::mangleUnqualifiedName(co } } +// ::= [] +// ::= [] void MicrosoftCXXNameMangler::mangleNestedName(const NamedDecl *ND) { - // ::= [] - // ::= [] const DeclContext *DC = getEffectiveDeclContext(ND); - while (!DC->isTranslationUnit()) { if (isa(ND) || isa(ND)) { unsigned Disc; @@ -2140,6 +2139,7 @@ void MicrosoftCXXNameMangler::mangleCallingConvention( case CC_X86StdCall: Out << 'G'; break; case CC_X86FastCall: Out << 'I'; break; case CC_X86VectorCall: Out << 'Q'; break; + case CC_Swift: Out << 'S'; break; case CC_X86RegCall: Out << 'w'; break; } } Modified: vendor/clang/dist-release_60/lib/CodeGen/CodeGenModule.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/CodeGen/CodeGenModule.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/CodeGen/CodeGenModule.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -4000,18 +4000,13 @@ void CodeGenModule::EmitDeclContext(const DeclContext /// EmitTopLevelDecl - Emit code for a single top level declaration. void CodeGenModule::EmitTopLevelDecl(Decl *D) { // Ignore dependent declarations. - if (D->getDeclContext() && D->getDeclContext()->isDependentContext()) + if (D->isTemplated()) return; switch (D->getKind()) { case Decl::CXXConversion: case Decl::CXXMethod: case Decl::Function: - // Skip function templates - if (cast(D)->getDescribedFunctionTemplate() || - cast(D)->isLateTemplateParsed()) - return; - EmitGlobal(cast(D)); // Always provide some coverage mapping // even for the functions that aren't emitted. @@ -4024,10 +4019,6 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) { case Decl::Var: case Decl::Decomposition: - // Skip variable templates - if (cast(D)->getDescribedVarTemplate()) - return; - LLVM_FALLTHROUGH; case Decl::VarTemplateSpecialization: EmitGlobal(cast(D)); if (auto *DD = dyn_cast(D)) @@ -4086,16 +4077,9 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) { DI->EmitUsingDirective(cast(*D)); return; case Decl::CXXConstructor: - // Skip function templates - if (cast(D)->getDescribedFunctionTemplate() || - cast(D)->isLateTemplateParsed()) - return; - getCXXABI().EmitCXXConstructors(cast(D)); break; case Decl::CXXDestructor: - if (cast(D)->isLateTemplateParsed()) - return; getCXXABI().EmitCXXDestructors(cast(D)); break; Modified: vendor/clang/dist-release_60/lib/CodeGen/ItaniumCXXABI.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/CodeGen/ItaniumCXXABI.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/CodeGen/ItaniumCXXABI.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -2761,6 +2761,11 @@ static bool ShouldUseExternalRTTIDescriptor(CodeGenMod // N.B. We must always emit the RTTI data ourselves if there exists a key // function. bool IsDLLImport = RD->hasAttr(); + + // Don't import the RTTI but emit it locally. + if (CGM.getTriple().isWindowsGNUEnvironment() && IsDLLImport) + return false; + if (CGM.getVTables().isVTableExternal(RD)) return IsDLLImport && !CGM.getTriple().isWindowsItaniumEnvironment() ? false Modified: vendor/clang/dist-release_60/lib/CodeGen/TargetInfo.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/CodeGen/TargetInfo.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/CodeGen/TargetInfo.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -3543,7 +3543,17 @@ ABIArgInfo X86_64ABIInfo::classifyRegCallStructType(Qu void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { - bool IsRegCall = FI.getCallingConvention() == llvm::CallingConv::X86_RegCall; + const unsigned CallingConv = FI.getCallingConvention(); + // It is possible to force Win64 calling convention on any x86_64 target by + // using __attribute__((ms_abi)). In such case to correctly emit Win64 + // compatible code delegate this call to WinX86_64ABIInfo::computeInfo. + if (CallingConv == llvm::CallingConv::Win64) { + WinX86_64ABIInfo Win64ABIInfo(CGT); + Win64ABIInfo.computeInfo(FI); + return; + } + + bool IsRegCall = CallingConv == llvm::CallingConv::X86_RegCall; // Keep track of the number of assigned registers. unsigned FreeIntRegs = IsRegCall ? 11 : 6; Modified: vendor/clang/dist-release_60/lib/Format/TokenAnnotator.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Format/TokenAnnotator.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Format/TokenAnnotator.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -1723,15 +1723,18 @@ void TokenAnnotator::setCommentLineLevels( } } - if (NextNonCommentLine && CommentLine) { - // If the comment is currently aligned with the line immediately following - // it, that's probably intentional and we should keep it. - bool AlignedWithNextLine = - NextNonCommentLine->First->NewlinesBefore <= 1 && - NextNonCommentLine->First->OriginalColumn == - (*I)->First->OriginalColumn; - if (AlignedWithNextLine) - (*I)->Level = NextNonCommentLine->Level; + // If the comment is currently aligned with the line immediately following + // it, that's probably intentional and we should keep it. + if (NextNonCommentLine && CommentLine && + NextNonCommentLine->First->NewlinesBefore <= 1 && + NextNonCommentLine->First->OriginalColumn == + (*I)->First->OriginalColumn) { + // Align comments for preprocessor lines with the # in column 0. + // Otherwise, align with the next line. + (*I)->Level = (NextNonCommentLine->Type == LT_PreprocessorDirective || + NextNonCommentLine->Type == LT_ImportStatement) + ? 0 + : NextNonCommentLine->Level; } else { NextNonCommentLine = (*I)->First->isNot(tok::r_brace) ? (*I) : nullptr; } Modified: vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -234,14 +234,17 @@ UnwrappedLineParser::UnwrappedLineParser(const FormatS CurrentLines(&Lines), Style(Style), Keywords(Keywords), CommentPragmasRegex(Style.CommentPragmas), Tokens(nullptr), Callback(Callback), AllTokens(Tokens), PPBranchLevel(-1), - IfNdefCondition(nullptr), FoundIncludeGuardStart(false), - IncludeGuardRejected(false), FirstStartColumn(FirstStartColumn) {} + IncludeGuard(Style.IndentPPDirectives == FormatStyle::PPDIS_None + ? IG_Rejected + : IG_Inited), + IncludeGuardToken(nullptr), FirstStartColumn(FirstStartColumn) {} void UnwrappedLineParser::reset() { PPBranchLevel = -1; - IfNdefCondition = nullptr; - FoundIncludeGuardStart = false; - IncludeGuardRejected = false; + IncludeGuard = Style.IndentPPDirectives == FormatStyle::PPDIS_None + ? IG_Rejected + : IG_Inited; + IncludeGuardToken = nullptr; Line.reset(new UnwrappedLine); CommentsBeforeNextToken.clear(); FormatTok = nullptr; @@ -264,6 +267,14 @@ void UnwrappedLineParser::parse() { readToken(); parseFile(); + + // If we found an include guard then all preprocessor directives (other than + // the guard) are over-indented by one. + if (IncludeGuard == IG_Found) + for (auto &Line : Lines) + if (Line.InPPDirective && Line.Level > 0) + --Line.Level; + // Create line with eof token. pushToken(FormatTok); addUnwrappedLine(); @@ -712,26 +723,27 @@ void UnwrappedLineParser::parsePPIf(bool IfDef) { // If there's a #ifndef on the first line, and the only lines before it are // comments, it could be an include guard. bool MaybeIncludeGuard = IfNDef; - if (!IncludeGuardRejected && !FoundIncludeGuardStart && MaybeIncludeGuard) { + if (IncludeGuard == IG_Inited && MaybeIncludeGuard) for (auto &Line : Lines) { if (!Line.Tokens.front().Tok->is(tok::comment)) { MaybeIncludeGuard = false; - IncludeGuardRejected = true; + IncludeGuard = IG_Rejected; break; } } - } --PPBranchLevel; parsePPUnknown(); ++PPBranchLevel; - if (!IncludeGuardRejected && !FoundIncludeGuardStart && MaybeIncludeGuard) - IfNdefCondition = IfCondition; + if (IncludeGuard == IG_Inited && MaybeIncludeGuard) { + IncludeGuard = IG_IfNdefed; + IncludeGuardToken = IfCondition; + } } void UnwrappedLineParser::parsePPElse() { // If a potential include guard has an #else, it's not an include guard. - if (FoundIncludeGuardStart && PPBranchLevel == 0) - FoundIncludeGuardStart = false; + if (IncludeGuard == IG_Defined && PPBranchLevel == 0) + IncludeGuard = IG_Rejected; conditionalCompilationAlternative(); if (PPBranchLevel > -1) --PPBranchLevel; @@ -745,34 +757,37 @@ void UnwrappedLineParser::parsePPEndIf() { conditionalCompilationEnd(); parsePPUnknown(); // If the #endif of a potential include guard is the last thing in the file, - // then we count it as a real include guard and subtract one from every - // preprocessor indent. + // then we found an include guard. unsigned TokenPosition = Tokens->getPosition(); FormatToken *PeekNext = AllTokens[TokenPosition]; - if (FoundIncludeGuardStart && PPBranchLevel == -1 && PeekNext->is(tok::eof) && + if (IncludeGuard == IG_Defined && PPBranchLevel == -1 && + PeekNext->is(tok::eof) && Style.IndentPPDirectives != FormatStyle::PPDIS_None) - for (auto &Line : Lines) - if (Line.InPPDirective && Line.Level > 0) - --Line.Level; + IncludeGuard = IG_Found; } void UnwrappedLineParser::parsePPDefine() { nextToken(); if (FormatTok->Tok.getKind() != tok::identifier) { + IncludeGuard = IG_Rejected; + IncludeGuardToken = nullptr; parsePPUnknown(); return; } - if (IfNdefCondition && IfNdefCondition->TokenText == FormatTok->TokenText) { - FoundIncludeGuardStart = true; + + if (IncludeGuard == IG_IfNdefed && + IncludeGuardToken->TokenText == FormatTok->TokenText) { + IncludeGuard = IG_Defined; + IncludeGuardToken = nullptr; for (auto &Line : Lines) { if (!Line.Tokens.front().Tok->isOneOf(tok::comment, tok::hash)) { - FoundIncludeGuardStart = false; + IncludeGuard = IG_Rejected; break; } } } - IfNdefCondition = nullptr; + nextToken(); if (FormatTok->Tok.getKind() == tok::l_paren && FormatTok->WhitespaceRange.getBegin() == @@ -799,7 +814,6 @@ void UnwrappedLineParser::parsePPUnknown() { if (Style.IndentPPDirectives == FormatStyle::PPDIS_AfterHash) Line->Level += PPBranchLevel + 1; addUnwrappedLine(); - IfNdefCondition = nullptr; } // Here we blacklist certain tokens that are not usually the first token in an Modified: vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.h ============================================================================== --- vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.h Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Format/UnwrappedLineParser.h Fri Feb 16 19:10:26 2018 (r329396) @@ -248,10 +248,23 @@ class UnwrappedLineParser { (private) // sequence. std::stack PPChainBranchIndex; - // Contains the #ifndef condition for a potential include guard. - FormatToken *IfNdefCondition; - bool FoundIncludeGuardStart; - bool IncludeGuardRejected; + // Include guard search state. Used to fixup preprocessor indent levels + // so that include guards do not participate in indentation. + enum IncludeGuardState { + IG_Inited, // Search started, looking for #ifndef. + IG_IfNdefed, // #ifndef found, IncludeGuardToken points to condition. + IG_Defined, // Matching #define found, checking other requirements. + IG_Found, // All requirements met, need to fix indents. + IG_Rejected, // Search failed or never started. + }; + + // Current state of include guard search. + IncludeGuardState IncludeGuard; + + // Points to the #ifndef condition for a potential include guard. Null unless + // IncludeGuardState == IG_IfNdefed. + FormatToken *IncludeGuardToken; + // Contains the first start column where the source begins. This is zero for // normal source code and may be nonzero when formatting a code fragment that // does not start at the beginning of the file. Modified: vendor/clang/dist-release_60/lib/Headers/avx512bwintrin.h ============================================================================== --- vendor/clang/dist-release_60/lib/Headers/avx512bwintrin.h Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Headers/avx512bwintrin.h Fri Feb 16 19:10:26 2018 (r329396) @@ -1854,13 +1854,15 @@ _mm512_maskz_set1_epi8 (__mmask64 __M, char __A) static __inline__ __mmask64 __DEFAULT_FN_ATTRS _mm512_kunpackd (__mmask64 __A, __mmask64 __B) { - return (__mmask64) (( __A & 0xFFFFFFFF) | ( __B << 32)); + return (__mmask64) __builtin_ia32_kunpckdi ((__mmask64) __A, + (__mmask64) __B); } static __inline__ __mmask32 __DEFAULT_FN_ATTRS _mm512_kunpackw (__mmask32 __A, __mmask32 __B) { -return (__mmask32) (( __A & 0xFFFF) | ( __B << 16)); + return (__mmask32) __builtin_ia32_kunpcksi ((__mmask32) __A, + (__mmask32) __B); } static __inline__ __m512i __DEFAULT_FN_ATTRS Modified: vendor/clang/dist-release_60/lib/Headers/avx512fintrin.h ============================================================================== --- vendor/clang/dist-release_60/lib/Headers/avx512fintrin.h Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Headers/avx512fintrin.h Fri Feb 16 19:10:26 2018 (r329396) @@ -8787,7 +8787,7 @@ _mm512_kortestz (__mmask16 __A, __mmask16 __B) static __inline__ __mmask16 __DEFAULT_FN_ATTRS _mm512_kunpackb (__mmask16 __A, __mmask16 __B) { - return (__mmask16) (( __A & 0xFF) | ( __B << 8)); + return (__mmask16) __builtin_ia32_kunpckhi ((__mmask16) __A, (__mmask16) __B); } static __inline__ __mmask16 __DEFAULT_FN_ATTRS Modified: vendor/clang/dist-release_60/lib/Lex/LiteralSupport.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Lex/LiteralSupport.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Lex/LiteralSupport.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -738,15 +738,17 @@ void NumericLiteralParser::ParseDecimalOrOctalCommon(S s++; radix = 10; saw_exponent = true; - if (*s == '+' || *s == '-') s++; // sign + if (s != ThisTokEnd && (*s == '+' || *s == '-')) s++; // sign const char *first_non_digit = SkipDigits(s); if (containsDigits(s, first_non_digit)) { checkSeparator(TokLoc, s, CSK_BeforeDigits); s = first_non_digit; } else { - PP.Diag(PP.AdvanceToTokenCharacter(TokLoc, Exponent-ThisTokBegin), - diag::err_exponent_has_no_digits); - hadError = true; + if (!hadError) { + PP.Diag(PP.AdvanceToTokenCharacter(TokLoc, Exponent-ThisTokBegin), + diag::err_exponent_has_no_digits); + hadError = true; + } return; } } @@ -787,10 +789,12 @@ void NumericLiteralParser::checkSeparator(SourceLocati } else if (Pos == ThisTokEnd) return; - if (isDigitSeparator(*Pos)) + if (isDigitSeparator(*Pos)) { PP.Diag(PP.AdvanceToTokenCharacter(TokLoc, Pos - ThisTokBegin), diag::err_digit_separator_not_between_digits) << IsAfterDigits; + hadError = true; + } } /// ParseNumberStartingWithZero - This method is called when the first character @@ -840,12 +844,14 @@ void NumericLiteralParser::ParseNumberStartingWithZero const char *Exponent = s; s++; saw_exponent = true; - if (*s == '+' || *s == '-') s++; // sign + if (s != ThisTokEnd && (*s == '+' || *s == '-')) s++; // sign const char *first_non_digit = SkipDigits(s); if (!containsDigits(s, first_non_digit)) { - PP.Diag(PP.AdvanceToTokenCharacter(TokLoc, Exponent-ThisTokBegin), - diag::err_exponent_has_no_digits); - hadError = true; + if (!hadError) { + PP.Diag(PP.AdvanceToTokenCharacter(TokLoc, Exponent-ThisTokBegin), + diag::err_exponent_has_no_digits); + hadError = true; + } return; } checkSeparator(TokLoc, s, CSK_BeforeDigits); Modified: vendor/clang/dist-release_60/lib/Sema/SemaChecking.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Sema/SemaChecking.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Sema/SemaChecking.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -8972,6 +8972,16 @@ static void AnalyzeComparison(Sema &S, BinaryOperator LHS = LHS->IgnoreParenImpCasts(); RHS = RHS->IgnoreParenImpCasts(); + if (!S.getLangOpts().CPlusPlus) { + // Avoid warning about comparison of integers with different signs when + // RHS/LHS has a `typeof(E)` type whose sign is different from the sign of + // the type of `E`. + if (const auto *TET = dyn_cast(LHS->getType())) + LHS = TET->getUnderlyingExpr()->IgnoreParenImpCasts(); + if (const auto *TET = dyn_cast(RHS->getType())) + RHS = TET->getUnderlyingExpr()->IgnoreParenImpCasts(); + } + // Check to see if one of the (unmodified) operands is of different // signedness. Expr *signedOperand, *unsignedOperand; Modified: vendor/clang/dist-release_60/lib/Sema/SemaDecl.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Sema/SemaDecl.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Sema/SemaDecl.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -12507,9 +12507,19 @@ void Sema::ActOnFinishDelayedAttribute(Scope *S, Decl /// call, forming a call to an implicitly defined function (per C99 6.5.1p2). NamedDecl *Sema::ImplicitlyDefineFunction(SourceLocation Loc, IdentifierInfo &II, Scope *S) { + // Find the scope in which the identifier is injected and the corresponding + // DeclContext. + // FIXME: C89 does not say what happens if there is no enclosing block scope. + // In that case, we inject the declaration into the translation unit scope + // instead. Scope *BlockScope = S; while (!BlockScope->isCompoundStmtScope() && BlockScope->getParent()) BlockScope = BlockScope->getParent(); + + Scope *ContextScope = BlockScope; + while (!ContextScope->getEntity()) + ContextScope = ContextScope->getParent(); + ContextRAII SavedContext(*this, ContextScope->getEntity()); // Before we produce a declaration for an implicitly defined // function, see whether there was a locally-scoped declaration of Modified: vendor/clang/dist-release_60/lib/Sema/SemaInit.cpp ============================================================================== --- vendor/clang/dist-release_60/lib/Sema/SemaInit.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/lib/Sema/SemaInit.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -352,6 +352,7 @@ class InitListChecker { bool FillWithNoInit = false); void FillInEmptyInitializations(const InitializedEntity &Entity, InitListExpr *ILE, bool &RequiresSecondPass, + InitListExpr *OuterILE, unsigned OuterIndex, bool FillWithNoInit = false); bool CheckFlexibleArrayInit(const InitializedEntity &Entity, Expr *InitExpr, FieldDecl *Field, @@ -517,12 +518,13 @@ void InitListChecker::FillInEmptyInitForBase( ILE->setInit(Init, BaseInit.getAs()); } else if (InitListExpr *InnerILE = dyn_cast(ILE->getInit(Init))) { - FillInEmptyInitializations(BaseEntity, InnerILE, - RequiresSecondPass, FillWithNoInit); + FillInEmptyInitializations(BaseEntity, InnerILE, RequiresSecondPass, + ILE, Init, FillWithNoInit); } else if (DesignatedInitUpdateExpr *InnerDIUE = dyn_cast(ILE->getInit(Init))) { FillInEmptyInitializations(BaseEntity, InnerDIUE->getUpdater(), - RequiresSecondPass, /*FillWithNoInit =*/true); + RequiresSecondPass, ILE, Init, + /*FillWithNoInit =*/true); } } @@ -605,24 +607,43 @@ void InitListChecker::FillInEmptyInitForField(unsigned } else if (InitListExpr *InnerILE = dyn_cast(ILE->getInit(Init))) FillInEmptyInitializations(MemberEntity, InnerILE, - RequiresSecondPass, FillWithNoInit); + RequiresSecondPass, ILE, Init, FillWithNoInit); else if (DesignatedInitUpdateExpr *InnerDIUE = dyn_cast(ILE->getInit(Init))) FillInEmptyInitializations(MemberEntity, InnerDIUE->getUpdater(), - RequiresSecondPass, /*FillWithNoInit =*/ true); + RequiresSecondPass, ILE, Init, + /*FillWithNoInit =*/true); } /// Recursively replaces NULL values within the given initializer list /// with expressions that perform value-initialization of the -/// appropriate type. +/// appropriate type, and finish off the InitListExpr formation. void InitListChecker::FillInEmptyInitializations(const InitializedEntity &Entity, InitListExpr *ILE, bool &RequiresSecondPass, + InitListExpr *OuterILE, + unsigned OuterIndex, bool FillWithNoInit) { assert((ILE->getType() != SemaRef.Context.VoidTy) && "Should not have void type"); + // If this is a nested initializer list, we might have changed its contents + // (and therefore some of its properties, such as instantiation-dependence) + // while filling it in. Inform the outer initializer list so that its state + // can be updated to match. + // FIXME: We should fully build the inner initializers before constructing + // the outer InitListExpr instead of mutating AST nodes after they have + // been used as subexpressions of other nodes. + struct UpdateOuterILEWithUpdatedInit { + InitListExpr *Outer; + unsigned OuterIndex; + ~UpdateOuterILEWithUpdatedInit() { + if (Outer) + Outer->setInit(OuterIndex, Outer->getInit(OuterIndex)); + } + } UpdateOuterRAII = {OuterILE, OuterIndex}; + // A transparent ILE is not performing aggregate initialization and should // not be filled in. if (ILE->isTransparent()) @@ -769,11 +790,12 @@ InitListChecker::FillInEmptyInitializations(const Init } else if (InitListExpr *InnerILE = dyn_cast_or_null(InitExpr)) FillInEmptyInitializations(ElementEntity, InnerILE, RequiresSecondPass, - FillWithNoInit); + ILE, Init, FillWithNoInit); else if (DesignatedInitUpdateExpr *InnerDIUE = dyn_cast_or_null(InitExpr)) FillInEmptyInitializations(ElementEntity, InnerDIUE->getUpdater(), - RequiresSecondPass, /*FillWithNoInit =*/ true); + RequiresSecondPass, ILE, Init, + /*FillWithNoInit =*/true); } } @@ -795,10 +817,11 @@ InitListChecker::InitListChecker(Sema &S, const Initia if (!hadError && !VerifyOnly) { bool RequiresSecondPass = false; - FillInEmptyInitializations(Entity, FullyStructuredList, RequiresSecondPass); + FillInEmptyInitializations(Entity, FullyStructuredList, RequiresSecondPass, + /*OuterILE=*/nullptr, /*OuterIndex=*/0); if (RequiresSecondPass && !hadError) FillInEmptyInitializations(Entity, FullyStructuredList, - RequiresSecondPass); + RequiresSecondPass, nullptr, 0); } } @@ -1162,10 +1185,12 @@ void InitListChecker::CheckSubElementType(const Initia if (!hadError && !VerifyOnly) { bool RequiresSecondPass = false; FillInEmptyInitializations(Entity, InnerStructuredList, - RequiresSecondPass); + RequiresSecondPass, StructuredList, + StructuredIndex); if (RequiresSecondPass && !hadError) FillInEmptyInitializations(Entity, InnerStructuredList, - RequiresSecondPass); + RequiresSecondPass, StructuredList, + StructuredIndex); } ++StructuredIndex; ++Index; Modified: vendor/clang/dist-release_60/test/CodeGen/avx512bw-builtins.c ============================================================================== --- vendor/clang/dist-release_60/test/CodeGen/avx512bw-builtins.c Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/CodeGen/avx512bw-builtins.c Fri Feb 16 19:10:26 2018 (r329396) @@ -1626,26 +1626,16 @@ __m512i test_mm512_maskz_set1_epi8(__mmask64 __M, char return _mm512_maskz_set1_epi8(__M, __A); } -__mmask64 test_mm512_kunpackd(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { +__mmask64 test_mm512_kunpackd(__mmask64 __A, __mmask64 __B) { // CHECK-LABEL: @test_mm512_kunpackd - // CHECK: bitcast <64 x i1> %{{.*}} to i64 - // CHECK: bitcast <64 x i1> %{{.*}} to i64 - // CHECK: and i64 %{{.*}}, 4294967295 - // CHECK: shl i64 %{{.*}}, 32 - // CHECK: or i64 %{{.*}}, %{{.*}} - // CHECK: bitcast i64 %{{.*}} to <64 x i1> - return _mm512_mask_cmpneq_epu8_mask(_mm512_kunpackd(_mm512_cmpneq_epu8_mask(__B, __A),_mm512_cmpneq_epu8_mask(__C, __D)), __E, __F); + // CHECK: @llvm.x86.avx512.kunpck.dq + return _mm512_kunpackd(__A, __B); } -__mmask32 test_mm512_kunpackw(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { +__mmask32 test_mm512_kunpackw(__mmask32 __A, __mmask32 __B) { // CHECK-LABEL: @test_mm512_kunpackw - // CHECK: bitcast <32 x i1> %{{.*}} to i32 - // CHECK: bitcast <32 x i1> %{{.*}} to i32 - // CHECK: and i32 %{{.*}}, 65535 - // CHECK: shl i32 %{{.*}}, 16 - // CHECK: or i32 %{{.*}}, %{{.*}} - // CHECK: bitcast i32 %{{.*}} to <32 x i1> - return _mm512_mask_cmpneq_epu16_mask(_mm512_kunpackw(_mm512_cmpneq_epu16_mask(__B, __A),_mm512_cmpneq_epu16_mask(__C, __D)), __E, __F); + // CHECK: @llvm.x86.avx512.kunpck.wd + return _mm512_kunpackw(__A, __B); } __m512i test_mm512_mask_loadu_epi16(__m512i __W, __mmask32 __U, void const *__P) { Modified: vendor/clang/dist-release_60/test/CodeGen/avx512f-builtins.c ============================================================================== --- vendor/clang/dist-release_60/test/CodeGen/avx512f-builtins.c Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/CodeGen/avx512f-builtins.c Fri Feb 16 19:10:26 2018 (r329396) @@ -6259,17 +6259,10 @@ int test_mm512_kortestz(__mmask16 __A, __mmask16 __B) return _mm512_kortestz(__A, __B); } -__mmask16 test_mm512_kunpackb(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { +__mmask16 test_mm512_kunpackb(__mmask16 __A, __mmask16 __B) { // CHECK-LABEL: @test_mm512_kunpackb - // CHECK: bitcast <16 x i1> %{{.*}} to i16 - // CHECK: bitcast <16 x i1> %{{.*}} to i16 - // CHECK: and i32 %{{.*}}, 255 - // CHECK: shl i32 %{{.*}}, 8 - // CHECK: or i32 %{{.*}}, %{{.*}} - // CHECK: bitcast i16 %{{.*}} to <16 x i1> - return _mm512_mask_cmpneq_epu32_mask(_mm512_kunpackb(_mm512_cmpneq_epu32_mask(__A, __B), - _mm512_cmpneq_epu32_mask(__C, __D)), - __E, __F); + // CHECK: @llvm.x86.avx512.kunpck.bw + return _mm512_kunpackb(__A, __B); } __mmask16 test_mm512_kxnor(__m512i __A, __m512i __B, __m512i __C, __m512i __D, __m512i __E, __m512i __F) { Modified: vendor/clang/dist-release_60/test/CodeGen/ms_abi.c ============================================================================== --- vendor/clang/dist-release_60/test/CodeGen/ms_abi.c Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/CodeGen/ms_abi.c Fri Feb 16 19:10:26 2018 (r329396) @@ -146,3 +146,16 @@ void __attribute__((sysv_abi)) f6(__builtin_ms_va_list // WIN64: %[[AP_VAL:.*]] = load i8*, i8** %[[AP]] // WIN64-NEXT: store i8* %[[AP_VAL]], i8** %[[AP2:.*]] } + +// This test checks if structs are passed according to Win64 calling convention +// when it's enforced by __attribute((ms_abi)). +struct i128 { + unsigned long long a; + unsigned long long b; +}; + +__attribute__((ms_abi)) struct i128 f7(struct i128 a) { + // WIN64: define void @f7(%struct.i128* noalias sret %agg.result, %struct.i128* %a) + // FREEBSD: define win64cc void @f7(%struct.i128* noalias sret %agg.result, %struct.i128* %a) + return a; +} Added: vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-missing-key.cpp ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-missing-key.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -0,0 +1,20 @@ +// RUN: %clang_cc1 -triple i686-windows-gnu -emit-llvm -std=c++1y -O0 -o - %s -w | FileCheck --check-prefix=GNU %s + +class __declspec(dllimport) QObjectData { +public: + virtual ~QObjectData() = 0; + void *ptr; + + int method() const; +}; + +class LocalClass : public QObjectData { +}; + +void call() { + (new LocalClass())->method(); +} + +// GNU-DAG: @_ZTV11QObjectData = available_externally dllimport +// GNU-DAG: @_ZTS11QObjectData = linkonce_odr +// GNU-DAG: @_ZTI11QObjectData = linkonce_odr Modified: vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-rtti.cpp ============================================================================== --- vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-rtti.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/CodeGenCXX/dllimport-rtti.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -12,7 +12,7 @@ struct __declspec(dllimport) S { // MSVC-DAG: @"\01??_R3S@@8" = linkonce_odr // GNU-DAG: @_ZTV1S = available_externally dllimport -// GNU-DAG: @_ZTI1S = external dllimport +// GNU-DAG: @_ZTI1S = linkonce_odr struct U : S { } u; Added: vendor/clang/dist-release_60/test/CodeGenCXX/microsoft-abi-emit-dependent.cpp ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist-release_60/test/CodeGenCXX/microsoft-abi-emit-dependent.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -0,0 +1,11 @@ +// RUN: %clang_cc1 -emit-llvm-only -fmodules -triple x86_64-windows %s +// PR36181 +#pragma clang module build foo +module foo {} +#pragma clang module contents +template struct A { + friend void f(A) {} +}; +#pragma clang module endbuild +#pragma clang module import foo +void g() { f(A()); } Added: vendor/clang/dist-release_60/test/CodeGenCXX/msabi-swiftcall-cc.cpp ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist-release_60/test/CodeGenCXX/msabi-swiftcall-cc.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -0,0 +1,28 @@ +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fdeclspec -emit-llvm %s -o - | FileCheck %s + +void __attribute__((__swiftcall__)) f() {} +// CHECK-DAG: @"\01?f@@YSXXZ" + +void (__attribute__((__swiftcall__)) *p)(); +// CHECK-DAG: @"\01?p@@3P6SXXZA" + +namespace { +void __attribute__((__swiftcall__)) __attribute__((__used__)) f() { } +// CHECK-DAG: "\01?f@?A@@YSXXZ" +} + +namespace n { +void __attribute__((__swiftcall__)) f() {} +// CHECK-DAG: "\01?f@n@@YSXXZ" +} + +struct __declspec(dllexport) S { + S(const S &) = delete; + S & operator=(const S &) = delete; + void __attribute__((__swiftcall__)) m() { } + // CHECK-DAG: "\01?m@S@@QASXXZ" +}; + +void f(void (__attribute__((__swiftcall__))())) {} +// CHECK-DAG: "\01?f@@YAXP6SXXZ@Z" + Modified: vendor/clang/dist-release_60/test/Lexer/cxx1y_digit_separators.cpp ============================================================================== --- vendor/clang/dist-release_60/test/Lexer/cxx1y_digit_separators.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/Lexer/cxx1y_digit_separators.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -51,6 +51,8 @@ namespace floating { float u = 0x.'p1f; // expected-error {{hexadecimal floating literal requires a significand}} float v = 0e'f; // expected-error {{exponent has no digits}} float w = 0x0p'f; // expected-error {{exponent has no digits}} + float x = 0'e+1; // expected-error {{digit separator cannot appear at end of digit sequence}} + float y = 0x0'p+1; // expected-error {{digit separator cannot appear at end of digit sequence}} } #line 123'456 Modified: vendor/clang/dist-release_60/test/Sema/bitfield.c ============================================================================== --- vendor/clang/dist-release_60/test/Sema/bitfield.c Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/Sema/bitfield.c Fri Feb 16 19:10:26 2018 (r329396) @@ -82,3 +82,7 @@ typedef __typeof__(+(t5.n--)) Unsigned; // also act li struct Test6 { : 0.0; // expected-error{{type name requires a specifier or qualifier}} }; + +struct PR36157 { + int n : 1 ? 1 : implicitly_declare_function(); // expected-warning {{invalid in C99}} +}; Modified: vendor/clang/dist-release_60/test/Sema/compare.c ============================================================================== --- vendor/clang/dist-release_60/test/Sema/compare.c Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/Sema/compare.c Fri Feb 16 19:10:26 2018 (r329396) @@ -391,3 +391,16 @@ typedef char two_chars[2]; void test12(unsigned a) { if (0 && -1 > a) { } } + +// PR36008 + +enum PR36008EnumTest { + kPR36008Value = 0, +}; + +void pr36008(enum PR36008EnumTest lhs) { + __typeof__(lhs) x = lhs; + __typeof__(kPR36008Value) y = (kPR36008Value); + if (x == y) x = y; // no warning + if (y == x) y = x; // no warning +} Added: vendor/clang/dist-release_60/test/Sema/cxx-as-c.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist-release_60/test/Sema/cxx-as-c.c Fri Feb 16 19:10:26 2018 (r329396) @@ -0,0 +1,9 @@ +// RUN: %clang_cc1 %s -verify + +// PR36157 +struct Foo { + Foo(int n) : n_(n) {} // expected-error 1+{{}} expected-warning 1+{{}} +private: + int n; +}; +int main() { Foo f; } // expected-error 1+{{}} Modified: vendor/clang/dist-release_60/test/SemaCXX/init-expr-crash.cpp ============================================================================== --- vendor/clang/dist-release_60/test/SemaCXX/init-expr-crash.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/SemaCXX/init-expr-crash.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -29,3 +29,11 @@ template struct B { return 0; } }; + +// This test checks for a crash that resulted from us miscomputing the +// dependence of a nested initializer list. +template struct X { + static constexpr int n = 4; + static constexpr int a[1][1] = {n}; +}; + Modified: vendor/clang/dist-release_60/test/SemaCXX/type-traits.cpp ============================================================================== --- vendor/clang/dist-release_60/test/SemaCXX/type-traits.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/SemaCXX/type-traits.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -2524,6 +2524,7 @@ static_assert(!has_unique_object_representations::value, "No references!"); static_assert(!has_unique_object_representations::value, "No references!"); static_assert(!has_unique_object_representations::value, "No empty types!"); +static_assert(!has_unique_object_representations::value, "No empty types!"); class Compressed : Empty { int x; Modified: vendor/clang/dist-release_60/test/SemaTemplate/instantiate-init.cpp ============================================================================== --- vendor/clang/dist-release_60/test/SemaTemplate/instantiate-init.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/test/SemaTemplate/instantiate-init.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -142,3 +142,17 @@ namespace ReturnStmtIsInitialization { template X f() { return {}; } auto &&x = f(); } + +namespace InitListUpdate { + struct A { int n; }; + using AA = A[1]; + + // Check that an init list update doesn't "lose" the pack-ness of an expression. + template void f() { + g(AA{0, [0].n = N} ...); // expected-warning 3{{overrides prior init}} expected-note 3{{previous init}} + g(AA{N, [0].n = 0} ...); // expected-warning 3{{overrides prior init}} expected-note 3{{previous init}} + }; + + void g(AA, AA); + void h() { f<1, 2>(); } // expected-note {{instantiation of}} +} Modified: vendor/clang/dist-release_60/unittests/Format/FormatTest.cpp ============================================================================== --- vendor/clang/dist-release_60/unittests/Format/FormatTest.cpp Fri Feb 16 19:10:22 2018 (r329395) +++ vendor/clang/dist-release_60/unittests/Format/FormatTest.cpp Fri Feb 16 19:10:26 2018 (r329396) @@ -2532,6 +2532,20 @@ TEST_F(FormatTest, IndentPreprocessorDirectives) { "#elif FOO\n" "#endif", Style); + // Non-identifier #define after potential include guard. + verifyFormat("#ifndef FOO\n" + "# define 1\n" + "#endif\n", + Style); + // #if closes past last non-preprocessor line. + verifyFormat("#ifndef FOO\n" + "#define FOO\n" + "#if 1\n" + "int i;\n" + "# define A 0\n" + "#endif\n" + "#endif\n", + Style); // FIXME: This doesn't handle the case where there's code between the // #ifndef and #define but all other conditions hold. This is because when // the #define line is parsed, UnwrappedLineParser::Lines doesn't hold the @@ -2580,21 +2594,85 @@ TEST_F(FormatTest, IndentPreprocessorDirectives) { "code();\n" "#endif", Style)); - // FIXME: The comment indent corrector in TokenAnnotator gets thrown off by - // preprocessor indentation. - EXPECT_EQ("#if 1\n" - " // comment\n" - "# define A 0\n" - "// comment\n" - "# define B 0\n" - "#endif", - format("#if 1\n" - "// comment\n" - "# define A 0\n" - " // comment\n" - "# define B 0\n" - "#endif", - Style)); + // Keep comments aligned with #, otherwise indent comments normally. These + // tests cannot use verifyFormat because messUp manipulates leading + // whitespace. + { + const char *Expected = "" + "void f() {\n" + "#if 1\n" + "// Preprocessor aligned.\n" + "# define A 0\n" + " // Code. Separated by blank line.\n" + "\n" + "# define B 0\n" + " // Code. Not aligned with #\n" + "# define C 0\n" + "#endif"; + const char *ToFormat = "" + "void f() {\n" + "#if 1\n" + "// Preprocessor aligned.\n" + "# define A 0\n" + "// Code. Separated by blank line.\n" + "\n" + "# define B 0\n" + " // Code. Not aligned with #\n" + "# define C 0\n" + "#endif"; + EXPECT_EQ(Expected, format(ToFormat, Style)); + EXPECT_EQ(Expected, format(Expected, Style)); + } + // Keep block quotes aligned. + { + const char *Expected = "" + "void f() {\n" + "#if 1\n" + "/* Preprocessor aligned. */\n" + "# define A 0\n" + " /* Code. Separated by blank line. */\n" + "\n" + "# define B 0\n" + " /* Code. Not aligned with # */\n" + "# define C 0\n" + "#endif"; + const char *ToFormat = "" + "void f() {\n" + "#if 1\n" + "/* Preprocessor aligned. */\n" + "# define A 0\n" + "/* Code. Separated by blank line. */\n" + "\n" + "# define B 0\n" + " /* Code. Not aligned with # */\n" + "# define C 0\n" + "#endif"; + EXPECT_EQ(Expected, format(ToFormat, Style)); + EXPECT_EQ(Expected, format(Expected, Style)); + } + // Keep comments aligned with un-indented directives. + { + const char *Expected = "" + "void f() {\n" + "// Preprocessor aligned.\n" + "#define A 0\n" + " // Code. Separated by blank line.\n" + "\n" + "#define B 0\n" + " // Code. Not aligned with #\n" + "#define C 0\n"; + const char *ToFormat = "" + "void f() {\n" + "// Preprocessor aligned.\n" + "#define A 0\n" + "// Code. Separated by blank line.\n" + "\n" + "#define B 0\n" + " // Code. Not aligned with #\n" + "#define C 0\n"; + EXPECT_EQ(Expected, format(ToFormat, Style)); + EXPECT_EQ(Expected, format(Expected, Style)); + } // Test with tabs. Style.UseTab = FormatStyle::UT_Always; Style.IndentWidth = 8; From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:35 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 87D30F095E9; Fri, 16 Feb 2018 19:10:35 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 380F16C429; Fri, 16 Feb 2018 19:10:35 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 1AA8011BBD; Fri, 16 Feb 2018 19:10:35 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAYaE069090; Fri, 16 Feb 2018 19:10:34 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAYfZ069089; Fri, 16 Feb 2018 19:10:34 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAYfZ069089@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329397 - vendor/clang/clang-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/clang/clang-release_60-r325330 X-SVN-Commit-Revision: 329397 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:35 -0000 Author: dim Date: Fri Feb 16 19:10:34 2018 New Revision: 329397 URL: https://svnweb.freebsd.org/changeset/base/329397 Log: Tag clang release_60 branch r325330. Added: vendor/clang/clang-release_60-r325330/ - copied from r329396, vendor/clang/dist-release_60/ From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:44 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 6241AF09783; Fri, 16 Feb 2018 19:10:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 902446C57A; Fri, 16 Feb 2018 19:10:41 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 5B8BD11BC6; Fri, 16 Feb 2018 19:10:40 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAewT069879; Fri, 16 Feb 2018 19:10:40 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAeQt069878; Fri, 16 Feb 2018 19:10:40 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAeQt069878@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329399 - vendor/compiler-rt/compiler-rt-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/compiler-rt/compiler-rt-release_60-r325330 X-SVN-Commit-Revision: 329399 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:44 -0000 Author: dim Date: Fri Feb 16 19:10:40 2018 New Revision: 329399 URL: https://svnweb.freebsd.org/changeset/base/329399 Log: Tag compiler-rt release_60 branch r325330. Added: vendor/compiler-rt/compiler-rt-release_60-r325330/ - copied from r329398, vendor/compiler-rt/dist-release_60/ From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:47 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7ACB1F097AF; Fri, 16 Feb 2018 19:10:47 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 888996C624; Fri, 16 Feb 2018 19:10:45 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id B704211BD1; Fri, 16 Feb 2018 19:10:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAicc069931; Fri, 16 Feb 2018 19:10:44 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAixM069928; Fri, 16 Feb 2018 19:10:44 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAixM069928@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329400 - in vendor/libc++/dist-release_60: . test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area test/std/utilities/meta/meta.unary/meta.unary.prop X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/libc++/dist-release_60: . test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area test/std/utilities/meta/meta.unary/meta.unary.prop X-SVN-Commit-Revision: 329400 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:47 -0000 Author: dim Date: Fri Feb 16 19:10:44 2018 New Revision: 329400 URL: https://svnweb.freebsd.org/changeset/base/329400 Log: Vendor import of libc++ release_60 branch r325330: https://llvm.org/svn/llvm-project/libcxx/branches/release_60@325330 Modified: vendor/libc++/dist-release_60/CMakeLists.txt vendor/libc++/dist-release_60/test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp vendor/libc++/dist-release_60/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.pass.cpp Modified: vendor/libc++/dist-release_60/CMakeLists.txt ============================================================================== --- vendor/libc++/dist-release_60/CMakeLists.txt Fri Feb 16 19:10:40 2018 (r329399) +++ vendor/libc++/dist-release_60/CMakeLists.txt Fri Feb 16 19:10:44 2018 (r329400) @@ -135,6 +135,9 @@ if (LIBCXX_CXX_ABI STREQUAL "default") elseif (APPLE) set(LIBCXX_CXX_ABI_LIBNAME "libcxxabi") set(LIBCXX_CXX_ABI_SYSTEM 1) + elseif (${CMAKE_SYSTEM_NAME} MATCHES "FreeBSD") + set(LIBCXX_CXX_ABI_LIBNAME "libcxxrt") + set(LIBCXX_CXX_ABI_INCLUDE_PATHS "/usr/include/c++/v1") else() set(LIBCXX_CXX_ABI_LIBNAME "default") endif() Modified: vendor/libc++/dist-release_60/test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp ============================================================================== --- vendor/libc++/dist-release_60/test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp Fri Feb 16 19:10:40 2018 (r329399) +++ vendor/libc++/dist-release_60/test/std/input.output/stream.buffers/streambuf/streambuf.protected/streambuf.put.area/pbump2gig.pass.cpp Fri Feb 16 19:10:44 2018 (r329400) @@ -32,12 +32,13 @@ int main() #ifndef TEST_HAS_NO_EXCEPTIONS try { #endif - std::string str(2147483648, 'a'); - SB sb; - sb.str(str); - assert(sb.pubpbase() <= sb.pubpptr()); + std::string str(2147483648, 'a'); + SB sb; + sb.str(str); + assert(sb.pubpbase() <= sb.pubpptr()); #ifndef TEST_HAS_NO_EXCEPTIONS - } - catch (const std::bad_alloc &) {} + } + catch (const std::length_error &) {} // maybe the string can't take 2GB + catch (const std::bad_alloc &) {} // maybe we don't have enough RAM #endif } Modified: vendor/libc++/dist-release_60/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.pass.cpp ============================================================================== --- vendor/libc++/dist-release_60/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.pass.cpp Fri Feb 16 19:10:40 2018 (r329399) +++ vendor/libc++/dist-release_60/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.pass.cpp Fri Feb 16 19:10:44 2018 (r329400) @@ -55,7 +55,8 @@ class NotEmpty virtual ~NotEmpty(); }; -union Union {}; +union EmptyUnion {}; +struct NonEmptyUnion {int x; unsigned y;}; struct bit_zero { @@ -84,6 +85,7 @@ int main() { test_has_not_has_unique_object_representations(); test_has_not_has_unique_object_representations(); + test_has_not_has_unique_object_representations(); test_has_not_has_unique_object_representations(); test_has_not_has_unique_object_representations(); test_has_not_has_unique_object_representations(); @@ -97,7 +99,7 @@ int main() test_has_unique_object_representations(); - test_has_unique_object_representations(); + test_has_unique_object_representations(); test_has_unique_object_representations(); test_has_unique_object_representations(); From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:53 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8F7FEF0980D; Fri, 16 Feb 2018 19:10:53 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 87B0B6C822; Fri, 16 Feb 2018 19:10:51 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D598311BDB; Fri, 16 Feb 2018 19:10:50 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAoTc070039; Fri, 16 Feb 2018 19:10:50 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAn5F070028; Fri, 16 Feb 2018 19:10:49 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAn5F070028@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:49 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329402 - in vendor/lld/dist-release_60: COFF ELF test/COFF test/ELF test/ELF/Inputs X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/lld/dist-release_60: COFF ELF test/COFF test/ELF test/ELF/Inputs X-SVN-Commit-Revision: 329402 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:53 -0000 Author: dim Date: Fri Feb 16 19:10:49 2018 New Revision: 329402 URL: https://svnweb.freebsd.org/changeset/base/329402 Log: Vendor import of lld release_60 branch r325330: https://llvm.org/svn/llvm-project/lld/branches/release_60@325330 Added: vendor/lld/dist-release_60/test/ELF/Inputs/mips-gp-dips-corrupt-ver.s (contents, props changed) vendor/lld/dist-release_60/test/ELF/Inputs/mips-gp-dips-corrupt-ver.so (contents, props changed) vendor/lld/dist-release_60/test/ELF/mips-gp-disp-ver.s (contents, props changed) Modified: vendor/lld/dist-release_60/COFF/PDB.cpp vendor/lld/dist-release_60/ELF/Driver.cpp vendor/lld/dist-release_60/ELF/InputFiles.cpp vendor/lld/dist-release_60/ELF/Options.td vendor/lld/dist-release_60/test/COFF/pdb-type-server-missing.yaml vendor/lld/dist-release_60/test/ELF/pie.s Modified: vendor/lld/dist-release_60/COFF/PDB.cpp ============================================================================== --- vendor/lld/dist-release_60/COFF/PDB.cpp Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/COFF/PDB.cpp Fri Feb 16 19:10:49 2018 (r329402) @@ -96,10 +96,11 @@ class PDBLinker { (public) /// If the object does not use a type server PDB (compiled with /Z7), we merge /// all the type and item records from the .debug$S stream and fill in the /// caller-provided ObjectIndexMap. - const CVIndexMap &mergeDebugT(ObjFile *File, CVIndexMap &ObjectIndexMap); + Expected mergeDebugT(ObjFile *File, + CVIndexMap &ObjectIndexMap); - const CVIndexMap &maybeMergeTypeServerPDB(ObjFile *File, - TypeServer2Record &TS); + Expected maybeMergeTypeServerPDB(ObjFile *File, + TypeServer2Record &TS); /// Add the section map and section contributions to the PDB. void addSections(ArrayRef OutputSections, @@ -140,6 +141,10 @@ class PDBLinker { (public) /// Type index mappings of type server PDBs that we've loaded so far. std::map TypeServerIndexMappings; + + /// List of TypeServer PDBs which cannot be loaded. + /// Cached to prevent repeated load attempts. + std::set MissingTypeServerPDBs; }; } @@ -230,8 +235,8 @@ maybeReadTypeServerRecord(CVTypeArray &Types) { return std::move(TS); } -const CVIndexMap &PDBLinker::mergeDebugT(ObjFile *File, - CVIndexMap &ObjectIndexMap) { +Expected PDBLinker::mergeDebugT(ObjFile *File, + CVIndexMap &ObjectIndexMap) { ArrayRef Data = getDebugSection(File, ".debug$T"); if (Data.empty()) return ObjectIndexMap; @@ -304,11 +309,19 @@ tryToLoadPDB(const GUID &GuidFromObj, StringRef TSPath return std::move(NS); } -const CVIndexMap &PDBLinker::maybeMergeTypeServerPDB(ObjFile *File, - TypeServer2Record &TS) { - // First, check if we already loaded a PDB with this GUID. Return the type +Expected PDBLinker::maybeMergeTypeServerPDB(ObjFile *File, + TypeServer2Record &TS) { + const GUID& TSId = TS.getGuid(); + StringRef TSPath = TS.getName(); + + // First, check if the PDB has previously failed to load. + if (MissingTypeServerPDBs.count(TSId)) + return make_error( + pdb::generic_error_code::type_server_not_found, TSPath); + + // Second, check if we already loaded a PDB with this GUID. Return the type // index mapping if we have it. - auto Insertion = TypeServerIndexMappings.insert({TS.getGuid(), CVIndexMap()}); + auto Insertion = TypeServerIndexMappings.insert({TSId, CVIndexMap()}); CVIndexMap &IndexMap = Insertion.first->second; if (!Insertion.second) return IndexMap; @@ -319,18 +332,21 @@ const CVIndexMap &PDBLinker::maybeMergeTypeServerPDB(O // Check for a PDB at: // 1. The given file path // 2. Next to the object file or archive file - auto ExpectedSession = tryToLoadPDB(TS.getGuid(), TS.getName()); + auto ExpectedSession = tryToLoadPDB(TSId, TSPath); if (!ExpectedSession) { consumeError(ExpectedSession.takeError()); StringRef LocalPath = !File->ParentName.empty() ? File->ParentName : File->getName(); SmallString<128> Path = sys::path::parent_path(LocalPath); sys::path::append( - Path, sys::path::filename(TS.getName(), sys::path::Style::windows)); - ExpectedSession = tryToLoadPDB(TS.getGuid(), Path); + Path, sys::path::filename(TSPath, sys::path::Style::windows)); + ExpectedSession = tryToLoadPDB(TSId, Path); } - if (auto E = ExpectedSession.takeError()) - fatal("Type server PDB was not found: " + toString(std::move(E))); + if (auto E = ExpectedSession.takeError()) { + TypeServerIndexMappings.erase(TSId); + MissingTypeServerPDBs.emplace(TSId); + return std::move(E); + } auto ExpectedTpi = (*ExpectedSession)->getPDBFile().getPDBTpiStream(); if (auto E = ExpectedTpi.takeError()) @@ -707,7 +723,16 @@ void PDBLinker::addObjFile(ObjFile *File) { // the PDB first, so that we can get the map from object file type and item // indices to PDB type and item indices. CVIndexMap ObjectIndexMap; - const CVIndexMap &IndexMap = mergeDebugT(File, ObjectIndexMap); + auto IndexMapResult = mergeDebugT(File, ObjectIndexMap); + + // If the .debug$T sections fail to merge, assume there is no debug info. + if (!IndexMapResult) { + warn("Type server PDB for " + Name + " is invalid, ignoring debug info. " + + toString(IndexMapResult.takeError())); + return; + } + + const CVIndexMap &IndexMap = *IndexMapResult; // Now do all live .debug$S sections. for (SectionChunk *DebugChunk : File->getDebugChunks()) { Modified: vendor/lld/dist-release_60/ELF/Driver.cpp ============================================================================== --- vendor/lld/dist-release_60/ELF/Driver.cpp Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/ELF/Driver.cpp Fri Feb 16 19:10:49 2018 (r329402) @@ -638,7 +638,7 @@ void LinkerDriver::readConfigs(opt::InputArgList &Args Config->Optimize = args::getInteger(Args, OPT_O, 1); Config->OrphanHandling = getOrphanHandling(Args); Config->OutputFile = Args.getLastArgValue(OPT_o); - Config->Pie = Args.hasFlag(OPT_pie, OPT_nopie, false); + Config->Pie = Args.hasFlag(OPT_pie, OPT_no_pie, false); Config->PrintGcSections = Args.hasFlag(OPT_print_gc_sections, OPT_no_print_gc_sections, false); Config->Rpath = getRpath(Args); Modified: vendor/lld/dist-release_60/ELF/InputFiles.cpp ============================================================================== --- vendor/lld/dist-release_60/ELF/InputFiles.cpp Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/ELF/InputFiles.cpp Fri Feb 16 19:10:49 2018 (r329402) @@ -856,6 +856,14 @@ template void SharedFile::parseRest continue; } + if (Config->EMachine == EM_MIPS) { + // FIXME: MIPS BFD linker puts _gp_disp symbol into DSO files + // and incorrectly assigns VER_NDX_LOCAL to this section global + // symbol. Here is a workaround for this bug. + if (Versym && VersymIndex == VER_NDX_LOCAL && Name == "_gp_disp") + continue; + } + const Elf_Verdef *Ver = nullptr; if (VersymIndex != VER_NDX_GLOBAL) { if (VersymIndex >= Verdefs.size() || VersymIndex == VER_NDX_LOCAL) { Modified: vendor/lld/dist-release_60/ELF/Options.td ============================================================================== --- vendor/lld/dist-release_60/ELF/Options.td Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/ELF/Options.td Fri Feb 16 19:10:49 2018 (r329402) @@ -202,6 +202,8 @@ def no_gnu_unique: F<"no-gnu-unique">, def no_merge_exidx_entries: F<"no-merge-exidx-entries">, HelpText<"Disable merging .ARM.exidx entries">; +def no_pie: F<"no-pie">, HelpText<"Do not create a position independent executable">; + def no_threads: F<"no-threads">, HelpText<"Do not run the linker multi-threaded">; @@ -210,8 +212,6 @@ def no_whole_archive: F<"no-whole-archive">, def noinhibit_exec: F<"noinhibit-exec">, HelpText<"Retain the executable output file whenever it is still usable">; - -def nopie: F<"nopie">, HelpText<"Do not create a position independent executable">; def no_omagic: Flag<["--"], "no-omagic">, MetaVarName<"">, HelpText<"Do not set the text data sections to be writable">; Modified: vendor/lld/dist-release_60/test/COFF/pdb-type-server-missing.yaml ============================================================================== --- vendor/lld/dist-release_60/test/COFF/pdb-type-server-missing.yaml Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/test/COFF/pdb-type-server-missing.yaml Fri Feb 16 19:10:49 2018 (r329402) @@ -1,13 +1,10 @@ # This is an object compiled with /Zi (see the LF_TYPESERVER2 record) without an # adjacent type server PDB. Test that LLD fails gracefully on it. -# FIXME: Ideally we'd do what MSVC does, which is to warn and drop all debug -# info in the object with the missing PDB. - # RUN: yaml2obj %s -o %t.obj -# RUN: not lld-link %t.obj -out:%t.exe -debug -pdb:%t.pdb -nodefaultlib -entry:main 2>&1 | FileCheck %s +# RUN: lld-link %t.obj -out:%t.exe -debug -pdb:%t.pdb -nodefaultlib -entry:main 2>&1 | FileCheck %s -# CHECK: error: Type server PDB was not found +# CHECK: warning: Type server PDB for {{.*}}.obj is invalid, ignoring debug info. --- !COFF header: Added: vendor/lld/dist-release_60/test/ELF/Inputs/mips-gp-dips-corrupt-ver.s ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/lld/dist-release_60/test/ELF/Inputs/mips-gp-dips-corrupt-ver.s Fri Feb 16 19:10:49 2018 (r329402) @@ -0,0 +1,14 @@ +# Source file for mips-gp-dips-corrupt-ver.so +# +# % cat gpdisp.ver +# LLD_1.0.0 { global: foo; }; +# +# % as mips-gp-dips-corrupt-ver.s -o mips-gp-dips-corrupt-ver.o +# % ld -shared -o mips-gp-dips-corrupt-ver.so \ +# --version-script gpdisp.ver mips-gp-dips-corrupt-ver.o + + .global foo + .text +foo: + lui $t0, %hi(_gp_disp) + addi $t0, $t0, %lo(_gp_disp) Added: vendor/lld/dist-release_60/test/ELF/Inputs/mips-gp-dips-corrupt-ver.so ============================================================================== Binary file. No diff available. Added: vendor/lld/dist-release_60/test/ELF/mips-gp-disp-ver.s ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/lld/dist-release_60/test/ELF/mips-gp-disp-ver.s Fri Feb 16 19:10:49 2018 (r329402) @@ -0,0 +1,15 @@ +# MIPS BFD linker puts _gp_disp symbol into DSO files and assigns zero +# version definition index to it. This value means 'unversioned local symbol' +# while _gp_disp is a section global symbol. We have to handle this bug +# in the LLD because BFD linker is used for building MIPS toolchain +# libraries. This test checks such handling. + +# RUN: llvm-mc -filetype=obj -triple=mips-unknown-linux %s -o %t.o +# RUN: ld.lld %t.o %S/Inputs/mips-gp-dips-corrupt-ver.so + +# REQUIRES: mips + + .global __start + .text +__start: + lw $t0, %got(foo)($gp) Modified: vendor/lld/dist-release_60/test/ELF/pie.s ============================================================================== --- vendor/lld/dist-release_60/test/ELF/pie.s Fri Feb 16 19:10:47 2018 (r329401) +++ vendor/lld/dist-release_60/test/ELF/pie.s Fri Feb 16 19:10:49 2018 (r329402) @@ -48,7 +48,7 @@ # CHECK: Type: PT_DYNAMIC ## Check -nopie -# RUN: ld.lld -nopie %t1.o -o %t2 +# RUN: ld.lld -no-pie %t1.o -o %t2 # RUN: llvm-readobj -file-headers -r %t2 | FileCheck %s --check-prefix=NOPIE # NOPIE-NOT: Type: SharedObject From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:10:50 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 40489F097D6; Fri, 16 Feb 2018 19:10:50 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 716716C793; Fri, 16 Feb 2018 19:10:48 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id BFEA711BD9; Fri, 16 Feb 2018 19:10:47 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAlqj069980; Fri, 16 Feb 2018 19:10:47 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAlqE069979; Fri, 16 Feb 2018 19:10:47 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAlqE069979@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329401 - vendor/libc++/libc++-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/libc++/libc++-release_60-r325330 X-SVN-Commit-Revision: 329401 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:10:50 -0000 Author: dim Date: Fri Feb 16 19:10:47 2018 New Revision: 329401 URL: https://svnweb.freebsd.org/changeset/base/329401 Log: Tag libc++ release_60 branch r325330. Added: vendor/libc++/libc++-release_60-r325330/ - copied from r329400, vendor/libc++/dist-release_60/ From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:11:01 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 72385F0985F; Fri, 16 Feb 2018 19:11:01 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 599466C97F; Fri, 16 Feb 2018 19:10:58 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D747711BE1; Fri, 16 Feb 2018 19:10:57 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAvsR070135; Fri, 16 Feb 2018 19:10:57 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAvM5070133; Fri, 16 Feb 2018 19:10:57 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAvM5070133@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329404 - in vendor/lldb/dist-release_60/source/Plugins: Platform/NetBSD Process/NetBSD X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: in vendor/lldb/dist-release_60/source/Plugins: Platform/NetBSD Process/NetBSD X-SVN-Commit-Revision: 329404 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:11:01 -0000 Author: dim Date: Fri Feb 16 19:10:57 2018 New Revision: 329404 URL: https://svnweb.freebsd.org/changeset/base/329404 Log: Vendor import of lldb release_60 branch r325330: https://llvm.org/svn/llvm-project/lldb/branches/release_60@325330 Modified: vendor/lldb/dist-release_60/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp vendor/lldb/dist-release_60/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp Modified: vendor/lldb/dist-release_60/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp ============================================================================== --- vendor/lldb/dist-release_60/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp Fri Feb 16 19:10:54 2018 (r329403) +++ vendor/lldb/dist-release_60/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp Fri Feb 16 19:10:57 2018 (r329404) @@ -45,20 +45,10 @@ static uint32_t g_initialize_count = 0; PlatformSP PlatformNetBSD::CreateInstance(bool force, const ArchSpec *arch) { Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_PLATFORM)); - if (log) { - const char *arch_name; - if (arch && arch->GetArchitectureName()) - arch_name = arch->GetArchitectureName(); - else - arch_name = ""; + LLDB_LOG(log, "force = {0}, arch=({1}, {2})", force, + arch ? arch->GetArchitectureName() : "", + arch ? arch->GetTriple().getTriple() : ""); - const char *triple_cstr = - arch ? arch->GetTriple().getTriple().c_str() : ""; - - log->Printf("PlatformNetBSD::%s(force=%s, arch={%s,%s})", __FUNCTION__, - force ? "true" : "false", arch_name, triple_cstr); - } - bool create = force; if (create == false && arch && arch->IsValid()) { const llvm::Triple &triple = arch->GetTriple(); @@ -72,18 +62,10 @@ PlatformSP PlatformNetBSD::CreateInstance(bool force, } } + LLDB_LOG(log, "create = {0}", create); if (create) { - if (log) - log->Printf("PlatformNetBSD::%s() creating remote-netbsd platform", - __FUNCTION__); return PlatformSP(new PlatformNetBSD(false)); } - - if (log) - log->Printf( - "PlatformNetBSD::%s() aborting creation of remote-netbsd platform", - __FUNCTION__); - return PlatformSP(); } @@ -258,19 +240,15 @@ bool PlatformNetBSD::CanDebugProcess() { } // For local debugging, NetBSD will override the debug logic to use llgs-launch -// rather than -// lldb-launch, llgs-attach. This differs from current lldb-launch, -// debugserver-attach -// approach on MacOSX. -lldb::ProcessSP PlatformNetBSD::DebugProcess( - ProcessLaunchInfo &launch_info, Debugger &debugger, - Target *target, // Can be NULL, if NULL create a new - // target, else use existing one - Status &error) { +// rather than lldb-launch, llgs-attach. This differs from current lldb-launch, +// debugserver-attach approach on MacOSX. +lldb::ProcessSP +PlatformNetBSD::DebugProcess(ProcessLaunchInfo &launch_info, Debugger &debugger, + Target *target, // Can be NULL, if NULL create a new + // target, else use existing one + Status &error) { Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_PLATFORM)); - if (log) - log->Printf("PlatformNetBSD::%s entered (target %p)", __FUNCTION__, - static_cast(target)); + LLDB_LOG(log, "target {0}", target); // If we're a remote host, use standard behavior from parent class. if (!IsHost()) @@ -293,61 +271,42 @@ lldb::ProcessSP PlatformNetBSD::DebugProcess( // Ensure we have a target. if (target == nullptr) { - if (log) - log->Printf("PlatformNetBSD::%s creating new target", __FUNCTION__); - + LLDB_LOG(log, "creating new target"); TargetSP new_target_sp; error = debugger.GetTargetList().CreateTarget(debugger, "", "", false, nullptr, new_target_sp); if (error.Fail()) { - if (log) - log->Printf("PlatformNetBSD::%s failed to create new target: %s", - __FUNCTION__, error.AsCString()); + LLDB_LOG(log, "failed to create new target: {0}", error); return process_sp; } target = new_target_sp.get(); if (!target) { error.SetErrorString("CreateTarget() returned nullptr"); - if (log) - log->Printf("PlatformNetBSD::%s failed: %s", __FUNCTION__, - error.AsCString()); + LLDB_LOG(log, "error: {0}", error); return process_sp; } - } else { - if (log) - log->Printf("PlatformNetBSD::%s using provided target", __FUNCTION__); } // Mark target as currently selected target. debugger.GetTargetList().SetSelectedTarget(target); // Now create the gdb-remote process. - if (log) - log->Printf( - "PlatformNetBSD::%s having target create process with gdb-remote plugin", - __FUNCTION__); + LLDB_LOG(log, "having target create process with gdb-remote plugin"); process_sp = target->CreateProcess( launch_info.GetListenerForProcess(debugger), "gdb-remote", nullptr); if (!process_sp) { error.SetErrorString("CreateProcess() failed for gdb-remote process"); - if (log) - log->Printf("PlatformNetBSD::%s failed: %s", __FUNCTION__, - error.AsCString()); + LLDB_LOG(log, "error: {0}", error); return process_sp; - } else { - if (log) - log->Printf("PlatformNetBSD::%s successfully created process", - __FUNCTION__); } + LLDB_LOG(log, "successfully created process"); // Adjust launch for a hijacker. ListenerSP listener_sp; if (!launch_info.GetHijackListener()) { - if (log) - log->Printf("PlatformNetBSD::%s setting up hijacker", __FUNCTION__); - + LLDB_LOG(log, "setting up hijacker"); listener_sp = Listener::MakeListener("lldb.PlatformNetBSD.DebugProcess.hijack"); launch_info.SetHijackListener(listener_sp); @@ -356,16 +315,13 @@ lldb::ProcessSP PlatformNetBSD::DebugProcess( // Log file actions. if (log) { - log->Printf( - "PlatformNetBSD::%s launching process with the following file actions:", - __FUNCTION__); - + LLDB_LOG(log, "launching process with the following file actions:"); StreamString stream; size_t i = 0; const FileAction *file_action; while ((file_action = launch_info.GetFileActionAtIndex(i++)) != nullptr) { file_action->Dump(stream); - log->PutCString(stream.GetData()); + LLDB_LOG(log, "{0}", stream.GetData()); stream.Clear(); } } @@ -378,16 +334,7 @@ lldb::ProcessSP PlatformNetBSD::DebugProcess( const StateType state = process_sp->WaitForProcessToStop( llvm::None, NULL, false, listener_sp); - if (state == eStateStopped) { - if (log) - log->Printf("PlatformNetBSD::%s pid %" PRIu64 " state %s\n", - __FUNCTION__, process_sp->GetID(), StateAsCString(state)); - } else { - if (log) - log->Printf("PlatformNetBSD::%s pid %" PRIu64 - " state is not stopped - %s\n", - __FUNCTION__, process_sp->GetID(), StateAsCString(state)); - } + LLDB_LOG(log, "pid {0} state {0}", process_sp->GetID(), state); } // Hook up process PTY if we have one (which we should for local debugging @@ -395,20 +342,11 @@ lldb::ProcessSP PlatformNetBSD::DebugProcess( int pty_fd = launch_info.GetPTY().ReleaseMasterFileDescriptor(); if (pty_fd != PseudoTerminal::invalid_fd) { process_sp->SetSTDIOFileDescriptor(pty_fd); - if (log) - log->Printf("PlatformNetBSD::%s pid %" PRIu64 - " hooked up STDIO pty to process", - __FUNCTION__, process_sp->GetID()); - } else { - if (log) - log->Printf("PlatformNetBSD::%s pid %" PRIu64 - " not using process STDIO pty", - __FUNCTION__, process_sp->GetID()); - } + LLDB_LOG(log, "hooked up STDIO pty to process"); + } else + LLDB_LOG(log, "not using process STDIO pty"); } else { - if (log) - log->Printf("PlatformNetBSD::%s process launch failed: %s", __FUNCTION__, - error.AsCString()); + LLDB_LOG(log, "process launch failed: {0}", error); // FIXME figure out appropriate cleanup here. Do we delete the target? Do // we delete the process? Does our caller do that? } Modified: vendor/lldb/dist-release_60/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp ============================================================================== --- vendor/lldb/dist-release_60/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp Fri Feb 16 19:10:54 2018 (r329403) +++ vendor/lldb/dist-release_60/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp Fri Feb 16 19:10:57 2018 (r329404) @@ -111,7 +111,7 @@ NativeProcessNetBSD::Factory::Launch(ProcessLaunchInfo for (const auto &thread : process_up->m_threads) static_cast(*thread).SetStoppedBySignal(SIGSTOP); - process_up->SetState(StateType::eStateStopped); + process_up->SetState(StateType::eStateStopped, false); return std::move(process_up); } From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:11:00 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 00E13F0984B; Fri, 16 Feb 2018 19:11:00 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 2C2A66C902; Fri, 16 Feb 2018 19:10:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 624A411BDF; Fri, 16 Feb 2018 19:10:55 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJAtUg070086; Fri, 16 Feb 2018 19:10:55 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJAtkh070085; Fri, 16 Feb 2018 19:10:55 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161910.w1GJAtkh070085@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:10:55 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329403 - vendor/lld/lld-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/lld/lld-release_60-r325330 X-SVN-Commit-Revision: 329403 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:11:00 -0000 Author: dim Date: Fri Feb 16 19:10:54 2018 New Revision: 329403 URL: https://svnweb.freebsd.org/changeset/base/329403 Log: Tag lld release_60 branch r325330. Added: vendor/lld/lld-release_60-r325330/ - copied from r329402, vendor/lld/dist-release_60/ From owner-svn-src-vendor@freebsd.org Fri Feb 16 19:11:04 2018 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 09F2CF09897; Fri, 16 Feb 2018 19:11:04 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 8A6EE6C9F2; Fri, 16 Feb 2018 19:11:01 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 994DE11BE4; Fri, 16 Feb 2018 19:11:00 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w1GJB0VQ070214; Fri, 16 Feb 2018 19:11:00 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w1GJB0pf070213; Fri, 16 Feb 2018 19:11:00 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201802161911.w1GJB0pf070213@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Fri, 16 Feb 2018 19:11:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r329405 - vendor/lldb/lldb-release_60-r325330 X-SVN-Group: vendor X-SVN-Commit-Author: dim X-SVN-Commit-Paths: vendor/lldb/lldb-release_60-r325330 X-SVN-Commit-Revision: 329405 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Feb 2018 19:11:04 -0000 Author: dim Date: Fri Feb 16 19:11:00 2018 New Revision: 329405 URL: https://svnweb.freebsd.org/changeset/base/329405 Log: Tag lldb release_60 branch r325330. Added: vendor/lldb/lldb-release_60-r325330/ - copied from r329404, vendor/lldb/dist-release_60/