Date: Sun, 27 Feb 2000 14:12:30 +0000 (GMT) From: Doug Rabson <dfr@nlsystems.com> To: Jeroen Ruigrok/Asmodai <asmodai@wxs.nl> Cc: new-bus@freebsd.org Subject: Re: New version of the newbus draft Message-ID: <Pine.BSF.4.21.0002271411580.8714-100000@salmon.nlsystems.com> In-Reply-To: <20000226113136.S79013@daemon.ninth-circle.org>
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On Sat, 26 Feb 2000, Jeroen Ruigrok/Asmodai wrote: > http://people.freebsd.org/~asmodai/newbus-draft.txt > > Added some blurb about interface methods, macro/function wrapping. > > 590 words/version 1.3. Here is my marked-up version of the text. | Newbus and busspace, an explanation of the possibilities | -------------------------------------------------------------------------------- | Newbus is the implementation of a new bus architecture based on abstraction | layers which saw its introduction in FreeBSD 4.0. Its goals are to provide a FreeBSD 3.0 [I used new bus to manage the moderately complex device hierarchy of the alpha port which was first released publicly in FreeBSD 3.0. The major busses (ISA and PCI) were not converted at this time and the x86 port didn't depend on new-bus at all.] | more object oriented means of interconnecting the various busses and devices | which a host system provides to the Operating System. | Its main features include amongst others: | | o dynamic attaching | o easy modularisation of drivers | o pseudo-busses. | | One of the most prominent changes is the migration from the flat and ad-hoc | system to a device tree lay-out. | | At the top level resides the ``nexus'' bus which is the parent to hang all | other busses on. This includes host-to-pci bridges, npx, and apm. | Under the host-to-pci bridge we have the pci bus(ses), pci-to-pci bridges, | pci devices, and pci-to-isa bridges. The nexus only exists on IA-32 platforms | and is not available on, for example, the Alpha platform. At the top level is the ``root'' device. This is the parent to hang all other devices on. For each architecture, there is typically a single child of ``root'' which has such things as host-pci bridges, etc. attached to it. For x86, this is the ``nexus'' device and for alpha, various different different models of alpha have different toplevel devices corresponding to the different hardware chipsets, including lca, apecs, cia and tsunami. | | A device in the newbus context can be a bus, a device, or a bridge. This is | kind of ambiguous. A device in the newbus context, more accurately, refers to | the total of its methods. A device in the newbus context represents a single hardware entity in the system. For instance each PCI device is represented by a newbus device. Any device in the system can have children; a device which has children is often called a ``bus''. Examples of common busses in the system are isa and pci which manage lists of devices attached to ISA and PCI busses respectively. Often, a connection between different kinds of bus is represented by a ``bridge'' device which normally has one child for the attached bus. An example of this is a pci-pci bridge which is represented by a device pcibN on the parent PCI bus and has a child pciN for the attached bus. This layout simplifies the implementation of the PCI bus tree, allowing common code to be used for both toplevel and bridged busses. | | Each device in the newbus architecture asks its parent to map its resources. | The parent then asks its own parent until the nexus is reached. So, basically | the nexus is the only part of the newbus system which knows about all resources. | An example: an isa device might want to map its IO port at 0x23c, so it asks its | parent, in this case the isa bus. The isa bus hands it over to the pci-to-isa | bridge which in its turn asks the pci bus, which reaches the host-to-pci bridge | and finally the nexus. | The beauty of this transition upwards is that there is room to translate the | requests. For example, the 0x23c IO port request might become memorymapped | at 0xc000023c on a MIPS box by the pci bridge. | | Resource allocation is, in the newbus case, something which can be controlled | anywhere in the device tree. On the Alpha the isa bus has its own set of | interrupts that isa devices allocate. The code on the IA-32 platform is kind | of hackish. In the IA-32 case the IRQs get allocated on the nexus. Also the IO | space and the memory get allocated on the nexus. Resource allocation can be controlled at any place in the device tree. For instance on many alpha platforms, ISA interrupts are managed separately from PCI interrupts and resource allocations for ISA interrupts are managed by the alpha's isa bus device. On IA-32, ISA and PCI interrupts are both managed by the toplevel nexus device. For both ports, memory and port address space is managed by a single entity - nexus for IA-32 and the relavent chipset driver on alpha (e.g. cia or tsunami). | | Newbus provides the driver with a bustag (bus_space_tag_t) and bushandle | (bus_space_handle_t) with which it can, for example, simply ask for its second | I/O-range and which will be provided to it. In order to regularise access to memory and port mapped resources, newbus integrates the bus_space apis from NetBSD. These provide a single api to replace inb/outb and direct memory reads/writes. The advantage of this is that a single driver can easily use either memory-mapped registers or port-mapped registers (some hardware supports both). This support is integrated into the resource allocation mechanism. When a resource is allocated, a driver can retrieve the associated bus_space_tag_t and bus_space_handle_t from the resource. | | Newbus also allows for definitions of interface methods in files dedicated to | this purpose. These are the .m files that are found under the src/sys | hierarchy. | | The .m files define an interface and its methods, and it could also define a | default for this method. For example (src/sys/pci/pci_if.m): | | INTERFACE pci; | | METHOD u_int32_t read_config { | device_t dev; | device_t child; | int reg; | int width; | }; | | METHOD void write_config { | device_t dev; | device_t child; | int reg; | u_int32_t val; | int width; | }; | | This will define and create macros and configuration structures for the | interface to be used at runtime compilation. | | In the above case we have defined PCI_READ_CONFIG() and PCI_WRITE_CONFIG(). We | take the INTERFACE and append _METHOD to create the macros. | | The configuration structures make the macros comply to the METHODs due to their | calling arguments: PCI_READ_CONFIG(device_t, device_t, int, int). | | Most of these macros get wrapped up inside functions. In our above example we | defined PCI_READ_CONFIG() and PCI_WRITE_CONFIG. If we know take a look at | src/sys/pci/pcivar.h we can see how the wrapping takes place: | | static __inline u_int32_t | pci_read_config(device_t dev, int reg, int width) | { | return PCI_READ_CONFIG(device_get_parent(dev), dev, reg, width); | } | | static __inline void | pci_write_config(device_t dev, int reg, u_int32_t val, int width) | { | PCI_WRITE_CONFIG(device_get_parent(dev), dev, reg, val, width); | } Strike this whole section. I'll write something new here. -- Doug Rabson Mail: dfr@nlsystems.com Nonlinear Systems Ltd. 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